FPGA Based System Design

FPGA Architecture
Week 2

This lecture has been prepared with the help on content from the book:

Reconfigurable Computing: The theory and Practice of FPGA-based Computation

Edited by Scott Hauck and Andr´e DeHon

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 Learning Outcomes
Students will be able to:
Understand the generic device architecture of FPGA
Understand the interconnect structure
Differentiate between fine and coarse grained logic
Understand the Xilinx and Altera device architectures

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Abstraction of FPGA Cells

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 FPGA Software Flow

Several authors tend to combine various design flow steps. Here,

technology mapping and packing are shown to be combined in
one step

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 Device Architecture
• Logic – The Computational Fabric
– Logic
– Interconnect
– Logic Elements
– Granularity
» Fine-grained
» Coarse-grained
– Programmability
– Permanent
– Reprogrammable

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A 3-input XOR using LUT

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 Simplest Form of an LUT

LUT is essentially a multiplexer, thus a purely combinational circuit

A D-FF is used to perform sequential logic functions

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 Device Architecture
• The Array and Interconnect
– Logic block/Functional block
– Island style architecture
– Interconnect Structures
• Nearest neighbor
• Segmented
• Hierarchical
– Programmability
– Summary

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 Island-style FPGA

Island-style terminology arose from the fact that Logic Blocks are surrounded by a
“sea of routing” just like islands surrounded by the sea water

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Connectivity Styles between Logic Blocks

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Island-style FPGA – Details

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 Switch Box Architecture

The dotted lines shown here have multiple “electronic switches” to allow connectivity between
horizontal and vertical channels or wires

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 Long Wire Segments

An example of how Length-2 wires are implemented in the architecture

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Hierarchical Routing

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 Device Architecture

• Extending Logic
– Extended Logic Elements
• Fast carry chain
• Multipliers
• RAM
• Processor blocks
– Summary

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 Device Architecture

• Configuration
– SRAM
– Flash Memory
– Antifuse
– Summary

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 Device Architecture
• Case Studies
– Altera Stratix
• Logic architecture
• Routing architecture
– Xilinx Vertex-II Pro
• Logic architecture
• Routing architecture
– Summary

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Example Device – Altera Stratix

Notice the placement of

dedicated RAM and DSP blocks
to perform certain functions so
that Configurable Logic may
perform other operations

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A Stratix Logic Element

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 Logic Array Block - Altera

A simplified LAB along with the local interconnect, as used by Altera. Please note that LAB is the
Altera’s term for CLB

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Altera’s MultiTrack Interconnect

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CLB from Xilinx’s Virtex-II Pro

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A dedicated Multiplier Block in Virtex-II Pro

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 Review Questions
• What is meant by fine-grained and coarse-grained FPGA architectures?
• What are SRAM based FPGAs?
• Explain the architecture of switch box and connection box in FPGA.
• Why is it said that 80% of the chip area in an FPGA consists of routing and
20% area is utilized by the logic? Justify this statement.

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