Reinforcement: 05-10 Years' relevant CIE answers.

Section 3.3

Past Papers Answers:

Section 3.3: Computer Architectures and the Fetch-Execute Cycle

May/June 2000
Oct/NOV 2000
May/June 2001
Oct/NOV 2001
May/June 2002
Oct/NOV 2002
May/June 2003
4. - Contents of PC copied into MAR/address of instruction in MAR
- Contents copied from address into MDR/instruction held in MAR
- Contents of MDR copied into CIR/instruction is put in CIR
- Contents of CIR decoded
- The number/25 from CIR copied into MDR
- Contents of MDR copied into accumulator/25 is placed in accumulator
- Incrementing PC at any stage
max 6 (6)
Oct/NOV 2003
5. - Value in PC placed in MAR
- PC incremented (anywhere)
- Contents of address in MAR placed in MDR
- Contents of MDR placed in CIR
- Op code in CIR is decoded
- Address is copied from CIR to MAR
- Contents of address in MAR placed in MDR/sent to accumulator
- Contents of MDR sent to accumulator
- Registers reset ready for next instruction
(1 per -, max 7) (7)

May/June 2004
Question 3
(a) Program is stored in memory
along with data
programs and data are indistinguishable
Uses a single processor
Sequential carrying out of instructions
(1 per point, max 3) (3)
(b) (i) Contains the address of the
next instruction to be carried out
Controls the sequence of instructions
(ii) Holds the instruction
while it is being executed
Contains both function and address/operand
(iii) Holds the address of the
instruction/data
that is next to be used
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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

(Must have first mark point before any credit)

(iv) Contents of any address that has been accessed
are placed in here first before being used
May be an instruction or a piece of data
OR:
Holds data/instructions
When being passed between memory and CPU/acts as a buffer between
memory and CPU
(v) Stores results of calculations/does the arithmetic
All input to and output from processor pass through the accumulator
(1 per point, max 2 per dotty, max 10) (10)

Oct/NOV 2004
5. (a) Copy the address in the PC into
the MAR
Increment the PC
Copy instruction at address held in MAR
Into the MDR
Copy contents of MDR into CIR
Execute the instruction
By altering the PC
to the value in the address part of instruction
Reset by returning to first step
Mark for mention of check for interrupt
(1 per point, max 9) (9)
(b) (i) Many processors working together (on the same run of a program)
(1)
(ii) ADV speeds up processes because more than one calculation can be
done at a time
DIS Programs must be specially written (2)
8. (b) Vast quantities of data
Large number of calculations
To be carried out in a very short time
Application is time sensitive
Application is processor bound
Parallel processing can increase processing speeds massively
(1 per point max 3) (3)

May/June 2005
2. -Address of instruction in PC…
-is copied to MAR
-PC is incremented
-Contents of address in MAR…
-copied to MDR
-(Contents of MDR) copied to CIR
-Decode instruction in CIR
-Load address (300) in CIR into PC
(1 per -, max 7) (7)
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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

9. -Some simulations are time sensitive

-and require large amounts of processing
-where processes are interrelated
-calculations can be done at same time which speeds up processing
-e.g. weather forecasting
(1 per -, max 4) (4)

Oct/NOV 2005
4. -Address of instruction in PC
-copied to MAR
-Contents of address in MAR
-copied to MDR
-Contents of MDR copied to CIR
-Decode instruction in CIR
-Load address in CIR into MAR
-Load contents of address in MAR into MDR
-Add contents of MDR to accumulator
-Increment PC (at any stage)
(1 per -, max 8) [8]

May/June 2006
5. - value in PC is…
- copied into MAR
- value in PC is incremented
- data in the address referred to in MAR is…
- copied into MDR
- data in MDR is copied into CIR
- contents in CIR are split into operation code and address
- operation code is decoded as unconditional jump
- value in address part of instruction is copied into PC
- reset restarts the cycle.
(1 per -, max 7) [7]

Oct/NOV 2006
1. (a) (i) -stores the instruction that
-is currently being processed
-splits the binary code into operation code and address
(1 per -, max 2) (2)
(ii) -stores the address (in memory)
-of data to be accessed (from memory)
-instruction/raw data
(1 per -, max 2) (2)
(iii) -stores the address of the next instruction to be accessed
-is incremented (after contents are copied to MAR)
-is altered to allow for jump instructions
(1 per -, max 2) (2)
(iv) -contains a value which is added to the address (in the CIR)
-in order to make the address of the data

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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

-incremented after use so that a set of data can be read one after the
other without altering the raw address
(1 per -, max 2) (2)
(b) (i) -a number of processors
-operate together
-so that a set of operations can be carried out simultaneously
(1 per -, max 2) (2)
(ii) -any example that requires large amounts of processing e.g. weather
forecasting
-because large quantities of processing are required in a set time period
(2)
May/June 2007
7. (a) - Instructions and data stored together in same memory
- Single processor used
- Uses serial processing of instructions
(1 per -, max 2) [2]
(b) (i) - many processors are used…
- simultaneously
- all doing some processing required by the application
- Special non-linear programs must be produced
(1 per -, max 2) [2]
(ii) - A suitable example e.g. .Weather forecasting.
- Large amount of processing required, the results of which are time
sensitive
(1 for application, 1 for reason) [2]

Oct/NOV 2007
8. (a) – e.g. Weather forecasting
– requires large number of calculations
– The results being time sensitive
(1 per –, max 3) [3]
(b) – Special operating system (to control)…
– several processors simultaneously…
– array processor
– Specially written/non serial, (application) software
(1 per –, max 3) [3]

9. (a) – Holds the address in memory from which data is to be taken/accept ‘Address of
instruction’ [1]
(b) – Content of PC is copied into MAR
– MAR holds the address of the next instruction to be processed
– Operand part of instruction is copied into MAR from the CIR (possibly via
intermediate step)
– Holds the address of the data needed to complete the processing of that cycle
(1 per –, max 4) [4]

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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

May/June 2008
6. (a) (i) The address of the next instruction [1]
(ii) -Originally set to point to first instruction in the program
-After the contents have been used/passed to memory address register
(MAR)
-PC is incremented
-If the current instruction is a jump instruction (whose conditions are
met)...
-then the PC is reset to the address in the instruction
(1 per -, max 4) [4]

(b) -Holds the address of next instruction...

-when passed from PC
-Holds the address of data location to be accessed...
-when passed from CIR
-Holds the address of memory location currently in use
(1 per -, max 4) [4]

Oct/NOV 2008
8. (a) – Concept of a stored program
– Instructions and data use the same memory
– Use of a single processor
– Follows a linear sequence of instructions
(1 per –, max 3) [3]
(b) (i) – Many (independent) processors working…
– on the same program at the same time [2]
(ii) – Weather forecasting requires large volume of calculations
– These can be speeded up because many can be done simultaneously
– This means that more accurate forecasts are possible…
– in restricted time frame
– Requires complex programs writing
– Requires complex operating system
(1 per –, max 4) [4]

May/June 2009
5 (a) -Concept of a stored program
-Instructions and data use the same (primary) memory
-Use of a single processor
-Follows a sequential set of instructions.
(1 per -, max 3) [3]
(b) (i) -201/202 (Sensible value)
-because, once sent to MAR the value in the PC is incremented [2]
(ii) -The result of a jump instruction which…
-requires that the next instruction is not to be handled in
sequence/specifically, that held in 180. [2]

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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

Oct/NOV 2009. P31

5. -Address of instruction copies from PC to MAR
-PC incremented
-Instruction at address stored in MAR copied to MDR/MBR
-Instruction copied from MDR/MBR to CIR
-Instruction code in CIR is decoded
-Address in CIR copied to MAR
-Because Jump instruction, address in MAR copied to PC
(1 per -, max 6) [6]

Oct/NOV 2009. P32

2. – Floating point processors/carry out calculations on floating point values as single units
– Maths coprocessors/separate circuits which will act as floating point processors
– Array processors/allow the same operation to be carried out simultaneously on a set of
data, like the contents of an array.
(2 per –, max 2 –, max 4) [4]
Oct/NOV 2009. P33
May/June 2010. P31
May/June 2010. P32
8. (i) -The address in memory of the data/instruction to be accessed
-Can be changed by contents of PC being copied into it
-Can be changed by memory address being copied to it from CIR
(1per -) [3]
(ii) -The data/instruction to be used
-Is changed every time an address in MAR is accessed
-Stores data from Accumulator on its way to being stored in memory.
(1 per -) [3]
(iii) -Stores an instruction...
-while it is being decoded/executed/carried out
-Contents change when an instruction from memory has been placed in MDR,
and then it is copied from MDR to CIR.
(1 per -) [3]

May/June 2010. P33

8. (i) -The address of the next instruction
-Content is incremented after the address is read
-Content is altered to specific address if instruction is a jump instruction
(1 per -) [3]
(ii) -Stores an instruction...
-while it is being decoded/executed/carried out
-Contents change when an instruction from memory has been placed in MDR,
and then it is copied from MDR to CIR.
(1 per -) [3]
(iii) -Stores an integer value
-Which is added to the base address in the instruction
-Used for the successive reading of values from memory locations e.g. in an
array
-Can be incremented after use
(1 per -) [3]

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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

Oct/NOV 2010. P31

3. (a) (i) -Text/alpha/string/alphanumeric
-These are sets of characters not numbers [2]
(ii) -Real/Currency
-There will be a fractional part to the value [2]
(iii) -Boolean
-Only two possible values (yes/no) [2]

(b) -Files (all the data on the stock) comprise...

-Records (all the data about a single item of stock) comprise...
-Fields (individual pieces of data in a record e.g. Price)
(1 mark only for hierarchy given without context) [3]

10. (Note: the mark scheme uses examples in each case, other sensible answers are
acceptable)
-Tabular/to show data in a highly structured way/feed levels/…
-Printed reports/to allow the farmer to study the details of feed later
-Sound/to sound alarm if same cow appears twice/cow does not eat feed
-On screen image/showing which cow is at which feeder
-Lights/to show which cows have finished being milked
-Physical output/the feed delivered to the cows
(2 per -, max 3-, max 6) [6]

Oct/NOV 2010. P32

3. (a) -Single processor/control unit
-Sequential processing
-Instructions and data indistinguishable...
-can be stored together (in same memory unit).
(1 per -, max 3) [3]
(b) (i) -Hold the data currently being processed
-Result of calculation is held in accumulator...
-before being passed to memory unit
(1 per -, max 2) [2]
(ii) -The address of the next instruction
-Contents incremented (after being read)
-Contents changed by a jump instruction
(1 per -, max 3) [3]
10. (a) (i) -Simultaneous use of... (do not accept: apparently)
-more than one processor...
(ii) -to carry out large number of calculations...
-because the calculations are simple/similar/repetitive...
-carried out in much shorter time (compared with single processor)
-Calculations are interdependent with results of one group feeding into
next calculations.
(1 per -, max 3 per dotty, max 4) [4]
(b) Need for complex software/O.S. [1]

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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

Oct/NOV 2010. P33

10. (a) Simultaneous use of several processors [1]
(b) ‐ Very large number of calculations involved in producing a weather forecast…
‐ …work on the interaction of fixed volumes of atmosphere reacting with
adjacent volumes
‐ The smaller the blocks of atmosphere used the better the forecast…
‐ …and the larger the number of calculations to be done
‐ Calculations must be done in a short time because…
‐ …process is time sensitive
(1 per ‐ , max 4) [4]
May/June 2011. P31
1. e.g.-Data bus
-to carry data from one location to another in processor // e.g. from MDR to CIR
-Address bus
-carries the address of a memory location // e.g. Address of location in memory from
MAR
-Control bus
-Carries control signals around processor // to synchronise the operation of the
processor
components // by example: memory read/write completed // each line carries a different
signal.
Accept: system bus, memory bus, firewire, USB, PCI + explanation
(2nd mark is dependent on correct bus name)
(2 per -, max 6) [6]

May/June 2011. P32

1. e.g.-Data bus
-to carry data from one location to another in processor // e.g. from MDR to CIR
-Address bus
-carries the address of a memory location // e.g. Address of location in memory from
MAR
-Control bus
-Carries control signals around processor // to synchronise the operation of the
processor
components // by example: memory read/write completed // each line carries a different
signal.
Accept: system bus, memory bus, firewire, USB, PCI + explanation
(2nd mark is dependent on correct bus name)
(2 per -, max 6) [6]

11. (b) (i) -Contents copied from PC

-Contents changed to the operand/address part of CIR [2]
(ii) -Instruction copied from memory/location to MDR when contents of MAR
are from PC
-Data copied from memory/location to MDR when instruction is LOAD
-Data copied from ALU/Accumulator to MDR when instruction is STORE
[max 2]

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Reinforcement: 05-10 Years' relevant CIE answers.
Section 3.3

May/June 2011. P33

1. (i) -More than one processor
-to perform a single job
-Each processor is used to perform a task which is a part of the entire problem
[2]
(ii) -an additional processor which works alongside the main processor
-Processor capable of processing large representations/many bytes // uses large
size registers
-Particularly used for floating point calculations [2]
(iii) -Allows a single instruction to be carried out…
-simultaneously on a number of data locations // processor has several ALUs
-Used to process all the values in an array at the same time [2]

11. (a) -Interpreter translates one instruction, runs it before going on to the next //
Compiler translates all the instructions before run.
-Compiler creates object code/Interpreter does not
-Interpreter will translate code in loops more than once/Compiler only once
-Interpreter makes for easier debugging/Compiler allows faster execution
translated code
-Interpreter must be present to run the program // compiler not needed at runtime
(1 per -, max 3) [3]
(b) -When content is copied to the MAR at the start of the cycle…
-the contents of the PC is incremented
-If the instruction decoded by the CIR is a jump instruction
-the address in the instruction register is copied to the PC [4]

Oct/NOV 2011. P31

Oct/NOV 2011. P32
Oct/NOV 2011. P33
May/June 2012. P31
May/June 2012. P32
May/June 2012. P33

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