DECLARATION BY CANDIDATE

I hereby declare that the work which is being presented in the

report entitled “ (#your project title) Design and
Verification of Advanced Microcontroller Bus
Architecture (AMBA)-Advanced Peripheral Bus(APB) ”
in fulfilment of the requirements for the award of degree of
Bachelor of Technology in Electronics & Communication
Engineering and submitted to B. K. Birla Institute of
Engineering and Technology, Pilani (Rajasthan) , India, is an
authentic record of my own work carried by me under the
supervision of (#your mentor’s name & designation) Dr.
Manoj Pandey, Associate Professor (E.C.E.), B. K. Birla
Institute of Engineering and Technology, Pilani-333031,
Rajasthan.

Date: June 06, 2021 Aman Kumar

Rai
(#Signature followed by your
name)

i
 CERTIFICATE BY PROJECT GUIDE

This is to certify that (#your name) Mr Aman Kumar Rai,

student of B.Tech. (Electronics & Communication
Engineering) IV year has submitted his Project Report
entitled (#your project’s title) “Design and Verification of
Advanced Microcontroller Bus Architecture (AMBA)-
Advanced Peripheral Bus (APB)” under my guidance.

(#your mentor’s Signature name & designation) Dr. Manoj Panday

Associate Professor (E.C.E.)

This is to certify that the above statement made by the

guide is correct to the best of my knowledge.

Dr. L. Solanki Mr. Santosh

Jangid
Principal(Academics)
(H.O.D.)E.C.E.
BKBIET Pilani BKBIET
Pilani

Date: June 29, 2020

ii
 ACKNOWLEDGEMENT
# (acknowledge to your mentor, hod, principal etc.
those who helped you in completion of project as
your feel. Its only sample)
It gives me immense pleasure to express my deepest sense of
gratitude and sincere thanks to my guide Dr. Manoj
Panday, Department of Electronics & Communication
Engineering, BKBIET, Pilani for his valuable guidance,
encouragement and help for completing this work. I would
like to express my sincere thanks to Dr. Prasanna Kumar S
M, Director BKBIET, Pilani for giving me this opportunity
to undertake this project. I would also like to thank Dr. L
Solanki, Principal (Academics) BKBIET, Pilani for whole
hearted support. I am also grateful to my teachers for their
constant support and guidance.

At the end I would like to express my sincere thanks to all

my friends and others who helped me directly or indirectly
during this project work.

Aman Kumar Rai (#your name & roll no.)

16EBKEC007

Date: June 29, 2021

iii
 Table of Contents
(#make table of contents as per your chapters)
S.NO. Topics Page NO.
1 Front Page
2 Declaration i
3 Certificate Ii
4 Acknowledgement iii
5 Table of Content iv-v
6 Abstract vi
7 List of Figures vii
8 List of Tables vii
9 1-Introduction 1-6
1.1 AMBA
1.2 Advanced High-Performance Bus (AHB)
1.3 Advanced System Bus (ASB)
1.4 Advanced Peripheral Bus (APB)
1.5 Protocol History
1.6 Salient Feature
1.7 Proposed System
1.8 Software Requirement & Working
Environment
1.9 About the APB Protocol
1.10 APB revisions
1.10.1 AMBA 2 APB Specification
1.10.2 AMBA 3 APB Protocol
Specification v1.0
1.10.3AMBA APB Protocol Specification
v2.0.
10 2-APB Bridge Interface 6
2.1 Description
11 3-APB Slave Interface 7
3.1 Description
12 4-Signal Descriptions 8-9
4.1 Amba APB Signal
4.2 Data buses
13 5-Transfers 9-16
5.1 Write Transfer
5.1.1 With no wait states
5.1.2 With wait states
5.2 Write Strobes
5.3 Read Transfers
5.3.1 With no wait states
5.3.2 With wait states
5.4 Error response
5.4.1 Write transfer
5.4.2 Read transfers
5.3.3 Mapping of PSLVERR

iv
 5.4 Protection Unit Support
14 6-Operating States 17
15 7-Software used 18
7.1 Questa sim
16 8- Universal Verification Methodology (UVM) 18-24
8.1 Why do we need UVM?
8.2 How does UVM help?
8.3 What is the UVM class hierarchy?
8.3.1 UVM_Object
8.3.2 UVM_Transaction
8.3.3 UVM_Component
8.4 UVM testbench architecture
8.4.1 UVM testbench
8.4.2 UVM test
8.4.3 UVM environment
8.4.4 UVM scoreboard
8.4.5 UVM agent
8.4.6 UVM sequencer
8.4.7 UVM sequence
8.4.8 UVM driver
8.4.9 UVM monitor
17 9-Source Code 24-41
9.1 Design
9.2 Transaction
9.3 Sequence
9.4 Sequencer
9.5 Driver
9.6 Monitor
9.7 Agent
9.8 Scoreboard
9.9 Subscriber
9.10 Environment
9.11 Test
9.12 Test bench
18 10-Simulation Output 42
19 11- Verification Result 42-43
20 12-Adventages 44
21 13-Applications 44
22 Conclusion 45
23 References 46

v
 ABSTRACT

(#write abstract of your project with result

conclusion/outcome)
The SoC (System on Chip) uses AMBA APB as an on chip bus. APB is low
bandwidth and low performance bus used to connect the peripherals like UART,
Keypad, Timer and other peripheral devices to the bus architecture. This Report
describes the design generation of AMBA APB (Advanced Peripheral Bus)
protocol using Universal Verification Methodology (UVM). Here main aim is to
reduce human interface in design part so we can reduce common syntax errors.
Per generates the SystemVerilog/UVM design code of APB and its corresponding
test bench verification environment. This code is simulated in QuestaSim. Finally
wave forms and Verification reports are analysed.

vi
 List of Figures

(#Give the list of figures/tables used in your report with

respective page number)

S. No. Figure Name Page No.

1 Basic structure of AMBA Protocol 1
2 Protocol History 3
3 Bridge structure for APB Protocol 6
4 Slave structure for APB protocol 7
5 Write transfer with no wait states 10

6 Write transfer with no wait states 11

7 Byte lane mapping 12
8 Read transfer with no wait states 12
9 Read transfer with wait states 13
10 Example failing write transfer 14
11 Example failing read transfer 15
12 State diagram 17
13 UVM Class Hierarchy 20
14 Typical UVM Testbench Architecture 21
15 UVM Agent 23
16 Output generated over simulator 42
17 Initiate Verification 42
18 Verification Results 43
19 Verification Final report 43

List of Tables

S. No. Table Name Page No.

1 lists the APB signals 8-9
2 Protection encoding 16

vii