MALINENI LAKSHMAIAH

WOMEN’S ENGINEERING COLLEGE

TITLE
Non-Dynamic Power Reduction Techinques
For Digital VLSI Circuits:
Classifications and Review

GUIDE NAME:
CH.RAMESH SIR
TEAM MEMBERS
B.SUPRIYA(411)
G.SWATHI(435)
CH.AKHILA(424)
A.SHARVANI(401)
B.SAI PRIYANKA(409)
 CONTENT
Sub Thershold Conduction
and the Possible Apporach
Towards Low Power Design
using Bootstraping Technique:
A Propotype Design
 ABSTRACT
The main objective of this paper is to establish optimal
low power design for very large scale integration (VLSI)
circuits.

ABOUT ITRS:
ITRS-International Technology Road
map for semiconductor.
ITRS is the set of documents produced
by the group of semiconductor
experts.
The problem arises due to continuous
scaling of device recommed by ITRS.
Definition of Scaling of Device:
 It is the reduction of all dimensions
of the chip by a factor ‘s’.
Definition of power dissipation:
 Energy loss (or) waste in the form
heat.
Boot straping technique:
General definition:
 Boot straping is nothing but
the output of the system is
provided at the input.
Technique definition:
 Boot straping is enhancing
the speed by rasing (or)
increasing the driving efficiency.
 It is used mainly at deep
submicron regions.
 The two factors that
observed while working on
deep submicron technology are
1.Powerdissipation
2.Delay
 INTRODUCTION
While the continuous scaling of devices,power
dissipation has become one of the critical issues in
digital integrated circuit as it degrades the various
parameter of a system,hence the factor cannot be
neglected.The scaling of the techonolgy is done as per
the ITRS recommendation technology.The ITRS
nomenclature is generally
130nm,90nm,65nm,32nm,and 22nm.However,a new
term has recently been added i.e.10nm class which
generally consists of 10 to 20nm region . Interestingly a
new term called 10nm class has been introduced.The
10nm class generally defines the technology process
ranging from 10nm to 20nm.
BLOCK DIAGRAM
 BLOCK DIAGRAM

 Sub threshold bootstrap circuit operates in

sub threshold power supply.
 In this circuit large gate voltage swing -VDD
to -2VDD.
 Supress (or) decreases sub threshold
leakage current.
 It provides shorter delay time.
 It is an effective technique for increasing
speed by increasing the driving efficiency.
 APPLICATIONS
 In most switching applications ,the bootstrap
circuits is widely used to drive the high-side
metal-oxide-semiconductor field-effect
transistor(MOSFET).
 During each high-side switching cycle,the
bootstrap capacitors hold the gate-to-source
voltage high enough to keep the high-side
MOSFETs turned on.
 ADVANTAGES
Supress leakage current.
Simple circuit design.
Low cost.
Less power consumption and low power
dissipation.
It has the limited delay.

DISADVANTAGES
On the time of duty cycle is limited by the
requirement to refresh the change in the
bootstrap capacitor and serious problem
occur when the negative voltage is
presented at the source of the switching
device.
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