E LSEVI ER Sensorsand AcluatorsA 54 {1996) 523-529

ISAAC: _integrated_silicon_automotive accelerometer

Leland 'Chip' Spangler, Christopher J, Kemp
Ford Micr~electronics. Inc., 9965 Federal D~ive. Colorado Springs, CO 80921-3698. USA

Abstract

The pervasivcocssof autumolivcpassiverestraint systems has emphasizedthe need for improvingsystem reliabilitywhile simu|lancously
reducing the cost and size of the system. This paper describes the integratedsiliconautumotiveaccelerometer (ISAAC). which consistsof a
silicon micromachieeddie fabricated in a dissolved-waferprocess arida CMOS ASICt[,at are combined in a standard plastic I~:kage. The
resullant device meets the functional,cost, and reliability~quimmentsof the next generationof automotivepassiverest~int systems.

Eeywords: Accelerorneters:Autumotivesensors;Delta-sigmara<xlaR,hen:Electronicealibralion;Passive~mitn gystelrts

1. Introduction packaging technology have led to the adoption of a modular

Automotive passive restraint systems are evolving from
the current 'distributed' systems, in which several acealara-
tion-sensitiveswitches are placed near the front of the vehicle,
to mere sophisticated 'single-point" systems that use an accel-
eromeler and a microprocessor-based algorithm in a module
located in the passenger compartment. These single-point
systems provide improved reliability thrcugh part-count
reduction and simplified wiring, while at the same time low-
ering system costs. This paper presents a unique approach to
these systems in the application of micromachined sensor
technology.
Single-point passive restraim systems have specific ,equi-
remonts that, if taken into consideration, (:an allow system
partitioning and selection of accelarometer technologies and
designs that result in lower overall system cost. Algorithms
that are used to make deployment decisions typically use, ~.t
a minimum, change in velocity and peak aconlaration data.
Acceleration signals in the 50g range with a response of up
to 400 Hz are typically the signals of interest. These accel-
eration signals must be continuously e~,aluated without plac-
ing excessive demands un the system ;r.ticroprocassur. Since
the system must be reliable for over the full service life of the
vehicle, a fully active self-test feature that checks both the
mechanical integrity and stability of the accelerometer is of
primary importance.
Th,~ continuous e,'olution of system requirements dictates
a technology and design philosophy that supports the rapid
development of a wide range of sensor configurations and
perlbrmance specifications. Inevitable process improvements
and cost reductions in sense elements, integrated circuits, and
approach to the sensor so thai imptave..~n~s can be incor-
porated into the products as quickly as possib'Je. Yield con-
siderations are a primary fBctor in cost reduction, and this
leads to the select~(m of materials that have re.educible and
stable properlios. Structural and electrical features must be
selected to maximize accclcrometer signal strength while
minimizing effects due to operating temperature and voltage
or to process-ioduced geometric variations.
The modular appro~ch to the te.ebnology, design for man-
ufactmability considerations, and the array of application-
specific requirements have been instrumental in the
technology selection for this low-cost accelerometer.
2. O v e r ~ e w o f the sensor
The integrated silicon automotive accelerometer (ISAAC)
is a two-chip accelerometer that consists of a differential,
capacitive micromachined sense-clement die assembled in mt
IC package along with a CMOS interface chip containing
EEPROM calibration circuits (Figs. I and 2).
The sense-element chiI- uses n torsional microstractare
which generates a differential, femtofarad.level signal that is
fed to the interface chip via bond wires. This die is fabricated
using a glass*subs*tale.dissolved-wafer process with a wafer-
level hermetic cap.
The interface chip uses a charge-mode delta-sigma mod-
ul~!or e.o convert the sense-element sigr.als into a pulse-den-
sity-modulated output that is propotlional to the applied
acceleration. The interface chip has EEPRO[~,4. ~.d a ~sistor
string DAC that allow the gain and offset of the completed

0924-424"//96/$15.00~ 1996ElsevierS¢ienc~S.A.Allfightsreserved
$SD10924-4247( 95)01 !93.0
524 L.C. Soangler. CJ. Kemp~SensorsandActuators A 54 fl996) 523 529

substrate create the other hal f o f the capacitors [ 1 ]. The cen-

Fig. I. Block diagram of the ISAACshowingthe functioilof each of Ihe
two die.
tral pedestal support greatly reduces the susceptibility of the
sensor to die stresses since it isolates the microstructure from
the substrate. This eases packaging constraints and also
improves the manufacturability of the sensor.
The design of the torsion arms focuses on key parameters
that offer flexibility in meeting a variety of per formance spc~:-
ifications required by the applications. Typical torsion-arm
lengths .are around 250 p.m long with a cross.sectional area
in the range of 100 .tim 2. The 'heavy' side of the microstruc-
tare is approximately three times more massive than the
'light" side, and the overall microstructurc occupies an area
of approximately 0.8 mm 2.
The fixed plates of the sense element are formed from
metallized regions on the glass substrate. These fixed plates
are larger than the silicon microstructum so that cross-axis
forces causing the microstructure to twist parallel to the sub-
strafe do not cause the nominal capacitance to chang,.:.
The electrostatic self test is implemented on the 'heavy"
side of the microstructure by placing additional fixed elec-
trodes under the moveable silicon. Self-test voltages, pro-
vided by the interface chip, are applied to these fixed plates
during the self-test operation, and the resultant electrostatic

Fig 2. Photographof the two ISAACdice in a ceramic package priorto lid

seal.

device to be trimmed to the desired specification. A serial

interface allows the ISAAC to communicate with a micro-
processor to facilitate aecelerometer calibration; during device
manufacture, and to facilitate data transfer and a secure self-
test activation after the device is installed in a vehicle. The
ISAAC uses a nine-pin package to support power, ground,
clock, and 1/O functions.
The modular approach to the ISAAC is also evident in the
packaging technologies selected for the device. Initially, mul-
tilayer ceramic technology was used to provide a controlled
and reliable environment for the microstructure. This her- Fig. 3. Photographof an uncapped ISAACsense-elemela die showingth*:
metic package requirement has now been transferred to the pedestal bond-wirecootacl.
sense-clement die through the de',eiopment of a wafer-level
capping technology that is compatible with the dissolved-
wafer process. This has allowed the 1SAAC also to be pack-
aged in a conventional molded plastic process, which
supports many body styles and lead configurations while
lowering overall sensor cost.

3. Sense-element die

"nte sense-element chip (Figs. 3 and 4) uses a glass sub-

strate to support a single-crystai silicon torsional micro-
structure with differential mass. The sense element has a
central "pedestal' support with moveable silicon plates that
form one half of the capacitors, while fixed plates on the Fig,4, Photographof a hermeticallyencal~ulaledISAACsense elemeat.
 LC Spongier, C2 Kemp/Sensors and ActuatorxA 34 (1996) 523~29
force causes the microstructure to rotate in a manner that
toimics its motion during a vehicle crash.
The initial conliguration of the ISAAC uses a hermetic
package and a sense-element die that is not capped. With this
configuration, electrical contact to the microstructure is made
via a bond pad and wire that are directly applied to the ped-
estal region (Fig. 3). With the developmt, nt of the hermetic
capping process came the need to form a buried contact to
the pedestal. This electrical contact is formed during the
anodic bondin~ step of the dissolved-wafer process. The cap
has four electrical feedthroughs that allow electrical connec-
tion to be made to the microstructare and fixed plates via
bond pads that are located outside of the cap (Fig. 4 ) while
maintaining desired levels of hermetieity.
The hermetic cap seals the device in a fixed gaseous envi-
ronment that is an important factor in determining the
mechanical response of the mierostructure m vibrations. Gas
viscosity changes as a function of temperature and this
changes the damping characteristics of the microstructure.
Both gas type and pressure affect this mechanical response
as well. The pressure inside the cap is dependent primarily
on two factors: the sealing temperature of the cap to the
substrate, and the ambient pressure. The cap is sealed to the
glass substrate using an elevated temperature in a proprietary
process. Colorado Springs is located at an altitude of over
2000 r'., which results in a local barometric pressure that is
about 809'0 of that at sea level. The result is that the pressure
in the cap is less than 60 kPa.
The other design parameter that influences frequency
response is the utilization of damping holes in the micro-
structure. By judicious selection of the number, size, and
location of these holes in the silicon microstructure, lhe
mechanical damping and hence the frequency response ca~s
be adjusted to the desired specification.
The ISAAC sense~element fabrication flow is illustrated in
simplified form in Fig. 5. The single-crystal silicon that
results from the dissolved-wafer process has material prop-
erties that are highly repeatable and this enhances the man-
afactarability of the device. Dissolved-wafer processes also
support large-aspect-ratio geometries in the microstructure.
Large aspect ratios provide increased flexibility in design
tradeoflg and they are instrumental in device scaling and
ultimately die-size reduction.
The sense-clement die is fabricated by starting with a sil-
icon wafer that has an etch slop buried below an epitaxial
layer. This epitaxial layer is patterned and etcl',,:d :,J create
what will become the capacitive gap of the sense element.
The remaining epilayer is patterned to f o ~ the outline of the
final microstructure. A Pyrex glass wafel is then patterned
with conductors to form the fi;~edplates of the capacitors as
well as the self-test electrodes and bond-pad regions. The two
wafers are then electrostatically bonded together. For sense
elements that are to be encapsulated, the central pedestal on
the silicon wafer makes physical contact with the metal on
the glass wafer. The anodic bonding process allows an elec-
trical connection to be made to the metal trace and the silicon
525
Os~ox*mleJostruetum
to I: miod e~ch s~oO
[ 3 on
pa~lem
gloss~ wedS"l a ~
Anodic b o ~ g l a ~ and
O i s a ~ bulk w ~ e f
Fig 5 Simplifiedprocessflawforthe ISAACsense-elemcnldie.
mierostructure [ 2 l- This trace is connected to the common-
mode potential of the interface chip.
After the silicon and glass wafers arc bonded together, the
bulk silicon wafer iJ removed to the etch-stop layer. Iltis
etch-stop layer is then removed using another selective etch-
ing process. For uncapped sense elements, bond pads arc then
formed on both the glass wafer and the central pedestal of the
microstructurc to prepare them for probe test and final
assembly,
For sense elements that are to he hermetically capped, a
second silicon wafer is paltemed and etched to form a cavity.
"lq/; wafer is thou aligned and attached to the glass substrate
that contains the completed microstrucuro. Dielectric mate-
rials are used to insulate the traces that feed through from the
enclosed cavity to a region on the glass wafer that contains
the pads for wi,e b~i~,£ng. The dielectric materials also aid
in forming th~ hermetic seal between the glass substra', and
the silicon cap. Once the cap has been attached to the ~,;,,.ss
wafer, the bond-par~ metal is deposited, and the wafers are
ready for probe test, s,wing° and final packaging.
The sense-element chip provides a differential capacitive
output as illustr~:cd in Fig. 6(at. Typical values for the
capacit: nee at zero ~cceh:~'atiou are 150 fF while full-scale
accelec~tioa results in approximately a 15 if:change to both
r, C ...................... .
c .....................
CA i° ~ - '
O( aJ gs Orb) ~
Fig. 6. Rep;esentauon of c ~ c i [ ~ l c e (at ~Jld F(( b l as a rune;ion of aceel-
eralion Ior the ISAAC
526 h c. Spongier. C.~LKemp/Sensors and Actl~atorsA 54 (1996)523-529

CA and Ca. As shown, this capacllive output is a nonlinear
function of acceleration. The interface circuit linearizes the
response by implementing the functioo shown in Fig. 6(b).
The quantity Fc is defined as (CA-- CB)/( CA + Ca ).
Dimensioning of the air gaps, torsion beams and damping
holes ereates a mechanical microstruclure that is overdampcd,
thus providing an antialias filter for the sampled-data inter-
face circuit. The - 3 dB frequency response is typically 400
Hz at room temperature, while the resonance frequency of
the micromechanical structure is 2.7 kHz.
4. Interface circuit
The interface circuit is fabricated in a 1.6 t~m CMOS proc-
ess with EEPROM. The primary function of this circuit is to
convert the femtofarad-level capacitance signals from the
sense element to a pulse signal suitable for digital signal
processing [31. The chip also provides compensation For
sensor offset and sensitivity variations while providing the
self-test and reset function. Design considerations for the
circuit include stabi lily over voltage, temperature and process
variations, with low power and low cost also being primary
factors.
The circuit architecture of the signal path is shown in Fig. 7
along with the required timing signals. The circuit consists
of a first-order "charge-mode' delta-sigma modulator with
built-in calibration capability. Delta-sigma modulators have
become very popular in sensor applications because sensor
signals generally have low bandwidths, allowing a simple
low-order modulator to achieve good resolution through a
high oversampling ratio. Also, since precise component
matching is not required, circuit performance is affected very
httle by temperature changes or by component value aging.
The delta-sigma modulator delivers a digital (pulse-density-
modulated) output signal which can be fed directly to a
microprocessor or hardware DSP circuit for digital signal
processing. In passive restraint applications, pattern noise
from first-order deha-sigma moduir,tton of d,c. inputs does
nOt pose a problem, since crash acceleration signals are very
'busy'.
An open-loop architecture is used because of its inherent
simplicity. Although closed-loop (force-balanced) acceler-
ometers are capable of higber performance in some areas, the
simpler (and hence more cost etfeetive) open-loop approach
is sufficient for passive restraint systems. As previously men-
tioned, the mechanical frequency response of the sense ele-
ment itself, which is embedded in the first stage of the
modulator, provides antialias filtering for the sampled-data
circuit. Additional liltering of the acceleration wave form can
be performed digitally, downstream from the sensor.
The compensation lor sense-element offset and sensitivity
variations (calibration) is accomplished by the circuitry to
the left of nodes A and B in Fig. 7. A pair of calibration codes,
V~ and V=, is determined for a particular sensm during a
calibration operation and stored in EEPROM. These codes
determine the values of four voltages which are applied by
the DAC to nodes A and B as described below.
The circuit is continuously clocked between two clock
phases, unity (U) and integrate (1). The positions of the
various switches during each clock phase are shown in i:ig. 7,
The position of the switch on the far left is controlled by the
polarity of the OUT signal. The V~ and V2 calibration codes
contain the same number of bits. This number of bits ulti-
mately determines the resolutions oftbe offset and sensitivity
calibrations.
The function of the 'code mirror circuit' requires some
explanation prior to a description of the operation of the
complete circuit. If (for example) OUT is low during the
integrate ph; the V~ code is applied to the DAC (as the
circuit, ows), causing the voltage V~ to be generated at the
DAC output. During the U phase, however, the code mirror
circuit modifies the Vj code such that, when this modified
code is applied to the DAC, the voltage V~M= (2VM-- Vi ) is
generated at the DAC output. The 'minor voltage' Vr~ is a
specific fixed reference voltage, The above equation implies
(Vt - VM) = (VM-- V~M), SO a voltage VIM has been gener-
ated which is either as many volts below 1/u as VI is above

sense element

t :

.,o. t {
Clm-

u A I [ - - I I..... (UNITY)
TIMING:
i ] I I [ - - L .... t t ~ r e ~ r E i

¢ clock n •¢ clock n+l Ik

Fig.7. Simplifiedschemalicof the della-sigmamodulatorwithcalibrationcireuit~.
 L C Spangler. C.Z Kemp~SensorsandAo,~atorsA 54 (1996) 523-529
VM,or as many volts above Vr,t as V~ is below VM. Similarly,
if the code V2 is applied to the code mirror circuit, the mod-
ified code will produce the voltage VZM= (2VM-- V2) at the
DAC output. In the actual circuit implemention, the code
mirror circuit and the DAC are combined using a modified
nine-bit resistor-string DAC.
The operation of the complete circuit can be understood
by investigating the sequence ofevants that occurs during the
two phases of a given clock cycle. It should he noted that
OUT is latched either high or low during both phases of a
clock cycle, depending on the eomparator output at the end
(falling I edge) of the previous clock cycle.
Starting with the U phase, assume that OUT is latched low.
The V~ code is passed through the VtlV2 switch (on the far
left in Fig. 7 ) and routed through the code mirror circuit. The
DAC places voltage VIM on node A, while reference voltage
Vn is placed on node B. Since acceleration-induced capaci-
tance changes occur very slowly compared to the clock
period, the values of CAand Ca are essentially constant during
this or any clock cycle.
During the I phase, the V~code is fed directly to the DAC,
which places voltage V~on node B. Thus the voltage change
at node B from the U phase to the I phase is ( Vt - VR). Since
reference voltage Va is now placed on node A, the voltage
change at node A is ( Va - VIM). The. above vnlt,_~echanges
on nodes A and B cause a change in the integrator output
voltage, Vo, of
A Vol our:~. = CA(VR-- VIM) ~- CB(VI - VR) (1)
G~
If Vo remains negative at the end of the integrate phase, then
OUT will continue to be latched Inw for the next clock period.
If Vo is now positive, however, OUT will be latched high for
the next clock period.
Assuming that OUT is high during the next clock period,
the V2 code is now passed through the V J V , switch. The
change in the integrator output voltage for a clock cycle
having OUT high is similarly shown to be
AVolou t = ~= CA( Vr-- V.,M) + CB(V~. - Vr) (2)
Gm
Fig. 8 shows graphically the voltage level changes that occur
on nodes A and B as the circuit goes from the U phase to the
VR [ U I U
A B A[ £ the Ca side of the tilt plate is identical to that on the Ca side
V2M ! for all pulse densities, as long as the tilt plate is driven to the
u mirror voltage VM. Thus no lilt is electrostatically induced.
V1
I In addition to the delta-sigma modulator and calibration
VM
VIM
U interface (SPI) that allows the accelerometer tocorereunicate
V2
1
OUT=0 OUT= 1
Fig.8. Voltagetransitionson nodesA aad B of the della-sigmamodulator.
527
I phase, for both values of OUT. Note that VI and Vz• are
symmetrically located about mirror voltage Vr~,as are 1,,'2and
V2M,as dictated by the code ntirror circuit.
The fractional output pulse density (FPD) of the circuit is
defined as the number of clock periods per second having a
high OUT value, divided by the clock frequency. It is deter-
mined from the ratio of the Vo changes as follows:
1
FPD (3)
F~Volour~,l
'-l~l
Inserting Eqs. ( 1) and (2) intoEq. 13), esing the cede mirror
conslraints VIM= (2VM -- VI ) and V2M= (2VM - V2), and
manipulating leads to
FPD [ t + ( V , + V ~ ) / 2 - V M ~
+ ¢ V n - VM)~CA-Cs~ (4)
~ V,--V2P,CA + CBI
Thus the fractional pulse density is expressed in the form
FPD = B ~- G( Fc) (5)
where the sensitivity calibration term G and the offset cali-
bration term B depend only on the calibration voltages I/I and
V2, and the fixed voltages VMand Vn.Calibration of the sensor
is accomplished by the precise adjustment of the voltages Vt
and V2. As desired, the output pulse density is a linear function
of Fc, as described in Fig. 6.
An interesting feature of the calibration approach used here
is that, iftbe integrator opamp's common-mode voltage VcM
is set equal to the mirror voltage VM, then the average elec-
trostatic force on the Ca side of the sense element's tilt plate
is equal to that on the Cu side. A natural consequence of
placing voltages across the sensor capacitors is the electro-
static attraction between the tilt plate and the raetallized
regions on the substrate. These metallized regions are, of
course, nodes A and B in the circuit diagram. The electrostatic
force is proportional to the square of the applied voltage. An
imbalance in the average forces exerted on the CA and Ca
sides will cause the sense element to tilt. If this imbalance is
constant, it can be calibrated out. If it is pulse-density depend-
ent, however, it will contribute to nonlinearity in the sensor
response. Since the code mirror circuit guarantees that the
magnitude of ( V I - V M ) is equal to the magnitude of
( VM- VIM), and that the magnitude of (Van- VM) is equal
to the magnitude of (VM -- V2), the electrostatic attruetion on
circuitry, the interface circuit contains a serial pedpharal
directly with a microprocessor. The SPI interface is used for
two primary functions: to allow calibration values to be
loaded into the sensor and to allow a microprocessor to issue
528 L.C Spangler, C]. Kemp/Sensors and Actuators A 54 (1996) 523-529

commands to the accelerometer to reset the device and to

activate the self-test mechanism. The accelerometer can also
be configured in a mode that allows the self-test and reset
functions to be controlled directly by changing the voltage
on the associated pin. This allows the sensor to be used in
systems that do not support SPI communications.

5. Packaging
30 20 10 0 -10 -20 -30 -40 -50
The packaging technology for the ISAAC is driven by four Acceleration (g's)
primary considerations: ( I ) to facilitate the use of low-cost.
Fig, 10.Typicald.c, performanceofthe ISAAC.
reliable plastic IC assembly and molding processes for high-
volume manufacturing; (2) to provide support for standard
lead configurations and body size to simplify automated han- I llll I t l llilll
dling and placement on the passive restraint module substratc; A a I Illl~""-J,. I I I llltl
(3) the package must orient the die so that the axis of sensi- [ Ill ~ f r Illrl
tivity is parallel to the module mounting surface; and (4) the
package must isolate the die and bond wires from contami- --Q. ill I NI I Itlt
nation or mechanical stresses while providing electrical con- E I Ill I I~1111
nection between the die and the traces on the module I Ill I I I NII[
substrate. "~' I It1 t l lll\ll
The ISAAC uses a nine-pin package and due to the axis of 20 50 100 aGO 500 lk
sensitivity of the sense element, the package must orient the Frequency (Hz)
die perpendicular to the substrate. While :nitial ISAAC pro- Fig I I. Typicala.c. perfonrtanceof the ISAAC.
totypes were configured in ceramic side-braze siugle-in-line
packages (SIPs), current devices are packaged in an epoxy- while still meeting all performance criteria. The ISAAC typ-
based transfer molded package in a SIP configuration ically draws less than 1 mA of current over all conditions.
(Fig. 9). Conventional epoxy die attach and gold wire bond- The [SAAC requires a clock input that is ideally :.hated with
ing processes are used to assemble the accelerometer, m sur- the system microprocessor. Typical applications run an exter-
face-mount plastic package is currently under development. nal clock speed of 4 MHz. On-chip dividers generate the
clock signals required by the circuit.
The d.c. performance of the ISAAC is shown in Fig. 10
6. Results although the offset and gain are programmable ove a wide
range through the EEPROM. The offset of 100 Az and
Design parameters have been selected that allow the sensitivity of 3 kHz g i have temperature coefficients that
ISAAC to meet the performance specifications of a passive are less than 60 ppm °C- i calculated using the worst-case
restraint system, while providing a device that is inherently voltage and temperature conditions. The device has a linearity
insensitive to process variations. The device operates from a of better than 2%. Further improvements to these character-
5 V supply and can withstand a 5% variation in supply voltage istics are currently being pursued.
The a.c. response is shown in Fig. I l, which demonstrates
the overdamped nature of the microstrocture. As temperature
and voltage change over the operating range of the sensor,
the - 3 dB pointcac change l~yup to 20%. For aocelerometers
used in passive restraint sy,~tems, however, these changes in
frequency response are accer,table.
The ISAAC crash sensor :aleets all automotive reliability
specifications including sh(.+ck survivability, temperature
cycling, vibration endurance, life and retention testing, ESD,
and latch-up. Characterization testing for reliability has util-
ized a multitude of sequential stress tests including combi-
nations of drop testing, vibration endurance, cold and hot
bakes, autoclaves and temperature cycling. These are
intended primarily to evaluate the hermcticity of the wafer-
level cap on the sense element. The sense-element micro-
Fig.9 Photographof the iSAACin a nine-pinsing]e-in-linepackage structure has been oscillated at a level greater than full scale
 L C Spangler+ CZ Kemp/Sensors andActuators A 54 (1996) 523-329
for over 3 × 109 cycles without measurable degradation in
performance.
Vehicle-level testing of the accelerometar at the crash bar-
tier, along with testing in 'flight recorder' systems in
thousands of police, delivery, and rental vehicles, is further
verifying the suitability of the ISAAC technology for auto-
motive passive restraint systems.
7. Condn~ons
The aeeelerometer described in this paper incorporates sil-
icon micromachining, hermetic encapsulation, precision cir-
cuitry, EEPROM calibration, and plastic packaging to
provide superior performance in the automotive environment.
It has been designed for a specific set of system applications
in a modular way, which promotes a wide range of product
families that can take advantage of continued technology
improvement, enhanced manufacturability, and continued
cost reduction.
Acknowledgemen~
The authors would like to acknowledge the entire staff at
Ford Microelectronics, Inc., who have worked tirelessly to
make this project successful. I n ad6,'tion, the guidance, vision,
and suppnrt provided through the Ford Automotive Compo-
nents Division and other Ford Motor Company activities have
been essential. The staff at Silicon Designs, luc. (Issaquah,
WA, USA) are also to be recognized for their creativity and
assistance on this program.
529
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Biographies
Leland "Chip" Spangler received his BSE, MSE and Ph.D.
degrees from the University of Michigan in 1982, 1984 a~d
1988, respectively. His doctoral work involved a single-orys-
hal silicon on glass process for sensors and circuits. From
1988 to 1989, Dr Spangler worked in the areas of m/cxoscn-
sors and fabrication processes, circuit design, computer and
network archituclore and associative memories. In 1989 I'm
joined the staff of the Electronics Division of Ford Moxor
Company, where he worked on sensors for automotive appli-
cations including Hall, pressure and temparatmm sensors and
silicon valves and nozzles. Chip cunenfly works as a Prin-
ciple Engineer for Ford Microeloctronios, Inc., where he is
responsible for advanced product and system developmcnL
Chris Kemp received the B.S. and M.S. degrees in electri-
cal engineering from the University of Cincinnati in 1971
and 1975, respectively, and has worked in the semiconductor
industry for over 22 years. Since 1987, he has been with Ford
Micrcclectronics in Colorado Springs, CO, where be has
designed analog and mixed-signal integrated circuits for a
wide variety of automotive applications. He is currently
involved with the development of aecelerometers for auto-
motive passive restraint systems.