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Stackup
R53 AMD Comal UMA/Muxless SYSTEM DIAGRAM TOP
GND
IN1
A

DDR3
ATI DDR3 900MHz IN2
A

PCI-E x 8 ( 0 ~ 7 ) VCC
SODIMM1 Channel A THAMES XT VRAM
Max. 4GB 128x16x8,64bit BOT
PG.12
AMD 29mm X 29mm
PG.21,22

DDR3 TDP 25W


SODIMM2 Channel B Trinity APU PG.14~20 +3V/+5V
Max. 4GB
PG.35
PG.13 35mm X 35mm DP Port 2
HDMI PG.25 +1.1V/+1.1VS5
PCI-E x 1 PG.36
FS1r2 socket 722 pin uPGA ANX3110
B DP Port 0 LVDS B
LAN0
DP to LVDS LVDS PG.23 +1.2V/+2.5V
WLAN TDP 35W Translator PG.11 PG.36
BT COMBO PG.2~5
EE PG.32
+VCC_CORE M1
DP Port 1 UMI PG.38

+VDDNB_CORE
CRT CRT PG.39
Card reader LAN PORT8 PG.24
USB 2.0 +1.5VSUS
RTS5229-GRT RTL8105E AMD FCH
10/100 PG.26 10/100 PG.29 USB2.0 Webcam +1.0V_VGA
LAN0 LAN1 PCI-E x 2 Ports X 1PG.28 TOP PG.23 +1.8V_VGA
C
Hudson M2/M3 USB 2.0
PORT0 PORT2
PG.43,44
C

PORT1,2 PORT11,12
USB 3.0 USB 2.0 24.5mm X 24.5mm +VGACore
656pin FCBGA SATA0
HDD PG.31 +1.5V_VGA
USB3.0 combo Accelerometer TDP 4.7W
Ports X 2 PG.28 PG.32
+3V_VGA
SMBUS PG.6~10 SATA1 PG.42
LPC ODD PG.31
KBC ITE8518 Charger
PG.33 Azalia PG.34

Speaker Discharger
KB TP ROM FAN PG.27
AUDIO PG.41
D D

CODEC HP/MIC
PG.28
IDT92HD87
Analog MIC PROJECT : R53
M1 PG.27 PG.28 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
BLOCK EE DIAGRAM
Date: Tuesday, November 22, 2011 Sheet 1 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

U25F

14
14
14
14
14
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
AB8
AB7
AA9
AA8
AA5
P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
PCI EXPRESS
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
AB2
AB1
AA3
AA2
Y5
PEG_TXP0_C
PEG_TXN0_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP2_C
C723 0.1U/10V_4

C726 0.1U/10V_4

C736 0.1U/10V_4
C725

C727
0.1U/10V_4

0.1U/10V_4
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
14
14
14
14
14
02

PEG X 8
14 PEG_RXN2 PEG_RXN2 AA6 Y4 PEG_TXN2_C C738 0.1U/10V_4 PEG_TXN2 PEG_TXN2 14
PEG_RXP3 P_GFX_RXN2 P_GFX_TXN2 PEG_TXP3_C C729 0.1U/10V_4 PEG_TXP3
14 PEG_RXP3 Y8 P_GFX_RXP3 P_GFX_TXP3 Y2 PEG_TXP3 14
14 PEG_RXN3 PEG_RXN3 Y7 Y1 PEG_TXN3_C C731 0.1U/10V_4 PEG_TXN3 PEG_TXN3 14
PEG_RXP4 P_GFX_RXN3 P_GFX_TXN3 PEG_TXP4_C C746 0.1U/10V_4 PEG_TXP4
14 PEG_RXP4 W9 P_GFX_RXP4 P_GFX_TXP4 W3 PEG_TXP4 14
14 PEG_RXN4 PEG_RXN4 W8 W2 PEG_TXN4_C C750 0.1U/10V_4 PEG_TXN4 PEG_TXN4 14
PEG_RXP5 P_GFX_RXN4 P_GFX_TXN4 PEG_TXP5_C C776 0.1U/10V_4 PEG_TXP5
14 PEG_RXP5 W5 P_GFX_RXP5 P_GFX_TXP5 V5 PEG_TXP5 14
PEG_RXN5 W6 V4 PEG_TXN5_C C777 0.1U/10V_4 PEG_TXN5
D
14 PEG_RXN5 P_GFX_RXN5 P_GFX_TXN5 PEG_TXN5 14 D
14 PEG_RXP6 PEG_RXP6 V8 V2 PEG_TXP6_C C773 0.1U/10V_4 PEG_TXP6 PEG_TXP6 14
PEG_RXN6 P_GFX_RXP6 P_GFX_TXP6 PEG_TXN6_C C770 0.1U/10V_4 PEG_TXN6
14 PEG_RXN6 V7 P_GFX_RXN6 P_GFX_TXN6 V1 PEG_TXN6 14

GRAPHICS
PEG_RXP7 U9 U3 PEG_TXP7_C C787 0.1U/10V_4 PEG_TXP7
14 PEG_RXP7 P_GFX_RXP7 P_GFX_TXP7 PEG_TXP7 14
PEG_RXN7 U8 U2 PEG_TXN7_C C782 0.1U/10V_4 PEG_TXN7
14 PEG_RXN7 P_GFX_RXN7 P_GFX_TXN7 PEG_TXN7 14
U5 P_GFX_RXP8 P_GFX_TXP8 T5
U6 P_GFX_RXN8 P_GFX_TXN8 T4
T8 P_GFX_RXP9 P_GFX_TXP9 T2
T7 P_GFX_RXN9 P_GFX_TXN9 T1
R9 P_GFX_RXP10 P_GFX_TXP10 R3 UMA can remove
R8 P_GFX_RXN10 P_GFX_TXN10 R2
R5 P_GFX_RXP11 P_GFX_TXP11 P5
R6 P_GFX_RXN11 P_GFX_TXN11 P4
P8 P_GFX_RXP12 P_GFX_TXP12 P2
P7 P_GFX_RXN12 P_GFX_TXN12 P1
N9 P_GFX_RXP13 P_GFX_TXP13 N3
N8 P_GFX_RXN13 P_GFX_TXN13 N2
N5 P_GFX_RXP14 P_GFX_TXP14 M5
N6 P_GFX_RXN14 P_GFX_TXN14 M4
M8 P_GFX_RXP15 P_GFX_TXP15 M2
M7 P_GFX_RXN15 P_GFX_TXN15 M1

PCIE_RXP0_WLAN AE5 AD5 PCIE_TXP0_C C156 0.1U/10V_4 PCIE_TXP0_WALN 32


32 PCIE_RXP0_WLAN P_GPP_RXP0 P_GPP_TXP0
TO WLAN PCIE_RXN0_WLAN AE6 AD4 PCIE_TXN0_C C164 0.1U/10V_4 PCIE_TXN0_WLAN 32 TO WLAN
32 PCIE_RXN0_WLAN P_GPP_RXN0 P_GPP_TXN0
AD8 P_GPP_RXP1 P_GPP_TXP1 AD2
AD7 P_GPP_RXN1 P_GPP_TXN1 AD1 TO PCIE-LAN
AC9 P_GPP_RXP2 P_GPP_TXP2 AC3
Move from APU to PCH TO PCIE CARD READER

GPP
Move from APU to PCH AC8
AC5
P_GPP_RXN2
P_GPP_RXP3
P_GPP_TXN2
P_GPP_TXP3
AC2
AB5
AC6 P_GPP_RXN3 P_GPP_TXN3 AB4
C AG8 AG2 UMI_TXP0_C C177 0.1U/10V_4 UMI_TXP0 C
7 UMI_RXP0 P_UMI_RXP0 P_UMI_TXP0 UMI_TXP0 7
7 UMI_RXN0 AG9 AG3 UMI_TXN0_C C167 0.1U/10V_4 UMI_TXN0 UMI_TXN0 7
P_UMI_RXN0 P_UMI_TXN0 UMI_TXP1_C C185 0.1U/10V_4 UMI_TXP1
7 UMI_RXP1 AG6 P_UMI_RXP1 P_UMI_TXP1 AF4 UMI_TXP1 7
AG5 AF5 UMI_TXN1_C C193 0.1U/10V_4 UMI_TXN1

UMI-LINK
7 UMI_RXN1 P_UMI_RXN1 P_UMI_TXN1 UMI_TXN1 7
7 UMI_RXP2 AF7 AF1 UMI_TXP2_C C208 0.1U/10V_4 UMI_TXP2 UMI_TXP2 7
P_UMI_RXP2 P_UMI_TXP2 UMI_TXN2_C C217 0.1U/10V_4 UMI_TXN2
7 UMI_RXN2 AF8 P_UMI_RXN2 P_UMI_TXN2 AF2 UMI_TXN2 7
AE8 AE2 UMI_TXP3_C C224 0.1U/10V_4 UMI_TXP3
7 UMI_RXP3 P_UMI_RXP3 P_UMI_TXP3 UMI_TXP3 7
7 UMI_RXN3 AE9 AE3 UMI_TXN3_C C238 0.1U/10V_4 UMI_TXN3 UMI_TXN3 7
P_UMI_RXN3 P_UMI_TXN3
+1.2V_VDDP R340 196/F_6 P_ZVDDP AG11 AH11 P_ZVSS R339 196/F_6
P_ZVDDP P_ZVSS
4/19 For Comal.
Trinity APU
+3V

HDT+ Connector for Debug only VID Override Circuit


BOOT VOLTAGE
+1.5V
R250
*0_4/S 4/19 For Comal. SVC SVD VFIX_+VDD VFIX_+VDD
=VCC/GND =OPEN
R243 R244
1K/F_4 1K/F_4 0 0 1.1 1.1

U18 0 1 1.0 1.2


B APU_RST# 1 6 APU_RST_L_BUF B
4,7 APU_RST# A1 Y1
2 GND VCC 5 1 0 0.9 1.0
Note:
APU_PWRGD 3 4 APU_PWROK_BUF
4,7 APU_PWRGD A2 Y2 To override VID,Remove Rd, Re, Rf, install Rc
1 1 0.8 0.8
set VID via SVC & SVD option RES.
74LVC2G07
+1.5VSUS +1.5V

R224 R227
J5 *1K/F_4 *1K/F_4 4/19 For Comal. R239 R242 R336
+1.5VSUS *1K_4 *1K_4 *2.2K_4
20
APU_TEST18 19
close to HDT 4 APU_TEST18 18
Rd
+1.5VSUS APU_TEST19 SVC R225 0_4 CPU_SVC
debug HEADER 4 APU_TEST19 17 4 SVC CPU_SVC 38
APU_RST_L_BUF Re Wait for power
APU_TDI R213 1K/F_4 CPU_LDT_RST_HTPA# 16 SVD R226 0_4 CPU_SVD
TP38 15 4 SVD CPU_SVD 38
APU_TCK R209 1K/F_4 APU_DBREQ# Rf
4 APU_DBREQ# 14
APU_TMS R212 1K/F_4 APU_DBRDY APU_PWRGD R338 0_4 CPU_PWRGD_SVID_REG CPU_PWRGD_SVID_REG 38
4 APU_DBRDY 13 4,7 APU_PWRGD
APU_TRST# R208 1K/F_4 APU_TCK
4 APU_TCK 12
APU_TMS APU_PWRGD have pull up 300ohm
4 APU_TMS 11
APU_TDI
4 APU_TDI
APU_TRST# 10 to +1.5V on page 4 R240 R241 R335
4 APU_TRST# APU_TDO 9 *220/F_4 *220/F_4 *220/F_4
4 APU_TDO 8
APU_DBREQ# R207 1K/F_4 APU_PWROK_BUF for normal operation Ra Rb Rc
7
A 6 open Ra , Rb,Rc A
5
4/19 For Comal. 4
3
2
1
*HDT CONN
88511-2001-20p-l
PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Llano PCIE/UMI/GPP
Date: Monday, November 14, 2011 Sheet 2 of 44
5 4 3 2 1
5 4 3 2 1

U25A M_A_DQ[0..63] 12
U25B M_B_DQ[0..63]
03 13
12 M_A_A[15:0] M_A_A0 MEMORY CHANNEL A M_A_DQ0 13 M_B_A[15:0]
U20 MA_ADD0 MA_DATA0 E13 MEMORY CHANNEL B
M_A_A1 R20 J13 M_A_DQ1 M_B_A0 T27 A14 M_B_DQ0
M_A_A2 MA_ADD1 MA_DATA1 M_A_DQ2 M_B_A1 MB_ADD0 MB_DATA0 M_B_DQ1
R21 MA_ADD2 MA_DATA2 H15 P24 MB_ADD1 MB_DATA1 B14
M_A_A3 P22 J15 M_A_DQ3 M_B_A2 P25 D16 M_B_DQ2
M_A_A4 MA_ADD3 MA_DATA3 M_A_DQ4 M_B_A3 MB_ADD2 MB_DATA2 M_B_DQ3
P21 MA_ADD4 MA_DATA4 H13 N27 MB_ADD3 MB_DATA3 E16
D M_A_A5 N24 F13 M_A_DQ5 M_B_A4 N26 B13 M_B_DQ4 D
M_A_A6 MA_ADD5 MA_DATA5 M_A_DQ6 M_B_A5 MB_ADD4 MB_DATA4 M_B_DQ5
N23 MA_ADD6 MA_DATA6 F15 M28 MB_ADD5 MB_DATA5 C13
M_A_A7 N20 E15 M_A_DQ7 M_B_A6 M27 B16 M_B_DQ6
M_A_A8 MA_ADD7 MA_DATA7 M_B_A7 MB_ADD6 MB_DATA6 M_B_DQ7
N21 MA_ADD8 M24 MB_ADD7 MB_DATA7 A16
M_A_A9 M21 H17 M_A_DQ8 M_B_A8 M25
M_A_A10 MA_ADD9 MA_DATA8 M_A_DQ9 M_B_A9 MB_ADD8 M_B_DQ8
U23 MA_ADD10 MA_DATA9 F17 L26 MB_ADD9 MB_DATA8 C17
M_A_A11 M22 E19 M_A_DQ10 M_B_A10 U26 B18 M_B_DQ9
M_A_A12 MA_ADD11 MA_DATA10 M_A_DQ11 M_B_A11 MB_ADD10 MB_DATA9 M_B_DQ10
L24 MA_ADD12 MA_DATA11 J19 L27 MB_ADD11 MB_DATA10 B20
M_A_A13 AA25 G16 M_A_DQ12 M_B_A12 K27 A20 M_B_DQ11
M_A_A14 MA_ADD13 MA_DATA12 M_A_DQ13 M_B_A13 MB_ADD12 MB_DATA11 M_B_DQ12
L21 MA_ADD14 MA_DATA13 H16 W 26 MB_ADD13 MB_DATA12 E17
M_A_A15 L20 H19 M_A_DQ14 M_B_A14 K25 B17 M_B_DQ13
12 M_A_BS#[2..0] MA_ADD15 MA_DATA14 MB_ADD14 MB_DATA13
F19 M_A_DQ15 M_B_A15 K24 B19 M_B_DQ14
M_A_BS#0 MA_DATA15 13 M_B_BS#[2..0] MB_ADD15 MB_DATA14 M_B_DQ15
U24 MA_BANK0 MB_DATA15 C19
M_A_BS#1 U21 H20 M_A_DQ16 M_B_BS#0 U27
M_A_BS#2 MA_BANK1 MA_DATA16 M_A_DQ17 M_B_BS#1 MB_BANK0 M_B_DQ16
12 M_A_DM[7..0] L23 MA_BANK2 MA_DATA17 F21 T28 MB_BANK1 MB_DATA16 C21
J23 M_A_DQ18 M_B_BS#2 K28 B22 M_B_DQ17
MA_DATA18 13 M_B_DM[7..0] MB_BANK2 MB_DATA17
M_A_DM0 E14 H23 M_A_DQ19 C23 M_B_DQ18
M_A_DM1 MA_DM0 MA_DATA19 M_A_DQ20 M_B_DM0 MB_DATA18 M_B_DQ19
J17 MA_DM1 MA_DATA20 G20 D14 MB_DM0 MB_DATA19 A24
M_A_DM2 E21 E20 M_A_DQ21 M_B_DM1 A18 D20 M_B_DQ20
M_A_DM3 MA_DM2 MA_DATA21 M_A_DQ22 M_B_DM2 MB_DM1 MB_DATA20 M_B_DQ21
F25 MA_DM3 MA_DATA22 G22 A22 MB_DM2 MB_DATA21 B21
M_A_DM4 AD27 H22 M_A_DQ23 M_B_DM3 C25 E23 M_B_DQ22
M_A_DM5 MA_DM4 MA_DATA23 M_B_DM4 MB_DM3 MB_DATA22 M_B_DQ23
AC23 MA_DM5 AF25 MB_DM4 MB_DATA23 B23
M_A_DM6 AD19 G24 M_A_DQ24 M_B_DM5 AG22
M_A_DM7 MA_DM6 MA_DATA24 M_A_DQ25 M_B_DM6 MB_DM5 M_B_DQ24
AC15 MA_DM7 MA_DATA25 E25 AH18 MB_DM6 MB_DATA24 E24
G27 M_A_DQ26 M_B_DM7 AD14 B25 M_B_DQ25
MA_DATA26 M_A_DQ27 MB_DM7 MB_DATA25 M_B_DQ26
12 M_A_DQSP0 G14 MA_DQS_H0 MA_DATA27 G26 MB_DATA26 B27
H14 F23 M_A_DQ28 C15 D28 M_B_DQ27
12 M_A_DQSN0 MA_DQS_L0 MA_DATA28 M_A_DQ29 13 M_B_DQSP0 MB_DQS_H0 MB_DATA27 M_B_DQ28
12 M_A_DQSP1 G18 MA_DQS_H1 MA_DATA29 H24 13 M_B_DQSN0 B15 MB_DQS_L0 MB_DATA28 B24
H18 E28 M_A_DQ30 E18 D24 M_B_DQ29
12 M_A_DQSN1 MA_DQS_L1 MA_DATA30 13 M_B_DQSP1 MB_DQS_H1 MB_DATA29
J21 F27 M_A_DQ31 D18 D26 M_B_DQ30
C 12 M_A_DQSP2 MA_DQS_H2 MA_DATA31 13 M_B_DQSN1 MB_DQS_L1 MB_DATA30 M_B_DQ31 C
12 M_A_DQSN2 H21 MA_DQS_L2 13 M_B_DQSP2 E22 MB_DQS_H2 MB_DATA31 C27
E27 AB28 M_A_DQ32 D22
12 M_A_DQSP3 MA_DQS_H3 MA_DATA32 M_A_DQ33 13 M_B_DQSN2 MB_DQS_L2 M_B_DQ32
12 M_A_DQSN3 E26 MA_DQS_L3 MA_DATA33 AC27 13 M_B_DQSP3 B26 MB_DQS_H3 MB_DATA32 AG26
AE26 AD25 M_A_DQ34 A26 AH26 M_B_DQ33
12 M_A_DQSP4 MA_DQS_H4 MA_DATA34 13 M_B_DQSN3 MB_DQS_L3 MB_DATA33
AD26 AA24 M_A_DQ35 AG24 AF23 M_B_DQ34
12 M_A_DQSN4 MA_DQS_L4 MA_DATA35 M_A_DQ36 13 M_B_DQSP4 MB_DQS_H4 MB_DATA34 M_B_DQ35
12 M_A_DQSP5 AB22 MA_DQS_H5 MA_DATA36 AE28 13 M_B_DQSN4 AG25 MB_DQS_L4 MB_DATA35 AG23
AA22 AD28 M_A_DQ37 AG21 AG27 M_B_DQ36
12 M_A_DQSN5 MA_DQS_L5 MA_DATA37 13 M_B_DQSP5 MB_DQS_H5 MB_DATA36
AB18 AB26 M_A_DQ38 AF21 AF27 M_B_DQ37
12 M_A_DQSP6 MA_DQS_H6 MA_DATA38 13 M_B_DQSN5 MB_DQS_L5 MB_DATA37
AA18 AC25 M_A_DQ39 AG17 AH24 M_B_DQ38
12 M_A_DQSN6 MA_DQS_L6 MA_DATA39 13 M_B_DQSP6 MB_DQS_H6 MB_DATA38
AA14 AG18 AE24 M_B_DQ39
12 M_A_DQSP7 MA_DQS_H7 13 M_B_DQSN6 MB_DQS_L6 MB_DATA39
AA15 Y23 M_A_DQ40 AH14
12 M_A_DQSN7 MA_DQS_L7 MA_DATA40 13 M_B_DQSP7 MB_DQS_H7
AA23 M_A_DQ41 AG14 AE22 M_B_DQ40
MA_DATA41 13 M_B_DQSN7 MB_DQS_L7 MB_DATA40
T21 Y21 M_A_DQ42 AH22 M_B_DQ41
12 M_A_CLKP0 MA_CLK_H0 MA_DATA42 MB_DATA41
T22 AA20 M_A_DQ43 R26 AE20 M_B_DQ42
12 M_A_CLKN0 MA_CLK_L0 MA_DATA43 13 M_B_CLKP0 MB_CLK_H0 MB_DATA42
R23 AB24 M_A_DQ44 R27 AH20 M_B_DQ43
12 M_A_CLKP1 MA_CLK_H1 MA_DATA44 13 M_B_CLKN0 MB_CLK_L0 MB_DATA43
R24 AD24 M_A_DQ45 P27 AD23 M_B_DQ44
12 M_A_CLKN1 MA_CLK_L1 MA_DATA45 13 M_B_CLKP1 MB_CLK_H1 MB_DATA44
AA21 M_A_DQ46 P28 AD22 M_B_DQ45
MA_DATA46 M_A_DQ47 13 M_B_CLKN1 MB_CLK_L1 MB_DATA45 M_B_DQ46
12 M_A_CKE0 H28 MA_CKE0 MA_DATA47 AC21 MB_DATA46 AD21
H27 J26 AD20 M_B_DQ47
12 M_A_CKE1 MA_CKE1 13 M_B_CKE0 MB_CKE0 MB_DATA47
AA19 M_A_DQ48 J27
MA_DATA48 M_A_DQ49 13 M_B_CKE1 MB_CKE1 M_B_DQ48
12 M_A_ODT0 Y25 MA_ODT0 MA_DATA49 AC19 MB_DATA48 AF19
AA27 AC17 M_A_DQ50 W 27 AE18 M_B_DQ49
12 M_A_ODT1 MA_ODT1 MA_DATA50 M_A_DQ51 13 M_B_ODT0 MB_ODT0 MB_DATA49 M_B_DQ50
MA_DATA51 AA17 13 M_B_ODT1 Y28 MB_ODT1 MB_DATA50 AE16
V22 AB20 M_A_DQ52 AH16 M_B_DQ51
12 M_A_CS#0 MA_CS_L0 MA_DATA52 MB_DATA51
AA26 Y19 M_A_DQ53 V25 AG20 M_B_DQ52
12 M_A_CS#1 MA_CS_L1 MA_DATA53 M_A_DQ54 13 M_B_CS#0 MB_CS_L0 MB_DATA52 M_B_DQ53
MA_DATA54 AD18 13 M_B_CS#1 Y27 MB_CS_L1 MB_DATA53 AG19
V21 AD17 M_A_DQ55 AF17 M_B_DQ54
12 M_A_RAS# MA_RAS_L MA_DATA55 MB_DATA54
W 24 V24 AD16 M_B_DQ55
12 M_A_CAS# MA_CAS_L 13 M_B_RAS# MB_RAS_L MB_DATA55
W 23 AA16 M_A_DQ56 V27
12 M_A_WE# MA_W E_L MA_DATA56 13 M_B_CAS# MB_CAS_L
R162 1K/F_4 Y15 M_A_DQ57 V28 AG15 M_B_DQ56
B
+1.5VSUS MA_DATA57 13 M_B_WE# MB_W E_L MB_DATA56 B
H25 AA13 M_A_DQ58 AD15 M_B_DQ57
12 M_A_RST# MA_RESET_L MA_DATA58 MB_DATA57
T24 AC13 M_A_DQ59 J25 AG13 M_B_DQ58
12 M_A_EVENT# MA_EVENT_L MA_DATA59 13 M_B_RST# MB_RESET_L MB_DATA58
Y17 M_A_DQ60 T25 AD13 M_B_DQ59
MA_DATA60 13 M_B_EVENT# MB_EVENT_L MB_DATA59
+MEMVREF_CPU +MEMVREF_CPU W 20 AB16 M_A_DQ61 AG16 M_B_DQ60
M_VREF MA_DATA61 M_A_DQ62 MB_DATA60 M_B_DQ61
MA_DATA62 AB14 MB_DATA61 AF15
+1.5VSUS R155 39.2/F_4 +M_ZVDDIO W 21 Y13 M_A_DQ63
+1.5VSUS R165 1K/F_4 AE14 M_B_DQ62
M_ZVDDIO MA_DATA63 MB_DATA62 M_B_DQ63
MB_DATA63 AF13
Place close to APU within 1"
Soldermask openings for all bottom side vias/TPs under FS1 220P/50V_4
C135 C137
220P/50V_4 Trinity APU
Trinity APU

+1.5VSUS Reserved for AMD suggest


R110 0_4

+3VS5
R112
C142 *0.1U/10V_4
1K/F_4
5

U11
+MEMVREF 3 +
A 1 R1091 2 *10_4 +MEMVREF_CPU R103 *0_4 A
DDR_VTTREF 12,13,40
4 -
R111 C151 *OPA343NA/3K Reserved
R117
2

1K/F_4 *0.47U/6.3V_4 C184 C183


*10K/F_4 0.1U/10V_4 1000P/50V_4 C140

R84 *0_4
220P/50V_4
PROJECT : R53
R108 *0_4 4/19 For Comal.
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Llano DDR3 MEM I/F
Date: Monday, November 14, 2011 Sheet 3 of 44
5 4 3 2 1
5 4 3 2 1

04
Place caps with APU < 1 inch U25C
route PCIE as 85ohm +/- 10%
ANALOG/DISPLAY/MISC
C771 0.1U/10V_4 INT_eDP_TXP0_C INT_eDP_AUXP_C C418 0.1U/10V_4 INT_eDP_AUXP R190 *100K/F_4
11 INT_eDP_TXP0
C769 0.1U/10V_4 INT_eDP_TXN0_C
L3
L2
DP0_TXP0 DP0_AUXP D1
D2 INT_eDP_AUXN_C C423 0.1U/10V_4
INT_eDP_AUXP 11 LVDS
11 INT_eDP_TXN0 DP0_TXN0 DP0_AUXN INT_eDP_AUXN 11
DP0 output to INT_eDP_AUXN R191 *100K/F_4 +3V
11 INT_eDP_TXP1 C781 0.1U/10V_4 INT_eDP_TXP1_C K5 E1 APU_DP_AUXP_C C454 0.1U/10V_4 APU_DP_AUXP 8
eDP to LVDS converter 11 INT_eDP_TXN1 C778 0.1U/10V_4 INT_eDP_TXN1_C K4
DP0_TXP1 DP1_AUXP
E2 APU_DP_AUXN_C C463 0.1U/10V_4 APU_DP_AUXN 8 VGA INT_eDP_AUXP_C R189 1.8K_4
DP0_TXN1 DP1_AUXN
K2 D5 INT_HDMI_AUXP INT_eDP_AUXN_C R192 1.8K_4
TP85 DP0_TXP2 DP2_AUXP INT_HDMI_AUXP 25
INT_HDMI_AUXN
Display port power 1.5V min 1.2v max : 1.65v
TP84 K1 DP0_TXN2 DP2_AUXN D6 INT_HDMI_AUXN 25 HDMI

DISPLAY
PORT 0
TP87 J3 DP0_TXP3 DP3_AUXP E5
TP86 J2 DP0_TXN3 DP3_AUXN E6
D APU_DP_AUXP R200 100K/F_4 D
Display port power 1.5V min 1.2v max : 1.65v
C443 0.1U/10V_4 APU_DP_TXP0_C H5 F5

DISPLAY PORT
8 APU_DP_TXP0 APU_DP_TXN0_C DP1_TXP0 DP4_AUXP APU_DP_AUXN
C441 0.1U/10V_4 H4 F6 R206 100K/F_4 +3V
8 APU_DP_TXN0 DP1_TXN0 DP4_AUXN
C430 0.1U/10V_4 APU_DP_TXP1_C H2 G5 APU_DP_AUXP_C R199 1.8K_4
8 APU_DP_TXP1 APU_DP_TXN1_C DP1_TXP1 DP5_AUXP
DP1 output to Hudson-M2 C437 0.1U/10V_4 H1 G6

MISC.
8 APU_DP_TXN1 DP1_TXN1 DP5_AUXN APU_DP_AUXN_C R214 1.8K_4
for VGA translator interface C449 0.1U/10V_4 APU_DP_TXP2_C G3 D3 FCH_LVDS_HPD
8 APU_DP_TXP2 DP1_TXP2 DP0_HPD FCH_LVDS_HPD 11
C445 0.1U/10V_4 APU_DP_TXN2_C G2 E3 FCH_VGA_HPD
8 APU_DP_TXN2 DP1_TXN2 DP1_HPD FCH_VGA_HPD 8

DISPLAY
D7 HDMI_HPD_Q

PORT 1
DP2_HPD HDMI_HPD_Q 25
C453 0.1U/10V_4 APU_DP_TXP3_C F2 E7
8 APU_DP_TXP3 DP1_TXP3 DP3_HPD
C450 0.1U/10V_4 APU_DP_TXN3_C F1 F7
8 APU_DP_TXN3 DP1_TXN3 DP4_HPD +1.5VSUS
DP5_HPD G7
C_TX2_HDMI+ C379 0.1U/10V_4 PEG_HDMI_TXDP2 L9 +1.5VSUS
25 C_TX2_HDMI+ DP2_TXP0
C_TX2_HDMI- C352 0.1U/10V_4 PEG_HDMI_TXDN2 L8 C6 APU_BLEN
25 C_TX2_HDMI- DP2_TXN0 DP_BLON APU_DIGON APU_BLEN 23
4/19 HDMI change to DP2 for Comal. DP_DIGON B6 APU_DIGON 23
C_TX1_HDMI+ C350 0.1U/10V_4 PEG_HDMI_TXDP1 L5 A6
25 C_TX1_HDMI+ C_TX1_HDMI- PEG_HDMI_TXDN1 DP2_TXP1 DP_VARY_BL APU_BLPWM 11
DP2 output to C342 0.1U/10V_4 L6
25 C_TX1_HDMI- DP2_TXN1
C1 DP_AUX_ZVSS R401 150/F_4 R182 R187
HDMI connector C_TX0_HDMI+ C385 0.1U/10V_4 PEG_HDMI_TXDP0 K8
DP_AUX_ZVSS *39.2/F_4 301/_4
25 C_TX0_HDMI+ C_TX0_HDMI- PEG_HDMI_TXDN0 DP2_TXP2
C401 0.1U/10V_4 K7 AD12
25 C_TX0_HDMI- DP2_TXN2 TEST6
note --HDMI P&N can not swap APU_TEST9 M_TEST APU_TEST35

DISPLAY
TEST9 M18 TP26 SI,AMD no concern

PORT 2
C_TXC_HDMI+ C325 0.1U/10V_4 PEG_HDMI_TXCP J6 N18 APU_TEST10 so remove TP10,
25 C_TXC_HDMI+ DP2_TXP3 TEST10 TP24
C_TXC_HDMI- C345 0.1U/10V_4 PEG_HDMI_TXCN J5 F11 APU_TEST14_BP0
25 C_TXC_HDMI- DP2_TXN3 TEST14 TP33 TP17,TP18,TP16,TP23
G11 APU_TEST15_BP1 M_TEST CONNECTION TBD 7/8 For Comal.
TEST15 TP31
CLK_APU_P AE11 H11 APU_TEST16_BP2 R184 R186
7 CLK_APU_P CLKIN_H TEST16 TP28
Note: CLK_APU_HCLKP/N is 100MHZ SSC CLK_APU_N AD11 J11 APU_TEST17_BP3 39.2/F_4 *301/_4
7 CLK_APU_N CLKIN_L TEST17 APU_TEST18 TP29
F12

CLK
TEST18 APU_TEST18 2
CLK_DP_P AB11 G12 APU_TEST19
7 CLK_DP_P DISP_CLKIN_H TEST19 APU_TEST19 2
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC CLK_DP_N AA11 J12 APU_TEST20_SCANCLK2 To AMD HDT
C 7 CLK_DP_N DISP_CLKIN_L TEST20 APU_TEST24_SCANCLK1 TP32 C
H12 TEST35 PU FOR INTERNAL
TEST24 TP30

TEST
SVC B3 AE10 APU_TEST25_H TEST35 PD FOR CUSTOMER
2 SVC SVD SVC TEST25_H APU_TEST25_L TP5
2 SVD A3 SVD TEST25_L AD10 TP6
R412 *1K/F_4 L10 APU_TEST28_H
+1.5V TEST28_H TP27
R413 0_4 APU_SVT_R C3 M10 APU_TEST28_L

SER.
38 CPU_SVT SVT TEST28_L TP25
TEST30_H P19
4/19 For Comal. APU_SIC AG12 R19
APU_SID SIC TEST30_L M_TEST +1.2V
AH12 SID TEST31 K22 DMAACTIVE_L controls
R79 301/_4 T19
+1.5V
APU_RST# TEST32_H entry and exit from the APU_TEST25_L R83 510_4
2,7 APU_RST# AF10 RESET_L TEST32_L N19
APU_PWRGD AB12 AA12 APU_TEST35 sleep and power states

CTRL
2,7 APU_PWRGD PW ROK TEST35
+1.5V R346 300/_4 4/19 For Comal.
APU_PROCHOT# AC10 W 10 FS1R2 R102 10K/F_4 +3VS5 APU_TEST9 R178 *0_4
APU_THERMTRIP# PROCHOT_L FS1R2 DMAACTIVE_L
AE12 THERMTRIP_L DMAACTIVE_L AC12 DMAACTIVE_L 7
R345 1K/F_4 APU_ALERT AF12 R75 *1K/F_4 +1.5V
+1.5VSUS ALERT_L
P18 CPU_THERMDA R76 1K/F_4 +1.5VSUS SI APU_TEST18 R211 1K/F_4
TEST4 TP20
APU_TDI H10 R18 CPU_THERMDC APU_TEST19 R210 1K/F_4
2 APU_TDI APU_TDO TDI TEST5 TP19 APU_TEST20_SCANCLK2
J10 R188 1K/F_4
2 APU_TDO TDO
APU_TCK AMD internal test only APU_TEST24_SCANCLK1 R183 1K/F_4

JTAG
2 APU_TCK F10 TCK
APU_TMS G10 APU_TEST25_H R81 510_4
2 APU_TMS PV change to short-pad APU_TRST# TMS
2 APU_TRST# F9 TRST_L RSVD_1 Y10 FS1R1 signals is for detect CPU TYPE and protect it.
APU_DBRDY G9 AA10

RSVD
2 APU_DBRDY APU_DBREQ# DBRDY RSVD_2 FS1R1 CPU this pin is N.C
2 APU_DBREQ# 4/19 For Comal. H9 DBREQ_L RSVD_3 Y12
K21 FS1R2 CPU this pin is LOW
RSVD_4
38 CPU_VDD0_RUN_FB_L
R197 *0_4/S VSS_SENSE B4 VSS_SENSE
can remove it at MP
VDDP_FB_H C5
37 VDDP_FB_H VDDP_SENSE
CPU_VDDNB_RUN_FB_H A4

SENSE
38 CPU_VDDNB_RUN_FB_H VDDNB_SENSE
VDDIO_FB_H A5
40 VDDIO_FB_H VDDIO_SENSE +1.5V
CPU_VDD0_RUN_FB_H C4 SI , PU SUS power 4/19 For Comal.
38 CPU_VDD0_RUN_FB_H VDD_SENSE
VDDP_FB_H B5 meet AMD design
B VDDR_SENSE B

+1.5VSUS TP34 Trinity APU


TP36 +1.5V +1.5VSUS R54
TP35
*10K/F_4
TP88
4/19 For Comal, Q11
Thermal

2
R77 R92 R91 *MMBT3904-7-F +1.5VSUS +1.5VSUS
10K/F_4 R88 close to APU.
*1K/F_4 1K/F_4
1K/F_4 APU_PROCHOT# 可可可 input or output 38 VRHOT 1 3 APU_PROCHOT#
可Low 時CPU 會會 P - STATE
2

Q14 R93 *0_4/S APU_PROCHOT# R49 0_4 R343 R341 R342 R344
7 FCH_PROCHOT#
MMBT3904-7-F 2K/F_4 2K/F_4 1K/F_4 1K/F_4
3 1 APU_THERMTRIP#
6 FCH_THERMTRIP#
R95 0_4 Add R49 for verify this solution
33 H_PROCHOT#
寬C
THERMTRIP# shutdown temperature 125寬

2
to EC reserve only Q30
C152 reserve for leakage current verify MMBT3904-7-F
220P/50V_4 MBCLK2 3 1 APU_SIC
3920_RST# 32,33 MBCLK2
3920_RST# 33
Q9 1 2
3

MMBT3904-7-F D8 RB501V-40 RB501V-40 D15


2 2 1 ECPWROK
ECPWROK 10,18,33

2
R65 Q29
1

R43 10K/F_4 +3VPCU +5VPCU U8 *11.5K/F_4 R59 MBDATA2 MMBT3904-7-F 3 APU_SID


+3V 32,33 MBDATA2 1
*G718 *11.5K/F_4
SMBALERT# 1 8
A VCC TMSNS1 A
1 2
2

R67 *100K_6 NTC RB501V-40 D14


3

R55 C111 2 7 R64 *8.87K/F_4 2 1


R42 *10K/F_4 10K/F_4 *1U/6.3V_4 GND RHYST1
1

Q10 2 R56 *0_4/S 3 6


PROJECT : R53
VGA_ALERT 15 OT1 TMSNS2
*ME2N7002E D9 *RB501V-40
Quanta Computer Inc.
2 1 SMBALERT# 4 5 R57 *8.87K/F_4 2 1
R23
HWPG 23,33,35,36,37,40 OT2 RHYST2 Size Document Number Rev
1

R66 *100K_6 NTC 1A


ADD VGA TEMP_ FAIL function is active Hi
over 120 degree C= Low Llano Display/Misc
When 100K-NTC 100 C=6.164K Monday, November
Date: 14, 2011 Sheet
4 44
of
Thermal Trip = 120 C
5 4 3 2 1
5 4 3 2 1

APU POWER TABLE


PIN NAME

VDD

VDDNB

VDDIO
NET NAME

+VCC_CORE

+VDDNB_CORE

+1.5VSUS
VOLTAGE
+1.1V

??

+1.5V
EMI suggestion
+VCC_CORE

05
C96 C98 C97
VDDP +1.2V_VDDP +1.2V 470P/50V_4 *470P/50V_4 *470P/50V_4
SI , change to 22u for
VDDR +1.2V_VDDR +1.2V AMD ACE dynamic test,
D VDDA +2.5V_VDDA +2.5V +VCC_CORE 36A D
+VCC_CORE U25D
Maximum IDDspike 50A U25E
F8 VDD_1 VDD_33 R11 J20 VSS_1 VSS_75 A19
H6 VDD_2 VDD_34 T10 L4 VSS_2 VSS_76 A21
SI , change to 22u for improve +VDDNB_CORE J1 H8 R7 A23
VDD_3 VDD_35 C229 C271 C250 C669 C260 VSS_3 VSS_77
+VDDNB_CORE transient 4/19 For Comal. J14 VDD_4 VDD_36 G1 W 18 VSS_4 VSS_78 A25
P6 U11 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 A15 A7
VDD_5 VDD_37 VSS_5 VSS_79
P10 VDD_6 VDD_38 W 11 AB17 VSS_6 VSS_80 AA4
J16 VDD_7 VDD_39 W 13 AC22 VSS_7 VSS_81 AA7
J18 VDD_8 VDD_40 W 15 AE21 VSS_8 VSS_82 AB13
C821 C818 C452 J9 W 17 4/19 For Comal. AF24 AB15
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VDD_9 VDD_41 VSS_9 VSS_83
K19 VDD_10 VDD_42 W 19 AH23 VSS_10 VSS_84 AB19
K3 AB3 C286 C715 C267 C266 C259 AH25 AB21
VDD_11 VDD_43 22U/6.3V_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VSS_11 VSS_85
K17 VDD_12 VDD_44 AD3 B7 VSS_12 VSS_86 AB23
M3 VDD_13 VDD_45 AD6 C14 VSS_13 VSS_87 AB25
K6 VDD_14 VDD_46 AE1 C16 VSS_14 VSS_88 AB27
V10 VDD_15 VDD_47 L1 C2 VSS_15 VSS_89 AB9
V18 VDD_16 VDD_48 Y6 C20 VSS_16 VSS_90 AC14
C408 C465 C466 C468 C467 V3 M6 C22 AC16
0.22U/10V_4 0.22U/10V_4 180P/50V_4 180P/50V_4 180P/50V_4 VDD_17 VDD_49 VSS_17 VSS_91
F3 VDD_18 VDD_50 N11 C24 VSS_18 VSS_92 AC18
L18 N1 C307 C306 C234 C239 C293 C304 C290 C26 AC20
VDD_19 VDD_51 0.22U/10V_4 0.22U/10V_4 180P/50V_4 180P/50V_4 0.01U/25V_4 0.01U/25V_4 0.01U/25V_4 VSS_19 VSS_93
V6 VDD_20 VDD_52 T3 C28 VSS_20 VSS_94 AC24
W1 VDD_21 VDD_53 T6 D13 VSS_21 VSS_95 AC26
T18 VDD_22 VDD_54 U19 D15 VSS_22 VSS_96 AC28
Y14 VDD_23 VDD_55 U1 D17 VSS_23 VSS_97 AC4
AA1 VDD_24 VDD_56 Y16 D19 VSS_24 VSS_98 AC7
AB6 VDD_25 VDD_57 Y18 D23 VSS_25 VSS_99 AD9
AC1 VDD_26 VDD_58 Y3 D25 VSS_26 VSS_100 AE13
R1 D4 D27 AE15
C +VDDNB_CAP P3
VDD_27 VDD_59
F4
25A E4
VSS_27 VSS_101
AE17 C
VDD_28 VDD_60 VSS_28 VSS_102
4/19 For Comal.
K10
H3
VDD_29 VDD_61 AF6
AF3
Maximum IDDNBspike 33A E9
F14
VSS_29 VSS_103 M9
N10
VDD_30 VDD_62 VSS_30 VSS_104
M19 VDD_31 VDD_63 L11 F16 VSS_31 VSS_105 N4
+VDDNB_CORE +VDDNB_CORE F18 N7
VSS_32 VSS_106
F20 R10
C346 C380 C397 C8 C11
DECOUPLING between PROCESSOR and DIMMs F22
VSS_33 VSS_107
R4
22U/6.3VS_8 22U/6.3VS_8 180P/50V_4 VDDNB_1 VDDNB_13 VSS_34 VSS_108
D10 C12 F26 T11
B8
VDDNB_2 VDDNB_14
D9
Across VDDIO and VSS split F28
VSS_35 VSS_109
T9
VDDNB_3 VDDNB_15 +1.5VSUS VSS_36 VSS_110
B12 VDDNB_4 VDDNB_16 D8 G13 VSS_37 VSS_111 U10
C9 VDDNB_5 VDDNB_17 D12 G15 VSS_38 VSS_112 U18
A9 VDDNB_6 VDDNB_18 D11 G17 VSS_39 VSS_113 U4
A10 VDDNB_7 VDDNB_19 B11 G19 VSS_40 VSS_114 U7
A8 A12 C207 C194 C195 C275 G21 V11
VDDNB_8 VDDNB_20 0.22U/10V_4 0.22U/10V_4 180P/50V_4 180P/50V_4 VSS_41 VSS_115
A11 VDDNB_9 VDDNB_21 B10 G23 VSS_42 VSS_116 AE19
E10 VDDNB_10 VDDNB_22 E12 G25 VSS_43 VSS_117 AE23
E11 B9 +VDDNB_CAP G4 AE25
VDDNB_11 VDDNB_23 VSS_44 VSS_118
C10 VDDNB_12 J22 VSS_45 VSS_119 AE27
VDDNB_CAP K13 J24 VSS_46 VSS_120 AE4
VDDNB_CAP K12 J4 VSS_47 VSS_121 AE7
J7 VSS_48 VSS_122 AF14
+1.5VSUS +1.5VSUS 4/19 For Comal. K11 AF16
VSS_49 VSS_123
2.8A Up to DDR3-1333 @ 1.50V VDDIO K14 VSS_50 VSS_124 AF18
H26 VDDIO_1 VDDIO_19 T23 K9 VSS_51 VSS_125 AF20
K20 VDDIO_2 VDDIO_20 T26 AC11 VSS_52 VSS_126 AF22
J28 VDDIO_3 VDDIO_21 U22 L19 VSS_53 VSS_127 AF26
C242 C349 C255 C400 C285 C338 K23 U25 C399 C192 C403 C402 C323 C310 C210 C398 L7 AF28
0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 VDDIO_4 VDDIO_22 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 VSS_54 VSS_128
K26 VDDIO_5 VDDIO_23 U28 M11 VSS_55 VSS_129 AF9
L22 VDDIO_6 VDDIO_24 Y26 AF11 VSS_56 VSS_130 AG4
L25 VDDIO_7 VDDIO_25 T20 V19 VSS_57 VSS_131 AG7
B B
4/19 For Comal. L28 VDDIO_8 VDDIO_26 R28 V9 VSS_58 VSS_132 AH13
M20 VDDIO_9 VDDIO_27 R25 If the VSS plane is cut to create a VDDIO plane, W 16 VSS_59 VSS_133 AH15
M23 R22 W4 AH17
M26
VDDIO_10 VDDIO_28
V20
ceramic capacitors are connected across W7
VSS_60 VSS_134
AH19
VDDIO_11 VDDIO_29 VSS_61 VSS_135
N22 VDDIO_12 VDDIO_30 V23 the VDDIO and VSS plane split as follows Y11 VSS_62 VSS_136 AH21
C190 N25 V26 Y20 P9
180P/50V_4 VDDIO_13 VDDIO_31 VSS_63 VSS_137
N28 VDDIO_14 VDDIO_32 W 22 Y22 VSS_64 VSS_138 C18
P20 VDDIO_15 VDDIO_33 W 25 Y9 VSS_65 VSS_139 D21
P23 VDDIO_16 VDDIO_34 W 28 A17 VSS_66 VSS_140 W 14
P26 VDDIO_17 VDDIO_35 Y24 A13 VSS_68 VSS_141 P11
+1.2V_VDDP AA28 G28 K16 C7
VDDIO_18 VDDIO_36 VSS_67 VSS_142
VDDP = 5A F24 VSS_69 VSS_143 E8

+1.2V_VDDP
VDDR = 3.3A ( Up to DDR3-1333 @ 1.5V ) +1.2V
G8 VSS_70 VSS_144 K18
+1.2V R334 *0_8/S AH6 AG10 H7 W 12
VDDP VDDR VSS_71 VSS_145
AH5 VDDP VDDR AH8 J8 VSS_72
AH4 VDDP VDDR AH9
4/19 For Comal. C707 C674 C689 C679 AH3 AH10 +1.2V_VDDR_B R333 *0_8/S
22U/6.3VS_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VDDP VDDR
AH7 VDDP Trinity APU
C673 C671 C676
AB10 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
VDDA

C683 C684 C682 C685


0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4 Trinity APU
C680 C203 C675 C678 C681
0.22U/6.3V_4 0.22U/10V_4 1000P/50V_4 180P/50V_4 180P/50V_4

A A
VDDA= 0.75A
+2.5V L17 +2.5V_VDDA
PBY160808T-221Y-N(220,2A)

C204 C216 C226


4.7U/6.3V_6 0.22U/10V_4 3300P/50V_4
PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Llano POWER/GND
Date: Friday, November 11, 2011 Sheet 5 of 44
5 4 3 2 1
5 4 3 2 1

+3VS5

R462

R463
NC,no install by default
*2.2K_4

*2.2K_4
FCH_TEST0

FCH_TEST1
remove PCIE_RST2# from AMD recommend

TP45
TP98
PCIE_RST2#
RI#
AB6
R2
U34A
PCIE_RST2#/GEVENT4#
RI#/GEVENT22#
USBCLK/14M_25M_48M_OSC G8
USB_RCOMP_SB R494 11.8K/F_6
06
W7 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP B9
R469 *2.2K_4 FCH_TEST2 SUSB# T3
33 SUSB# SUSC# SLP_S3#
W2 H1

MISC
33 SUSC# SLP_S5# USB_FSD1P/GPIO186

USB
DNBSWON# J4 H3
33 DNBSWON# FCH_PWRGD PW R_BTN# USB_FSD1N
10 FCH_PWRGD N7 PW R_GOOD HUDSON-M3 USB_FSD0P/GPIO185 H6
FCH_TEST0 T9 Part 4 of 5 H5
D +3V FCH_TEST1 TEST0 USB_FSD0N D
4/19 For Comal. T10

USB
TP51 TEST1/TMS
FCH_TEST2

1.1
ACPI / WAKE UP
V9 TEST2 USB_HSD13P H10
R295 2.2K_4 CGCLK_SMB GEVENT0# internal pull Hi 8.2K to +3V EC_A20GATE AE22 G10
33 EC_A20GATE GA20IN/GEVENT0# USB_HSD13N
to DDR3 SMBUS GEVENT1# internal pull Hi 8.2K to +3V EC_RCIN# AG19
33 EC_RCIN# KBRST#/GEVENT1#
R287 2.2K_4 CGDAT_SMB FCH_PME# R9 K10 USBP6+

EVENTS
TP50 SIO_EXT_SMI# PME#/GEVENT3# USB_HSD12P USBP6- USBP12+ 28
SI2 , change power rail GEVENT23# internal pull Hi 8.2K to +3V 33 SIO_EXT_SMI# C26 LPC_SMI#/GEVENT23# USB_HSD12N J12 USBP12- 28 Left side USB Combo 3.0/2.0.
+3VS5 GEVENT5# internal pull Hi 8.2K to +3VS5 R447 *0_4/S GEVENT5# T5
from +3V to +3VS5 33 SIO_EXT_SCI# LPC_PD#/GEVENT5#
SYS_RST# U4 G12 USBP5+
SYS_RESET#/GEVENT19# USB_HSD11P USBP11+ 28
R468 *1K_4 PCIE_WAKE# no need to pull PCIE_WAKE# K1 F12 USBP5- Left side USB Combo 3.0/2.0.
29,32 PCIE_WAKE# W AKE#/GEVENT8# USB_HSD11N USBP11- 28
C879 *100P/50V_4 V7
J6 1 SYS_RST#
Hi resistor from check list FCH_THERMTRIP# R10 IR_RX1/GEVENT20#
2 4 FCH_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P K12
SYS_RST# internal +3V R286 10K/F_4 WD_PWRGD AF19 K13
*SOLDERJUMPER-2 W D_PW RGD USB_HSD10N
10K pull up RSMRST#
33 RSMRST# U2 RSMRST# USB_HSD9P B11
USB_HSD9N D11
PCIE_CARD_CLKREQ#
AG24
26 PCIE_CARD_CLKREQ# CLK_REQ4#/SATA_IS0#/GPIO64
CLK_REQ2# internal pull Hi 8.2K to +3V PCIE_LAN_CLKREQ#
AE24 E10
29 PCIE_LAN_CLKREQ# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P USBP8+ 32
AE26 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N F10 USBP8- 32 WLAN Min-Card
CLK_REQ3# internal pull Hi 8.2K to +3V AF22 CLK_REQ0#/SATA_IS3#/GPIO60
+3VS5 AH17 C10 USBP7+
SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P USBP7- TP104
CLK_REQ4# internal pull Hi 8.2K to +3V AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD7N A10 TP101
R301 10K/F_4 SCL3 R505 *0_4/S FCH_GPIO66 AF24
27 ACZ_SPKR SPKR/GPIO66
CGCLK_SMB AD26 H9
12,13 CGCLK_SMB SCL0/GPIO43 USB_HSD6P
R298 10K/F_4 SDA3 CGDAT_SMB AD25 G9

USB
12,13 CGDAT_SMB SDA0/GPIO47 USB_HSD6N
SI2 , HP request Image sensor SCL1

2.0
30 SCL1 T7 SCL1/GPIO227
R290 2.2K_4 SCL2 SMBUS reserve to FCH SDA1 R7 A8
30 SDA1 SDA1/GPIO228 USB_HSD5P
PCIE_MINI_CLKREQ# AG25 C8
SDA2 32 PCIE_MINI_CLKREQ# CLKREQ1# CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N
R296 2.2K_4 AG22

GPIO
LLB# CLK_REQ1#/FANOUT4/GPIO61
LLB# Not Implemented ,left unconnected. TP94 J2 IR_LED#/LLB#/GPIO184 USB_HSD4P F8
This pin is used to SMARTVOLT2 AG26 E8
C SCL1 TP64 VGA_PD SMARTVOLT2/SHUTDOW N#/GPIO51 USB_HSD4N C
R464 2.2K_4 power down VGA DAC R283 0_4 V8
9 VGA_POWER_DOWN DDR3_RST#/GEVENT7#/VGA_PD
GBE_LED0 W8 C6
SDA1 regulators when CRT TP49 GBE_LED0/GPIO183 USB_HSD3P
R465 2.2K_4 Y6 A6
no connected Remove Card EECS function form Vendor mail SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N
V10 GBE_LED2/GEVENT10#
AA8 GBE_STAT0/GEVENT11# USB_HSD2P C5 USBP2+ 23
R284 *4.7K_4 FCH_THERMTRIP# SI TP63 AF25 CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N A5 USBP2- 23 Camera USB
C582 *0.01U/25V_4 C1
USB_HSD1P
TP93 M7 BLINK/USB_OC7#/GEVENT18# USB_HSD1N C3
TP97 R8 USB_OC6#/IR_TX1/GEVENT6#
ODD_PLUGIN# T1 E1
31 ODD_PLUGIN# USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P USBP0+ 28
R272 10K/F_4 DNBSWON# GEVENT16# internal pull Hi 8.2K to +3VS5 ODD_DA#_FCH P6 E3 Right side USB 2.0 Connector
31 ODD_DA#_FCH USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N USBP0- 28
4/19 For Comal. TP48 F5 USB_OC3#/AC_PRES/TDO/GEVENT15#
GEVENT15# internal pull Hi 8.2K to +3VS5 FCH_JTAG_TCK P5 C16 USBSS_CALRP R496 1K/F_4
TP99

USB
FCH_JTAG_TDI USB_OC2#/TCK/GEVENT14# USBSS_CALRP USBSS_CALRN R495 1K/F_4

OC
For Zero ODD TP95
FCH_JTAG_RST#
J7
T8
USB_OC1#/TDI/GEVENT13# USBSS_CALRN A16 +FCH_VDD_11_SSUSB_S
TP46 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
USB_SS_TX3P A14
USB_SS_TX3N C14 USB 3.0 Not Implemented: left unconnected.
R484 *10K/F_4 ACZ_BCLK_R AB3 C12
ACZ_SDOUT_R AZ_BITCLK USB_SS_RX3P
AB1 AZ_SDOUT USB_SS_RX3N A12
HD audio R476 *10K/F_4 ACZ_SDIN0 AA2
R467 *10K/F_4 ACZ_SDIN1 AZ_SDIN0/GPIO167
interface is Y5 AZ_SDIN1/GPIO168 USB_SS_TX2P D15 USB30_TX2+ 28
R470 *10K/F_4 ACZ_SDIN2_R Y3 B15
+3V_S5 voltage AZ_SDIN2/GPIO169 USB_SS_TX2N USB30_TX2- 28
R466 *10K/F_4 ACZ_SDIN3_R Y1
ACZ_SYNC_R AZ_SDIN3/GPIO170
AD6 AZ_SYNC USB_SS_RX2P E14 USB30_RX2+ 28
ACZ_RST#_R AE4 F14
AZ_RST# USB_SS_RX2N USB30_RX2- 28

USB
F15
To Azalia

AUDIO

3.0
USB_SS_TX1P USB30_TX1+ 28
TP60 K19 PS2_DAT/SDA4/GPIO187 USB_SS_TX1N G15 USB30_TX1- 28

HD
B J19 B
TP59 PS2_CLK/CEC/SCL4/GPIO188
ACZ_SDOUT_R R454 33_4 J21 H13
ACZ_SDOUT_AUDIO 27 SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P USB30_RX1+ 28
USB_SS_RX1N G13 USB30_RX1- 28
ACZ_SYNC_R R481 33_4
ACZ_SYNC_AUDIO 27
BT_COMBO_OFF# D21 J16
32 BT_COMBO_OFF# PS2KB_DAT/GPIO189 USB_SS_TX0P
ACZ_BCLK_R R450 33_4 C20 H16
BIT_CLK_AUDIO 27 PS2KB_CLK/GPIO190 USB_SS_TX0N
VGA_RSTB D23
14 VGA_RSTB PS2M_DAT/GPIO191
ACZ_RST#_R R479 33_4 33 VGA_ON_SB VGA_ON_SB C22 J15
ACZ_RST#_AUDIO 27 PS2M_CLK/GPIO192 USB_SS_RX0P
USB_SS_RX0N K15
ACZ_SDIN0
ACZ_SDIN0 27
F21 KSO_0/GPIO209 SCL3 of a TSI-capable APU's
E20 H19 SCL2
KSO_1/GPIO210 SCL2/GPIO193 SDA2
thermal bus,Pulled up to
F20 KSO_2/GPIO211 SDA2/GPIO194 G19
A22 G22 SCL3 APU_VDDIO. Resistor value
KSO_3/GPIO212 SCL3_LV/GPIO195
E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21 SDA3 verified in the relevant APU
CLK_REQ# already A20 KSO_5/GPIO214 EC_PW M0/EC_TIMER0/GPIO197 E22 design guide.
Pure UMA can remove internal pull up 8.2K J18 KSO_6/GPIO215 EC_PW M1/EC_TIMER1/GPIO198 H22
H18 J22 EC_PWM2
KSO_7/GPIO216 EC_PW M2/EC_TIMER2/W OL_EN/GPIO199 EC_PWM2 10
1 2 CLKREQ1# G18 H21
44 VGA_REQ KSO_8/GPIO217 EC_PW M3/EC_TIMER3/GPIO200
B21 No need for GPIO200
D10 RB501V-40 KSO_9/GPIO218
K18 KSO_10/GPIO219 KSI_0/GPIO201 K21
D19 EMBEDDED K22
KSO_11/GPIO220 CTRL
KSI_1/GPIO202
A18 KSO_12/GPIO221 KSI_2/GPIO203 F22
C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
B19 KSO_14/XDB0/GPIO223 KSI_4/GPIO205 E24
B17 KSO_15/XDB1/GPIO224 KSI_5/GPIO206 B23
A24 KSO_16/XDB2/GPIO225 KSI_6/GPIO207 C24
D17 KSO_17/XDB3/GPIO226 KSI_7/GPIO208 F18

A A

Hudson-M2-A13

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Hudson-M3 GPIO/USB/AZ/RGMII
Date: Friday, November 11, 2011 Sheet 6 of 44
5 4 3 2 1
5 4 3 2 1

07
C873 150P/50V_4
26 CARD_PCIE_RST# R453 33_4
32 MINI_PCIE_RST# R480 33_4

C874 150P/50V_4 U34E

C875 150P/50V_4
11,29 LAN_PCIE_RST# R482 33_4 PCIE_RST# AE2 PCIE_RST#
HUDSON-M3 PCICLK0 AF3
R483 33_4 A_RST# AD5 Part 1 of 5 AF1 PCI_CLK1
14 GPU_RST# A_RST# PCICLK1/GPO36 PCI_CLK1 10
C876 150P/50V_4 AF5
C899 0.1U/10V_4 UMI_RXP0_C PCICLK2/GPO37 PCI_CLK3
2 UMI_RXP0 AE30 UMI_TX0P PCICLK3/GPO38 AG2 PCI_CLK3 10
2 UMI_RXN0 C900 0.1U/10V_4 UMI_RXN0_C AE32 AF6 PCI_CLK4 PCI_CLK4 10
C904 0.1U/10V_4 UMI_RXP1_C UMI_TX0N PCICLK4/14M_OSC/GPO39
2 UMI_RXP1 AD33

CLKS
C905 0.1U/10V_4 UMI_RXN1_C UMI_TX1P PCIRST#_L R478 33_4 KBC_RST# C872 *150P/50V_4
Place these PICE AC 2 UMI_RXN1 AD31 AB5

PCI
D C644 0.1U/10V_4 UMI_RXP2_C UMI_TX1N PCIRST# D
2 UMI_RXP2 AD28
coupling cap close to FCH C643 0.1U/10V_4 UMI_RXN2_C AD29
UMI_TX2P
2 UMI_RXN2 UMI_TX2N
C896 0.1U/10V_4 UMI_RXP3_C AC30 AJ3
2 UMI_RXP3 UMI_TX3P AD0/GPIO0 KBC_RST# 33
C895 0.1U/10V_4 UMI_RXN3_C AC32 AL5
2 UMI_RXN3 UMI_TX3N AD1/GPIO1
AD2/GPIO2 AG4
2 UMI_TXP0 AB33 UMI_RX0P AD3/GPIO3 AL6
2 UMI_TXN0 AB31 UMI_RX0N AD4/GPIO4 AH3
2 UMI_TXP1 AB28 UMI_RX1P AD5/GPIO5 AJ5
2 UMI_TXN1 AB29 UMI_RX1N AD6/GPIO6 AL1
2 UMI_TXP2 Y33 UMI_RX2P AD7/GPIO7 AN5
2 UMI_TXN2 Y31 UMI_RX2N AD8/GPIO8 AN6
2 UMI_TXP3 Y28 UMI_RX3P AD9/GPIO9 AJ1
2 UMI_TXN3 Y29 UMI_RX3N AD10/GPIO10 AL8

PCI EXPRESS
INTERFACES
AD11/GPIO11 AL3
R312 590/F_4 PCIE_CALRP_FCH AF29 AM7
R316 2K/F_4 PCIE_CALRN_FCH PCIE_CALRP AD12/GPIO12
+1.1V_PCIE_VDDR AF31 PCIE_CALRN AD13/GPIO13 AJ6
AD14/GPIO14 AK7
0.1U/10V_4 C648 PCIE_TXP0_CARD_C V33 AN8
26 PCIE_TXP0_CARD GPP_TX0P AD15/GPIO15
26 PCIE_TXN0_CARD 0.1U/10V_4 C649 PCIE_TXN0_CARD_C V31 AG9
0.1U/10V_4 C897 PCIE_TXP1_C GPP_TX0N AD16/GPIO16
29 PCIE_TXP1_LAN W 30 GPP_TX1P AD17/GPIO17 AM11
0.1U/10V_4 C898 PCIE_TXN1_C W 32 AJ10
29 PCIE_TXN1_LAN GPP_TX1N AD18/GPIO18
AB26 GPP_TX2P AD19/GPIO19 AL12
SI , PCIE port change AB27 GPP_TX2N AD20/GPIO20 AK11
from port 2 to port 0 AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 GPP_TX3N AD22/GPIO22 AG12
AE12 PCI_AD23 PCI_AD23 10
PCIE_RXP0_CARD AD23/GPIO23 PCI_AD24
26 PCIE_RXP0_CARD AA27 GPP_RX0P AD24/GPIO24 AC12 PCI_AD24 10
PCIE_RXN0_CARD AA26 AE13 PCI_AD25 PCI_AD25 10
26 PCIE_RXN0_CARD GPP_RX0N AD25/GPIO25
PCIE_RXP1_LAN W 27 AF13 PCI_AD26 PCI_AD26 10
29 PCIE_RXP1_LAN GPP_RX1P AD26/GPIO26
PCIE_RXN1_LAN V27 AH13 PCI_AD27 PCI_AD27 10
C 29 PCIE_RXN1_LAN GPP_RX1N AD27/GPIO27 C

INTERFACE
V26 GPP_RX2P AD28/GPIO28 AH14 DGPU_PWROK 18,33,42,43,44
W 26 AD15 HUDSON_MEMHOT#_R
GPP_RX2N AD29/GPIO29 TP57
W 24 GPP_RX3P AD30/GPIO30 AC15
W 23 AE16

PCI
GPP_RX3N AD31/GPIO31 D11
CBE0# AN3
AJ8 RB500V-40
CBE1# +3V_RTC
CBE2# AN10 1 2 +3VPCU
R306 2K/F_4 CLK_CALRN_FCH F27 AD12
+1.1V_CKVDD CLK_CALRN CBE3# 20MIL 20MIL
FRAME# AG10
AK9 20MIL R325 499/F_4 +3VRTC_1 R324 10_4 +3VRTC 1 2
DEVSEL#
SI , change to 22Ω & 47Ω G30 PCIE_RCLKP IRDY# AL10
for Rise/Fall time issue G28 AF10 D12

+VCCRTC_2
PCIE_RCLKN TRDY# RB500V-40
PAR AE10
RP9 2 1 0X2 CLK_DP_FCH_P R26 AH1
4 CLK_DP_P DISP_CLKP STOP#
4 3 CLK_DP_FCH_N T26 AM9 C661
4 CLK_DP_N DISP_CLKN PERR#
AH8 PCI_SERR# 33 1U/6.3V_4 20MIL
RP13 CLK_ANX_FCH_P SERR#
11 CLK_ANX_P 2 1 0X2 H33 DISP2_CLKP REQ0# AG15
11 CLK_ANX_N 4 3 CLK_ANX_FCH_N H31 AG13 C884 100P/50V_4 SI , AMD request
DISP2_CLKN REQ1#/GPIO40 R323
REQ2#/CLK_REQ8#/GPIO41 AF15 test point
RP7 4 3 0X2 CLK_APU_FCH_P T24 AM17
4 CLK_APU_P APU_CLKP REQ3#/CLK_REQ5#/GPIO42 TP109 TP103
4 CLK_APU_N 2 1 CLK_APU_FCH_N T23 AD16 1K/F_4
APU_CLKN GNT0# FCH_GPIO44 R492 *0_4
GNT1#/GPO44 AD13 SPI_WP 8
Pure UMA RP11 4 3 22X2 CLK_VGA_FCH_P J30 AD21

+BAT
14 CLK_VGA_P SLT_GFX_CLKP GNT2#/SD_LED/GPO45 TP62
CLK_VGA_FCH_N
can remove 14 CLK_VGA_N 2 1 K29 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AK17
AD19 CLKRUN#
TP106
CLKRUN# 33
20MIL
RP10 CLK_WLAN_FCH_P CLKRUN#
32 CLK_WLAN_P 4 3 0X2 H27 GPP_CLK0P LOCK# AH9 TP52
2 1 CLK_WLAN_FCH_N H28 CN26
32 CLK_WLAN_N GPP_CLK0N
INTE#/GPIO32 AF18 TP61
26 CLK_PCIE_CARD_P RP12 2 1 47X2 CLK_PCIE_CARDP_FCH J27 AE18 TRAVIS_EN#
GPP_CLK1P INTF#/GPIO33 TP105 1
4 3 CLK_PCIE_CARDN_FCH K26 AC16 SI2 , change R497 value
B
26 CLK_PCIE_CARD_N GPP_CLK1N INTG#/GPIO34 TP58 2 B
AD18 ACCEL_INT Add G-sensor signal from 220 ohm to 120 ohm
INTH#/GPIO35 ACCEL_INT 32
F33 GPP_CLK2P
F31 LPC_CLK0 88266-020L
GPP_CLK2N LPC_CLK0 10
LPC_CLK1 LPC_CLK1 10 CLK_33_DEBUG 32
Note: CLK_FCH_SRCP/N is 100MHZ SSC E33 GPP_CLK3P
E31 B25 R497 BLM15BD121SN1D(120,300MA) C889 15P/50V_4
GPP_CLK3N LPCCLK0 R498 33_4 C890 15P/50V_4
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC LPCCLK1 D25 SI , change for EMI
M23 D27 LAD0 LAD0 32,33
GPP_CLK4P LAD0 LAD1
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC M24 GPP_CLK4N
LPC
LAD1 C28 LAD1 32,33 CLK_33M_KBC 33
GENERATOR

A26 LAD2
Note: CLK_APU_HCLKP/N is 100MHZ SSC LAD2 LAD2 32,33
M27 A29 LAD3 LAD3 32,33
GPP_CLK5P LAD3 LFRAME# 32K_X1 C882 18P/50V_4
Note: CLK_PCIE_VGAP/N is 100MHZ SSC M26 A31
CLOCK

GPP_CLK5N LFRAME# LFRAME# 32,33


Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable B27 LDRQ#0
LDRQ0# TP66

1
2
N25 AE27 LDRQ#1
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 TP67
N26 AE19 SERIRQ FCH PROCHOT#--- (input 0.8V threshold )
GPP_CLK6N SERIRQ/GPIO48 SERIRQ 33
R458 Y8
When it isasserted, it can generate SCI or 20M_4 32.768KHZ
R23 GPP_CLK7P
R24 SMI to OS/BIOS

4
3
GPP_CLK7N DMAACTIVE_L PV change to short-pad 32K_X2 C877 18P/50V_4
DMA_ACTIVE# G25 DMAACTIVE_L 4
29 CLK_PCIE_LANP RP8 4 3 0X2 CLK_PCIE_LANP_FCH N27 E28 FCH_PROCHOT# FCH_PROCHOT# 4
CLK_PCIE_LANN_FCH GPP_CLK8P PROCHOT# APU_PWRGD_R R307 *0_4/S USE GROUND GUARD FOR 32K_X1 AND 32K_X2
2 1 R27 E26
APU

29 CLK_PCIE_LANN GPP_CLK8N APU_PG APU_PWRGD 2,4


G26 APU_STOP#
LDT_STP# TP65
F26 APU_RST# APU_RST# 2,4 LDT_STP# let is NC from schematic recommend
APU_RST#
J26 14M_25M_48M_OSC
TP107 G2 32K_X1
32K_X1
C891 27P/50V_4 25M_X1 C31 G4 32K_X2
25M_X1 32K_X2
S5_CORE_EN is necessary to connect enable
H7 S5_CORE_EN pin of +3VPCU/+5VPCU regulator for S5+
A S5_CORE_EN TP44 A
Y9 R499 F1 CLK_RTC
RTCCLK CLK_RTC 10 mode implementation
25MHZ 25M_X2 C33 F3 INTRUDER_ALERT#
25M_X2 INTRUDER_ALERT# TP42
1M/F_4 E6 +3V_RTC
PLUS

VDDBT_RTC_G +3V_RTC
TP108
20MIL
S5

C892 27P/50V_4
Hudson-M2-A13
1

G6
*SHORT_ PAD1 C568 INTRUDER_ALERT# Left not connected
PROJECT : R53
0.1U/10V_4
(FCH has 50-kohm internal pull-up to Quanta Computer Inc.
2

VBAT).
Size Document Number Rev
Custom 1A
Hudson-M3 ACPI/PCI/CLOCK
Date: Monday, November 14, 2011 Sheet 7 of 44
5 4 3 2 1
5 4 3 2 1

U34D

A3
A33
B7
B13
VSS_1
VSS_2
VSS_3
VSS_4
HUDSON-M3
Part 5 of 5 VSS_65
VSS_66
VSS_67
VSS_68
T25
T27
U6
U14
31
31
PLACE SATA AC COUPLING
CAPS CLOSE TO HUDSON-M2/M3

SATA_TXP0
SATA_TXN0
SATA_TXP0
SATA_TXN0
AK19
AM19
U34B

SATA_TX0P
SATA_TX0N
HUDSON-M3 Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
AL14
AN14
08
D9 U17 AJ12
D13
VSS_5 VSS_69
U20
SATA HDD AL20
SD_CD#/GPIO75
AH12
VSS_6 VSS_70 31 SATA_RXN0 SATA_RX0N SD_W P/GPIO76
E5 VSS_7 VSS_71 U21 31 SATA_RXP0 AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13
E12 VSS_8 VSS_72 U30 SD_DATA1/SDATO_2/GPIO78 AM13
E16 U32 SATA_TXP1 AN22 AH15 Vender Size P/N
VSS_9 VSS_73 31 SATA_TXP1 SATA_TX1P SD_DATA2/GPIO79
E29 V11 SATA_TXN1 AL22 AJ14

CARD
VSS_10 VSS_74 31 SATA_TXN1 SATA_TX1N SD_DATA3/GPIO80
F7 V16
SATA ODD AMIC 2M AKE38ZN0801

SD
D VSS_11 VSS_75 GBE_COL R280 *10K/F_4 D
F9 VSS_12 VSS_76 V18 31 SATA_RXN1 AH20 SATA_RX1N GBE_COL AC4
GBE_CRS R451 *10K/F_4 WINBOND AKE38FP0N01
F11
F13
VSS_13 VSS_77 W4
W6
31 SATA_RXP1 AJ20 SATA_RX1P GBE_CRS AD3
AD9
2M
VSS_14 VSS_78 GBE_MDCK GBE_MDIO R456 *10K/F_4
F16 VSS_15 VSS_79 W 25 AJ22 SATA_TX2P GBE_MDIO W 10 +3VS5 Socket DFHS08FS023
F17 VSS_16 VSS_80 W 28 AH22 SATA_TX2N GBE_RXCLK AB8
F19 VSS_17 VSS_81 Y14 GBE_RXD3 AH7
F23 VSS_18 VSS_82 Y16 AM23 SATA_RX2N GBE_RXD2 AF7
F25 Y18 +3V AK23 AE7 6/7 for Comal. SPI_CLK
F29
VSS_19
VSS_20
VSS_83
VSS_84 AA6
SATA_RX2P GBE_RXD1
GBE_RXD0 AD7 FCH SPI ROM
G6 VSS_21 VSS_85 AA12 AH24 SATA_TX3P GBE_RXCTL/RXDV AG8
G16 AA13 AJ24 AD1 GBE_RXERR R452 *10K/F_4 C880

GBE
VSS_22 VSS_86 SATA_TX3N GBE_RXERR

LAN
G32 AA14 AB7 *22P/50V_4 SI , change power rail
VSS_23 VSS_87 C577 GBE_TXCLK +3VS5
H12 VSS_24 VSS_88 AA16 AN24 SATA_RX3N GBE_TXD3 AF9 from +3V to +3VS5
H15 VSS_25 VSS_89 AA17 *0.1U/10V_4 AL24 SATA_RX3P GBE_TXD2 AG6 EMI
H29 AA25 U23 AE8 +3V
VSS_26 VSS_90 GBE_TXD1

5
J6 AA28 *MC74VHC1G08DFT2G AL26 AD8
VSS_27 VSS_91 SATA_TX4P GBE_TXD0
GROUND

J9 AA30 2 SB_SATA_LED# AN26 AB9 ICT need TP2675 size


VSS_28 VSS_92 SATA_TX4N GBE_TXCTL/TXEN R486 C881 *0.1U/10V_4
J10 VSS_29 VSS_93 AA32 28 SATA_LED# 4 GBE_PHY_PD AC2 test point
J13 AB25 1 AJ26 AA7 10K/F_4
VSS_30 VSS_94 SATA_RX4N GBE_PHY_RST# GBE_PHY_INTR R455 10K/F_4
J28 VSS_31 VSS_95 AC6 AH26 SATA_RX4P GBE_PHY_INTR W9 +3VS5

SERIAL
J32 AC18

3
VSS_32 VSS_96 U33
K7 AC28 AN29

ATA
VSS_33 VSS_97 SATA_TX5P SPI_SI R487 0_4 SPI_CS0# R473
K16 VSS_34 VSS_98 AD27 AL28 SATA_TX5N SPI_DI/GPIO164 V6 TP47 33 EC_BIOS_CS# 1 CE# VDD 8
K27 AE6 V5 SPI_SO R472 0_4 SPI_CLK 6 *10K/F_4
VSS_35 VSS_99 SPI_DO/GPIO163 TP40 33 EC_BIOS_SPI_CLK_I SCK
K28 AE15 AK27 V3 SPI_CLK R471 0_4 SPI_SO 5
VSS_36 VSS_100 SATA_RX5N SPI_CLK/GPIO162 TP41 33 EC_BIOS_WR# SI
L6 AE21 R288 0_4 AM27 T6 SPI_CS0# R489 0_4 SPI_SI 2 7
VSS_37 VSS_101 SATA_RX5P SPI_CS1#/GPIO165 TP43 33 EC_BIOS_RD# SO HOLD#
L12 AE28 V1 FCH_SPI_WP

ROM
VSS_38 VSS_102 ROM_RST#/SPI_W P#/GPIO161 TP96
R493 *0_4

SPI
L13 VSS_39 VSS_103 AF8 AL29 NC6 7 SPI_WP 3 W P# VSS 4
L15 VSS_40 VSS_104 AF12 AN31 NC7
L16 AF16 L30 FCH_CRT_R R503 *0_4/S FCH_CRT_RED 24 *MX25L1605DM2I-12G
C VSS_41 VSS_105 VGA_RED C
L21 VSS_42 VSS_106 AF33 AL31 NC8
M13 AG30 AL33 L32 FCH_CRT_G R510 *0_4/S FCH_CRT_GRE 24 *10K/F_4 R491 +3V
VSS_43 VSS_107 NC9 VGA_GREEN
M16 VSS_44 VSS_108 AG32
M21 AH5 AH33 M29 FCH_CRT_B R509 *0_4/S FCH_CRT_BLU 24
VSS_45 VSS_109 NC10 VGA_BLUE
M25 VSS_46 VSS_110 AH11 AH31 NC11
N6 VSS_47 VSS_111 AH18 PLACE SATA_CAL RES VERY
N11 AH19 AJ33 M28 FCH_CRT_HSYNC 24
N13
VSS_48 VSS_112
AH21 CLOSE TO BALL OF AJ31
NC12 VGA_HSYNC/GPO68
N30 R place close to PCH
VSS_49 VSS_113 NC13 VGA_VSYNC/GPO69 FCH_CRT_VSYNC 24

DAC
VGA
N23 VSS_50 VSS_114 AH23 HUDSON-M2/M3
N24 AH25 M33 FCH_DDCDAT 24 FCH_CRT_R R502 150/F_4
VSS_51 VSS_115 VGA_DDC_SDA/GPO70
P12 VSS_52 VSS_116 AH27 VGA_DDC_SCL/GPO71 N32 FCH_DDCCLK 24
P18 AJ18 R313 1K/F_4 SATA_CALRP AF28 FCH_CRT_G R501 150/F_4
VSS_53 VSS_117 R303 931/F_4 SATA_CALRN SATA_CALRP VGA_DAC_REST R314 715/F_4
P20 VSS_54 VSS_118 AJ28 +1.1V_AVDD_SATA AF27 SATA_CALRN VGA_DAC_RSET K31
P21 AJ29 FCH_CRT_B R504 150/F_4
VSS_55 VSS_119
P31 VSS_56 VSS_120 AK21 4/19 For Comal. AUX_VGA_CH_P V28 APU_DP_AUXP 4
P33 AK25 +3V R294 *220/F_6 SB_SATA_LED# AD22 V29 APU_DP_AUXN 4
VSS_57 VSS_121 SATA_ACT#/GPIO67 AUX_VGA_CH_N
R4 VSS_58 VSS_122 AL18
R11 AM21 U28 AUXCAL R317 100/F_4 +FCH_VDDAN_11_MLDAC
VSS_59 VSS_123 AUXCAL
R25 VSS_60 VSS_124 AM25 AF21 SATA_X1
R28 VSS_61 VSS_125 AN1 ML_VGA_L0P T31 APU_DP_TXP0 4
T11 VSS_62 VSS_126 AN18 Integrated Clock Mode: ML_VGA_L0N T33 APU_DP_TXN0 4
T16 VSS_63 VSS_127 AN28 Leave unconnected. ML_VGA_L1P T29 APU_DP_TXP1 4
T18 VSS_64 VSS_128 AN33 ML_VGA_L1N T28 APU_DP_TXN1 4
ML_VGA_L2P R32 APU_DP_TXP2 4
N8 VSSAN_HW M VSSPL_DAC T21 AG21 SATA_X2 ML_VGA_L2N R30 APU_DP_TXN2 4
VSSAN_DAC L28 ML_VGA_L3P P29 APU_DP_TXP3 4
K25 K33 Add GPIO for G-sensor LED control P28

MAINLINK
VSSXL VSSANQ_DAC ML_VGA_L3N APU_DP_TXN3 4
VSSIO_DAC N28
H25 GPIO52 internal pull Hi 8.2K to +3V C29 VGA_HPD R311 *10K/F_4 +FCH_VDDAN_33_DAC_R
VSSPL_SYS ML_VGA_HPD/GPIO229

VGA
EFUSE R6 GPIO53 internal pull Hi 8.2K to +3V
B RF_OFF# SIDE_PORT_ID0 FCH_VGA_HPD R506 *0_4 VGA_HPD B
GPIO54 internal pull Hi 8.2K to +3V 32 RF_OFF# AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2
Hudson-M2-A13 GPIO56 internal pull Hi 8.2K to +3V BT_OFF# AM15 M3 SIDE_PORT_ID1
TP102 FANOUT1/GPIO53 VIN1/GPIO176
GPIO57 internal pull Hi 8.2K to +3V BT_COMBO_EN# AJ16 L2 SIDE_PORT_ID2
32 BT_COMBO_EN# FANOUT2/GPIO54 VIN2/SDATI_1/GPIO177
GPIO58 internal pull Hi 8.2K to +3V HW N4 BOARD_ID0 Reserve for debug
ODD_PWR MONITOR
VIN3/SDATO_1/GPIO178 BOARD_ID1
31 ODD_PWR AK15 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 P1
AN16 P3 BOARD_ID2
28 ACC_LED# FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 +3V
LCD_BK AL16 M1 BOARD_ID3 SI , Q23,Q41
23 LCD_BK FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181
ID4 ID3 ID2 ID1 ID0 CONFIG 31- Level BOM Item M5 BOARD_ID4
TEMPIN0
TEMPIN1
K6 TEMPIN0/GPIO171
VIN7/GBE_LED3/GPIO182 change to
dual type MOS Q50
VGA Hot-plug
K5 TEMPIN1/GPIO172 NC1 AG16
0 0 0 0 0 UMA 1 TEMPIN2 K3 AH10 VIN ( 0 - 7 ) R508 +5V
TEMPIN3 TEMPIN2/GPIO173 NC2
M6 TEMPIN3/TALERT#/GPIO174 NC3 A28 Voltage Monitor Not Implemented
G27 10-KΩ 5% pull-up to +3VS5 1K/F_4
NC4
0 0 0 1 0 2 NC5 L4 or 10-KΩ 5% pull-down
R500
FCH_VGA_HPD 100K/F_4
4 FCH_VGA_HPD
0 0 1 0 0 3 Hudson-M2-A13
R281 R276 R485 R277
10K/F_4 10K/F_4 10K/F_4 10K/F_4 TEMP( 0 - 3 ) Q50B

6
0 0 1 1 0 4 Temp Monitor Not Implemented +3VS5 R444 10K/F_4 BOARD_ID0 R445 *10K/F_4
10-KΩ 5% pull-up to +3VS5 2
or 10-KΩ 5% pull-down
0 1 0 1 0 5 R442 *10K/F_4 BOARD_ID1 R443 10K/F_4

1
Dual 2N7002DW-7-F Q50A

3
0 1 1 1 0 6 R449 *10K/F_4 BOARD_ID2 R448 10K/F_4 5 VGA_HPD

SIDE_PORT_ID2 SIDE_PORT_ID1 SIDE_PORT_ID0

4
1 0 0 1 0 7 R440 *10K/F_4 BOARD_ID3 R460 10K/F_4 Dual 2N7002DW-7-F
R309
A 0 0 0 Samsung A
100K/F_4
1 0 1 1 0 8 R438 *10K/F_4 BOARD_ID4 R439 10K/F_4

0 0 0 0 1 SG / Muxless 9 0 0 1 Hynix
R446 10K/F_4 SIDE_PORT_ID0 R459 *10K/F_4

0 0 1 0 1 10
PROJECT : R53
0 1 0 NC R441 10K/F_4 SIDE_PORT_ID1 R461 *10K/F_4 Quanta Computer Inc.
1 0 0 1 1 11
R437 *10K/F_4 SIDE_PORT_ID2 R457 10K/F_4 Size Document Number Rev
0 1 1 no supprot side port Custom 1A
1 0 1 1 1 12 Hudson-M3 SATA/HWM/SPI
Date: Friday, November 11, 2011 Sheet 8 of 44
5 4 3 2 1
5 4 3 2 1

SI, add for


leakage issue

+3V 1
R539

Q46
0_8

*AO3416
3
+3.3V_VDDIO
VDDQ--3.3V I/O power 102mA
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U34C 1007mA for M3
902mA for M2
+1.1V_VDDCR
09
VDDCR-- S/B CORE power
AB17 HUDSON-M3
VDDIO_33_PCIGP_1
Part 3 of 5
VDDCR_11_1 T14 TRACE WIDTH >=100mil +1.1V
C589 C570 C586 C581 C585 AB18 T17

2
0.1U/10V_4 22U/6.3VS_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDIO_33_PCIGP_2 VDDCR_11_2
AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20
33,34,36,40,41 MAINON AD10 U16 C588 C597 C598 C590 C591
VDDIO_33_PCIGP_4 VDDCR_11_4

PCI/GPIO I/O
M2 chipset need to connect to GND AG7 U18 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_8
VDDIO_33_PCIGP_5 VDDCR_11_5

CORE
M3 remove AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14 Reserve for VDDAN_11_CL
D L52 TRACE WIDTH >=15mil AB12 V17 R514 0_8 D

S0
+3V VDDIO_33_PCIGP_7 VDDCR_11_7 leakage current issue
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20
PBY160808T-221Y-N(220,2A) +FCH_VDDAN_33_DAC_R AB14 Y17 +1.1V_CKVDD
C638 C639 +VDDPL_3.3V VDDIO_33_PCIGP_9 VDDCR_11_9 Q42
AB16 VDDIO_33_PCIGP_10
2.2U/6.3V_4 *0.1U/10V_4 +FCH_VDDPL_33_MLDAC VDDAN_11_CLK-- Internal clock *AO3416
47mA 340mA
H24 VDDPL_33_SYS VDDAN_11_CLK_1 H26 Generator I/O power
+VDDPL_33_SYS 20mA V22 J25 TRACE WIDTH >=30mil 3 1 L72 +1.1V
VDDPL_33_DAC VDDAN_11_CLK_2
+VDDPL_33_DAC 20mA U22 VDDPL_33_ML VDDAN_11_CLK_3 K24 BLM18PG181SN1D(180,1.5A)_6
+3V L54 TRACE WIDTH >=15mil 30mA T22 VDDAN_33_DAC VDDAN_11_CLK_4 L22
R291 *0_4 +FCH_VDDPL_33_SSUSB_S 11mA L18 M22 C626 C618 C622 C624 C916

2
VDDPL_33_SSUSB_S VDDAN_11_CLK_5

CLKGEN
PBY160808T-221Y-N(220,2A) +FCH_VDDPL_33_SUSB_S 14mA D7 VDDPL_33_USB_S VDDAN_11_CLK_6 N21 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3VS_8 MAINON 33,34,36,40,41
C641 C632 +FCH_VDDPL_33_PCIE 11mA AH29 N22
+FCH_VDDPL_33_SATA VDDPL_33_PCIE VDDAN_11_CLK_7
2.2U/6.3V_4 *0.1U/10V_4 12mA AG28 P22

I/O
VDDPL_33_SATA VDDAN_11_CLK_8 +1.1V_PCIE_VDDR VDDPL_11_SYS_S : System Clock Gen
NOTE : LDO_CAP 1088mA VDDAN_11_PCIE --PCIE/UMI analog power TRACE WIDTH >=100mil PLLs analog power
A11 stepping : C will C635 *1000P/50V_4 +LDO_CAP M31 AB24 L56 +1.1V
LDO_CAP VDDAN_11_PCIE_1 BLM18PG181SN1D(180,1.5A)_6
Y21
install 1nf cap +FCH_VDDAN_11_DAC 7mA V21
VDDAN_11_PCIE_2
AE25 +VDDPL_1.1V
+FCH_VDDAN_11_MLDAC VDDPL_11_DAC VDDAN_11_PCIE_3
A12 stepping : C will VDDAN_11_ML -- UMI 1.1V analog power AD24 C610 C620 C621 C623 C642
+FCH_VDDAN_11_ML 226mA VDDAN_11_PCIE_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 22U/6.3VS_8 L47
let it to NC

EXPRESS
Y22 VDDAN_11_ML_1 VDDAN_11_PCIE_5 AB23 +1.1VS5
V23 AA22 PBY160808T-221Y-N(220,2A)
VDDAN_11_ML_2 VDDAN_11_PCIE_6
V24 VDDAN_11_ML_3 VDDAN_11_PCIE_7 AF26

PCI
+1.1V_AVDD_SATA

MAIN
C609 C617 C631 C613 V25 AG27 C608 C614

LINK
0.1U/10V_4 1U/6.3V_4 4.7U/6.3V_6 0.1U/10V_4 VDDAN_11_ML_4 VDDAN_11_PCIE_8 2.2U/6.3V_4 0.1U/10V_4
1337mA VDDAN_11_SATA--SATA PHY analog/IO power TRACE WIDTH >=50mil
+3V +VDDPL_3.3V AB10 AA21 L45
VDDIO_33_GBE_S VDDAN_11_SATA_1 +1.1V
Y20 BLM18PG181SN1D(180,1.5A)_6
VDDAN_11_SATA_4

GBE
AB21

LAN
L53 VDDAN_11_SATA_2 C596 C611 C599 C595 C600
VDDPL_33_USB_S : USB PHY PLL analog power VDDAN_11_SATA_3 AB22 if support USB
PBY160808T-221Y-N(220,2A) AB11 AC22 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3VS_8
C +3V_AVDD_USB +FCH_VDDPL_33_SUSB_S VDDCR_11_GBE_S_1 VDDAN_11_SATA_5 3.0 wake up C
AA11 AC21 VDDAN_33_HWM_S -- Hardware

SERIAL
C640 C615 VDDCR_11_GBE_S_2 VDDAN_11_SATA_6 should be
VDDAN_11_SATA_7 AA20 monitor interface I/O power

ATA
2.2U/6.3V_4 0.1U/10V_4 L67
VDDAN_11_SATA_8 AA18 change pull hi
PBY160808T-221Y-N(220,2A) AA9 AB20 +VDDAN_3.3V_HWM
VDDIO_GBE_S_1 VDDAN_11_SATA_9 to S5 power
AA10 VDDIO_GBE_S_2 VDDAN_11_SATA_10 AC19
C885 C886 +3VS5 L66
2.2U/6.3V_4 1U/6.3V_4 PBY160808T-221Y-N(220,2A)

C878 C566
+VDDIO_3.3V 2.2U/6.3V_4 0.1U/10V_4
VDDAN_33_USB_S : USB PHY I/O analog power +3V_AVDD_USB VDDIO_33_S-- 3.3v S5 I/O power
59mA
TRACE WIDTH >=50mil 470mA G7 N18 TRACE WIDTH >=20mil +3VS5 if support USB
L68 PBY160808T-221Y-N(220,2A) VDDAN_33_USB_S_1 VDDIO_33_S_1
+3VS5 H8 VDDAN_33_USB_S_2 VDDIO_33_S_2 L19 3.0 wake up
J8 VDDAN_33_USB_S_3 VDDIO_33_S_3 M18
K8 V12 C593 C576 C594 C584 C603 C580 should be
VDDAN_33_USB_S_4 VDDIO_33_S_4

3.3V_S5 I/O
C574 C583 C887 C567 C575 K9 VDDAN_33_USB_S_5 VDDIO_33_S_5 V13 *0.1U/10V_4 2.2U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 change pull hi
0.1U/10V_4 10U/6.3V_8 10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 M9 Y12 to S5 power
VDDAN_33_USB_S_6 VDDIO_33_S_6
VDDAN_11_USB_S : USB PHY PLL analog power M10 VDDAN_33_USB_S_7 VDDIO_33_S_7 Y13
N9 VDDAN_33_USB_S_8 VDDIO_33_S_8 W 11
L70 +FCH_VDDAN_11_USB_S N10

USB
+1.1VS5 VDDAN_33_USB_S_9
M12 VDDAN_33_USB_S_10 5mA VDDXL_33_S-- 25MHZ XTAL IO power
PBY160808T-221Y-N(220,2A) C979 0.1U/10V_4 N12 G24 +VDDXL_3.3V L49 +3VS5
VDDAN_33_USB_S_11 VDDXL_33_S PBY160808T-221Y-N(220,2A)
140mA M11 VDDAN_33_USB_S_12
VDDCR_1.1_S-- 1.1V S5 Core power
SI , AMD SR tool review C572 2.2U/6.3V_4 187mA
need one more 0.1u TRACE WIDTH >=20mil U12 N20 +VDDCR_1.1V +1.1VS5 C625 C612
C587 0.1U/10V_4 VDDAN_11_USB_S_1 VDDCR_11_S_1 TRACE WIDTH >=15mil *0.1U/10V_4 2.2U/6.3V_4
U13 VDDAN_11_USB_S_2 VDDCR_11_S_2 M20
VDDCR_11_USB_S : USB PHY core power 42mA 70mA
L69 +FCH_VDDCR_11_USB_S T12 J24 C601 C616
+1.1VS5 VDDCR_11_USB_S_1 VDDPL_11_SYS_S +VDDPL_1.1V
TRACE WIDTH >=15mil T13 1U/6.3V_4 2.2U/6.3V_4
PBY160808T-221Y-N(220,2A) VDDCR_11_USB_S_2
B SI , AMD SR C573 C579 C888 M8 12mA +VDDAN_3.3V_HWM
B
0.1U/10V_4 0.1U/10V_4 10U/6.3V_8 VDDAN_33_HW M_S
M3 chipset need tool review P16 VDDAN_11_SSUSB_S_1 +3V
to stuff for +FCH_VDD_11_SSUSB_S
M14
N14
VDDAN_11_SSUSB_S_2
AA4 26mA This circuit is
support USB3.0 VDDAN_11_SSUSB_S_3 VDDIO_AZ_S Trace +VDDIO_AZ

3
+1.1VS5
L48 R293 *0_8/S +FCH_VDDAN_11_SSUSB_S_R
282mA P13 VDDAN_11_SSUSB_S_4
width >=20 mil for switch DAC and 32 mA Max
P14 VDDAN_11_SSUSB_S_5
VDDAN_11_SSUSB_S : USB3.0 PHY PLL analog power UMI analog power +FCH_VDDAN_33_DAC_R
PBY160808T-221Y-N(220,2A) N16 VDDCR_11_SSUSB_S_1 USB 2
SS
424mA N17 Q25
R289 *0_4 R300 *0_8/S +FCH_VDDCR_11_SSUSB_S VDDCR_11_SSUSB_S_2 +12VALW AO3404
P17 VDDCR_11_SSUSB_S_3
M17 VDDCR_11_SSUSB_S_4
M2 chipset C915 C914

1
2
need to 2.2U/6.3V_4 0.1U/10V_4
R315 +FCH_VDDAN_33_DAC L71
connect to GND C605 C607 C606 C604 C627 C630 C629 C628 330K_6 PBY160808T-221Y-N(220,2A)
M3 remove 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 POWER

1
+FCH_VGA_PWR_EN +1.1V
VDDCR_11_SSUSB_S : USB3.0 PHY core power VGA will power down +FCH_VDDAN_33_DAC_R +FCH_VDDPL_33_MLDAC

3
Hudson-M2-A13 Q24
when CRT no insert ME2N7002E

3
M3 chipset need to stuff for support USB3.0 R511 *0_8/S
if support 6 VGA_POWER_DOWN VGA_POWER_DOWN 2
Q26
Modem wake AO3404 C901 C893
2

1
up should be VGA_PD is R282 2.2U/6.3V_4 0.1U/10V_4
change pull hi to generated 2.2K_4 C569 C637

1
+3V 1U/6.3V_4 0.022U/25V_4
S5 power 233 mA Max

2
+VDDIO_AZ from FCH

1
+VDDAN_11_MLDAC L55 +FCH_VDDAN_11_MLDAC
A R477 *0_4/S A
+3VS5 +FCH_VDDPL_33_SSUSB_S PBY160808T-221Y-N(220,2A)
M3 chipset need VDDIO_AZ_S -- HD Audio
to stuff for Interface I/O power C563
L50 2.2U/6.3V_4
PBY160808T-221Y-N(220,2A) support USB3.0 SI2 , remove discharge circuit
C633 C634 SI , reserve for leakage issue
PROJECT : R53
2.2U/6.3V_6 0.1U/10V_4 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Hudson-M3 POWER/GND
Date: Friday, November 11, 2011 Sheet 9 of 44
5 4 3 2 1
5 4 3 2 1

STRAPS PINS OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP RESISTORS.
DEBUG STRAPS
10
+3V +3VS5 +3VS5 +3VS5

D D
FCH has 15K Internal Pull Up for PCI_AD[27:23]
R474 R305 R297 R274
10K/F_4 10K/F_4 *10K/F_4 10K/F_4
PCI_AD27
7 PCI_AD27 TP100
PCI_AD26
7 PCI_AD26 TP55
7 PCI_CLK1 PCI_CLK1
PCI_AD25 remove reserve pull low resistor
7 PCI_AD25 TP56
PCI_CLK3
7 PCI_CLK3
PCI_AD24
reserve test point only.
7 PCI_AD24 TP54
PCI_CLK4
7 PCI_CLK4
PCI_AD23
7 PCI_AD23 TP53
LPC_CLK0
7 LPC_CLK0

7 LPC_CLK1 LPC_CLK1

EC_PWM2
6 EC_PWM2

7 CLK_RTC CLK_RTC

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
R475 R488 R490 R304 R292 R275
*10K_4 10K/F_4 10K/F_4 10K/F_4 HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
2.2K_4 *2.2K_4

DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

C C

PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI


LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
REQUIRED STRAPS

-------- PCI_CLK1 -------- PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 CLK_RTC

PULL ALLOW USE non_Fusion AMD internal EC CLKGEN LPC ROM S5 PLUS MODE
HIGH PCIE Gen2 DEBUG CLOCK MODE ENABLED ENABLED ENABLED
-------- --------
STRAP DEFAULT DEFAULT
DEFAULT

PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS MODE


-------- PCIE Gen1 -------- DEBUG CLOCK MODE DISABLED DISABLED DISABLED
LOW
STRAP DEFAULT
DEFAULT DEFAULT DEFAULT

B
FCH PWRGD B

+3V
+3V

R435
10K/F_4 C861
D22 BAT54A *0.1U/10V_4
5

38 CPU_VRM8380_PG 2

3 2 4 FCH_PWRGD 6

4,18,33 ECPWROK 1
C863 U31
3

*2.2U/6.3V_6 *74AUP1G17GW

A R436 0_4 A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Hudson-M3 STRAP/PWRGD
Date: Friday, November 11, 2011 Sheet 10 of 44
5 4 3 2 1
5 4 3 2 1

ANX3110 Power Up Sequence


+1.2V R53 *0_8/S
250mA
+TRAVIS1.2V

11
C63 C62 C61 C60 C88 C87 C86 C81 C53 C52 C41
2.2U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.01U/25V_4 2.2U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/25V_4 0.01U/25V_4

+TRAVIS3.3V
D D
+TRAVIS3.3V

+TRAVIS1.2V 150mA
+3V R24 *0_8/S

C45 C80 C54 C50 C44 C42 C84 C57


2.2U/6.3V_4 2.2U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/25V_4 0.01U/25V_4
0.1U/10V_4
TRAVIS_RST#

10ms >=10ms +TRAVIS3.3V +TRAVIS1.2V +TRAVIS3.3V +TRAVIS1.2V

50mA 120mA 100mA 120mA

13
53

32
46
59

25
33
39
63
9

1
+TRAVIS3.3V 1M/F_4 R28 U7

DVDD33
DVDD33

DVDD12
DVDD12
DVDD12
DVDD12

AVDD33
AVDD33
AVDD33
AVDD33
AVDD33

AVDD12
0.1U/10V_4 C46 POWER_ON_RESET 34 POR TXUCLKOUT+
LVDS_CLKU_P 43 TXUCLKOUT+ 23
R27 *0_4/S TRAVIS_RST# 12 42 TXUCLKOUT-
7,29 LAN_PCIE_RST# RESET_L LVDS_CLKU_N TXUCLKOUT- 23
LVDS_U3_P 45
LVDS_U3_N 44
ANX_TDO 54 41 TXUOUT2+
C TP72 ANX_TDI TDO LVDS_U2_P TXUOUT2- TXUOUT2+ 23 C
TP69 55 TD1 LVDS_U2_N 40 TXUOUT2- 23
ANX_TMS 57 38 TXUOUT1+
TP68 ANX_TCK TMS LVDS_U1_P TXUOUT1- TXUOUT1+ 23
GPIO_0 : Define VAR_BL & TP73 56 TCK LVDS_U1_N 37 TXUOUT1- 23
BL_EN & DIGON H/W or S/W 36 TXUOUT0+
LVDS_U0_P TXUOUT0+ 23
35 TXUOUT0-
control power up timming LVDS_U0_N TXUOUT0- 23
R23 10K/F_4 16
Pull Hi for H/W mode GPIO_0 TXLCLKOUT+
LVDS_CLKL_P 27 TXLCLKOUT+ 23
---chip have defined power GPIO_1 & GPIO_2 can 17 26 TXLCLKOUT-
GPIO_1 LVDS_CLKL_N TXLCLKOUT- 23
up timing let it to NC from 29
LVDS_L3_P
vendor review 18 28
Pull Low for S/W mode -- GPIO_2 LVDS_L3_N TXLOUT2+
24
APU through DPRX port to
program it
+TRAVIS3.3V R33 10K/F_4 CLK_SEL 10
CLK_SEL ANALOGIX ANX3110 LVDS_L2_P
LVDS_L2_N
LVDS_L1_P
23
22
TXLOUT2-
TXLOUT1+
TXLOUT1-
TXLOUT2+ 23
TXLOUT2- 23
TXLOUT1+ 23
CLK_SEL: LVDS_L1_N 21 TXLOUT1- 23
Pull Hi for 100MHZ clk source input 20 TXLOUT0+
LVDS_L0_P TXLOUT0+ 23
19 TXLOUT0-
Pull Low for 27MHZ crystal input LVDS_L0_N TXLOUT0- 23
CLK_ANX_N 31 50 TRAVIS_DDC_DATA
7 CLK_ANX_N OSC_IN/100MHZ_P DDC_DATA
CLK_ANX_P 30 49 TRAVIS_DDC_CLK
7 CLK_ANX_P OSC_OUT/100MHZ_N DDC_CLK
+3V R51 *1M/F_4
TP70 ANX_eDP_AUXP
C83 0.1U/10V_4 61
4 INT_eDP_AUXP DPRX_AUX_P
C82 0.1U/10V_4 ANX_eDP_AUXN 60 47 VADJ R37 1K/F_4
4 INT_eDP_AUXN DPRX_AUX_N VAR_BL LVDS_BLON DPST_PWM 23 EDIDDATA TRAVIS_DDC_DATA
R50 *1M/F_4 TP71 15 23 EDIDDATA
BL_EN LVDS_BLON 23
INT_eDP_TXP0 3 14 DISP_ON
+1.5V +3V 4 INT_eDP_TXP0 DPRX_LN0_P DIGON DISP_ON 23
INT_eDP_TXN0 4 EDIDCLK TRAVIS_DDC_CLK
4 INT_eDP_TXN0 INT_eDP_TXP1 DPRX_LN0_N 23 EDIDCLK
4 INT_eDP_TXP1 6 DPRX_LN1_P
R39 R38 INT_eDP_TXN1 7
4 INT_eDP_TXN1 DPRX_LN1_N
2.2k_4 10K/F_4 51 CFG_SCL R44 *4.7K_4 remove level shift
CFG_SCL +TRAVIS3.3V
ANX_PWM 48 CPU_VARY_BL
2

52 CFG_SDA R45 *4.7K_4

TEST_EN
B Q8 R41 DPRX_HPD CFG_SDA B
58

R_BIAS
DPRX_HPD
AVSS

AVSS

AVSS
1 3 That is for debug

GND
4 APU_BLPWM
MMBT3904-7-F *0_4 only,can let it to
PV change for brightness issue DPRX_HPD : ANX3110 NC
2

62

65

11

64
It will transfer to
33 PWM_VADJ Hi when power enable

R_BIAS

R29 47K_4 R52


12K/F_4 C85
TEST_EN : internal pull 100P/50V_4
low
+3V 1:scan test mode
0:normal mode

R68
1K/F_4

FCH_LVDS_HPD R69 0_4 DPRX_HPD


4 FCH_LVDS_HPD

A R46 A
100K/F_4

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
ANX3110
Date: Friday, November 11, 2011 Sheet 11 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8

3 M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
98
97
JDIM6A

A0
A1
DQ0
DQ1
5
7
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ[0..63] 3 12
96 A2 DQ2 15
M_A_A3 95 17 M_A_DQ3
M_A_A4 A3 DQ3 M_A_DQ4 +1.5VSUS
92 A4 DQ4 4
M_A_A5 M_A_DQ5 JDIM6B
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
86 A7 DQ7 18 76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
A M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18 A
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ12 93 61
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD7 VSS22
119 A13 DQ13 24 94 VDD8 VSS23 65
M_A_A14 80 34 M_A_DQ14 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


3 M_A_BS#0 109 41 M_A_DQ17 106 127
BA0 DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


108 51 M_A_DQ18 111 128
3 M_A_BS#1 BA1 DQ18 VDD13 VSS28
79 53 M_A_DQ19 112 133
3 M_A_BS#2 BA2 DQ19 VDD14 VSS29
114 40 M_A_DQ20 117 134
3 M_A_CS#0 S0# DQ20 VDD15 VSS30
3 M_A_CS#1 121 42 M_A_DQ21 118 138
S1# DQ21 M_A_DQ22 VDD16 VSS31
3 M_A_CLKP0 101 CK0 DQ22 50 123 VDD17 VSS32 139
103 52 M_A_DQ23 124 144
3 M_A_CLKN0 CK0# DQ23 VDD18 VSS33
3 M_A_CLKP1 102 57 M_A_DQ24 145
CK1 DQ24 M_A_DQ25 VSS34
3 M_A_CLKN1 104 CK1# DQ25 59 +3V 199 VDDSPD VSS35 150
73 67 M_A_DQ26 151
3 M_A_CKE0 CKE0 DQ26 VSS36
3 M_A_CKE1 74 69 M_A_DQ27 77 155
CKE1 DQ27 M_A_DQ28 NC1 VSS37
3 M_A_CAS# 115 CAS# DQ28 56 122 NC2 VSS38 156
110 58 M_A_DQ29 125 161
3 M_A_RAS# RAS# DQ29 NCTEST VSS39
3 M_A_WE# 113 68 M_A_DQ30 162
DIMM0_SA0 W E# DQ30 M_A_DQ31 VSS40
197 SA0 DQ31 70 3 M_A_EVENT# 198 EVENT# VSS41 167
DIMM0_SA1 201 129 M_A_DQ32 3 M_A_RST# 30 168
SA1 DQ32 M_A_DQ33 RESET# VSS42
6,13 CGCLK_SMB 202 SCL DQ33 131 VSS43 172
6,13 CGDAT_SMB 200 141 M_A_DQ34 173
SDA DQ34 M_A_DQ35 R231 *0_6/S +VREF_DQ0 VSS44
DQ35 143 +VREF_DQ 1 VREF_DQ VSS45 178
3 M_A_ODT0 116 130 M_A_DQ36 +VREF_CA0 +VREF_CA0 126 179
ODT0 DQ36 M_A_DQ37 VREF_CA VSS46
3 M_A_ODT1 120 ODT1 DQ37 132 VSS47 184
3 M_A_DM[7:0] 140 M_A_DQ38 185
B M_A_DM0 DQ38 M_A_DQ39 VSS48 B
11 DM0 DQ39 142 2 VSS1 VSS49 189
M_A_DM1 28 147 M_A_DQ40 3 190
M_A_DM2 DM1 DQ40 M_A_DQ41 VSS2 VSS50
46 DM2 DQ41 149 8 VSS3 VSS51 195
M_A_DM3 63 157 M_A_DQ42 9 196

(204P)
(204P)
M_A_DM4 DM3 DQ42 M_A_DQ43 VSS4 VSS52
136 DM4 DQ43 159 13 VSS5
M_A_DM5 153 146 M_A_DQ44 14
M_A_DM6 DM5 DQ44 M_A_DQ45 VSS6
170 DM6 DQ45 148 19 VSS7
M_A_DM7 187 158 M_A_DQ46 20
DM7 DQ46 M_A_DQ47 VSS8
DQ47 160 25 VSS9
M_A_DQSP0 12 163 M_A_DQ48 26 203 +0.75V_DDR_VTT
3 M_A_DQSP0 DQS0 DQ48 VSS10 VTT1
M_A_DQSP1 29 165 M_A_DQ49 31 204
3 M_A_DQSP1 DQS1 DQ49 VSS11 VTT2
M_A_DQSP2 47 175 M_A_DQ50 32
3 M_A_DQSP2 DQS2 DQ50 VSS12
M_A_DQSP3 64 177 M_A_DQ51 37
3 M_A_DQSP3 DQS3 DQ51 VSS13

C66

C104
M_A_DQSP4 137 164 M_A_DQ52 38
3 M_A_DQSP4 DQS4 DQ52 VSS14
M_A_DQSP5 154 166 M_A_DQ53 43 205
3 M_A_DQSP5 DQS5 DQ53 VSS15 VSS53
M_A_DQSP6 171 174 M_A_DQ54 206
3 M_A_DQSP6 DQS6 DQ54 VSS54
M_A_DQSP7 M_A_DQ55 for WiMAX

*15P/50V_4

*15P/50V_4
3 M_A_DQSP7 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ56 DDR3-DIMM2
3 M_A_DQSN0 DQS#0 DQ56
M_A_DQSN1 27 183 M_A_DQ57
3 M_A_DQSN1 DQS#1 DQ57
M_A_DQSN2 45 191 M_A_DQ58
3 M_A_DQSN2 M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
3 M_A_DQSN3 62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60
3 M_A_DQSN4 M_A_DQSN5 DQS#4 DQ60 M_A_DQ61
152 182 +VREF_CA0
3 M_A_DQSN5 DQS#5 DQ61
M_A_DQSN6 169 192 M_A_DQ62
3 M_A_DQSN6 DQS#6 DQ62
M_A_DQSN7 186 194 M_A_DQ63
3 M_A_DQSN7 DQS#7 DQ63
R116 *0_4/S
DDR_VTTREF 3,13,40
DDR3-DIMM2

R120 *1K_4 R129 *1K_4


C
H9.2mm +1.5VSUS C

Place these Caps near So-Dimm0. for WiMAX +1.5VSUS Reserved for AMD suggest
+1.5VSUS +1.5VSUS R235 0_6
+0.75V_DDR_VTT
C365 10U/6.3VS_6 +3VS5
C261 10U/6.3VS_6 C72 1U/6.3V_4
C246 10U/6.3VS_6 C68 1U/6.3V_4 R218
+VREF_DQ
150P/50V_4

150P/50V_4

150P/50V_4

C289 *100P/50V_4

C254 *100P/50V_4

C305 10U/6.3VS_6 C65 1U/6.3V_4 C472 *0.1U/10V_4


C276 10U/6.3VS_6 C94 1U/6.3V_4 1K/F_4
C347 10U/6.3VS_6 C69 *10U/6.3V_8

5
C221 0.1U/10V_4 C70 *10U/6.3V_8 U17
C309 0.1U/10V_4 C92 10U/6.3VS_6 +VREF_DQ_L 3 +
C236 0.1U/10V_4 C91 *0.047U/10V_4 1 R2381 2 *10_4 +VREF_DQ
C396

C301

C237

C299 0.1U/10V_4 C67 *0.047U/10V_4 4 -


C270 0.1U/10V_4 R219 C493 *OPA343NA/3K
C206 150P/50V_4 R245

2
C205 150P/50V_4 +VREF_DQ0 1K/F_4 *0.47U/6.3V_4
C341 150P/50V_4 EMI *10K/F_4
C819 150P/50V_4 C479 0.1U/10V_4
R237 *0_4
EMI
+3V C480 1000P/50V_4 R246 *0_4

C114 2.2U/6.3V_4

D C126 *0.1U/10V_4 SI , change to 1000P D

+VREF_CA0 to meet ref design


C123 *0.047U/10V_4

C153 0.1U/10V_4
PROJECT : R53
C165 1000P/50V_4 Quanta Computer Inc.
13,40 +0.75V_DDR_VTT
2,3,4,5,13,40,41,44 +1.5VSUS
C157 *0.047U/10V_4 2,4,6,8,9,10,11,13,14,18,23,24,25,26,27,28,29,30,31,32,33,41,42,44 +3V Size Document Number Rev
Custom 1A
DDR3 DIMM-0
Date: Friday, November 11, 2011 Sheet 12 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

3 M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
98
97
96
95
JDIM5A

A0
A1
A2
A3
DQ0
DQ1
DQ2
DQ3
5
7
15
17
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ[0..63] 3

+1.5VSUS
13
92 A4 DQ4 4
M_B_A5 91 6 M_B_DQ5
M_B_A6 A5 DQ5 M_B_DQ6
90 A6 DQ6 16
M_B_A7 M_B_DQ7 JDIM5B
86 A7 DQ7 18
M_B_A8 89 21 M_B_DQ8 75 44
M_B_A9 A8 DQ8 M_B_DQ9 VDD1 VSS16
85 A9 DQ9 23 76 VDD2 VSS17 48
M_B_A10 107 33 M_B_DQ10 81 49
A M_B_A11 A10/AP DQ10 M_B_DQ11 VDD3 VSS18 A
84 A11 DQ11 35 82 VDD4 VSS19 54
M_B_A12 83 22 M_B_DQ12 87 55
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD5 VSS20
119 A13 DQ13 24 88 VDD6 VSS21 60
M_B_A14 80 34 M_B_DQ14 93 61
M_B_A15 A14 DQ14 M_B_DQ15 VDD7 VSS22
78 A15 DQ15 36 94 VDD8 VSS23 65
39 M_B_DQ16 99 66
DQ16 VDD9 VSS24

PC2100 DDR3 SDRAM SO-DIMM


109 41 M_B_DQ17 100 71
3 M_B_BS#0 BA0 DQ17 VDD10 VSS25
3 M_B_BS#1 108 51 M_B_DQ18 105 72
BA1 DQ18 M_B_DQ19 VDD11 VSS26
3 M_B_BS#2 79 BA2 DQ19 53 106 VDD12 VSS27 127

PC2100 DDR3 SDRAM SO-DIMM


114 40 M_B_DQ20 111 128
3 M_B_CS#0 S0# DQ20 VDD13 VSS28
121 42 M_B_DQ21 112 133
3 M_B_CS#1 S1# DQ21 VDD14 VSS29
101 50 M_B_DQ22 117 134
3 M_B_CLKP0 CK0 DQ22 VDD15 VSS30
3 M_B_CLKN0 103 52 M_B_DQ23 118 138
CK0# DQ23 M_B_DQ24 VDD16 VSS31
3 M_B_CLKP1 102 CK1 DQ24 57 123 VDD17 VSS32 139
104 59 M_B_DQ25 124 144
3 M_B_CLKN1 CK1# DQ25 VDD18 VSS33
3 M_B_CKE0 73 67 M_B_DQ26 145
CKE0 DQ26 M_B_DQ27 VSS34
3 M_B_CKE1 74 CKE1 DQ27 69 +3V 199 VDDSPD VSS35 150
115 56 M_B_DQ28 151
3 M_B_CAS# CAS# DQ28 VSS36
3 M_B_RAS# 110 58 M_B_DQ29 77 155
RAS# DQ29 M_B_DQ30 NC1 VSS37
3 M_B_WE# 113 W E# DQ30 68 122 NC2 VSS38 156
R58 4.7K_4 DIMM1_SA0 197 70 M_B_DQ31 125 161
+3V SA0 DQ31 NCTEST VSS39
DIMM1_SA1 201 129 M_B_DQ32 162
SA1 DQ32 M_B_DQ33 VSS40
6,12 CGCLK_SMB 202 SCL DQ33 131 3 M_B_EVENT# 198 EVENT# VSS41 167
6,12 CGDAT_SMB 200 141 M_B_DQ34 3 M_B_RST# 30 168
SDA DQ34 M_B_DQ35 RESET# VSS42
DQ35 143 VSS43 172
3 M_B_ODT0 116 130 M_B_DQ36 173
ODT0 DQ36 M_B_DQ37 R232 *0_6/S +VREF_DQ1 VSS44
3 M_B_ODT1 120 ODT1 DQ37 132 +VREF_DQ 1 VREF_DQ VSS45 178
3 M_B_DM[7:0] 140 M_B_DQ38 +VREF_CA1 +VREF_CA1 126 179
M_B_DM0 DQ38 M_B_DQ39 VREF_CA VSS46
11 DM0 DQ39 142 VSS47 184
M_B_DM1 28 147 M_B_DQ40 185
B M_B_DM2 DM1 DQ40 M_B_DQ41 VSS48 B
46 DM2 DQ41 149 2 VSS1 VSS49 189
M_B_DM3 63 157 M_B_DQ42 3 190

(204P)
M_B_DM4 DM3 DQ42 M_B_DQ43 VSS2 VSS50
136 DM4 DQ43 159 8 VSS3 VSS51 195
M_B_DM5 153 146 M_B_DQ44 9 196

(204P)
M_B_DM6 DM5 DQ44 M_B_DQ45 VSS4 VSS52
170 DM6 DQ45 148 13 VSS5
M_B_DM7 187 158 M_B_DQ46 14
DM7 DQ46 M_B_DQ47 VSS6
DQ47 160 19 VSS7
M_B_DQSP0 12 163 M_B_DQ48 20
3 M_B_DQSP0 DQS0 DQ48 VSS8
M_B_DQSP1 29 165 M_B_DQ49 25
3 M_B_DQSP1 DQS1 DQ49 VSS9
M_B_DQSP2 47 175 M_B_DQ50 26 203 +0.75V_DDR_VTT
3 M_B_DQSP2 DQS2 DQ50 VSS10 VTT1
M_B_DQSP3 64 177 M_B_DQ51 31 204
3 M_B_DQSP3 DQS3 DQ51 VSS11 VTT2
M_B_DQSP4 137 164 M_B_DQ52 32
3 M_B_DQSP4 DQS4 DQ52 VSS12
M_B_DQSP5 154 166 M_B_DQ53 37
3 M_B_DQSP5 DQS5 DQ53 VSS13
M_B_DQSP6 171 174 M_B_DQ54 38
3 M_B_DQSP6 DQS6 DQ54 VSS14
M_B_DQSP7 188 176 M_B_DQ55 43 205
3 M_B_DQSP7 DQS7 DQ55 VSS15 VSS53
M_B_DQSN0 10 181 M_B_DQ56 206
3 M_B_DQSN0 DQS#0 DQ56 VSS54
M_B_DQSN1 27 183 M_B_DQ57
3 M_B_DQSN1 M_B_DQSN2 DQS#1 DQ57 M_B_DQ58
45 191 DDR3-DIMM1
3 M_B_DQSN2 DQS#2 DQ58
M_B_DQSN3 62 193 M_B_DQ59
3 M_B_DQSN3 DQS#3 DQ59
M_B_DQSN4 135 180 M_B_DQ60
3 M_B_DQSN4 M_B_DQSN5 DQS#4 DQ60 M_B_DQ61
152 182 +VREF_CA1
3 M_B_DQSN5 DQS#5 DQ61
M_B_DQSN6 169 192 M_B_DQ62
3 M_B_DQSN6 M_B_DQSN7 DQS#6 DQ62 M_B_DQ63
3 M_B_DQSN7 186 DQS#7 DQ63 194

R113 *0_4/S
DDR_VTTREF 3,12,40
DDR3-DIMM1

R122 *1K_4 R136 *1K_4


H5.2mm +1.5VSUS

C Place these Caps near So-Dimm1. C

+1.5VSUS +0.75V_DDR_VTT

C287 10U/6.3VS_6 C77 1U/6.3V_4


C223 10U/6.3VS_6 C103 1U/6.3V_4
C274 10U/6.3VS_6 C78 1U/6.3V_4
C273 10U/6.3VS_6 C76 1U/6.3V_4
C321 10U/6.3VS_6 C71 *10U/6.3V_8
C298 10U/6.3VS_6 C74 10U/6.3VS_6
C300 0.1U/10V_4 C73 10U/6.3VS_6
C308 0.1U/10V_4 C79 *0.047U/10V_4
C288 0.1U/10V_4 C102 *0.047U/10V_4
C322 0.1U/10V_4
C251 0.1U/10V_4
C101 0.1U/10V_4
C381 150P/50V_4
C220 150P/50V_4 EMI C75 0.1U/10V_4

C384 0.1U/10V_4
EMI request
+VREF_CA1
C199 0.1U/10V_4
+3V

C105 2.2U/6.3V_4 C188 1000P/50V_4


C99 *0.1U/10V_4
C107 *0.047U/10V_4
D C169 *0.047U/10V_4 D

+VREF_DQ1

C470 0.1U/10V_4

SI , change to 1000P
PROJECT : R53
to meet ref design C464 1000P/50V_4 12,40 +0.75V_DDR_VTT Quanta Computer Inc.
2,3,4,5,12,40,41,44 +1.5VSUS
2,4,6,8,9,10,11,12,14,18,23,24,25,26,27,28,29,30,31,32,33,41,42,44 +3V
Size Document Number Rev
Custom 1A
DDR3 DIMM-1
Date: Friday, November 11, 2011 Sheet 13 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

PART 1 0F 9
U26A

14
AA38 PCIE_RX0P PCIE_TX0P Y33 C_PEG_RXP0 C364 0.1U/10V_4
2 PEG_TXP0 PEG_RXP0 2
Y37 PCIE_RX0N PCIE_TX0N Y32 C_PEG_RXN0 C348 0.1U/10V_4
2 PEG_TXN0 PEG_RXN0 2
D D

Y35 PCIE_RX1P PCIE_TX1P W 33 C_PEG_RXP1 C409 0.1U/10V_4


2 PEG_TXP1 PEG_RXP1 2
W 36 PCIE_RX1N PCIE_TX1N W 32 C_PEG_RXN1 C404 0.1U/10V_4
2 PEG_TXN1 PEG_RXN1 2

W 38 PCIE_RX2P PCIE_TX2P U33 C_PEG_RXP2 C425 0.1U/10V_4


2 PEG_TXP2 PEG_RXP2 2
V37 PCIE_RX2N PCIE_TX2N U32 C_PEG_RXN2 C419 0.1U/10V_4
2 PEG_TXN2 PEG_RXN2 2

V35 PCIE_RX3P PCIE_TX3P U30 C_PEG_RXP3 C406 0.1U/10V_4


2 PEG_TXP3 PEG_RXP3 2
U36 PCIE_RX3N PCIE_TX3N U29 C_PEG_RXN3 C410 0.1U/10V_4
2 PEG_TXN3 PEG_RXN3 2

U38 PCIE_RX4P PCIE_TX4P T33 C_PEG_RXP4 C433 0.1U/10V_4


2 PEG_TXP4 PEG_RXP4 2
T37 PCIE_RX4N PCIE_TX4N T32 C_PEG_RXN4 C439 0.1U/10V_4
2 PEG_TXN4 PEG_RXN4 2

T35 PCIE_RX5P PCIE_TX5P T30 C_PEG_RXP5 C429 0.1U/10V_4


2 PEG_TXP5 PEG_RXP5 2
R36 PCIE_RX5N PCIE_TX5N T29 C_PEG_RXN5 C434 0.1U/10V_4
2 PEG_TXN5 PEG_RXN5 2

R38 PCIE_RX6P PCIE_TX6P P33 C_PEG_RXP6 C442 0.1U/10V_4


2 PEG_TXP6 PEG_RXP6 2
P37 PCIE_RX6N PCIE_TX6N P32 C_PEG_RXN6 C436 0.1U/10V_4
2 PEG_TXN6 PEG_RXN6 2

P35 PCIE_RX7P PCIE_TX7P P30 C_PEG_RXP7 C444 0.1U/10V_4


2 PEG_TXP7 PEG_RXP7 2
N36 PCIE_RX7N PCIE_TX7N P29 C_PEG_RXN7 C448 0.1U/10V_4
2 PEG_TXN7 PEG_RXN7 2

C N38 PCIE_RX8P PCIE_TX8P N33 C


M37 PCIE_RX8N PCIE_TX8N N32
PCI EXPRESS INTERFACE

M35 PCIE_RX9P PCIE_TX9P N30


L36 PCIE_RX9N PCIE_TX9N N29

L38 PCIE_RX10P PCIE_TX10P L33


K37 PCIE_RX10N PCIE_TX10N L32

K35 PCIE_RX11P PCIE_TX11P L30


J36 PCIE_RX11N PCIE_TX11N L29

J38 PCIE_RX12P PCIE_TX12P K33


H37 PCIE_RX12N PCIE_TX12N K32

H35 PCIE_RX13P PCIE_TX13P J33


G36 PCIE_RX13N PCIE_TX13N J32

G38 PCIE_RX14P PCIE_TX14P K30


F37 PCIE_RX14N PCIE_TX14N K29
Chelsea Only
Do not install For Thames
F35 PCIE_RX15P PCIE_TX15P H33
B
E37 PCIE_RX15N PCIE_TX15N H32 B
Ra
R171 *1.69K/F_4 +1.0V_VGA
CLOCK
CLK_VGA_P AB35 PCIE_REFCLKP
7 CLK_VGA_P
CLK_VGA_N AA36 PCIE_REFCLKN
7 CLK_VGA_N
Do not install for Chelsea
CALIBRATION
Install for Thames ONLY
Rb
PCIE_CALR_TX Y30 PCIE_CALRP R172 1.27K/F_4

1K/F_4 R115 AH16 TEST_PG PCIE_CALR_RX Y29 PCIE_CALRN R170 2K/F_4 +1.0V_VGA
Rc
Install 2k for Thames
PEGX_RST# AA30 PERSTB

Thames XT_M2
Chelsea Thames

+3V Ra 1.69K n/a

Rb n/a 1.27K

C327 Rc 1K 2K
U13 0.1U/10V_4
MC74VHC1G08DFT2G
5

A A
7 GPU_RST# 2 +1.0V_VGA
16,18,19,44 +1.0V_VGA
4 PEGX_RST#
6 VGA_RSTB R179 330_4 DGPU_HIN_RST# 1 +1.8V_VGA
15,16,18,19,43 +1.8V_VGA
R173
3

100K_4 PROJECT : R53


Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Chelsea_PCIE_Interface
Date: Monday, November 14, 2011 Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1

MEM_ID[3:0]
0000
0001
Vendor
Hynix- D die
Micron- G die
Type
64Mx16 *8, 900Mhz
64Mx16 *8, 900Mhz
Vendor P/N
H5TQ1G63DFR-11C
MT41J64M16JT-107G:G
U26B

PART 2 0F 9
15
0010 Samsung- G die 64Mx16 *8, 900Mhz K4W1G1646G-BC11
MUTI GFX
0011 Hynix- D die 128Mx16 *8, 900Mhz H5TQ2G63DFR-11C GENLK_CLK AD29 GENLK_CLK TXCAP_DPA3P AU24
17 GENLK_CLK
0100 Micron- D die 128Mx16 *8, 900Mhz MT41J128M16HA-107G:D 17 GENLK_VSYNC
GENLK_VSYNC AC29 GENLK_VSYNC TXCAM_DPA3N AV23 U26F
0101 Samsung- C die 128Mx16 *8, 900Mhz K4W2G1646C-HC11 TX0P_DPA2P AT25
PART 6 0F 9
0110 AJ21 SWAPLOCKA
DPA
TX0M_DPA2N AR24
AK21 SWAPLOCKB
0111 TX1P_DPA1P AU26 AB39 PCIE_VSS GND A3
TX1M_DPA1N AV25 E39 PCIE_VSS GND A37
D
1000 F34 PCIE_VSS GND AA16 D
1001 AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 F39 PCIE_VSS GND AA18
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26 G33 PCIE_VSS GND AA2
1010 AP8 DVPCNTL_0 G34 PCIE_VSS GND AA21
1011 +1.8V_VGA
AW8 DVPCNTL_1 TXCBP_DPB3P AR30 H31 PCIE_VSS GND AA23
1100 Memory ID AR3 DVPCNTL_2 TXCBM_DPB3N AT29 H34 PCIE_VSS GND AA26
1101 R363
AR1 DVPCLK H39 PCIE_VSS GND AA28
1110 10K/F_4 MEM_ID0 AU1 DVPDATA_0 TX3P_DPB2P AV31 J31 PCIE_VSS GND AA6
1111 R361 10K/F_4 MEM_ID1 AU3 DVPDATA_1 TX3M_DPB2N AU30 J34 PCIE_VSS GND AB12
R362 *10K/F_4 MEM_ID2 DPB
AW3 DVPDATA_2 K31 PCIE_VSS GND AB15
R360 *10K/F_4 MEM_ID3 AP6 DVPDATA_3 TX4P_DPB1P AR32 K34 PCIE_VSS GND AB17
AW5 AT31 K39 AB20
GPIO16 GPIO20 GPIO15 AU5
DVPDATA_4
DVPDATA_5
TX4M_DPB1N
L31
PCIE_VSS
PCIE_VSS
GND
GND AB22
AR6 DVPDATA_6 TX5P_DPB0P AT33 L34 PCIE_VSS GND AB24
AW6 DVPDATA_7 TX5M_DPB0N AU32 M34 PCIE_VSS GND AB27
Thames-XT PWRCNTL 2 PWRCNTL 1 PWRCNTL 0 VGA CORE AU6 DVPDATA_8 M39 PCIE_VSS GND AC11
AT7 DVPDATA_9 TXCCP_DPC3P AU14 N31 PCIE_VSS GND AC13
AV7 DVPDATA_10 TXCCM_DPC3N AV13 N34 PCIE_VSS GND AC16
L 0 0 0 1.0V AN7 DVPDATA_11 P31 PCIE_VSS GND AC18
AV9 DVPDATA_12 TX0P_DPC2P AT15 P34 PCIE_VSS GND AC2
AT9 DVPDATA_13 TX0M_DPC2N AR14 P39 PCIE_VSS GND AC21
M 0 0 1 0.9V AR10 DVPDATA_14
DPC
R34 PCIE_VSS GND AC23
AW10 DVPDATA_15 TX1P_DPC1P AU16 T31 PCIE_VSS GND AC26
AU10 DVPDATA_16 TX1M_DPC1N AV15 T34 PCIE_VSS GND AC28
H 0 1 0 0.875V +3V_DELAY
AP10 DVPDATA_17 T39 PCIE_VSS GND AC6
AV11 DVPDATA_18 TX2P_DPC0P AT17 U31 PCIE_VSS GND AD15
AT11 DVPDATA_19 TX2M_DPC0N AR16 U34 PCIE_VSS GND AD17
R151 4.7K_4
0 1 1 0.85V AR12 DVPDATA_20 V34 PCIE_VSS GND AD20
AW12 DVPDATA_21 TXCDP_DPD3P AU20 V39 PCIE_VSS GND AD22
R141 4.7K_4 AU12 DVPDATA_22 TXCDM_DPD3N AT19 W31 PCIE_VSS GND AD24
1 0 0 0.8V AP12 DVPDATA_23 W34 PCIE_VSS GND AD27
30 GPUT_CLK TX3P_DPD2P AT21 Y34 PCIE_VSS GND AD9
30 GPUT_DATA TX3M_DPD2N AR20 Y39 PCIE_VSS GND AE2
1 0 1 0.75V DPD
GND AE6
GPUT_CLK AJ23 SMBCLK TX4P_DPD1P AU22 GND AF10
GPUT_DATA SMBus
AH23 SMBDATA TX4M_DPD1N AV21 GND AF16
R123 4.7K_4 GND AF18
+3V_DELAY R127 4.7K_4 TX5P_DPD0P AT23 GND GND AF21
C TX5M_DPD0N AR22 GND AG17 C
Access to SMBBus ans SDA/SCL is mandatory on all designs TP9 AK26 SCL
I2C
F15 GND GND AG2
Add test points on SMBBus and SDA/SCL for debug TP7 AJ26 SDA Reserve for AMD debug only F17 GND GND AG20
F19 GND GND AG22
+3V_DELAY R AD39 F21 GND GND AG6
TP83
GENERAL PURPOSE I/O AVSSN#1 AD37 F23 GND GND AG9
17 GPIO0 GPIO0 AH20 GPIO_0 F25 GND GND AH21
R138 *10K/F_4 GPIO_23_CLKREQb GPIO1 AH18 GPIO_1 G AE36 F27 GND GND AJ10
17 GPIO1 TP80
17 GPIO2 GPIO2 AN16 GPIO_2 AVSSN#2 AD35 F29 GND GND AJ11
F31 GND GND AJ2
B AF37 TP81 F33 GND GND AJ28
R125 *10K/F_4 GPIO5 R114 *10K/F_4 R121 *0_4 GPIO5 AH17 GPIO_5_AC_BATT AVSSN#3 AE38 F7 GND GND AJ6
33 GPU_AC_BATT
AJ17 GPIO_6 F9 GND GND AK11
R147 10K/F_4 DGPU_TRSTB DAC1 HSYNC_COM_R
AK17 GPIO_7_BLON HSYNC AC36 GPU_HSYNC_COM 17 G2 GND GND AK31
17 GPIO8 GPIO8 AJ13 GPIO_8_ROMSO VSYNC AC38 VSYNC_COM_R G6 GND GND AK7
GPU_VSYNC_COM 17
R144 10K/F_4 DGPU_TDI GPIO9 AH15 GPIO_9_ROMSI H9 GND GND AL11
17 GPIO9
TP74 GPIO10 AJ16 GPIO_10_ROMSCK J2 GND GND AL14
R146 10K/F_4 DGPU_TMS GPIO11 AK16 GPIO_11 RSET AB34 R374 499/F_4 J27 GND GND AL17
17 GPIO11
GPIO12 AL16 GPIO_12 J6 GND GND AL2
17 GPIO12
R133 10K/F_4 DGPU_TCK GPIO13 AM16 GPIO_13 AVDD AD34 +1.8V_AVDD_Q +1.8V_AVDD_Q J8 GND GND AL20
17 GPIO13
TP76 HDMI_HP2 AM14 GPIO_14_HPD2 AVSSQ AE34 DAC1 Analog Power K14 GND

42 GFX_CORE_CNTRL0 GFX_CORE_CNTRL0 AM13 GPIO_15_PWRCNTL_0 AVDD : 1.8V @ 18mA K7 GND GND AL23
GFX_CORE_CNTRL2 AK14 GPIO_16 VDD1DI AC33 +VDDD1 +1.8V_AVDD_Q L11 GND GND AL26
42 GFX_CORE_CNTRL2 +VDDD1
VGA_ALERT AG30 GPIO_17_THERMAL_INT VSS1DI AC34 +1.8V_VGA L17 GND GND AL32
4 VGA_ALERT
HPD3 AN14 GPIO_18_HPD3 L25 *0_4/S L2 GND GND AL6
TP75
TEMP_FAIL AM17 GPIO_19_CTF L22 GND GND AL8
42 GFX_CORE_CNTRL1 GFX_CORE_CNTRL1 AL13 GPIO_20_PWRCNTL_1 NC#1 V13 L24 GND GND AM11
GPIO21 AJ14 GPIO_21 NC#2 U13 C283 C269 C249 L6 GND GND AM31
+3V_DELAY 17 GPIO21
GPIO22(ROMCS#) GPIO22 AK13 GPIO_22_ROMCSB NC#3 AC31 SI , change to short pad *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 M17 GND GND AM9
17 GPIO22
GPIO_23_CLKREQb AN13 AD30 M22 AN11
3-k external pull up is required CLKREQB NC#4 GND GND
NC#5 AC32 M24 GND GND AN2
R85 *3.01K/F_4 GPIO22 if an external BIOS ROM chip is used. NC#6 AD32 DAC1 Digital Power. N16 GND GND AN30
Must be unconnected if no external AG32 GPIO_29 NC#7 AF32 VDD1DI : 1.8V @ 117mA +VDDD1 N18 GND GND AN6
BIOS ROM chip is used AG33 GPIO_30 NC#8 AA29 N2 GND GND AN8
NC#9 AG21 L26 *0_4/S N21 GND GND AP11
GPIO29, GPIO30 are NC on Thames AJ19 GENERICA N23 GND GND AP7
AK19 GENERICB Thames INSTALL, do not install for Chelsea N26 GND GND AP9
GENERICC AJ20 GENERICC C282 C265 C264 N6 GND GND AR5
B 17 GENERICC PS_0 should be tied to GND on Thames B
AK20 GENERICD *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 R15 GND GND B11
R143 10K/F_4 TEMP_FAIL AJ24 GENERICE_HPD4 NC_TSVSSQ AF33 R378 0_4 R17 GND GND B13
AH26 GENERICF_HPD5 R2 GND GND B15
AH24 GENERICG_HPD6 R372 0_4 R20 GND GND B17
R22 GND GND B19
PS_0 AM34 TP78 SI , change to DNI R24 GND GND B21
R27 GND GND B23
AC30 CEC_1 R6 GND GND B25
T11 GND GND B27
+1.8V_VGA AK24 HPD1 PS_1 AD31 T13 GND GND B29
MLPS TP82
T16 GND GND B31
R128 499/F_4 T18 GND GND B33
T21 GND GND B7
R130 249/F_4 +0.6V_VREFG AH13 VREFG PS_2 AG31 T23 GND GND B9
TP77
T26 GND GND C1
TP8 U15 GND GND C39
BACO U17 GND GND E35
C198 0.1U/10V_4 AL21 PX_EN PS_3 AD33 U2 GND GND E5
18 PX_EN TP79
U20 GND GND F11
U22 GND GND F13
U24 GND
GFX_CORE_CNTRL0 R62 *3.01K/F_4 U27 GND
R166 *5.1K/F_4 DEBUG DDC/AUX
+3V_DELAY DDC1CLK AM26 U6 GND
GFX_CORE_CNTRL1 R61 *3.01K/F_4 DDC1DATA AN26 V11 GND
TESTEN AD28 TESTEN V16 GND
R63 *3.01K/F_4 TP22
GFX_CORE_CNTRL2 AUX1P AM27 V18 GND
R168 1K/F_4 AUX1N AL27 V21 GND
V23 GND
Reserve for Power Play DGPU_TRSTB AM23 JTAG_TRSTB DDC2CLK AM19 V26 GND
TP13
DGPU_TDI AN23 JTAG_TDI DDC2DATA AL19 W2 GND
TP12
DGPU_TCK AK23 JTAG_TCK W6 GND
TP11
DGPU_TMS AL24 JTAG_TMS AUX2P AN20 Y15 GND
TP14
DGPU_TDO AM24 JTAG_TDO AUX2N AM20 Y17 GND
TP15
Y20 GND
DDCCLK_AUX3P AL30 Y22 GND VSS_MECH A39
DDCDATA_AUX3N AM30 Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
THERMAL
A SI, update P/N for EOD issue DDCCLK_AUX4P AL29 A
AF29 DPLUS DDCDATA_AUX4N AM29
+1.8V_TSVDD AG29 DMINUS
DDCCLK_AUX5P AN21 Thames XT_M2
TI160808U121(120,2.5A) 1.8V(8mA TSVDD) DDCDATA_AUX5N AM21
+1.8V_VGA GPIO28 AK32 GPIO_28_FDO
17 GPIO28
L27 DDCCLK_AUX6P AK30
AL31 TS_A DDCDATA_AUX6N AK29
C284 C281 C280
DDCVGACLK AJ30
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 +1.8V_TSVDD AJ32
AJ33
TSVDD
TSVSS
DDCVGADATA AJ31 14,16,18,19,44 +1.0V_VGA
+1.0V_VGA
PROJECT : R53
16,18,19,43 +1.8V_VGA
+1.8V_VGA Quanta Computer Inc.
Thames XT_M2 +3V_DELAY
17,18,42 +3V_DELAY
Size Document Number Rev
Custom 1A
Chelsea_Main & GND
Date: Friday, November 11, 2011 Sheet 15 of 44
5 4 3 2 1
5 4 3 2 1

16
Memory Type

27-MHz (± 30 ppm) crystal connected to XTALIN/XTALOUT, or


DDR3 27-MHz (1.8 V) oscillator connected to XTALIN.
+1.8V_DPLL_PVDD Display Phase Lock Loop Power 27-MHz (3.3 V) oscillator connected to XO_IN, and
D DPLL_PVDD : 1.8V @ 75mA 100-MHz (3.3 V) oscillator connected to XO_IN2. (By default, this clock should not be D
BLM18PG471SN1D/1A_6 GDDR5
+1.8V_VGA +1.8V_DPLL_PVDD spread since internal spreading is used.)
L24
C256
C228 C257
U26I
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4

PART 9 0F 9

SI , follow Thames design


+1.0V_DPLL_VDDC
DPLL_VDDC : 0.935V @ 140mA AM32 DPLL_PVDD XTALIN AV33 EVGA-XTALI 22P/50V_4 C712

1
+1.0V_VGA L21 BLM18PG471SN1D/1A_6 +1.0V_DPLL_VDDC AN31 DPLL_VDDC
R368 Y7
1.0V(125mA DPLL_VDDC) C241 C215 C214 1M_6 27MHZ
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 AN32 DPLL_PVSS

2
C DPLL_PVSS C
XTALOUT AU34 EVGA-XTALO C717
+1.8V_MPLL_PVDD 22P/50V_4
MPLL_PVDD : 1.8V @ 150mA
BLM18PG471SN1D/1A_6
+1.8V_VGA +1.8V_MPLL_PVDD H7 MPLL_PVDD
L36 H8 MPLL_PVDD
C471
C487 C477 XO_IN AW34
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4
AM10 SPLL_PVDD

PLLS/XTAL
R156 0_4

+1.8V_SPLL_PVDD
SPLL_PVDD : 1.8V @ 75mA AN9 SPLL_VDDC XO_IN2 AW35
BLM15BD121SN1D(120,300MA) L18
+1.8V_VGA +1.8V_SPLL_PVDD

C168 AN10 SPLL_PVSS


C163 C179
B B
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4

CLKTESTA AK10 CLKTESTA


AF30 NC_XTAL_PVDD CLKTESTB AL10 CLKTESTB
AF31 NC_XTAL_PVSS

+1.0V_SPLL_VDDC
SPLL_VDDC : 0.935V @ 150mA
C189 C230
+1.0V_VGA L20 BLM18PG471SN1D/1A_6 +1.0V_SPLL_VDDC *0.1U/10V_4 *0.1U/10V_4
Debug only,
1.0V(125mA DPLL_VDDC) C213 C233 C245 Thames XT_M2
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 for clock observation, +1.0V_VGA
14,18,19,44 +1.0V_VGA
SPLL_PVSS if not needed, DNI R124 R135
*51.1/F_4 *51.1/F_4 +1.8V_VGA
15,18,19,43 +1.8V_VGA

route 50ohms
A A
single-ended/
100ohms diff and keep short PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Chelsea_XTAL
Date: Monday, November 14, 2011 Sheet 16 of 44
5 4 3 2 1
5 4 3 2 1

U26G

PART 7 0F 9

LVDS CONTROL
VARY_BL
DIGON
AK27
AJ27 CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
17
THEY MUST NOT CONFLICT DURING RESET

TXCLK_UP_DPF3P AK35 STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS Default Setting
TXCLK_UN_DPF3N AL36

TXOUT_U0P_DPF2P AJ38 MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour X


TXOUT_U0N_DPF2N AK37 0: Enable MLPS, disable GPIO PINSTRAP
D D
1: Disable MLPS, enable GPIO PINSTRAP
TXOUT_U1P_DPF1P AH35
TXOUT_U1N_DPF1N AJ36
TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable
TXOUT_U2P_DPF0P AG38 0: 50% Tx output swing X
TXOUT_U2N_DPF0N AH37 1: Full Tx output swing
TXOUT_U3P AF35 TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable X
TXOUT_U3N AG36 0: Tx de-emphasis disabled
LVTMDP

1: Tx de-emphasis enabled

BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 1
0: GEN3 not supported at power-on
TXCLK_LP_DPE3P AP34 1: GEN3 supported at power-on
TXCLK_LN_DPE3N AR34
BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0
TXOUT_L0P_DPE2P AW37 0: VGA controller capacity enabled
TXOUT_L0N_DPE2N AU35 1: VGA controller capacity disabled (for multi-GPU)
TXOUT_L1P_DPE1P AR37
TXOUT_L1N_DPE1N AU39 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
TXOUT_L2P_DPE0P AP35 If GPIO22 = 0, defines memory aperture size XXX
TXOUT_L2N_DPE0N AR35 If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
TXOUT_L3P AN36 101 - 1Mbit M25P10A (ST)
TXOUT_L3N AP37 101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
101 - 1Mbit Pm25LV010 (Chingis)
Thames XT_M2
BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device X
0: Disabled
1: Enabled
C C

SI , default setting should be PU AUD[1] NA HSYNC 00 - No audio function XX


+3V_DELAY AUD[0] NA VSYNC 01 - Audio for DP only
from AMD SCH review result 10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.
15 GPIO0 GPIO0 R134 10K_4

GPIO1 R131 10K_4 CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour X
15 GPIO1 0: Disabled
1: Enabled
15 GPIO2 GPIO2 R97 *10K_4

GPIO9 R126 *10K_4


15 GPIO9

GPIO13 R100 *10K_4 NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
15 GPIO13 IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
GPIO12 R101 *10K_4
15 GPIO12 RESERVED PS_1[3] GENLK_CLK Reserved 0
GPIO11 R96 10K_4 RESERVED PS_1[2] GPIO8 Reserved 0
15 GPIO11 RESERVED NA GPIO21 Reserved 0
GPIO22 R90 *10K_4 RESERVED NA GENERICC Reserved (for Thames/Whistler/Seymour only) 0
15 GPIO22

15 GENLK_VSYNC R86 *10K_4 AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
R169 *10K_4 AUD_PORT_CONN_PINSTRAP[0]
15 GPU_HSYNC_COM PS_0[5] NA 110 = 1 usable endpoints
R385 *10K_4 101 = 2 usable endpoints
15 GPU_VSYNC_COM 100 = 3 usable endpoints
011 = 4 usable endpoints
R87 *10K_4 010 = 5 usable endpoints
15 GENLK_CLK 001 = 6 usable endpoints
000 = all endpoints are usable
B 15 GPIO8 GPIO8 R98 *10K_4 B

15 GENERICC R139 *10K_4

GPIO21 R99 *10K_4


15 GPIO21
GPIO28 R154 10K_4
15 GPIO28

Power Up/Down Sequence


Memory Aperture size
GPIO9 GPIO13 GPIO12 GPIO11
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
+VGA_CORE VDDC
0 128M 0 0 0
0 256M 0 0 1 +VGA_CORE VDDCI

0 64M 0 1 0
+1.5V_VGA VDDR1
0 32M 0 1 1
0 512M 1 0 0
A +3.3V_Delay VDDR3 A

0 1G 1 0 1
+1.8V_VGA VDDR4
0 2G 1 1 0
+1.8V_VGA VDD_CT
0 4G 1 1 1
20ms 20ms PROJECT : R53
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0. Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Chelsea_LVDS / STRAP
Date: Friday, November 11, 2011 Sheet 17 of 44
5 4 3 2 1
5 4 3 2 1

U26E Chelsea uninstall Chelsea uninstall PCIe I/O power. +1.8V_VGA

18
VDDR1 , 1.5V @ 2A, GDDR5 900MHz Thames install, Thames install
+1.5V_VGA +PCIE_VDDR1 total 440mA PCIE_VDDR : 1.8V @ 200mA
PART 5 0F 9
Rc
MEM I/O L62
I/O power for the AC7 VDDR1 NC_PCIE_VDDR AA31 BLM15BD121SN1D(120,300MA)
C438 C556 C741 C864 C496 C766 C357 C495 C747 C555 AD11 VDDR1 NC_PCIE_VDDR AA32 C753 C754 C755 C756 C751 C752
memory interface. +PCIE_VDDR2
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF7 VDDR1 NC_PCIE_VDDR AA33 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6 10U/6.3VS_6
AG10 VDDR1 NC_PCIE_VDDR AA34 Rd
AJ7 VDDR1 NC_PCIE_VDDR W30 L63
AK8 VDDR1 NC_PCIE_VDDR Y31 BLM15BD121SN1D(120,300MA)
AL9 VDDR1 NC_BIF_VDDC V28 L30 BIF_VDDC
G11 VDDR1 NC_BIF_VDDC W29 *BLM15BD121SN1D(120,300MA) PCIe Digital Power Supply
G14 VDDR1 PCIE_PVDD AB37 +1.8V_VGA PCIE_VDDC : 0.935V @ 1.88A (GEN2.0) +1.0V_VGA

PCIE
G17 VDDR1
G20 VDDR1 PCIE_VDDC G30 PCIE_VDDC : 0.935V @ 2.5A (GEN3.0)
G23 VDDR1 PCIE_VDDC G31
C431 C498 C866 C820 C291 C558 G26 VDDR1 PCIE_VDDC H29
10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 G29 VDDR1 PCIE_VDDC H30 C422 C415 C435 C375 C395 C377 C394 C416 C335
D D
H10 VDDR1 PCIE_VDDC J29 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
J7 VDDR1 PCIE_VDDC J30 +1.0V_VGA
J9 VDDR1 PCIE_VDDC L28
K11 VDDR1 PCIE_VDDC M28
K13 VDDR1 PCIE_VDDC N28
K8 VDDR1 PCIE_VDDC R28 C393 C376 C336 C337 C340 C382
L12 VDDR1 PCIE_VDDC T28 BIF_VDDC 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 10U/6.3VS_6
L16 VDDR1 PCIE_VDDC U28 Ra
Reserve for Drop L21 VDDR1 R400 *0_8
L23 VDDR1 Rb
L26 VDDR1 BIF_VDDC N27 R411 *0_8 Ra Rb Rc Rd
BACO +VGA_CORE
C524 C176 C867 C749 C865 L7 VDDR1 BIF_VDDC T27
*22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 M11 VDDR1 Chelsea-non BACO install na na na
N11 VDDR1
P7 VDDR1 VDDC AA15 Chelsea-BACO install na na na
CORE
R11 VDDR1 VDDC AA17 SI , change to 0805 size

2
*330u_2.5V_3528

*330u_2.5V_3528
U11 VDDR1 VDDC AA20 Thames-non BACO na install install install
C537 C455 C690 C767 C523 U7 VDDR1 VDDC AA22
+VGA_CORE
+ +
*22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 Y11 VDDR1 VDDC AA24 Thames-BACO na na install install
Y7 VDDR1 VDDC AA27

1
VDDC AB16
VDDC AB18
VDDC AB21
VDDC AB23
VDDC_CT: 1.8V @250mA +1.8V_VDD_CT LEVEL VDDC AB26
+1.8V_VGA TRANSLATION VDDC AB28 C374 C414 C392 C413 C390 C373 C389 C372 C421 C412
L29 *0_4/S AF26 VDD_CT VDDC AC17 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AF27 VDD_CT VDDC AC20
AG26 VDD_CT VDDC AC22
AG27 VDD_CT VDDC AC24
C302 C296 C295 C297 C294 VDDC AC27
*10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 VDDC AD18
I/O VDDC AD21
AF23 VDDR3 VDDC AD23
+3V_DELAY AF24 VDDR3 VDDC AD26 C331 C243 C232 C391 C411 C371 C332 C333 C218 C388
+3V_VGA VDDR3 : 3.3V @ 60mA AG23 VDDR3 VDDC AF17 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
L22 *0_6/S AG24 VDDR3 VDDC AF20
VDDC AF22
DVP VDDC AG16
C AD12 VDDR4 VDDC AG18 C
SI , change to short pad C231 C227 C252 C258 AF11 VDDR4
*10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF12 VDDR4 VDDC AH22
AF13 VDDR4 VDDC AH27
VDDC AH28 C186 C197 C386 C326 C334 C181 C369 C268 C370 C209
+VDDR4 VDDC M26 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VDDR4 : 1.8V @ 300mA AF15 VDDR4 VDDC N24
L23 *0_6/S AG11 VDDR4 VDDC R18
AG13 VDDR4 VDDC R21
AG15 VDDR4 VDDC R23
VDDC R26
C248 C247 C263 C262 C329 C328 VDDC T17
*10U/6.3VS_6 *10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 VDDC T20
VDDC T22 C344 C200 C253 C202 C324
VDDC T24 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
VDDC U16
VDDC U18 SI , add for voltage drop
VDDC U21
SI , change to DNI VDDC U23
VDDC U26

330u_2.5V_3528
VDDC V17

1
VDDC V20
VDDC V22 C343 C212 C240 C225 +
VDDC V24 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 C387
VDDC V27

2
VDDC Y16
VDDC Y18
VDDC Y21
VDDC Y23
VDDC Y26
VDDC Y28 +VDDCI +VGA_CORE
VDDCI 0.8-1.15V @ 6A
VDDCI AA13
VDDCI AB13 L31
VDDCI AC12 UPB201212T-121Y-N(120,100M,5A)_8
VDDCI AC15
VDDCI AD13
VDDCI AD16 C330 C417 C378 C351 C368 C420 C407 C426
VDDCI M15 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
B
VDDCI M16 B
VDDCI M18
VOLTAGE
SENESE
VDDCI M23
CORE I/O

N13
ISOLATED

VDDCI
AF28 FB_VDDC VDDCI N15
VDDCI N17
VDDCI N20 C427 C424 C432 C405 C383
AG28 FB_VDDCI VDDCI N22 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4
44 PX_MODE1
VDDCI R12
Dual VDDCI R13
6

AH29 FB_GND VDDCI R16


PX_EN 2 Q48B VDDCI T12
2N7002DW-7-F VDDCI T15
VDDCI V15 +1.5V_VGA
1

20,21,22,44 +1.5V_VGA
VDDCI Y13 +1.0V_VGA
14,16,19,44 +1.0V_VGA +1.8V_VGA
15,16,19,43 +1.8V_VGA
+3V_VGA
30,44 +3V_VGA
Thames XT_M2 +VGA_CORE
42 +VGA_CORE

PX_MODE R60 *0_4 PX_MODE1

+5V
+5V
Support BACO Mode +3V
R410
Q36
AO3416
Q35
AO3416
+3V R409 1K_4
SI , Q39,Q40 change to dual type MOS Q20 1K_4 1 3 3 1 BIF_VDDC
+1.0V_VGA
R420 PX_EN##
R70 PX_EN#
*10K_4 100K/F_4
2

PX_EN#
Q19 Q37
6

Q62B Q62A AO3416 AO3416


Dual
R74 0_4 Dual 2 5 C799 C800 C801 C792
42 PX_MODE
3

Q52A +VGA_CORE 1 3 3 1 22U/6.3VS_8 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6


3

Q48A 5 +3V 2N7002DW-7-F 2N7002DW-7-F


1

15 PX_EN 5 C822 Dual Dual


Dual 2N7002DW-7-F
4

A 2N7002DW-7-F PX_EN## A
4

R78 Q52B 0.1U/10V_4


2 7,33,42,43,44 DGPU_PWROK 2
5.1K/F_4 4 BACO_EN SI , Q20,Q38 change to dual type MOS Q62
2N7002DW-7-F PX_MODE 1
1

Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra)


3

U28 MC74VHC1G08DFT2G

4,10,33 ECPWROK 2. BACO Support: Refer to the BACO reference


schematics/Application note for detail about BIF_VDDC Rail
SI , Q12,Q13 change to dual type MOS Q48
PX_EN = 0, for Normal Operation
PX_EN = 1, for BACO MODE if BACO is Supported (Uninstall Ra) PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom Chelsea_Power & BACO 1A

Date: Monday, November 14, 2011 Sheet 18 of 44


5 4 3 2 1
5 4 3 2 1

For Thames a dedicated BEAD is required

For Thames a dedicated BEAD is required


for each DPAB_VDD18, DPCD_VDD18, DPEF_VDD18 U26H

PART 8 0F 9
for each DPAB_VDD10, DPCD_VDD10, DPEF_VDD10

DPAB_VDD10
DP/TMDS/LVDS Transmitter Power
0.935V@222mA per port
*0_4/S
+1.0V_VGA

L60
19
D DP/TMDS/LVDS Transmitter Power DP_VDDR DP_VDDC
D
HDMI mode: 1.8V@237mA per port
DP_VDDC AP31 C722 C721 C720
+1.8V_VGA DP mode: 1.8V@188mA per port DP_VDDC AP32 0.1U/10V_4 1U/6.3V_4 *10U/6.3VS_6
DPAB_VDD18 DP_VDDC AN33
DP_VDDC AP33 DP/TMDS/LVDS Transmitter Power +1.0V_VGA
L59 *0_4/S AN24 DP_VDDR 0.935V@222mA per port
AP24 DP_VDDR DP_VDDC AP13 DPCD_VDD10
AP25 DP_VDDR DP_VDDC AT13 *0_4/S L58
C709 C711 C714 AP26 DP_VDDR DP_VDDC AP14
*10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 AU28 DP_VDDR DP_VDDC AP15
+1.8V_VGA AV29 DP_VDDR C710 C706 C700 SI , change to
DP_VDDC AL33 0.1U/10V_4 1U/6.3V_4 *10U/6.3VS_6 short pad
DPCD_VDD18 DP_VDDC AM33
L57 *0_4/S AP20 DP_VDDR DP_VDDC AK33
AP21 DP_VDDR DP_VDDC AK34 DP/TMDS/LVDS Transmitter Power +1.0V_VGA
AP22 DP_VDDR 0.935V@222mA per port
C699 C708 C702 AP23 DP_VDDR
DPEF_VDD10
*10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 AU18 DP_VDDR *0_4/S L28
+1.8V_VGA AV19 DP_VDDR
DP GND
C DPEF_VDD18 DP_VSSR AN27 C279 C278 C277 C
L61 *0_4/S AH34 DP_VDDR DP_VSSR AP27 0.1U/10V_4 1U/6.3V_4 *10U/6.3VS_6
AJ34 DP_VDDR DP_VSSR AP28
AF34 DP_VDDR DP_VSSR AW24
SI , change to C732 C728 C733 AG34 DP_VDDR DP_VSSR AW26
short pad *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 AM37 DP_VDDR DP_VSSR AN29
AL38 DP_VDDR DP_VSSR AP29 SI , change to DNI
DP_VSSR AP30
DP_VSSR AW30
DP_VSSR AW32
SI , change to DNI DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
CALIBRATION
DP_VSSR AW20
DP_VSSR AW22
DP_VSSR AN34
B B
DP_VSSR AP39
R150 150/F_4 AW28 DPAB_CALR DP_VSSR AR39
DP_VSSR AU37
DP_VSSR AF39
DP_VSSR AH39
R365 150/F_4 AW18 DPCD_CALR DP_VSSR AK39
DP_VSSR AL34
DP_VSSR AV27
DP_VSSR AR28
R377 150/F_4 AM39 DPEF_CALR DP_VSSR AV17
DP_VSSR AR18
DP_VSSR AN38
DP_VSSR AM35

A Thames XT_M2 A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Chelsea_DP Powers
Date: Monday, November 14, 2011 Sheet 19 of 44
5 4 3 2 1
5 4 3 2 1

20
VMA_ODT0
21 VMA_ODT0
21 VMA_ODT1 VMA_ODT1 22 VMB_ODT0 VMB_ODT0
U26D
VMB_ODT1
U26C 22 VMB_ODT1
21 VMA_RAS0# VMA_RAS0#
VMA_RAS1# VMB_RAS0# PART 4 0F 9
21 VMA_RAS1# PART 3 0F 9 22 VMB_RAS0#
VMB_RAS1#
22 VMB_RAS1# GDDR5/DDR3
21 VMA_CAS0# VMA_CAS0# GDDR5/DDR3 VMB_DQ0 C5 DQB0_0 MAB0_0/MAB_0 P8 VMB_MA0
21 VMA_CAS1# VMA_CAS1# VMA_DQ0 C37 DQA0_0 MAA0_0/MAA_0 G24 VMA_MA0 22 VMB_CAS0# VMB_CAS0# VMB_DQ1 C3 DQB0_1 MAB0_1/MAB_1 T9 VMB_MA1
VMA_DQ1 C35 DQA0_1 MAA0_1/MAA_1 J23 VMA_MA1 VMB_CAS1# VMB_DQ2 E3 DQB0_2 MAB0_2/MAB_2 P9 VMB_MA2
22 VMB_CAS1#
21 VMA_WE0# VMA_WE0# VMA_DQ2 A35 DQA0_2 MAA0_2/MAA_2 H24 VMA_MA2 VMB_DQ3 E1 DQB0_3 MAB0_3/MAB_3 N7 VMB_MA3
21 VMA_WE1# VMA_WE1# VMA_DQ3 E34 DQA0_3 MAA0_3/MAA_3 J24 VMA_MA3 22 VMB_WE0# VMB_WE0# VMB_DQ4 F1 DQB0_4 MAB0_4/MAB_4 N8 VMB_MA4
VMA_DQ4 G32 DQA0_4 MAA0_4/MAA_4 H26 VMA_MA4 22 VMB_WE1# VMB_WE1# VMB_DQ5 F3 DQB0_5 MAB0_5/MAB_5 N9 VMB_MA5
VMA_CS0# VMA_DQ5 D33 DQA0_5 MAA0_5/MAA_5 J26 VMA_MA5 VMB_DQ6 F5 DQB0_6 MAB0_6/MAB_6 U9 VMB_MA6
21 VMA_CS0#
VMA_DQ6 F32 DQA0_6 MAA0_6/MAA_6 H21 VMA_MA6 VMB_CS0# VMB_DQ7 G4 DQB0_7 MAB0_7/MAB_7 U8 VMB_MA7
D 22 VMB_CS0# D
21 VMA_CS1# VMA_CS1# VMA_DQ7 E32 DQA0_7 MAA0_7/MAA_7 G21 VMA_MA7 VMB_DQ8 H5 DQB0_8 MAB1_0/MAB_8 Y9 VMB_MA8
VMA_DQ8 D31 H19 VMA_MA8 VMB_CS1# VMB_DQ9 H6 W9 VMB_MA9

MEMORY INTERFACE A
DQA0_8 MAA1_0/MAA_8 22 VMB_CS1# DQB0_9 MAB1_1/MAB_9
VMA_CKE0 VMA_DQ9 F30 DQA0_9 MAA1_1/MAA_9 H20 VMA_MA9 VMB_DQ10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VMB_MA10
21 VMA_CKE0
VMA_CKE1 VMA_DQ10 C30 DQA0_10 MAA1_2/MAA_10 L13 VMA_MA10 VMB_CKE0 VMB_DQ11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VMB_MA11
21 VMA_CKE1 22 VMB_CKE0
VMA_DQ11 A30 DQA0_11 MAA1_3/MAA_11 G16 VMA_MA11 22 VMB_CKE1 VMB_CKE1 VMB_DQ12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VMB_MA12
VMA_CLK0 VMA_DQ12 F28 DQA0_12 MAA1_4/MAA_12 J16 VMA_MA12 VMB_DQ13 L4 DQB0_13 MAB1_5/BA2 AA8 VMB_BA2
21 VMA_CLK0
VMA_CLK0# VMA_DQ13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 VMA_BA2 VMB_CLK0 VMB_DQ14 M6 DQB0_14 MAB1_6/BA0 Y8 VMB_BA0
21 VMA_CLK0# 22 VMB_CLK0
VMA_DQ14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VMA_BA0 22 VMB_CLK0# VMB_CLK0# VMB_DQ15 M1 DQB0_15 MAB1_7/BA1 AA9 VMB_BA1
21 VMA_CLK1 VMA_CLK1 VMA_DQ15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3 DQB0_16

MEMORY INTERFACE B
VMA_CLK1# VMA_DQ16 D27 DQA0_16 VMB_CLK1 VMB_DQ17 M5 DQB0_17 WCKB0_0/DQMB_0 H3 VMB_DM0
21 VMA_CLK1# 22 VMB_CLK1
VMA_DQ17 F26 DQA0_17 WCKA0_0/DQMA_0 A32 VMA_DM0 VMB_CLK1# VMB_DQ18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1 VMB_DM1
22 VMB_CLK1#
VMA_WDQS[7..0] VMA_DQ18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 DQB0_19 WCKB0_1/DQMB_2 T3 VMB_DM2
21 VMA_WDQS[7..0] VMA_DQ19 VMA_DM2 VMB_WDQS[7..0] VMB_DQ20 VMB_DM3
A26 DQA0_19 WCKA0_1/DQMA_2 D23 22 VMB_WDQS[7..0] P5 DQB0_20 WCKB0B_1/DQMB_3 T5
VMA_RDQS[7..0] VMA_DQ20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4 VMB_DM4
21 VMA_RDQS[7..0] VMB_RDQS[7..0]
VMA_DQ21 C24 DQA0_21 WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 VMB_DM5
VMA_DM[7..0] VMA_DQ22 VMA_DM5 22 VMB_RDQS[7..0] VMB_DQ23 VMB_DM6
21 VMA_DM[7..0] A24 DQA0_22 WCKA1B_0/DQMA_5 A14 T1 DQB0_23 WCKB1_1/DQMB_6 AK6
VMA_DQ23 E24 DQA0_23 WCKA1_1/DQMA_6 E10 VMA_DM6 VMB_DM[7..0] VMB_DQ24 U4 DQB0_24 WCKB1B_1/DQMB_7 AK5 VMB_DM7
VMA_DQ[63..0] VMA_DQ24 VMA_DM7 22 VMB_DM[7..0] VMB_DQ25
21 VMA_DQ[63..0] C22 DQA0_24 WCKA1B_1/DQMA_7 D9 V6 DQB0_25
VMA_DQ25 A22 DQA0_25 VMB_DQ[63..0] VMB_DQ26 V1 DQB0_26 EDCB0_0/QSB_0 F6 VMB_RDQS0
VMA_MA[13..0] 22 VMB_DQ[63..0]
21 VMA_MA[13..0] VMA_DQ26 F22 DQA0_26 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 DQB0_27 EDCB0_1/QSB_1 K3 VMB_RDQS1
VMA_DQ27 D21 DQA0_27 EDCA0_1/QSA_1 D29 VMA_RDQS1 VMB_MA[13..0] VMB_DQ28 Y6 DQB0_28 EDCB0_2/QSB_2 P3 VMB_RDQS2
22 VMB_MA[13..0]
VMA_DQ28 A20 DQA0_28 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 DQB0_29 EDCB0_3/QSB_3 V5 VMB_RDQS3
21 VMA_BA0 VMA_BA0 VMA_DQ29 F20 DQA0_29 EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 VMB_RDQS4
21 VMA_BA1 VMA_BA1 VMA_DQ30 D19 DQA0_30 EDCA1_0/QSA_4 E16 VMA_RDQS4 22 VMB_BA0 VMB_BA0 VMB_DQ31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1 VMB_RDQS5
VMA_BA2 VMA_DQ31 E18 DQA0_31 EDCA1_1/QSA_5 E12 VMA_RDQS5 22 VMB_BA1 VMB_BA1 VMB_DQ32 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
21 VMA_BA2
VMA_DQ32 C18 DQA1_0 EDCA1_2/QSA_6 J10 VMA_RDQS6 VMB_BA2 VMB_DQ33 AB6 DQB1_1 EDCB1_3/QSB_7 AM5 VMB_RDQS7
22 VMB_BA2
VMA_DQ33 A18 DQA1_1 EDCA1_3/QSA_7 D7 VMA_RDQS7 VMB_DQ34 AB1 DQB1_2
VMA_DQ34 F18 DQA1_2 VMB_DQ35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 VMB_WDQS0
VMA_DQ35 D17 DQA1_3 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DQB1_4 DDBIB0_1/QSB_1B K1 VMB_WDQS1
C VMA_DQ36 A16 DQA1_4 DDBIA0_1/QSA_1B E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_5 DDBIB0_2/QSB_2B P1 VMB_WDQS2 C
+1.5V_VGA VMA_DQ37 F16 DQA1_5 DDBIA0_2/QSA_2B E26 VMA_WDQS2 +1.5V_VGA VMB_DQ38 AD3 DQB1_6 DDBIB0_3/QSB_3B W4 VMB_WDQS3
VMA_DQ38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
VMA_DQ39 E14 DQA1_7 DDBIA1_0/QSA_4B C16 VMA_WDQS4 VMB_DQ40 AF1 DQB1_8 DDBIB1_1/QSB_5B AH3 VMB_WDQS5
VMA_DQ40 F14 DQA1_8 DDBIA1_1/QSA_5B C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8 VMB_WDQS6
R233 VMA_DQ41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 VMA_WDQS6 R105 VMB_DQ42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 DQA1_10 DDBIA1_3/QSA_7B F8 VMA_WDQS7 VMB_DQ43 AG4 DQB1_11
40.2/F_4 VMA_DQ43 A12 DQA1_11 40.2/F_4 VMB_DQ44 AH5 DQB1_12 ADBIB0/ODTB0 T7 VMB_ODT0
VMA_DQ44 D11 DQA1_12 ADBIA0/ODTA0 J21 VMA_ODT0 VMB_DQ45 AH6 DQB1_13 ADBIB1/ODTB1 W7 VMB_ODT1
VMA_DQ45 F10 DQA1_13 ADBIA1/ODTA1 G19 VMA_ODT1 VMB_DQ46 AJ4 DQB1_14
VMA_DQ46 A10 DQA1_14 VMB_DQ47 AK3 DQB1_15 CLKB0 L9 VMB_CLK0
VMA_DQ47 C10 DQA1_15 CLKA0 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_16 CLKB0B L8 VMB_CLK0#
VMA_DQ48 G13 DQA1_16 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9 DQB1_17
R228 VMA_DQ49 H13 DQA1_17 R106 VMB_DQ50 AG8 DQB1_18 CLKB1 AD8 VMB_CLK1
C490 VMA_DQ50 J13 DQA1_18 CLKA1 J14 VMA_CLK1 C158 VMB_DQ51 AG7 DQB1_19 CLKB1B AD7 VMB_CLK1#
1U/6.3V_4 100/F_4 VMA_DQ51 H11 DQA1_19 CLKA1B H14 VMA_CLK1# 1U/6.3V_4 100/F_4 VMB_DQ52 AK9 DQB1_20
VMA_DQ52 G10 DQA1_20 VMB_DQ53 AL7 DQB1_21 RASB0B T10 VMB_RAS0#
VMA_DQ53 G8 DQA1_21 RASA0B K23 VMA_RAS0# VMB_DQ54 AM8 DQB1_22 RASB1B Y10 VMB_RAS1#
VMA_DQ54 K9 DQA1_22 RASA1B K19 VMA_RAS1# VMB_DQ55 AM7 DQB1_23
PLACE MVREFD DIVIDERS VMA_DQ55 K10 DQA1_23 PLACE MVREFD DIVIDERS VMB_DQ56 AK1 DQB1_24 CASB0B W 10 VMB_CAS0#
AND CAPS CLOSE TO ASIC VMA_DQ56 G9 DQA1_24 CASA0B K20 VMA_CAS0# AND CAPS CLOSE TO ASIC VMB_DQ57 AL4 DQB1_25 CASB1B AA10 VMB_CAS1#
VMA_DQ57 A8 DQA1_25 CASA1B K17 VMA_CAS1# VMB_DQ58 AM6 DQB1_26
+1.5V_VGA VMA_DQ58 C8 DQA1_26 +1.5V_VGA VMB_DQ59 AM1 DQB1_27 CSB0B_0 P10 VMB_CS0#
VMA_DQ59 E8 DQA1_27 CSA0B_0 K24 VMA_CS0# VMB_DQ60 AN4 DQB1_28 CSB0B_1 L10
VMA_DQ60 A6 DQA1_28 CSA0B_1 K27 VMB_DQ61 AP3 DQB1_29
VMA_DQ61 C6 DQA1_29 VMB_DQ62 AP1 DQB1_30 CSB1B_0 AD10 VMB_CS1#
R234 VMA_DQ62 E6 DQA1_30 CSA1B_0 M13 VMA_CS1# R215 VMB_DQ63 AP5 DQB1_31 CSB1B_1 AC10
VMA_DQ63 A5 DQA1_31 CSA1B_1 K16
40.2/F_4 40.2/F_4 CKEB0 U10 VMB_CKE0
MVREFDA L18 MVREFDA CKEA0 K21 VMA_CKE0 MVREFDB Y12 MVREFDB CKEB1 AA11 VMB_CKE1
B B
MVREFSA L20 MVREFSA CKEA1 J20 VMA_CKE1 MVREFSB AA12 MVREFSB
+1.5V_VGA WEB0B N10 VMB_WE0#
RaR198 240/F_4 L27 NC_MEM_CALRN0 WEA0B K26 VMA_WE0# WEB1B AB11 VMB_WE1#
RbR194 240/F_4 N12 NC_MEM_CALRN1 WEA1B L15 VMA_WE1#
R229 RcR140 240/F_4 AG12 NC_MEM_CALRN2 R216
C491 C476 MAB0_8/MAB_13 T8 VMB_MA13
1U/6.3V_4 100/F_4 RdR195 240/F_4 M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 VMA_MA13 1U/6.3V_4 100/F_4 MAB1_8/MAB_14 W8
ReR196 240/F_4 M27 MEM_CALRP0 MAA1_8/MAA_14 J19 MAB0_9/MAB_15 U12
RfR89 240/F_4 AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 MAB1_9/RSVD V12
MAA1_9/RSVD M20
DRAM_RST AH11 DRAM_RST
For Chelsea,
Uninstall Ra, Rb, Rc and Rd
Thames XT_M2

For Thames Thames XT_M2


Install Ra Rb Rc Rd
install 240 Ohm for Re AND Rf DRAM_RST R149 10_4 DRAM_RST_M
DRAM_RST_M 21,22
R145 51/F_4

R157 C272
4.99K/F_4
120P/50V_4

A +1.5V_VGA A
18,21,22,44 +1.5V_VGA

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Chelsea_MEM_Interface
Date: Friday, November 11, 2011 Sheet 20 of 44
5 4 3 2 1
5 4 3 2 1

VMA_MA[13..0]

21
20 VMA_MA[13..0] 20 VMA_DQ[63..0]
20 VMA_DM[7..0] 20 VMA_WDQS[7..0]
20 VMA_RDQS[7..0]
U22
CHANNEL A: 256MB/512MB DDR3 VREFC_VMA3 M9
U21

VREFCA DQL0
E4 VMA_DQ47 U29
U30 VREFD_VMA3 H2 F8 VMA_DQ44
VREFC_VMA2 VMA_DQ11 VREFDQ DQL1 VMA_DQ45 VREFC_VMA4 VMA_DQ49
M9 E4 F3 M9 E4
VREFC_VMA1 VMA_DQ0 VREFD_VMA2 VREFCA DQL0 VMA_DQ12 VMA_MA0 DQL2 VMA_DQ43 VREFD_VMA4 VREFCA DQL0 VMA_DQ52
M9 E4 H2 F8 N4 F9 H2 F8
VREFD_VMA1 VREFCA DQL0 VMA_DQ6 VREFDQ DQL1 VMA_DQ15 VMA_MA1 A0 DQL3 VMA_DQ46 VREFDQ DQL1 VMA_DQ50
H2 F8 F3 P8 H4 F3
VREFDQ DQL1 VMA_DQ2 VMA_MA0 DQL2 VMA_DQ10 VMA_MA2 A1 DQL4 VMA_DQ41 VMA_MA0 DQL2 VMA_DQ54
F3 N4 F9 P4 H9 N4 F9
VMA_MA0 DQL2 VMA_DQ7 VMA_MA1 A0 DQL3 VMA_DQ14 VMA_MA3 A2 DQL5 VMA_DQ40 VMA_MA1 A0 DQL3 VMA_DQ51
N4 F9 P8 H4 N3 G3 P8 H4
VMA_MA1 A0 DQL3 VMA_DQ3 VMA_MA2 A1 DQL4 VMA_DQ8 VMA_MA4 A3 DQL6 VMA_DQ42 VMA_MA2 A1 DQL4 VMA_DQ53
P8 H4 P4 H9 P9 H8 P4 H9
VMA_MA2 A1 DQL4 VMA_DQ4 VMA_MA3 A2 DQL5 VMA_DQ13 VMA_MA5 A4 DQL7 VMA_MA3 A2 DQL5 VMA_DQ48
P4 H9 N3 G3 P3 N3 G3
VMA_MA3 A2 DQL5 VMA_DQ1 VMA_MA4 A3 DQL6 VMA_DQ9 VMA_MA6 A5 VMA_MA4 A3 DQL6 VMA_DQ55
N3 G3 P9 H8 R9 P9 H8
VMA_MA4 A3 DQL6 VMA_DQ5 VMA_MA5 A4 DQL7 VMA_MA7 A6 VMA_DQ32 VMA_MA5 A4 DQL7
P9 H8 P3 R3 D8 P3
VMA_MA5 A4 DQL7 VMA_MA6 A5 VMA_MA8 A7 DQU0 VMA_DQ36 VMA_MA6 A5
P3 R9 T9 C4 R9
D VMA_MA6 A5 VMA_MA7 A6 VMA_DQ27 VMA_MA9 A8 DQU1 VMA_DQ33 VMA_MA7 A6 VMA_DQ60 D
R9 R3 D8 R4 C9 R3 D8
VMA_MA7 A6 VMA_DQ20 VMA_MA8 A7 DQU0 VMA_DQ29 VMA_MA10 A9 DQU2 VMA_DQ38 VMA_MA8 A7 DQU0 VMA_DQ59
R3 D8 T9 C4 L8 C3 T9 C4
VMA_MA8 A7 DQU0 VMA_DQ19 VMA_MA9 A8 DQU1 VMA_DQ26 VMA_MA11 A10/AP DQU3 VMA_DQ34 VMA_MA9 A8 DQU1 VMA_DQ63
T9 C4 R4 C9 R8 A8 R4 C9
VMA_MA9 A8 DQU1 VMA_DQ23 VMA_MA10 A9 DQU2 VMA_DQ28 VMA_MA12 A11 DQU4 VMA_DQ39 VMA_MA10 A9 DQU2 VMA_DQ58
R4 C9 L8 C3 N8 A3 L8 C3
VMA_MA10 A9 DQU2 VMA_DQ17 VMA_MA11 A10/AP DQU3 VMA_DQ25 VMA_MA13 A12/BC DQU5 VMA_DQ35 VMA_MA11 A10/AP DQU3 VMA_DQ61
L8 C3 R8 A8 T4 B9 R8 A8
VMA_MA11 A10/AP DQU3 VMA_DQ22 VMA_MA12 A11 DQU4 VMA_DQ30 A13 DQU6 VMA_DQ37 VMA_MA12 A11 DQU4 VMA_DQ56
R8 A8 N8 A3 T8 A4 N8 A3
VMA_MA12 A11 DQU4 VMA_DQ16 VMA_MA13 A12/BC DQU5 VMA_DQ24 A14 DQU7 VMA_MA13 A12/BC DQU5 VMA_DQ62
N8 A3 T4 B9 M8 T4 B9
VMA_MA13 A12/BC DQU5 VMA_DQ21 A13 DQU6 VMA_DQ31 A15/BA3 +1.5V_VGA A13 DQU6 VMA_DQ57
T4 B9 T8 A4 T8 A4
A13 DQU6 VMA_DQ18 A14 DQU7 VMA_CLK0 A14 DQU7
T8 A4 M8 M8
A14 DQU7 A15/BA3 +1.5V_VGA VMA_BA0 A15/BA3 +1.5V_VGA
M8 M3 B3
A15/BA3 +1.5V_VGA VMA_BA1 BA0 VDD#B3
N9 D10
VMA_BA0 R264 VMA_BA2 BA1 VDD#D10 VMA_BA0
M3 B3 M4 G8 M3 B3
VMA_BA1 BA0 VDD#B3 BA2 VDD#G8 VMA_BA1 BA0 VDD#B3
20 VMA_BA0 M3 B3 N9 D10 56.2/F_4 K3 N9 D10
BA0 VDD#B3 VMA_BA2 BA1 VDD#D10 VDD#K3 VMA_BA2 BA1 VDD#D10
20 VMA_BA1 N9 D10 M4 G8 C530 K9 M4 G8
BA1 VDD#D10 BA2 VDD#G8 VDD#K9 BA2 VDD#G8
20 VMA_BA2 M4 G8 K3 N2 K3
BA2 VDD#G8 VDD#K3 VMA_CLK0_COMM VDD#N2 VDD#K3
K3 K9 20 VMA_CLK1 J8 N10 K9
VDD#K3 VDD#K9 CK VDD#N10 VDD#K9
K9 N2 20 VMA_CLK1# K8 R2 N2
VDD#K9 VMA_CLK0 VDD#N2 CK VDD#R2 VMA_CLK1 VDD#N2
N2 J8 N10 20 VMA_CKE1 K10 R10 J8 N10
VDD#N2 VMA_CLK0# CK VDD#N10 R265 0.01U/25V_4 CKE/CKE0 VDD#R10 +1.5V_VGA VMA_CLK1# CK VDD#N10
20 VMA_CLK0 J8 N10 K8 R2 K8 R2
CK VDD#N10 VMA_CKE0 CK VDD#R2 VMA_CKE1 CK VDD#R2
20 VMA_CLK0# K8 R2 K10 R10 56.2/F_4 K10 R10
CK VDD#R2 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
20 VMA_CKE0 K10 R10 20 VMA_ODT1 K2 A2
CKE/CKE0 VDD#R10 +1.5V_VGA ODT/ODT0 VDDQ#A2
20 VMA_CS1# L3 A9
VMA_ODT0 VMA_CLK0# CS /CS0 VDDQ#A9 VMA_ODT1
K2 A2 20 VMA_RAS1# J4 C2 K2 A2
VMA_CS0# ODT/ODT0 VDDQ#A2 VMA_CLK1 RAS VDDQ#C2 VMA_CS1# ODT/ODT0 VDDQ#A2
20 VMA_ODT0 K2 A2 L3 A9 20 VMA_CAS1# K4 C10 L3 A9
ODT/ODT0 VDDQ#A2 VMA_RAS0# CS /CS0 VDDQ#A9 CAS VDDQ#C10 VMA_RAS1# CS /CS0 VDDQ#A9
20 VMA_CS0# L3 A9 J4 C2 20 VMA_WE1# L4 D3 J4 C2
CS /CS0 VDDQ#A9 VMA_CAS0# RAS VDDQ#C2 WE VDDQ#D3 VMA_CAS1# RAS VDDQ#C2
20 VMA_RAS0# J4 C2 K4 C10 E10 K4 C10
RAS VDDQ#C2 VMA_WE0# CAS VDDQ#C10 R425 VDDQ#E10 VMA_WE1# CAS VDDQ#C10
20 VMA_CAS0# K4 C10 L4 D3 F2 L4 D3
CAS VDDQ#C10 WE VDDQ#D3 VMA_RDQS5 VDDQ#F2 WE VDDQ#D3
20 VMA_WE0# L4 D3 E10 56.2/F_4 F4 H3 E10
WE VDDQ#D3 VDDQ#E10 VMA_RDQS4 DQSL VDDQ#H3 VDDQ#E10
E10 F2 C832 C8 H10 F2
VDDQ#E10 VMA_RDQS1 VDDQ#F2 DQSU VDDQ#H10 VMA_RDQS6 VDDQ#F2
F2 F4 H3 F4 H3
VMA_RDQS0 VDDQ#F2 VMA_RDQS3 DQSL VDDQ#H3 VMA_CLK1_COMM VMA_RDQS7 DQSL VDDQ#H3
F4 H3 C8 H10 C8 H10
VMA_RDQS2 DQSL VDDQ#H3 DQSU VDDQ#H10 VMA_DM5 DQSU VDDQ#H10
C8 H10 E8 A10
C DQSU VDDQ#H10 VMA_DM4 DML VSS#A10 C
D4 B4
VMA_DM1 R428 0.01U/25V_4 DMU VSS#B4 VMA_DM6
E8 A10 E2 E8 A10
VMA_DM0 VMA_DM3 DML VSS#A10 VSS#E2 VMA_DM7 DML VSS#A10
E8 A10 D4 B4 56.2/F_4 G9 D4 B4
VMA_DM2 DML VSS#A10 DMU VSS#B4 VMA_WDQS5 VSS#G9 DMU VSS#B4
D4 B4 E2 G4 J3 E2
DMU VSS#B4 VSS#E2 VMA_WDQS4 DQSL VSS#J3 VSS#E2
E2 G9 B8 J9 G9
VSS#E2 VMA_WDQS1 VSS#G9 VMA_CLK1# DQSU VSS#J9 VMA_WDQS6 VSS#G9
G9 G4 J3 M2 G4 J3
VMA_WDQS0 VSS#G9 VMA_WDQS3 DQSL VSS#J3 VSS#M2 VMA_WDQS7 DQSL VSS#J3
G4 J3 B8 J9 M10 B8 J9
VMA_WDQS2 DQSL VSS#J3 DQSU VSS#J9 VSS#M10 DQSU VSS#J9
B8 J9 M2 P2 M2
DQSU VSS#J9 VSS#M2 DRAM_RST_M VSS#P2 VSS#M2
M2 M10 T3 P10 M10
VSS#M2 VSS#M10 RESET VSS#P10 VSS#M10
M10 P2 T2 P2
VSS#M10 DRAM_RST_M VSS#P2 VMA_ZQ3 VSS#T2 DRAM_RST_M VSS#P2
P2 T3 P10 L9 T10 T3 P10
VSS#P2 RESET VSS#P10 ZQ/ZQ0 VSS#T10 RESET VSS#P10
20,22 DRAM_RST_M T3 P10 T2 T2
RESET VSS#P10 VMA_ZQ2 VSS#T2 VMA_ZQ4 VSS#T2
T2 L9 T10 L9 T10
VMA_ZQ1 VSS#T2 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
L9
ZQ/ZQ0 VSS#T10
T10 Vendor QCI PN B/S PN A1
T1
NC VSSQ#B2
B2
B10
R248 NC VSSQ#B10
A1
NC VSSQ#B2
B2 Should be 240 A11
NC VSSQ#D2
D2 A1
NC VSSQ#B2
B2
A1
T1
NC VSSQ#B2
B2
B10 Should be 240 R253
T1
A11
NC VSSQ#B10
B10
D2
Hynix D(Vega) AKD5LZWTW02 AKD5LZWTW08 Ohms +-1% 243/F_4 T11
NC VSSQ#D9
D9
E3 Should be 240 R432
T1
A11
NC VSSQ#B10
B10
D2
R424 NC VSSQ#B10 NC VSSQ#D2 VSSQ#E3 NC VSSQ#D2
Should be 240 A11
NC VSSQ#D2
D2 Ohms +-1% 243/F_4 T11
NC VSSQ#D9
D9 J2
NC/ODT1 VSSQ#E9
E9 Ohms +-1% 243/F_4 T11
NC VSSQ#D9
D9
Ohms +-1% 243/F_4 T11
NC VSSQ#D9
D9
E3 J2
VSSQ#E3
E3
E9
Micron G die AKD5EGSTL00 AKD5LZSTL10 L2
J10
NC/CS1 VSSQ#F10
F10
G2 J2
VSSQ#E3
E3
E9
VSSQ#E3 NC/ODT1 VSSQ#E9 NC/CE1 VSSQ#G2 NC/ODT1 VSSQ#E9
J2 E9 L2 F10 L10 G10 L2 F10
NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/ZQ1 VSSQ#G10 NC/CS1 VSSQ#F10
L2
J10
NC/CS1 VSSQ#F10
F10
G2
J10
L10
NC/CE1 VSSQ#G2
G2
G10
SAMSUNG G die AKD5EGGT500 AKD5EGGT502 100-BALL
J10
L10
NC/CE1 VSSQ#G2
G2
G10
NC/CE1 VSSQ#G2 NC/ZQ1 VSSQ#G10 SDRAM DDR3 NC/ZQ1 VSSQ#G10
L10 G10
NC/ZQ1 VSSQ#G10 100-BALL H5TQ2G63DFR-11C 100-BALL
100-BALL SDRAM DDR3
Hynix B(Vega) AKD5MGWTW00 AKD5MGWTW07 SDRAM DDR3
SDRAM DDR3 H5TQ2G63DFR-11C H5TQ2G63DFR-11C
H5TQ2G63DFR-11C +1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA SAMSUNG C die AKD5MGWT500 AKD5MGWT508
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

B R434 R258 B
R257 R252 4.99K/F_4 4.99K/F_4
R426 R422 4.99K/F_4 4.99K/F_4 R431 R421
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMA3 VREFD_VMA3
VREFC_VMA2 VREFD_VMA2
VREFC_VMA1 VREFD_VMA1 VREFC_VMA4 VREFD_VMA4
R433 R261
R256 R255 4.99K/F_4 C841 4.99K/F_4 C525
R429 R423 4.99K/F_4 C512 4.99K/F_4 C507 0.1U/10V_4 0.1U/10V_4 R430 R427
4.99K/F_4 C836 4.99K/F_4 C830 0.1U/10V_4 0.1U/10V_4 4.99K/F_4 C837 4.99K/F_4 C833
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

C851 C834 C842 C835 C846 C829 C824 C839 C825 C542 C519 C505 C521 C520 C522 C504 C515 C514 C554 C510 C549 C499 C552 C551 C528 C533 C529 C862 C852 C827 C502 C845 C857 C860 C855 C826
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

C856 C850 C838 C849 C840 C853 C844 C843 C531 C547 C540 C541 C516 C536 C546 C548 C553 C550 C535 C513 C506 C526 C503 C538 C847 C858 C508 C831 C511 C544 C828 C859
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
A A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
+1.5V_VGA Custom 3A
18,20,22,44 +1.5V_VGA VRAM-A (DDR3 BGA96)
Date: Friday, November 11, 2011 Sheet 21 of 44
5 4 3 2 1
5 4 3 2 1

VMB_MA[13..0]

22
20 VMB_MA[13..0] 20 VMB_DQ[63..0]
20 VMB_DM[7..0] 20 VMB_WDQS[7..0]
20 VMB_RDQS[7..0] CHANNEL B: 256MB/512MB DDR3 U12 U24
U15
VREFC_VMB3 M9 E4 VMB_DQ63 VREFC_VMB4 M9 E4 VMB_DQ50
VREFC_VMB1 VMB_DQ4 U27 VREFD_VMB3 VREFCA DQL0 VMB_DQ57 VREFD_VMB4 VREFCA DQL0 VMB_DQ53
M9 E4 H2 F8 H2 F8
VREFD_VMB1 VREFCA DQL0 VMB_DQ0 VREFDQ DQL1 VMB_DQ61 VREFDQ DQL1 VMB_DQ49
H2 F8 F3 F3
VREFDQ DQL1 VMB_DQ6 VREFC_VMB2 VMB_DQ11 VMB_MA0 DQL2 VMB_DQ58 VMB_MA0 DQL2 VMB_DQ52
F3 M9 E4 N4 F9 N4 F9
DQL2 VMB_DQ1 VREFD_VMB2 VREFCA DQL0 VMB_DQ14 VMB_MA1 A0 DQL3 VMB_DQ62 VMB_MA1 A0 DQL3 VMB_DQ51
20 VMB_MA0 N4 F9 H2 F8 P8 H4 P8 H4
A0 DQL3 VMB_DQ5 VREFDQ DQL1 VMB_DQ9 VMB_MA2 A1 DQL4 VMB_DQ56 VMB_MA2 A1 DQL4 VMB_DQ55
20 VMB_MA1 P8 H4 F3 P4 H9 P4 H9
A1 DQL4 VMB_DQ3 VMB_MA0 DQL2 VMB_DQ12 VMB_MA3 A2 DQL5 VMB_DQ60 VMB_MA3 A2 DQL5 VMB_DQ48
20 VMB_MA2 P4 H9 N4 F9 N3 G3 N3 G3
A2 DQL5 VMB_DQ7 VMB_MA1 A0 DQL3 VMB_DQ10 VMB_MA4 A3 DQL6 VMB_DQ59 VMB_MA4 A3 DQL6 VMB_DQ54
20 VMB_MA3 N3 G3 P8 H4 P9 H8 P9 H8
A3 DQL6 VMB_DQ2 VMB_MA2 A1 DQL4 VMB_DQ15 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7
20 VMB_MA4 P9 H8 P4 H9 P3 P3
D A4 DQL7 VMB_MA3 A2 DQL5 VMB_DQ8 VMB_MA6 A5 VMB_MA6 A5 D
20 VMB_MA5 P3 N3 G3 R9 R9
A5 VMB_MA4 A3 DQL6 VMB_DQ13 VMB_MA7 A6 VMB_DQ40 VMB_MA7 A6 VMB_DQ36
20 VMB_MA6 R9 P9 H8 R3 D8 R3 D8
A6 VMB_DQ21 VMB_MA5 A4 DQL7 VMB_MA8 A7 DQU0 VMB_DQ46 VMB_MA8 A7 DQU0 VMB_DQ33
20 VMB_MA7 R3 D8 P3 T9 C4 T9 C4
A7 DQU0 VMB_DQ23 VMB_MA6 A5 VMB_MA9 A8 DQU1 VMB_DQ41 VMB_MA9 A8 DQU1 VMB_DQ38
20 VMB_MA8 T9 C4 R9 R4 C9 R4 C9
A8 DQU1 VMB_DQ17 VMB_MA7 A6 VMB_DQ31 VMB_MA10 A9 DQU2 VMB_DQ47 VMB_MA10 A9 DQU2 VMB_DQ32
20 VMB_MA9 R4 C9 R3 D8 L8 C3 L8 C3
A9 DQU2 VMB_DQ22 VMB_MA8 A7 DQU0 VMB_DQ26 VMB_MA11 A10/AP DQU3 VMB_DQ44 VMB_MA11 A10/AP DQU3 VMB_DQ39
20 VMB_MA10 L8 C3 T9 C4 R8 A8 R8 A8
A10/AP DQU3 VMB_DQ16 VMB_MA9 A8 DQU1 VMB_DQ30 VMB_MA12 A11 DQU4 VMB_DQ45 VMB_MA12 A11 DQU4 VMB_DQ35
20 VMB_MA11 R8 A8 R4 C9 N8 A3 N8 A3
A11 DQU4 VMB_DQ19 VMB_MA10 A9 DQU2 VMB_DQ27 VMB_MA13 A12/BC DQU5 VMB_DQ43 VMB_MA13 A12/BC DQU5 VMB_DQ37
20 VMB_MA12 N8 A3 L8 C3 T4 B9 T4 B9
A12/BC DQU5 VMB_DQ18 VMB_MA11 A10/AP DQU3 VMB_DQ28 A13 DQU6 VMB_DQ42 A13 DQU6 VMB_DQ34
20 VMB_MA13 T4 B9 R8 A8 T8 A4 T8 A4
A13 DQU6 VMB_DQ20 VMB_MA12 A11 DQU4 VMB_DQ24 A14 DQU7 A14 DQU7
T8 A4 N8 A3 M8 M8
A14 DQU7 VMB_MA13 A12/BC DQU5 VMB_DQ29 A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA
M8 T4 B9
A15/BA3 +1.5V_VGA A13 DQU6 VMB_DQ25
T8 A4
A14 DQU7 VMB_BA0 VMB_BA0
M8 M3 B3 M3 B3
A15/BA3 +1.5V_VGA VMB_BA1 BA0 VDD#B3 VMB_BA1 BA0 VDD#B3
20 VMB_BA0 M3 B3 N9 D10 N9 D10
BA0 VDD#B3 VMB_BA2 BA1 VDD#D10 VMB_BA2 BA1 VDD#D10
20 VMB_BA1 N9 D10 M4 G8 M4 G8
BA1 VDD#D10 VMB_BA0 BA2 VDD#G8 BA2 VDD#G8
20 VMB_BA2 M4 G8 M3 B3 K3 K3
BA2 VDD#G8 VMB_BA1 BA0 VDD#B3 VDD#K3 VDD#K3
K3 N9 D10 K9 K9
VDD#K3 VMB_BA2 BA1 VDD#D10 VDD#K9 VDD#K9
K9 M4 G8 N2 N2
VDD#K9 BA2 VDD#G8 VDD#N2 VMB_CLK1 VDD#N2
N2 K3 20 VMB_CLK1 J8 N10 J8 N10
VDD#N2 VDD#K3 CK VDD#N10 VMB_CLK1# CK VDD#N10
20 VMB_CLK0 J8 N10 K9 20 VMB_CLK1# K8 R2 K8 R2
CK VDD#N10 VDD#K9 CK VDD#R2 VMB_CKE1 CK VDD#R2
20 VMB_CLK0# K8 R2 N2 20 VMB_CKE1 K10 R10 K10 R10
CK VDD#R2 VMB_CLK0 VDD#N2 VMB_CLK0 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
20 VMB_CKE0 K10 R10 J8 N10
CKE/CKE0 VDD#R10 +1.5V_VGA VMB_CLK0# CK VDD#N10
K8 R2
VMB_CKE0 CK VDD#R2 VMB_ODT1 VMB_ODT1
K10 R10 20 VMB_ODT1 K2 A2 K2 A2
VMB_ODT0 CKE/CKE0 VDD#R10 +1.5V_VGA R205 ODT/ODT0 VDDQ#A2 VMB_CS1# ODT/ODT0 VDDQ#A2
20 VMB_ODT0 K2 A2 20 VMB_CS1# L3 A9 L3 A9
ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 VMB_RAS1# CS /CS0 VDDQ#A9
20 VMB_CS0# L3 A9 56.2/F_4 20 VMB_RAS1# J4 C2 J4 C2
CS /CS0 VDDQ#A9 VMB_ODT0 RAS VDDQ#C2 VMB_CAS1# RAS VDDQ#C2
20 VMB_RAS0# J4 C2 K2 A2 C458 20 VMB_CAS1# K4 C10 K4 C10
RAS VDDQ#C2 VMB_CS0# ODT/ODT0 VDDQ#A2 CAS VDDQ#C10 VMB_WE1# CAS VDDQ#C10
20 VMB_CAS0# K4 C10 L3 A9 20 VMB_WE1# L4 D3 L4 D3
CAS VDDQ#C10 VMB_RAS0# CS /CS0 VDDQ#A9 VMB_CLK0_COMM WE VDDQ#D3 WE VDDQ#D3
20 VMB_WE0# L4 D3 J4 C2 E10 E10
WE VDDQ#D3 VMB_CAS0# RAS VDDQ#C2 VDDQ#E10 VDDQ#E10
E10 K4 C10 F2 F2
VDDQ#E10 VMB_WE0# CAS VDDQ#C10 VMB_RDQS7 VDDQ#F2 VMB_RDQS6 VDDQ#F2
F2 L4 D3 0.01U/25V_4 F4 H3 F4 H3
VMB_RDQS0 VDDQ#F2 WE VDDQ#D3 R204 VMB_RDQS5 DQSL VDDQ#H3 VMB_RDQS4 DQSL VDDQ#H3
F4 H3 E10 C8 H10 C8 H10
C VMB_RDQS2 DQSL VDDQ#H3 VDDQ#E10 DQSU VDDQ#H10 DQSU VDDQ#H10 C
C8 H10 F2 56.2/F_4
DQSU VDDQ#H10 VMB_RDQS1 VDDQ#F2
F4 H3
VMB_RDQS3 DQSL VDDQ#H3 VMB_DM7 VMB_DM6
C8 H10 E8 A10 E8 A10
VMB_DM0 DQSU VDDQ#H10 VMB_CLK0# VMB_DM5 DML VSS#A10 VMB_DM4 DML VSS#A10
E8 A10 D4 B4 D4 B4
VMB_DM2 DML VSS#A10 VMB_CLK1 DMU VSS#B4 DMU VSS#B4
D4 B4 E2 E2
DMU VSS#B4 VMB_DM1 VSS#E2 VSS#E2
E2 E8 A10 G9 G9
VSS#E2 VMB_DM3 DML VSS#A10 VMB_WDQS7 VSS#G9 VMB_WDQS6 VSS#G9
G9 D4 B4 G4 J3 G4 J3
VMB_WDQS0 VSS#G9 DMU VSS#B4 R350 VMB_WDQS5 DQSL VSS#J3 VMB_WDQS4 DQSL VSS#J3
G4 J3 E2 B8 J9 B8 J9
VMB_WDQS2 DQSL VSS#J3 VSS#E2 DQSU VSS#J9 DQSU VSS#J9
B8 J9 G9 56.2/F_4 M2 M2
DQSU VSS#J9 VMB_WDQS1 VSS#G9 VSS#M2 VSS#M2
M2 G4 J3 C696 M10 M10
VSS#M2 VMB_WDQS3 DQSL VSS#J3 VSS#M10 VSS#M10
M10 B8 J9 P2 P2
VSS#M10 DQSU VSS#J9 VMB_CLK1_COMM VSS#P2 VSS#P2
P2 M2 20,21 DRAM_RST_M T3 P10 20,21 DRAM_RST_M T3 P10
VSS#P2 VSS#M2 RESET VSS#P10 RESET VSS#P10
20,21 DRAM_RST_M T3 P10 M10 T2 T2
RESET VSS#P10 VSS#M10 VMB_ZQ3 VSS#T2 VMB_ZQ4 VSS#T2
T2 P2 0.01U/25V_4 L9 T10 L9 T10
VMB_ZQ1 VSS#T2 VSS#P2 R351 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
L9 T10 20,21 DRAM_RST_M T3 P10
ZQ/ZQ0 VSS#T10 RESET VSS#P10
VSS#T2
T2 56.2/F_4 Should be 240 Should be 240
Should be 240 VMB_ZQ2 L9 T10 A1 B2 A1 B2
ZQ/ZQ0 VSS#T10 Ohms +-1% NC VSSQ#B2 Ohms +-1% NC VSSQ#B2
Ohms +-1% A1 B2 T1 B10 T1 B10
NC VSSQ#B2 VMB_CLK1# R177 NC VSSQ#B10 R352 NC VSSQ#B10
T1
NC VSSQ#B10
B10 Should be 240 A11
NC VSSQ#D2
D2 A11
NC VSSQ#D2
D2
R203 A11 D2 A1 B2 243/F_4 T11 D9 243/F_4 T11 D9
NC VSSQ#D2 Ohms +-1% NC VSSQ#B2 NC VSSQ#D9 NC VSSQ#D9
243/F_4 T11 D9 T1 B10 E3 E3
NC VSSQ#D9 R388 NC VSSQ#B10 VSSQ#E3 VSSQ#E3
E3 A11 D2 J2 E9 J2 E9
VSSQ#E3 NC VSSQ#D2 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
J2 E9 243/F_4 T11 D9 L2 F10 L2 F10
NC/ODT1 VSSQ#E9 NC VSSQ#D9 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
L2 F10 E3 J10 G2 J10 G2
NC/CS1 VSSQ#F10 VSSQ#E3 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
J10 G2 J2 E9 L10 G10 L10 G10
NC/CE1 VSSQ#G2 NC/ODT1 VSSQ#E9 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
L10 G10 L2 F10
NC/ZQ1 VSSQ#G10 NC/CS1 VSSQ#F10 100-BALL 100-BALL
J10 G2
100-BALL NC/CE1 VSSQ#G2 SDRAM DDR3 SDRAM DDR3
L10 G10
SDRAM DDR3 NC/ZQ1 VSSQ#G10 H5TQ2G63DFR-11C H5TQ2G63DFR-11C
H5TQ2G63DFR-11C 100-BALL
SDRAM DDR3
H5TQ2G63DFR-11C +1.5V_VGA +1.5V_VGA
B +1.5V_VGA +1.5V_VGA B
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

R175 R119
R390 R418 4.99K/F_4 4.99K/F_4
R201 R181 4.99K/F_4 4.99K/F_4 R354 R384
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMB3 VREFD_VMB3
VREFC_VMB2 VREFD_VMB2
VREFC_VMB1 VREFD_VMB1 VREFC_VMB4 VREFD_VMB4
R176 R118
R389 R419 4.99K/F_4 C317 4.99K/F_4 C172
R202 R180 4.99K/F_4 C759 4.99K/F_4 C808 0.1U/10V_4 0.1U/10V_4 R353 R386
4.99K/F_4 C457 4.99K/F_4 C358 0.1U/10V_4 0.1U/10V_4 4.99K/F_4 C697 4.99K/F_4 C740
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

C469 C363 C362 C360 C461 C359 C356 C353 C428 C446 C760 C810 C475 C817 C816 C815 C813 C811 C178 C180 C320 C315 C171 C692 C319 C440 C314 C748 C730 C742 C744 C745 C695 C292 C785 C716
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

A A
C460 C354 C361 C459 C462 C355 C312 C456 C761 C743 C762 C814 C812 C793 C774 C809 C222 C698 C318 C313 C316 C173 C175 C174 C735 C734 C724 C718 C713 C693 C694 C719
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
+1.5V_VGA Custom 3A
18,20,21,44 +1.5V_VGA VRAM-B (DDR3 BGA96)
Date: Friday, November 11, 2011 Sheet 22 of 44
5 4 3 2 1

+1.5V_VGA
18,20,21,44 +1.5V_VGA
1 2 3 4 5 6 7 8

23
LID Switch D5
BLON_CON
RB500V-40
C26

R12
22P/50V_4

100K/F_4
+TRAVIS3.3V
+3VLCD_CON

D6 *RB501V-40
R13 *0_4/S 2 1 R7 2.2K_4 EDIDCLK C14 *10P/50V_4 C6 *0.047U/10V_4
33 EMU_LID HWPG 4,33,35,36,37,40
A R8 2.2K_4 EDIDDATA C15 *10P/50V_4 A
+1.5V +3V
R15 100K/F_4 C17 *0.047U/10V_4

R16 R22 11 LVDS_BLON


LVDS_BLON R17 1K/F_4 PN_BLON RF
*2.2K_4 *10K/F_4

G_0
2

3
Q6 C13 1000P/50V_4 1
2
4 APU_BLEN 1 3 8 LCD_BK 2 +TRAVIS3.3V 3
*MMBT3904-7-F Q7 EDIDCLK
11 EDIDCLK 4
EDIDDATA
11 EDIDDATA 5
*PDTC144EV TXLOUT0-
11 TXLOUT0-

1
TXLOUT0+ 6
11 TXLOUT0+ 7
TXLOUT1- 8
11 TXLOUT1- 9
11 TXLOUT1+ TXLOUT1+
10 G_1
TXLOUT2- 11
11 TXLOUT2- 12
11 TXLOUT2+ TXLOUT2+
13
TXLCLKOUT- 14
11 TXLCLKOUT- 15
+3V R10 *0_4/S +3V_CAM C16 *4.7U/6.3V_6 11 TXLCLKOUT+ TXLCLKOUT+
16
C23 *0.01U/25V_4 TXUOUT0- 17
11 TXUOUT0- 18 G_2
11 TXUOUT0+ TXUOUT0+
19
TXUOUT1- 20
11 TXUOUT1- 21
11 DPST_PWM DPST_PWM 11 TXUOUT1+ TXUOUT1+
22
TXUOUT2- 23
B
11 TXUOUT2- 24 G_3 B
C8 33P/50V_4 11 TXUOUT2+ TXUOUT2+
25
TXUCLKOUT- 26
11 TXUCLKOUT- 27
TXUCLKOUT+
11 TXUCLKOUT+ 28
29
follow L7 Location 27
27
DIGITAL_D1
DIGITAL_CLK L6 DIGITAL_CLK_L 30
31 G_4
SBK160808T-601Y-N/0.2A_6 +3V_CAM
C31 *150P/50V_4 USBP2- R5 *0_4/S USBP2-_R L7 1 USBP2-_R 32
+3V 6 USBP2- 2 33
C5 C18 4 3 USBP2+_R
C24 *150P/50V_4 USBP2+ R6 *0_4/S USBP2+_R EMI *10P/50V_4
6
*10P/50V_4
USBP2+ 34
35
*WCM-2012-900T(400mA) DPST_PWM
C30 *150P/50V_4 BLON_CON 36
37
L5 +VIN_BLIGHT 38
+VIN 39
EMI 40

G_5
FBM2125 HM330-T/4A_8
EMI & RF C10 C9 CN5
0.01U/25V_4 0.1U/25V_4 GS12407-11141-9H-40P-R

+VIN

BLON_CON C971 *220P/50V_4

C19 C22
Coupling CAP. *4.7U/25V_8 0.1U/25V_4
SI , EMI reserve for debug
+VIN +VIN

C C108 *0.1U/25V_4 C

C38 *0.1U/25V_4 C488 *0.1U/25V_4

C39 *0.1U/25V_4 C527 *0.1U/25V_4

C32 220P/50V_4 SI , change to 0603 size


+3V +3VLCD
due to old part EOL
C58 *0.1U/25V_4
+3VLCD_CON
C51 *0.1U/25V_4
C7 U5
C55 *0.1U/25V_4 C560 *0.1U/25V_4 L11
1U/6.3V_4 5 1 TI160808U600_6
C49 *0.1U/25V_4 C645 *0.1U/25V_4 IN OUT

1
11 DISP_ON R11 0_4 4 2
C662 *0.1U/25V_4 C646 *0.1U/25V_4 IN GND C34 C33 C25
DISP_ON_L 3 0.01U/25V_4 0.1U/10V_4 10U/6.3V_8

2
C664 *0.1U/25V_4 ON/OFF
+1.5V +3V
IC(5P) G5243AT11U
R18 R9 R14
EMI suggestion *2.2K_4 *10K/F_4 100K/F_4
2

Q5
4 APU_DIGON 1 3
*MMBT3904-7-F

D D

PROJECT : R53
Quanta Computer Inc.
4,7,30,33,34,35 +3VPCU
2,4,6,8,9,10,11,12,13,14,18,24,25,26,27,28,29,30,31,32,33,41,42,44 +3V
9,34,41,44 +12VALW Size Document Number Rev
Custom 1A
34,35,36,37,39,40,41,42,44 +VIN LCD CONN/LID/CAM
Date: Friday, November 11, 2011 Sheet 23 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CRT PORT

SI , change to 68 Ω for
24
Rise/Fall time issue
+5V_FUSE

16
6
A CRT_R_1 CRT_R_1 L10 BK1608LL680(0.2A,68) CRT_R1 1 11 A
8 FCH_CRT_RED
CRT_G_1 7
8 FCH_CRT_GRE CRT_B_1 CRT_G_1 CRT_G1 CRTDDCDAT2
L9 BK1608LL680(0.2A,68) 2 12 C20 *470P/50V_4
8 FCH_CRT_BLU
HSYNC_COM_1 8
8 FCH_CRT_HSYNC
VSYNC_COM_1 CRT_B_1 L8 BK1608LL680(0.2A,68) CRT_B1 3 13 CRTHSYNC C11 10P/50V_4
8 FCH_CRT_VSYNC DDCCLK_1
8 FCH_DDCCLK 9
DDCDATA_1 4 14 CRTVSYNC C12 10P/50V_4
8 FCH_DDCDAT
R21 R20 R19 10
C37 C36 C35 C29 C27 C28 5 15 CRTDDCCLK2 C21 *470P/50V_4

150/F_4 150/F_4 150/F_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4

17
CRT CONN
EMI CN14

+3V
EMI
+5V U6
+5V +5V_CRT2 1 16 CRT_VSYNC1 R31 22_4 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRT_HSYNC1 R26 22_4 CRTHSYNC
SYNC_OUT1 14
C43 7 R30 R25
B 0.1U/10V_4 C40 0.22U/10V_4 CRT_BYP VCC_DDC 2.7K_4 B
8 BYP 2.7K_4
15 VSYNC_COM_1
SYNC_IN2 HSYNC_COM_1
+3V 2 VCC_VIDEO SYNC_IN1 13

CRT_R1 3 10 DDCCLK_1
CRT_G1 VIDEO_1 DDC_IN1 DDCDATA_1
4 VIDEO_2 DDC_IN2 11
CRT_B1 5 VIDEO_3 CRTDDCCLK2 R35 2.2K_4
DDC_OUT1 9
6 12 CRTDDCDAT2 R36 2.2K_4 +5V_CRT2 1 2 +5V_FUSE
GND DDC_OUT2 D7 RB501V-40
IP4772

C HOLE C

SI2 , update footprint


FCH NUT VGA BKT

H21 H20 H13 H12 H9


H15 H18 H10 H6 H14 H5 H7 H-TC354BC217I197D157P2 H-TC354BC217I197D157P2 *H-TC248BC197D150P2 *H-TC248BC197D150P2 *H-TC248BC197D150P2
*H-C354I150D110P2 *H-C354I150D110P2 *H-O472X354I272X150D232X110P2 *h-c354i150d110p2 *H-C354I150D110P2 *H-C354I150D110P2 *H-C354I150D110P2

1
1

H8 H16 H17 H22 H19


*H-C236I150D110P2 *H-C276I150D110P2 *H-C197D110P2 *SPAD-CXX-1 *h-c354d354n PAD2
*EMIPAD
APU BKT
H11 *intel-cpu-bkt2
1
1

D 4 D
3
1

SI , add for EMI

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CRT,Hole
Date: Friday, November 11, 2011 Sheet 24 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

HDMI PORT
SI,add for EMI issue
25
EMI
Check list recommend 715 ohm
C_TX2_HDMI+ R375 100/F_4 C_TX2_HDMI-
A R376 715/F_4 C_TX2_HDMI+ C_TX1_HDMI+ R370 100/F_4 C_TX1_HDMI- A
C_TX0_HDMI+ R380 100/F_4 C_TX0_HDMI-
R373 715/F_4 C_TX2_HDMI- C_TXC_HDMI+ R366 100/F_4 C_TXC_HDMI-
+5V

3
R371 715/F_4 C_TX1_HDMI+
Q32
ME2N7002E R369 715/F_4 C_TX1_HDMI- CN19
2 SHELL1 20
R379 715/F_4 C_TX0_HDMI+ C_TX2_HDMI+ 1 21
4 C_TX2_HDMI+ D2+ SHELL2
C_TX2_HDMI- 3 22
4 C_TX2_HDMI- D2- SHELL3
R381 715/F_4 C_TX0_HDMI- C_TX1_HDMI+ 4 23
4 C_TX1_HDMI+ D1+ SHELL4
C_TX1_HDMI- 6

1
C_TXC_HDMI+ +5V_FUSE 4 C_TX1_HDMI- C_TX0_HDMI+ D1-
R359 R367 715/F_4 7
4 C_TX0_HDMI+ D0+
C_TX0_HDMI- 9
4 C_TX0_HDMI- D0-
R364 715/F_4 C_TXC_HDMI- 2
100K/F_4 D2 Shield
D1 Shield 5
8
Close to HDMI Connector C704
*0.1U/10V_4
C703
0.1U/10V_4
4 C_TXC_HDMI+
C_TXC_HDMI+
C_TXC_HDMI-
10
12
CK+
D0 Shield
CK Shield 11
17
4 C_TXC_HDMI- CK- GND

EMI
*10P/50V_4 C686 HDMI_SCLK 15 13
*10P/50V_4 C688 HDMI_SDATA DDC CLK CE Remote
16 DDC DATA NC 14
+5V_FUSE
1A
+5V F5 2 1 FUSE1.1A6V_POLY 18 +5V
C705 *0.1U/10V_4
B B
Cost down backup solution HDMI_DET HDMI_HPD_L 19
of HDMI DDC Level Shift L19 0_6 HP DET
+5V_FUSE
HDMI CONN
C191 VC5 DFHD19MR191
220P/50V_4 *AVLC5S_4 hdmi-2he1608-000111f-19p-ldv
+3V +3V 2

2
D17 D16
RB501V-40 RB501V-40
1

R358 R357 1
4.7K_4 4.7K_4 +3V
R349 R347
2

2K/F_4 2K/F_4 +5V

4 INT_HDMI_AUXN 1 3 HDMI_SDATA HDMI HPD SENSE R164


1K/F_4
R160
Q16 100K/F_4
HDMI_HPD_Q
4 HDMI_HPD_Q
2

ME2N7002E

1 3 HDMI_SCLK Q49B
4 INT_HDMI_AUXP

6
2
Q15

1
C ME2N7002E 2N7002KDW Q49A C

3
Dual HDMI_DET_R R137 200K/F_4 HDMI_DET
5

4
2N7002KDW
R132
Dual 200K/F_4
2KV ESD protection

SI , Q33,Q34 change to dual type MOS Q49

D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
HDMI CONN
Date: Friday, November 11, 2011 Sheet 25 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

26
SI , add R537 PU to
D
fix CR can't write issue D
CARD_PCIE_RST#
7 CARD_PCIE_RST#

CLK_PCIE_REQ2#_R
SI , EMI reserve for debug

CARD_PCIE_RST#
PCIE_CARD_CLKREQ# R535 *0_4/S CLK_PCIE_REQ2#_R
6 PCIE_CARD_CLKREQ#
R537 10K/F_4 +3V
C980 *2200P/50V_4

SD_CD#
+5V

SD_WP
+1.1V C981 2200P/50V_4

C982 *2200P/50V_4

24
23
22
21
20
19
U37
SI , PCIE port change

CLKREQ#
PERST#
MS_INS#
SD_CD#
SD_WP
GPIO
from port 2 to port 0
Close to chip pin SI,add C981 for EMI issue
1 18 SD_D2_R R526 0_4 SD_D2 C938 *5.6P/16V_4
7 PCIE_TXP0_CARD HSIP SP6
2 17 SD_D3_R R523 0_4 SD_D3 C940 *5.6P/16V_4
7 PCIE_TXN0_CARD HSIN SP5
3 16 SD_CMD_RR524 0_4 SD_CMD
7 CLK_PCIE_CARD_P
4
REFCLKP RTS5229 SP4
15 DV33_18
7 CLK_PCIE_CARD_N REFCLKN DV33_18
C961 0.1U/10V_4 PCIE_RXP0_CARD_C 5 14 SD_CLK_R R525 22_4 SD_CLK C930 10P/50V_4
7 PCIE_RXP0_CARD HSOP SP3
C962 0.1U/10V_4 PCIE_RXN0_CARD_C 6 13 SD_D0_R R521 0_4 SD_D0 C927 *5.6P/16V_4
7 PCIE_RXN0_CARD HSON SP2

CARD_3V3
DV12_S
3V3_IN
RREF
AV12

SP1
25 GND

DV33_18
C C
Close to chip pin

AV12 7
8
9
10
11
12
RREF

DV12_S
SD_D1_R R522 0_4 SD_D1 C928 *5.6P/16V_4
+3V
C959 C960 R536
+3V C941
4.7U/6.3V_6 1U/10V_4
0.1U/10V_4 6.2K/F_4 C953 C956
C943 C950
0.1U/10V_4 4.7U/6.3V_6
10U/6.3V_8 0.1U/10V_4

+3VCARD

B B

SD / MMC
CARD READER +3VCARD
CLOSE CONN
CN12

SD_D2 1
DAT2
C652

C650

C647

SD_D3 2
SD_CMD DAT3
3
SD_CD# CMD
4
C/D
5
VSS1
0.1U/10V_4

*0.1U/10V_4

4.7U/6.3V_6

+3VCARD 6
SD_CLK VDD
7
CLK
8
SD_D0 VSS2
9
SD_D1 DAT0
10
SD_WP DAT1
11
W/P
12
GND
13
GND
14
A GND A
15 GND
CS1S-318-H-N

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RTS5219 & CR SOCKET &HOLE
Date: Monday, November 14, 2011 Sheet 26 of 44
5 4 3 2 1
A B C D E

2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,28,29,30,31,32,33,41,42,44

8,18,24,25,26,30,31,32,41
+3V

+5V
+5V_AVDD L73 +4.75VAVDD
+4.75VAVDD
27 +5V
SI2 , reserve for EMI debug
Close to CODEC >40mils trace *0_6/S U36
5 1
Close to CODEC Vout Vin
4 BYP
C920 C911 C936 C935 C931 C934 C932 C933
+3V_DVDD_CORE 1U/6.3V_4 0.1U/10V_4 1U/6.3V_4 0.1U/10V_4 10U/6.3VS_6 2 3 0.1U/10V_4 0.047U/10V_4 1U/6.3V_4
C947 GND EN
+3V
1U/6.3V_4 TPS793475
C983 C939
C942 C949 *1000P/50V_4 10U/6.3VS_6 AGND AGND
1U/6.3V_4 0.1U/10V_4 U35 AGND AGND AGND R534 10K_4 +5V
+5V
Vset=1.242V
1 DVDD_LV AVDD 21
AVDD 32
Close to CODEC >40mils trace
7 DVDD
PVDD 33
PVDD 39

Digital
6 BIT_CLK_AUDIO R530 *0_4/S HD_BCLK 5 11 SENSE_A C921 C926 C925
HDA_BITCLK SENSE_A SENSE_A 28
1U/6.3V_4 0.1U/10V_4 10U/6.3VS_6 SENSE_A R518 2.49K/F_4 +5V_AVDD
R531 33_4 HD_SDIN0 6 12 SENSE_B
6 ACZ_SDIN0 HDA_SDI SENSE_B
AGND
R529 *0_4/S HD_SDOUT SI, add Mute LED feature C924 1000P/50V_4
HDA Bus 6 ACZ_SDOUT_AUDIO
C944 *10P/50V_4
4 HDA_SDO
HP0_PORT_A_L 22
R532 *0_4/S HD_SYNC 8 23 AGND SENSE_B R517 100K/F_4
6 ACZ_SYNC_AUDIO
C945 *10P/50V_4 HDA_SYNC HP0_PORT_A_R
VREFOUT_A_or_F 19 MUTE_LED_CNTL
MUTE_LED_CNTL 30
Close to CODEC +5V_AVDD

6 ACZ_RST#_AUDIO 9 HDA_RST# AGND


AGND SHIELD C919 *1000P/50V_4
C948 10P/50V_4 25 HPOUT_L
HP1_PORT_B_L HPOUT_L 28
AGND SHIELD TO Headphone
TO Digital 23 DIGITAL_CLK R527 100/F_4 DMIC_CLK_R 2 26 HPOUT_R
DMIC_CLK/GPIO1 HP1_PORT_B_R HPOUT_R 28 jack
23 DIGITAL_D1 R528 *0_4/S DMIC0 3 AGND SHIELD EMI
MIC DMIC0/GPIO2
C954 10P/50V_4 15 MIC_L
PORT_C_L MIC_L 28
16 MIC_R TO Audio Jack
PORT_C_R MIC_R 28
20 VREFOUT_C
VREFOUT_C VREFOUT_C 28 MIC
+3V R520 10K_4 34 L_SPK+ SI , add for EMI issue
PORT_D_L+ L_SPK- +5V_AVDD
PORT_D_L- 35
33 VOLMUTE# ADC_EAPD# 40 TO Internal
EAPD R_SPK+
38
D23 RB501V-40 PORT_D_R+
37 R_SPK- Speakers
PORT_D_R- C975 2200P/50V_4
+1.1VS5
C10625 close C10629, and C10625 R513
CAP- 13 10K_4 C976 2200P/50V_4
Close to CODEC 29 CAP-
PORT_F_L
PORT_F_R 14
close Chip +5V
1

C910 C912 C908


4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 C967 0.1u/10V_4
30 10 AMP_BEEP AMP_BEEP_L R512 AMP_BEEP_R2
100K/F_4
Analog
2

CAP+ CAP+ PC_BEEP C966 0.1u/10V_4

3
24 AVSS CAP2 18
1 27 C964 0.1u/10V_4 1
AVSS R507
36 AVSS VREFFILT 17
C903 10K_4 2 ACZ_SPKR 6 C965 0.1u/10V_4
28 0.01U/25V_4
V- 2N7002
41 31 Q44
DAP VREG 6/17

1
R10453 close R10454 C951 0.1u/10V_4
+3V Check SB side and 92HD87
AGND AGND
vendor reply it AGND
should reserve only
R533 AGND
4.7K_4
Check layout
mount location SI , EMI change to 0.1u
ACZ_RST#_AUDIO
R320 *0_8/S

C946
0.01U/25V_4

ADC_CAP2
AGND

ADC_VREFFILT
ADC_VREG

ADC_V-

EMI Request INT. SPEAKER +5V +5VS5


INT SPEAKER CONN
L_SPK+ L16 SBK160808T-221Y-N/0.2A_6 L_SPK+_R
L_SPK- L15 SBK160808T-221Y-N/0.2A_6 L_SPK-_R 1
R_SPK- L14 SBK160808T-221Y-N/0.2A_6 R_SPK-_R 2 C972 C977
R_SPK+ L13 SBK160808T-221Y-N/0.2A_6 R_SPK+_R 3
4
1

C909 C907 C917 C918


C93 220P/50V_4 CN8 2200P/50V_4 2200P/50V_4
4.7U/6.3V_6 10U/6.3V_8 10U/6.3VS_6 1U/6.3V_4 DFHD04MR142
2

BIT_CLK_AUDIO ACZ_SDIN0 C100 220P/50V_4 3800-X04N-00X-4P-L

C106 220P/50V_4
AGND AGND AGND AGND
C109 220P/50V_4
C957 C958 SI , add for EMI debug
33P/50V_4 33P/50V_4
Close to CODEC
FOR EMI

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Azalia 92HD80
Date: Friday, November 11, 2011 Sheet 27 of 44
A B C D E
1 2 3 4 5 6 7 8

USBP11-_C C489 *ADUC10S020R5


EMI USB 3.0 USB3.0 X 2/USB2.0 COMBO
28
1 2
SI,add choke remove
C823
R for EMI issue
R230 *0_4 1A 1000P/50V_4 CN21
USB3.0 CONN
USB30_TX1-_C C486 *ADUC10S020R5 L35 +5V_USBP0 1
1 2 1 VBUS
4 3 USBP11-_C 2
6 USBP11- 2 D-
USBP11+_C C494 *ADUC10S020R5 1 2 USBP11+_C 3 100 mils (Iout=2.5A)
1 2 6 USBP11+ 3 D+
4 4
WCM2012-90 USB30_RX1-_C GND +5VS5 +5V_USBP0
5 5 SSRX- U32
R236 *0_4 USB30_RX1+_C 6
USB30_TX1+_C C474 *ADUC10S020R5 6 SSRX+ +5V_USBP0 C869 470P/50V_4
A 1 2 7 7 2 VIN1 OUT3 8 A
R249 0_4 USB30_TX1-_C GND C871 0.1U/10V_4
8 8 3 VIN2 OUT2 7
USB30_RX1-_C C500 *ADUC10S020R5 USB30_TX1+_C SSTX- C868 470P/50V_4
1 2 9 9 SSTX+ 33 USBPW_ON# 4 EN OUT1 6
*WCM2012-90 1 5 C870 0.1U/10V_4

13
12
11
10
C883 GND OC
6 USB30_RX1- 1 2
1U/6.3V_4 G547N2P81U C854 100U/25V

+
6 USB30_RX1+ 4 3

13
12
11
10
L37
USB30_RX1+_C C497 *ADUC10S020R5 R247 0_4
1 2
R221 0_4

*WCM2012-90
C482 0.1U/10V_4 USB30_TX1-_R 1 2
6
6
USB30_TX1-
USB30_TX1+
C478 0.1U/10V_4 USB30_TX1+_R 4
L33
3 9/14 SI for HW
USBP0- R34 *0_4 USBP0-_R
Right SIDE USBX1
R220 0_4
USBP0+ R32 *0_4 USBP0+_R

USBP12-_C C545 *ADUC10S020R5


SI,add choke remove
R for EMI issue
EMI USB 3.0 +5VS5
1 2 C848
R268 *0_4 1A 1000P/50V_4 CN22 C59 0.1U/10V_4
USB3.0 CONN
USB30_TX2-_C C543 *ADUC10S020R5 L41 +5V_USBP0 1
1 2 1 VBUS
4 3 USBP12-_C 2
6 USBP12- 2 D-
USBP12+_C C557 *ADUC10S020R5 1 2 USBP12+_C 3
1 2 6 USBP12+ 3 D+ 1
4 4 2
WCM2012-90 USB30_RX2-_C GND USBPW_ON#
5 5 SSRX- 3
R269 *0_4 USB30_RX2+_C 6 2 1 USBP0-_R
6 SSRX+ 6 USBP0- 4
B USB30_TX2+_C C532 *ADUC10S020R5 7 3 4 USBP0+_R B
1 2 7 GND 6 USBP0+ 5
R271 0_4 USB30_TX2-_C 8
USB30_RX2-_C C561 *ADUC10S020R5 USB30_TX2+_C 8 SSTX- L12 WCM2012-90 6
1 2 9 9 SSTX+ 7
*WCM2012-90

13
12
11
10
8 SATA_LED# 8
1 2 SATA_LED#
6 USB30_RX2- 33 PWRLED_RIGHT 9
4 3 C48 1000P/50V_4 +3V
6 USB30_RX2+

13
12
11
10
PWRLED_RIGHT 10
L42 C47 1000P/50V_4 11
8 ACC_LED# 12
USB30_RX2+_C C559 *ADUC10S020R5 R270 0_4
1 2 CN6
R267 0_4 EMI request USB BOARD

*WCM2012-90
C539 0.1U/10V_4 USB30_TX2-_R 1 2
6 USB30_TX2-
C534 0.1U/10V_4 USB30_TX2+_R 4 3
6 USB30_TX2+
USBPW_ON# C56 220P/50V_4 EMI request
L40
R266 0_4

Line out
CN24 HP-JACK-BLACK
AGND SHIELD BLM18BD601SN1D 3
HPOUT_L R310 16/F_4 HPOUT_L1 L51 HPOUT_L2 1
27 HPOUT_L
AGND SHIELD BLM18BD601SN1D 4
27 HPOUT_R HPOUT_R R302 16/F_4 HPOUT_R1 L46 HPOUT_R2 2
C
AGND SHIELD 5 C
6
R299 *20K/F_4

R308 *20K/F_4 Normal Open


C619 VC11 VC10 C592
VC9 *AVLC5S_4 C602 1000P/50V_4 0.1U/10V_4 *AVLC5S_4 *AVLC5S_4 0.1U/10V_4 SENSE_PHONE
AGND
AGND C636 1000P/50V_4

SENSE_PHONE R285 20K/F_4 SENSE_A AGND


SENSE_A 27

SENSE_MIC R273 10K/F_4 SENSE_A


VREFOUT_C
C564

R279
1U/6.3V_4

3.9K/F_4
AGND MIC
27 VREFOUT_C
R278 3.9K/F_4 CN23 HP-JACK-BLACK
VC6 *AVLC5S_4 BLM18BD601SN1D 3
AGND MIC_L C578 2.2U/6.3V_6 MIC_L1 L44 MIC_IN_L 1
27 MIC_L
BLM18BD601SN1D 4
27 MIC_R MIC_R C565 2.2U/6.3V_6 MIC_R1 L43 MIC_IN_R 2
5
6
C562 220P/50V_4
VC7 VC8
AGND C571 220P/50V_4 *AVLC5S_4 *AVLC5S_4 Normal Open
COMPONENT CHOICES:
The selection of ferrite beads can have a large effect on
D THD+N, causing failures versus the WLP requirements. AGND D

At this time, IDT has verified three ferrite beads that will SENSE_MIC
meet the WLP performance requirements:
Murata: BLM18BD601SN1
TDK: MMZ1608Y601BTA PROJECT : R53
Taiyo Yuden: LF BK 1608HM601-T
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
USB/BT/Audio JacK
Date: Monday, November 14, 2011 Sheet 28 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

For EMI 0 ~ 22 ohm

R72
+3VLANVCC
+3V_LAN
29
LAN_XTAL1 10_4 XTAL1
C127 C134 C131 C148 +1.05V_LAN

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4


Y5

D 1 2 XTAL2 R71 2.49K/F_4 LANRSET LAN_TX# D


+3V_LAN

XTAL2
XTAL1
+3V_LAN LAN_GPIOS R73 1K/F_4
25MHz
LAN_GLINK100#
C130 C129 GND VIA x 9 Pcs
33P/50V_4 33P/50V_4

49

48
47
46
45
44
43
42
41
40
39
38
37
U10

DVDD10(NC)
AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33

LED0
DVDD33
RSET

GPO/SMBALERT
LED1/EESK
GND
MDI0+ 1 36
MDI0- MDIP0 REGOUT
2 MDIN0 VDDREG 35
3 AVDD10 VDDREG 34
MDI1+ 4 33
MDI1- MDIP1 ENSW REG LAN_GLINK10# R82 10K/F_4
5 MDIN1 EEDI 32
6 AVDD10(NC) LED3/EEDO 31
7 RTL8105E 30 LAN_ECS_SCL R80 10K/F_4
MDIP2(NC) EECS
8 MDIN2(NC) DVDD10 29 +1.05V_LAN
9 28 PCIE_WAKE#
AVDD10(NC) LANW AKEB PCIE_WAKE# 6,32
10 MDIP3(NC) DVDD33 27 +3V_LAN
11 26 ISOLATEB
MDIN3(NC) ISOLATEB LAN_PCIE_RST#

SMBDATA(NC)
12 AVDD33(NC) PERSTB 25 LAN_PCIE_RST# 7,11

SMBCLK(NC)

REFCLK_N
REFCLK_P
CLKREQB
DVDD10

EVDD10

HSON
HSOP
HSIN
HSIP

GND
C C
U9 +3V if ISOLATEB pin
pull-low,the LAN

13
14
15
16
17
18
19
20
21
22
23
24
LAN_MX0+ 1 16 MDI0+ chip will not drive
TD+ TX+
LAN_MX0- V_DAC2 it's PCI-E outputs
3 TD- CMT 15 +1.05V_LAN ( excluding

LAN_CLKRQ
75_4 R47 C89 LAN_MCT1 2 14 MDI0- R104 PCIE_WAKE# pin )
0.01U/100V_0603 CT TX-
1K_4
LAN_MX1+ 6 9 MDI1- PCIE_RXN1_LAN_L C161 0.1U/10V_4
RD+ RX- PCIE_RXN1_LAN 7
LAN_MX1- 8 10 V_DAC1 PCIE_LAN_CLKREQ#R107 *0_4/S PCIE_RXP1_LAN_L C160 0.1U/10V_4 ISOLATEB
RD- CT 6 PCIE_LAN_CLKREQ# PCIE_RXP1_LAN 7
75_4 R48 C90 LAN_MCT0 7 11 MDI1+ PCIE_TXP1_LAN
CT RX+ 7 PCIE_TXP1_LAN

2
0.01U/100V_0603 PCIE_TXN1_LAN
7 PCIE_TXN1_LAN +1.05V_LAN
R94
C64 C95 CLK_PCIE_LANP
NS681684 7 CLK_PCIE_LANP
0.01U/25V_4 CLK_PCIE_LANN 15K/F_4
10P/3KV_1808 7 CLK_PCIE_LANN

1
LAN_GLINK100# LAN_GLED#

LAN_TX# LAN_YLED#
Link

IND SMD 4.7UH +-20% 680MA(CBC2518T4R7M) C764 C789


B CV-4707MZ00 *1000P/50V_4 *1000P/50V_4 RJ45 B

Power trace Layout 寬 寬 > 60mil +1.05V_LAN +3V_LAN R405 330_4 C791 1000P/50V_4
CN20
LAN_YLED
>60mil LAN_YLED#
11
12
LED_AMBER_P
LED_AMBER_N

8 RX1-
7 RX1+
LAN_MX1- 6
C159 C149 C132 C145 RX0-
5 TX1-
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 4
C112 LAN_MX1+ TX1+
3 RX0+
1U/6.3V_4 LAN_MX0- 2 14 C797 180P/50V_4
+1.05V_LAN LAN_MX0+ TX0- GND1
1 TX0+
13 C757 180P/50V_4
GND
+3V_LAN R391 330_4 LAN_GLED 9
LAN_GLED# LED_W HITE_P
10 LED_W HITE_N

C146 C155 C125 C115


0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 RJ45_CONN
C779
180P/50V_4

C758 1000P/50V_4
A A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom RTL 8105E/RJ45 1A

Date: Monday, November 14, 2011 Sheet 29 of 44


5 4 3 2 1
1 2 3 4 5 6 7 8

POWER BOTTON CONNECT MY5


MY6
MY3
MY7
C141
C166
C170
C154
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
33

33
MY[0..17]

MX[0..7]
MY[0..17]

MX[0..7]
KEYBOARD Con.
MX1
MX7
MX6
CN9

1
2
1
2
30
3 3
MY9 4
MY8 C162 220P/50V_4 MX4 4
5 5
MY9 C124 220P/50V_4 MX5 6
MY10 C211 220P/50V_4 MY0 6
7 7
MY11 C201 220P/50V_4 MX2 8
MX3 8
9 9
A SI , mount for EMI MY5 10 A
MY1 10
SI , reserve for Lid 11 11
+3VPCU noise MY1 C143 220P/50V_4 MX0 12
MY2 C147 220P/50V_4 MY2 12
13 13
MY4 C150 220P/50V_4 MY4 14
MY0 C136 220P/50V_4 MY7 14
15 15
C963 *4.7U/6.3V_6 MY8
100mA CN7 1. +3VPCU(LIDSWITCH PWR) MX4 C128 220P/50V_4 MY6
16
17
16
C122 1U/6.3V_4 PWR BTN CONN MX6 C116 220P/50V_4 MY3 17
18 18
2. +3VPCU(LIDSWITCH PWR) MX3 C139 220P/50V_4 MY12 19
C121 0.1U/10V_4 MX2 C138 220P/50V_4 MY13 19
20 20
3. LIDSWITCH MY14 21
+3VPCU 1 21
MY11 22
2 MX7 C113 220P/50V_4 MY10 22
33 LID_EC# 3 4.POWERON# MX0 MY15
23 23
C144 220P/50V_4 +3V 24
33 NBSWON1# PWR_LED# 4 MX5 MY16 24
5. PWRLED# C133 220P/50V_4 33 CAPSLED# 25
33 PWR_LED# 5 25
MX1 C110 220P/50V_4 SI2 , for mute LED issue MY17 26
6 26
6. GND MY12
+3V
CAPSLED#_R
27 27
C182 220P/50V_4 R152 2 1 200/F_6 28
MY13 C187 220P/50V_4 R153 2 MUTE_LED_CNTL_R 28
SI , contact to +3VPCU 1 200/F_6 29 29
MY14 C196 220P/50V_4 R541 WIRELESS_ON_R 30 30

3
MY15 C219 220P/50V_4 10K/F_4 WIRELESS_OFF_R 31
MY16 C235 220P/50V_4 31
+3V 32 32
PWR_LED# MY17 C244 220P/50V_4
C117 0.1U/10V_4 27 MUTE_LED_CNTL 2
LID_EC# Q47
C119 0.1U/10V_4 2N7002 KB CONN
SI , delete C120 for QB button drop
C984 R392

1
NBSWON1# SI2 , reserve for EMI *220P/50V_4 *10K/F_4
B C118 0.1U/10V_4
SI , delete G5 for space save +5V +5V
KEYBOARD PULL-UP B

RP6
10 1 MY14
+3VPCU
R159 SI, add Mute LED feature R161 MY13 9 2 MY11
1K/F_4 1K/F_4 MY12 8 3 MY10
MY3 7 4 MY15
MY6 6 5

R158 2 1 *200/F_6 R163 2 1 *200/F_6 +3VPCU *10P8R-8.2K

WIRELESS_ON_R WIRELESS_OFF_R RP5


10 1 MY2

3
MY1 9 2 MY4
MY5 8 3 MY7
2 2 MY0 7 4 MY8
33 WIRELESS_ON 33 WIRELESS_OFF
MY9 6 5
Q17 Q18
PDTC144EU PDTC144EU +3VPCU *10P8R-8.2K

1
R142 *8.2K_4 MY16
R148 *8.2K_4 MY17

TOUCH PAD Con.


C C

+5VS5

TP_LED# C970 *220P/50V_4


Q64A *2N7002KDW
SMB_ACC_DAT C968 *220P/50V_4 C973 *220P/50V_4
change to +3VSUS SMB_ACC_CLK
Dual
4 3 SCL1 6
SMB_ACC_CLK C969 *220P/50V_4 C974 *220P/50V_4 close conn
C978 *2200P/50V_4 R254 4.7K_4 TPCLK
+3VSUS

5
R251 4.7K_4 TPDATA
+3VSUS

2
SI , EMI reserve for debug CN11
TP_LED# SMB_ACC_DAT 1 6
33 TPLED# 8 SDA1 6
C509 10P/50V_4 Dual
7
L39 BLM18BA470SN1D/0.3A_6 TPCLK-1 6 Q64B *2N7002KDW
33 TPCLK 5
L38 BLM18BA470SN1D/0.3A_6 TPDATA-1
33 TPDATA 4
C501 10P/50V_4
SMB_ACC_DAT 3
25 mils SMB_ACC_CLK 2
1
SI2 , HP request Image sensor
SMBUS reserve to FCH
+3VSUS C492 0.1U/10V_4 TOUCH PAD CONN
DFFC08FR026
50503-0080n-001-8p-l
Q51A 2N7002KDW
D D
4,7,33,34,35 +3VPCU Dual SMB_ACC_CLK
8,18,24,25,26,27,31,32,41 +5V 15 GPUT_CLK 4 3 SMB_ACC_CLK 33
32,41 +3VSUS
2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,31,32,33,41,42,44 +3V R263 4.7K_4
5

+3V_VGA +3VSUS
PROJECT : R53
2

R262 4.7K_4 SMB_ACC_DAT 33


1 6 SMB_ACC_DAT
Quanta Computer Inc.
15 GPUT_DATA
Dual Size Document Number Rev
SI , Q21,Q22 change to dual type MOS Q51 Q51B 2N7002KDW 2KV ESD protection Custom 1A
KB/SW/TP
Date: Friday, November 11, 2011 Sheet 30 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CPU FAN
+5V
SATA HDD CONNECTOR
31
C667 C668
CN25 Bypass CAP close conn
*2.2U/6.3V_6 0.1U/10V_4
1 1
A 2 SATA_TXP0_C C955 0.01U/25V_4 A
3 SATA_TXN0_C C952 0.01U/25V_4 SATA_TXP0 8
4 SATA_TXN0 8
5 SATA_RXN0_C C937 0.01U/25V_4
+5V CN17 6 SATA_RXP0_C C929 0.01U/25V_4 SATA_RXN0 8
7 SATA_RXP0 8

15 5 8
33 FAN_PWM 2 9 +3V +5V

Main HDD
3 10
46 6 11
12
FAN Connect 13 +5V
+3V 14
15

R356
DFHD04MR155 16
17
4.7K/F_4 18 C894 C906 C913 C902
19 10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8
19
FAN1SIG
33 FAN1SIG

C701 SATA HDD(1ST)


*0.1U/10V_4 DFHS13FS022
sata-ah534-00-13p-r

B B

SATA ODD CONNECTOR SATA ODD


+5V

CN13

1 1
SATA_TXP1_C C651 0.01U/25V_4
2
3 SATA_TXN1_C C653 0.01U/25V_4 SATA_TXP1 8 Reserve for AMD
4 SATA_TXN1 8
5 SATA_RXN1_C C654 0.01U/25V_4
6 SATA_RXP1_C C655 0.01U/25V_4 SATA_RXN1 8 C923
7 SATA_RXP1 8 R515 Q45
C 8 ZERO_ODD_DP# 1 3 1M/F_4 1000P/50V_4 C
ODD_PLUGIN# 6

1
DMP2130L-7
9
10
+5V_ODD
Q27
High : ODD power on
11 ZERO_ODD_DA# R321
*10K/F_4
2 *ME2N7002E Low : ODD power down R516 10K/F_4
R519
12 2 *0_8
13
14 8 ODD_PWR R318 *0_4/S
15 +3V

1
16 Q63A C922

3
17 R322 33 ODD_PD R319 *0_4 5
18 *10K/F_4 .027U/25V_6 +5V_ODD

2
2

19 2N7002DW-7-F

4
19
1 6 ODD_DA#_FCH 6 Dual
Q63B 2N7002DW-7-F
SATA ODD
Dual
DFHS13FS022
sata-ah534-00-13p-r SI , Q28,Q43 change to dual type MOS Q63
+5V_ODD

120 mils

C657 C658 C659 C660 C656


10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
HDD/ODD/FAN
Date: Friday, November 11, 2011 Sheet 31 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Mini PCI-E Card 1


6 BT_COMBO_OFF#
D13 RB501V-40
WLAN
+3V

C665 C670
+1.5V

C687 C691 C672 C663


+3V

C666
32
R332 4.7K_4 0.01U/25V_4 0.1U/10V_4 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3VS_6
+3V
+1.5V

CN18 R330 *4.7K_4


+3V
R326 *0_4 +MINIEC_5V 51 52
A +5V Reserved +3.3V RF_LINK# A
49 50 R329 0_4
Reserved GND
47 Reserved +1.5V 48
R327 *0_4 45 46 MINI_BLED R328 *0_4
33 EC_DEBUG1 Reserved LED_W PAN# BLUELED 33
43 44 RF_LINK#
Reserved LED_W LAN# RF_LINK# 33
EC debug pin 41 42
Reserved LED_W W AN# R331 4.7K_4
39 Reserved GND 40 +3V
37 Reserved USB_D+ 38 USBP8+ 6
35 GND USB_D- 36 USBP8- 6
2 PCIE_TXP0_WALN PCIE_TXP0_WALN 33 34
PCIE_TXN0_WLAN PETp0 GND
2 PCIE_TXN0_WLAN 31 PETn0 SMB_DATA 32
29 30 INTEL WLAN
GND SMB_CLK
27 GND +1.5V 28 CARD PIN 20
2 PCIE_RXP0_WLAN PCIE_RXP0_WLAN 25 26 W_DISABLE# +3VSUS
PCIE_RXN0_WLAN PERp0 GND
2 PCIE_RXN0_WLAN 23 PERn0 +3.3Vaux 24 have
21 22 MINI_PCIE_RST# R355 *10K/F_4
GND PERST# MINI_PCIE_RST# 7 internal
7 CLK_33_DEBUG CLK_33_DEBUG 19 20 RF_OFF# 8
MINI_PCIE_RST# Reserved W _DISABLE# pull-up 110k
17 Reserved GND 18
ohm

2
15 16 LAD0 LAD0 7,33
CLK_WLAN_P GND Reserved LAD1
7 CLK_WLAN_P 13 REFCLK+ Reserved 14 LAD1 7,33
CLK_WLAN_N 11 12 LAD2
7 CLK_WLAN_N REFCLK- Reserved LAD2 7,33
9 10 LAD3 LAD3 7,33
GND Reserved LFRAME# MINICAR_PME#
6 PCIE_MINI_CLKREQ# 7 CLKREQ# Reserved 8 LFRAME# 7,33 6,29 PCIE_WAKE# 3 1
R348 *0_4 BT_COMBO_EN_R# 5 6 Q31
8 BT_COMBO_EN# BT_CHCLK +1.5V
3 4 *DTC144EUA
MINICAR_PME# BT_DATA GND
1 W AKE# +3.3V 2
BT_DATA,BT_CHCLK,CLKREQ#
internal pull-DOWN 100k MINI PCIE H=11
ohm DFHS52FR099
MIPCI-C-1759513-52P-LDV-SMT
B SI, CN18 change to 11H B

CLK_33_DEBUG R337 51/F_4 C677 15P/50V_4 2,4,11,23,38,41 +1.5V


2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,30,31,33,41,42,44 +3V
4,7,30,33,34,35 +3VPCU
8,18,24,25,26,27,30,31,41 +5V
EMI SI , add for EMI

Accelerometer Sensor

2N7002DW-7-F Q65A +3V


Dual ACCEL_MBDATA2
4,33 MBDATA2 3 4
U14
R538 4.7K_4 HP3DC2TR
5

C C311 C366 1 2 C
+3V +3V Vdd_IO NC
0.1U/10V_4 0.1U/10V_4 14 3
VDD NC
2

R540 4.7K_4

6 1 ACCEL_MBCLK2
4,33 MBCLK2
Dual
RESERVED 10
2N7002DW-7-F Q65B ACCEL_INT 11 13
7 ACCEL_INT INT1 RESERVED
9 INT2 RESERVED 15
TP21 16
R174 *0_4/S RESERVED
7 SDO
ACCEL_MBDATA2 6
ACCEL_MBCLK2 SDA
SI2 , add for avoid leakage 4 SCL GND 5
from SUS power GND 12
R167 *0_4/S 8
+3V CS

AL003DC2A00

ACCEL_INT MBDATA2 C339 33P/50V_4

MBCLK2 C367 33P/50V_4

C303
22P/50V_4

D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
MINI PCIE & G-sensor
Date: Friday, November 11, 2011 Sheet 32 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Smart adapter Type check


33
,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,30,31,32,41,42,44 +3V
4,7,30,34,35 +3VPCU
4,34,35,36 +5VPCU

+3VPCU C806 0.1U/10V_4


C485 0.1U/10V_4 +3VPCU +3VPCU
C798 0.1U/10V_4
C780 0.1U/10V_4 Change to 1SS355 as Current loss

1
C768 0.1U/10V_4
+3V R406 0_4 KBC_P+3V C805 0.1U/10V_4 D18 +3VPCU_AC L65 SBK160808T-121Y-N
C804 0.1U/10V_4 1SS355
C783 0.1U/10V_4 +3VPCU_EC L64 SBK160808T-121Y-N
+3VPCU +3VPCU_AC +3VPCU_EC C765 0.1U/10V_4

2
C807 *10U/6.3V_8 AD_TYPE R387 10K/F_4 R383 100/F_4
A ITE pin 100 , 104 , 106 default AD_ID 34 A
can not pull up to +3VPCU it 500mA
R416 +3VPCU CAP close to EC pin
will cause chip into test mode 0_4 C739 R382
C451 C775 12K/F_4 C737
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 100P/50V_4

Change to RB500 as Current loss

114
121

127
11
26
50
92

74
3
U16 SCI1# D20 1 2 RB501V-40 SIO_EXT_SCI# 6

VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY
VCC

AVCC
LAD0 10 84 TPLED#
7,32 LAD0 LAD0 EGCLK/W UI27/GPE3 TPLED# 30
LAD1 9 83 VRON DNBSWON1# D21 1 2 RB501V-40
7,32 LAD1 LAD1 EGCS#/W UI26/GPE2 VRON 37,38 DNBSWON# 6
LAD2 8 C802 *0.1U/10V_4
7,32 LAD2 LAD2
LAD3 7 82 HWPG
7,32 LAD3 LAD3 EGAD/W UI25/GPE1 KBSMI#1
7 KBC_RST# 22 D19 1 2 RB501V-40
LPCRST#/W UI4/GPD2 SIO_EXT_SMI# 6
7 CLK_33M_KBC 13 56 MY16 MY16 30
LFRAME# LPCCLK KSO16/SMOSI/GPC3 MY17
7,32 LFRAME# 6 LFRAME# KSO17/SMISO/GPC5 57 MY17 30
17 LPC 19 SUSON SUSON 40,41 C763 *0.1U/10V_4 +3VS5 R414 47K_4
LPCPD#/W UI6/GPE6 L80HLAT/BAO/W UI24/GPE0 CAPSLED# FAN1SIG
L80LLAT/W UI7/GPE7 20 CAPSLED# 30
6 EC_A20GATE EC_A20GATE 126 R415 *47K_4 LID_EC# C803 100P/50V_4
SERIRQ GA20/GPB5 PWRLED_RIGHT C483 *0.1U/10V_4
7 SERIRQ 5 SERIRQ GPIO SBUSY/GPG1/ID7 107 PWRLED_RIGHT 28
KBSMI#1 15 99 EC_BIOS_WR# DGPU_PR_EN SI , del QB button PU resistor R392
ECSMI#/GPD4 HMOSIGPH6/ID6 EC_BIOS_WR# 8
SCI1# 23 98 EC_BIOS_RD#
ECSCI#/GPD3 HMISO/GPH5/ID5 EC_BIOS_RD# 8
4 3920_RST# 3920_RST# 14 97 EC_BIOS_SPI_CLK_I +3VPCU R417 10K/F_4 NBSWON1#
W RST# HSCK/GPH4/ID4 EC_BIOS_SPI_CLK_I 8
6 EC_RCIN# EC_RCIN# 4 96 EC_BIOS_CS# For +VIN noise
KBRST#/GPB6 HSCE#/W UI19/GPH3/ID3 MAINON EC_BIOS_CS# 8 MBCLK
16 95 MAINON 9,34,36,40,41 SI2,change to +3VS5 R397 4.7K_4 C784 *0.1U/10V_4
PW UREQ#/BBO/GPC7 CTX1/W UI18/GPH2/SMDAT3/ID2 RF_LINK#
CRX1/W UI17/GPH1/SMCLK3/ID1 94 RF_LINK# 32 for leakage issue
SI, remove NUMLED# 93 CLKRUN# CLKRUN# 7 R398 4.7K_4 MBDATA C788 *0.1U/10V_4
B CLKRUN#/W UI16/GPH0/ID0 B
Vender Size P/N MBCLK2
119 R399 4.7K_4 C786 *0.1U/10V_4
RSMRST#

H_PROCHOT#
123
GPC0
TMA0/GPB2 IT8518E/HX Add TP SMBUS signal
AMIC 4M AKE39F-0800
+3VS5
R402 4.7K_4 MBDATA2 C790 *0.1U/10V_4
EON AKE39ZN0Q02 C794
4 H_PROCHOT# BLUELED
86
85
PS2DAT0/TMB1/GPF1
117 SMB_ACC_CLK For GPU thermal
4M 220P/50V_4 RSMRST#
32 BLUELED PS2CLK0/TMB0/GPF0 SMCLK2/W UI22/GPF6/PECI SMB_ACC_CLK 30 RSMRST# 6
118 SMB_ACC_DAT Socket DFHS08FS023
SMDAT2/W UI23/GPF7 SMB_ACC_DAT 30
30 TPDATA TPDATA 90 PS/2 110 MBCLK for Battery C796 2.2U/6.3V_4
PS2DAT2/W UI21/GPF5 SMCLK0/GPB3 MBCLK 34
30 TPCLK TPCLK 89 111 MBDATA charge/discharge R407 *8.2K_4
PS2CLK2/W UI20/GPF4 SMDAT0/GPB4 MBDATA 34 +3VS5
SM_BUS 115 MBCLK2
SMCLK1/GPC1 MBCLK2 4,32
MBDATA2 3920_RST#
SMDAT1/GPC2 116 MBDATA2 4,32 for CPU themal 4M SPI EC ROM +3VPCU
36 VR2.5_ON 80 DAC4/DCD0#/GPJ4
42,43,44 DGPU_PR_EN DGPU_PR_EN 104 Add G-sensor SMBUS signal +3VPCU
DSR0#/GPG6 R394 470K_4 C772 0.1U/10V_4
33 GINT/CTS0#/GPD5
HWPG 88 U20
4,23,35,36,37,40 HWPG PS2DAT1/RTS0#/GPF3
EMU_LID 81 UART 24 BIOS_CS# 1 8 R404 *100K/F_4 BLUELED R408 10K/F_4 +3V
23 EMU_LID DAC5/RIG0#/GPJ5 PW M0/GPA0 WIRELESS_OFF 30 CE# VDD
87 25 BIOS_SPI_CLK_I 6
PS2CLK1/DTR0#/GPF2 PW M1/GPA1 WIRELESS_ON 30 BIOS_WR# SCK
108 RXD/SIN0/GPB0 PW M2/GPA2 28 AC_LED_ON# 34 5 SI
109 29 BIOS_RD# 2 7 SPI_7P C795 15P/50V_4 R403 33_4 CLK_33M_KBC
32 EC_DEBUG1 TXD/SOUT0/GPB1 PW M3/GPA3 MBATLED0# 34 SO HOLD#
30 R193 0_4
PW M4/GPA4 LAN_POWER FAN_PWM 31 SPI_3P
PW M5/GPA5 31 LAN_POWER 41 3 W P# VSS 4 SI , add for EMI
28 USBPW_ON# 106 32 VOLMUTE#
BIOS_SPI_CLK GPG0 PW M6/SSCK/GPA6 PWM_VADJ VOLMUTE# 27
C484 *22P/50V_4 105 34 EN25Q32B-104HIP
FSCK PW M7/GPA7 PWM_VADJ 11 +3VPCU
AKE39ZN0Q02
BIOS_RD# 103 FLASH PWM 47 FAN1SIG SOIC8-8-1_27
BIOS_SPI_CLK_I BIOS_WR# FMISO TACH0/GPD6 S5_ON FAN1SIG 31
102 48
L34 BLM15AG700SS1_4 BIOS_CS# 101
FMOSI
FSCE#
TACH1/TMA1/GPD7 S5_ON 35,36
128K byte SPI EC ROM C518 0.1U/10V_4
GPU_AC_BATT 100 120 SUSC#
15 GPU_AC_BATT SSCE0#/GPG2 TMR0/W UI2/GPC4 SUSC# 6
124 ECPWROK U19
TMR1/W UI3/GPC6 ECPWROK 4,10,18
MY0 36 TP90 BIOS_CS# 1 8
C 30 MY0 KSO0/PD0 CE# VDD C
MY1 37 TP92 BIOS_SPI_CLK_I 6
30 MY1 KSO1/PD1 SCK
MY2 38 TP91 BIOS_WR# 5
30 MY2 KSO2/PD2 SI
MY3 39 TP89 BIOS_RD# 2 7 SPI_7P
30 MY3 KSO3/PD3 SO HOLD#
MY4 40 R259 R260 10K/F_4
30 MY4 KSO4/PD4
MY5 41 ICT need TP2675 size 33_4 +3VPCU R223 10K/F_4 SPI_3P 3 4
30 MY5 KSO5/PD5 W P# VSS
MY6 42 125 NBSWON1# from power button test point TP39
30 MY6 KSO6/PD6 PW RSW /GPE4 NBSWON1# 30
MY7 43 18 LID_EC# EMI SI R222 *100K/F_4 *DFHS08FS023
30 MY7 KSO7/PD7 RI1#/W UI0/GPD0 LID_EC# 30
MY8 44 WAKE UP 21 ACIN ACIN 34,41 SOIC8-6-1_27
30 MY8 KSO8/ACK# RI2#/W UI1/GPD1
MY9 45 KBMX TP37
30 MY9 KSO9/BUSY
MY10 46 35 SUSB# TP place on top
30 MY10 KSO10/PE W UI5/GPE5 SUSB# 6
MY11 51 112 PWR_LED# C517
30 MY11
MY12 KSO11/ERR# RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7 PWR_LED# 30
22P/50V_4
lay for ICT
30 MY12 52 KSO12/SLCT
MY13 53 request
30 MY13 KSO13
MY14 54
30 MY14 KSO14
MY15 55 66 R185 0_4
30 MY15 KSO15 ADC0/GPI0 VGA_ON_SB 6
MX0 58 67 R393 0_4 DGPU_PWROK 7,18,42,43,44
30 MX0 KSI0/STB# ADC1/GPI1
MX1 59 68 SYS_I
30 MX1 KSI1/AFD# ADC2/GPI2 SYS_I 34
MX2 60 A/D D/A 69 AD_AIR
30 MX2 KSI2/INIT# ADC3/GPI3 AD_AIR 34
MX3 61 70 TEMP_MBAT
30
30
MX3
MX4
MX4 62
KSI3/SLIN#
KSI4
ADC4/W UI28/GPI4
ADC5/W UI29/GPI5 71 AD_TYPE
TEMP_MBAT 34 Adapter select
MX5 63 72 GPIO42
30 MX5 KSI5 ADC6/W UI30/GPI6
MX6 64 73
30 MX6 KSI6 ADC7/W UI31/GPI7
MX7 65 SI , drop QB button feature
30 MX7 KSI7

OSCI DAC0/GPJ0 76 BATSHIP 34 Platform model GPIO42 adapter


128 CLOCK 77
VCORE

CK32K DAC1/GPJ1 PCI_SERR# 7


AVSS

R395 10K/F_4 GPIO42 R396 *10K/F_4 90W


2 78 ODD_PD 31 +3VPCU SG/DIS High
VSS

VSS
VSS
VSS
VSS
VSS

*27P/50V_4 C481 CK32KE DAC2/GPJ2 DNBSWON1#


DAC3/GPJ3 79
Hi ==> DIS/SG UMA Low 65W
2

Y6 *32.768KHZ Low ==>UMA


1

27
49
91
113
122

75

12

D R217 AJ085180F04 D
0_4
IT8518E/HX
3

L32 BK1608HS121-T
OSCIO C447
*27P/50V_4 C473 0.1U/10V_4
IT8518_AGND IT8518_AGND
PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
EC (KB3926)/ROM
Date: Friday, November 11, 2011 Sheet 33 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

DC_JACK
EC16
1000P/50V_4

Do Not add test pad on BATDIS_G signal


+PRWSRC
34
AD_ID 33
90W
+BATCHG
Place this ZVS close to PQ27
EC10 EC11 EC12 EC13 PL8
5
CN16 +VA_AC +VA Diode away +VIN AON6414AL

*10U/25V_8

*10U/25V_8

*10U/25V_8

*10U/25V_8
DB
1 PL19 PQ46 80/5A
AD_ID

VDD PD17
2 ME7835 3 CN15

S
VDD PL6
D 80/5A 5 1 1 2 +VAD PQ48 5 2 BATT+ 2 1 D
P0603BDG 80/5A 2 1
PL18 6 2 1
6 PC246 7 3 P4SMAJ20A 4 3 SMD 3 10 SI
GND 3 10

2
G
PC90 PC87
0.1U/25V_4
80/5A 8
SMC

0.1U/25V_4

0.1U/25V_4
4 9

4
4 9
8 3

1
LED2 GND PC230 PC234 PC69 PC250 PC232 BQBATDRVPR147 4.02K/F4 BATDIS_ID_DOD
GND 4 5 5 7 7
2200P/50V_4 PC115 +3VPCU

0.1U/25V_4

0.1U/25V_4

0.1U/25V_4

0.1U/50V_6
7 SI

IDEA_G
LED1 B_TEMP_MBAT6
0.01U/25V_4 6 8 8
AC_LED_ON# PR124 +VIN
DC-IN CONN BATDIS_G RC1206-R010 PR78 PR77 200275GR008G58BZL
2

To PWR LED 1 2 330_4 330_4 DFAD08MR022


PQ14 Place this ZVS close to
PR81 PDTC144EU bat-bp02081-b82d5-7h-8p-l-v
1M/F_4 Far-Far away +VIN PR74
33 MBDATA
+12VALW 3 1 PC95 200K/F_4

1
PQ13

0.1U/25V_4
33 MBCLK
2

2N7002K PD18
PR75
PR64 P4SMAJ20A TEMP_MBAT 33
1 3 +5VPCU PD8 PD9 1K/F_4

1
PDZ5.6B

PDZ5.6B
2.43K/F_6 PR123 PR125

2
3

+VAD PR88 PR112 PR232 PR84 *0_2/S *0_2/S PC48 PC184


PQ18 1M/F_4 4.02K/F4 4.02K/F4

0.01U/25V_4

0.01U/25V_4
1M/F_4

Q2
PC255

CSIP
2 4 3

CSIN
AC_LED_ON# 33
*0.1U/25V_4

PR99

2
MBATLED0# 5 6
PQ28
1

220K_4 PR113
2

PDTC144EU 2 Q1 1 +VA PC38 PC39

*100P/50V_4

*100P/50V_4
PQ8 PR120 1K_6 PC253 PC116 PC117 PC118 Place this cap
REGN6V

2200P/50V_4

1000P/50V_4
PR61 PDTC144EU MMDT2907A

4.7U/25V_8

0.1U/25V_4
220K_4 close to EC
C 1M/F_4 C

BQACN
BQACP
+12VALW 3 1 PC81 PC75
PC71 PC70

0.1U/25V_4
2

8
7
6
5
PQ31
1U/10V_4 EMB20N03V

16
PR20

1
1 3 +5VPCU 0.1U/25V_4 0.1U/25V_4
PQ9

ACP
2.43K/F_6

ACN

REGN
3

2N7002K 18 BQHIDRV 4 EC9 EC15 EC6 EC14


HIDRV

10U/25V_8

10U/25V_8

10U/25V_8

10U/25V_8
BQCMSRC 3
PC248 CMSRC
2 MBATLED0# 33 1 2 REGN6V
*0.1U/25V_4

3
2
1
PD13 RB501V-40 DB PR245 +BATCHG
PR115
PQ49 BQACDRV 4 BQB_2
17 BQB_1 SI RC1206-R020
1

PDTC144EU ACDRV BTST F3_2X1_65-2_8


0_6
SI-2 PC84 PL22
PR80
REGN6V DB 19 BQPHASE 0.047U/25V_4 8681LR 1 2
PHASE 4.7uH
100K/F_4
ACIN 5 PU8 PQ33
33,41 ACIN ACPRES

8
7
6
5
15 BQLODRV EMB20N03V
PR79 LODRV
DB,SI BQ24728 PR167 PC242 PC243 PC96 PC238

10U/25V_8

10U/25V_8
+VAD_1 2.2_6

0.1U/25V_4

0.1U/25V_4
DB 100K/F_4
+VA_AIR +VA 14 DB PR246 PR243
PD5 GND *0_2/S
PD10 21 4 *0_2/S
PR129 GND
1 2 2 1 BQVCC 20 22
VCC GND

1
22_8 23 PC54 PC140
1N4448WS-7-F *1N4448WS-7-F GND 2200P/50V_4
24

3
2
1
PD11 PC80 GND PD19
GND 25
PR24

RB501V-40
ACIN 2 1 0.47U/25V_6 0.1U/25V_4
75K/F_4 PR17
MBDATA BQDATA 8 13 BQSRP PR69 10/F_4

2
*1N4448WS-7-F SDA SRP CSOP
*0_4/S
B PD6 12 BQSRN PR60 7.5/F_4 PC32 CSON B
33 AD_AIR PR34 SRN
MBCLK BQCLK

0.1U/25V_4
2 1 9

ACDET
9,33,36,40,41 MAINON SCL
11 BQBATDRV

IOUT
PR261 *0_4/S BATDRV

ILIM
PC183 *1N4448WS-7-F +VAD PC30
0.1U/10V_4 0_6 DB
PD7
PR48

10

7
12.4K/F_4 0.1U/25V_4

BQIOUT
+VAD 1 2
4

SI
*1N4448WS-7-F
Place this cap PQ11 PR49 +BATCHG
close to EC +VAD_1 PR47
*IMD2 430K/F_4 PR53 PR42
SYS_I 33

100K/F_4
*100K/F_4
10/F_4

2
ACDET=13V PR55 PR57 PC21 PC182
3

69.8K/F_4 88.7K/F_4 PC23 PR238


0.1U/50V_6

0.01U/25V_4
100P/50V_4
470_8

1
+VAD +3VPCU
3

3
MIN. BATV=7.2V PQ16
2N7002K Place this cap
+VA +PRWSRC 2 33 BATSHIP 2
PR100 close to EC
+VH28 41
1M/F_4
+VAD_1 41
PR101 PQ47
+3VPCU 4,7,30,33,35
1M/F_4 2N7002K
1

1
+5VPCU 4,35,36
+BATCHG

A A
PR68
3

1M/F_4 PQ15
AD_AIR 2 METR3904-G
1

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom Charger (BQ24728) 1A

Date: Friday, November 11, 2011 Sheet 34 of 44


5 4 3 2 1
5 4 3 2 1

DC/DC +3VS5/+5VS5
35
D D

+VIN DB Place these CAPs +VIN_5VS5


PL7
close to FETs
*0_8/S
Place these CAPs +VIN_3VS5 DB +VIN
PL10
PC106 close to FETs
PC94 PC93 PC103 PC104 EC8 *0_8/S

0.1U/25V_4

2200P/50V_4

68P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
EC7 PC82 PC99 PC88 PC237 PC89
+VIN

68P/50V_4

2200P/50V_4
+5VPCU

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
DB
PC74
PR110

10U/6.3V_6
10_8
+3VPCU
+2VREF +5VPCU
DB
PC26
PC79

10U/6.3V_6
PC15 PR30

0.1U/25V_4
PR94 1U/6.3V_4 *0_2/S +3.3 Volt +/- 5%
+5 Volt +/- 5% *665K/F_4
Countinue current:4A

16

17
Countinue current:4A

5
6
7
8

8
7
6
5
C DB DB C
PQ50 Peak current:6A
Peak current:6A

VREG3

VREG5

REF
VIN
EMB20N03V PR95 8205EN 13 4
EN0 TONSEL PQ53 OCP minimum:7.5A
OCP minimum:7.5A 4
*330K/F_4
5V_UGATE121 10 3V_UGATE2 4 EMB20N03V
PC49 UGATE1 UGATE2 PC56
+5VS5 PR63 PR70 +3VS5
5V_BST1 22 DB 9
PL24 BOOT1 BOOT2 PL25
2.2_6 2.2_6
1
2
3

3
2
1
2.2UH/8A 0.1U/25V_4 PU7 0.1U/25V_4 2.2UH/8A
+5V_ALWP 5V_PHASE120 TPS51123A 11 3V_PHASE2 +3.3V_ALWP
PHASE1 PHASE2
PR247 PR248
5
6
7
8

5V_LGATE1 19 12 3V_LGATE2
LGATE1 LGATE2

8
7
6
5
*0_2/S *0_2/S
1

PR240 24 PR241

ENTRIP1

ENTRIP2
VOUT1

SKIPSEL
+ 2.2_6 5V_FB1 2 7 2.2_6
FB1 OUT2

1
PC256 PC252 PR26 4

GND
GND
ENC
PR52
15.4K/F_4 PR51 PGOOD 3V_FB2 +
330U/6.3V_6X5.8

0.1U/10V_4

+3VS5 23 5 4
2

PQ51 0_4 PGOOD FB2 PC258 PC257


10K/F_4
PC239 AON7702A PQ52 PC240

0.1U/10V_4

330U/6.3V_6X5.8
1
2
3

2
1

18

14
25
15
2200P/50V_4

2200P/50V_4
4,23,33,36,37,40 HWPG AON7702A

3
2
1
PR25
10K/F_4 PR27 PR97
Rds(on) 14m ohm 80.6K/F_4 *0_2/S Rds(on) 14m ohm
PR23
6.8K/F_4

PR21
B 90.9K/F_4 B

PR22
10K/F_4
PR93
S5_ON
S5_ON 33,36
0_4
PC76
*0.1U/10V_4

DB for prevent interference

+3VS5
1

1
A A
PC33 PC47 PC65 PC60 PC53 PC52 PC50 PC51
1000P/50V_4

1000P/50V_4
0.1U/10V_4

1U/6.3V_4

0.1U/10V_4

1U/6.3V_4
0.01U/25V_4

0.01U/25V_4
2

2
PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
3/5VPCU(TPS51123A)
Date: Friday, November 11, 2011 Sheet 35 of 44
5 4 3 2 1
5 4 3 2 1

SI-2
36
PR262
+5VPCU +VIN_1.1V
10_6 +VIN
DB
PR228 PR226 PL14
+5VS5

RT8238VCC1.1V

RT8238TON1.1V
D *10_6 360K/F_4 *0_8/S D

PC206 PC210 PC212 PC213 PC216 PC211


+1.1V Volt +/- 5%

2200P/50V_4
1U/6.3V_4

0.1U/25V_4

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
8
7
6
5
DB Countinue current:5A
Peak current: 6.5A

11
5
PU17
3 RT8238DH1.1V
4
PQ44 OCP minimum:7.5A

VCC

TON
PR224 UGATE
RT8238ILIM1.1V
10 CS PC208 EMB20N03V
PR227 RT8238BST1.1V
RT8238BST_1_1.1V +1.1VS5
100K/F_4 4

3
2
1
BOOST
2.2_6
PR220 0_4 RT8238HW PG_S2A1.1V
9 PGOODRT8228AZ 0.1U/25V_4 PL30
4,23,33,35,37,40 HW PG
2 RT8238LX1.1V 600 mils
PR221 10K/F_4 RT8238EN1.1V PHASE 2.2UH/8A
33,35 S5_ON 8 EN
RT8238DL1.1V PR260
1

MODE
LGATE

8
7
6
5
GND
*0_2/S

1
PC204 PR229

FB
13 PAD 2.2_6 +

0.33U/6.3V_4
PC277 PC215

12

RT8238FB1.1V 6

0.1U/10V_4
4

390U/2.5V_6X5.8ESR10
2
PQ45
AON7702A PC217

2200P/50V_4
Vo=0.5(R1+R2)/R2

3
2
1
PC205
PR222
+5VS5
C 0_4 C
*100P/50V_4 RDSon=14m ohm
PR223
12K/F_4
PR225
10K/F_4

B PR177 B
+3VS5
0_6
+2.5V +/- 5%
PC129
Countinue current:0.3A
4.7U/6.3V_6

Peak current:0.75A
+2.5V
1

PU11
VIN

PL11
5 3407SW 2.5V
SW 2.2uH/1.3A_2520
PR155
33 VR2.5_ON 3407EN2.5V 3
EN PR166
*10K/F_4
PR156 GND 2 *0_2/S
9,33,34,40,41 MAINON
PC128 PC127
FB

10K/F_4
10U/6.3V_8

0.1U/10V_4

PC119 AP3407A
4

R1
0.1U/10V_4

3407VFB2.5V PR153
316K/F_4
VO=(0.6(R1+R2)/R2)
PR154
R2 100K/F_4
A A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+1.1VS5 (RT8228)/2.5V
Date: Friday, November 11, 2011 Sheet 36 of 44
5 4 3 2 1
5 4 3 2 1

37
D +VIN_1.2V DB +VIN D

PR137 PR174 PL9


+5VS5

RT8238VCCPCH

RT8238TONPCH
10_6 360K/F_4 *0_8/S
PC109
+1.05V PCH Volt +/- 5%

1U/6.3V_4
PC249 PC244 PC251 PC111 PC92
Countinue current:4A

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
Peak current:6A

8
7
6
5
DB
OCP minimum:7.5A

11
5
PU10
3 RT8238DHPCH 4 +1.2V

VCC

TON
PR173 UGATE
RT8238ILIMPCH
10 CS PC121 PQ29
PR148 RT8238BSTPCH
RT8238BST_1PCH EMB20N03V +1.2V_S2
100K/F_4 BOOST 4
2.2_6 PL23

3
2
1
PR172 0_4 RT8238HWPG_S2APCH 9 0.1U/25V_4 2.2UH/8A
4,23,33,35,36,40 HWPG PGOOD RT8228AZ
2 RT8238LXPCH 600 mils
PR165 0_4 RT8238ENPCH PHASE
33,38 VRON 8 EN
1 RT8238DLPCH
LGATE PR249

8
7
6
5
MODE
GND
PC122 13 PR176

FB
PAD *0_2/S

1
2.2_6

*0.1U/10V_4
+

12

RT8238FBPCH 6
4 PC263 PC265

0.1U/10V_4
390U/2.5V_6X5.8ESR10
2
PC134
Vo=0.5(R1+R2)/R2 PQ32 2200P/50V_4

3
2
1
AON7702A
C PC108 C
PR157
+5VS5 PR139
0_4
*100P/50V_4 0_4
PR140 RDSon=14m ohm PR138
VDDP_FB_H 4
14K/F_4 *0_4
PR134
10K/F_4

B B

A A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+1.2V (RT8228)
Date: Friday, November 11, 2011 Sheet 37 of 44
5 4 3 2 1
5 4 3 2 1

*32.4K/F_4
PR43

PC25
PR15

*1K/F_4
PC10

*470P/50V_4

PC5
PR40
100/F_4
+VDDNB_CORE
38
PR13 PR10 PR28
ISENS2_NB PR29 CPU_VDDNB_RUN_FB_H 4
10K/F_4 2.05K/F_4 301/F_4 0_4
100P/50V_4 1000P/50V_4
VSUMN_NBY PR9 VSUMN_NB PC18
39 VSUMN_NBY PR36
1/F_4 SI PC9
137K/F_4 330P/50V_4
D VSUMP_NB_Y PR7 ISENS1_NB PR11 D
390P/50V_4
39 VSUMP_NB_Y
10K/F_4 PR44 3.01K/F_4
11.5K/F_4 PC6 PC17
PR5

1
VSUMP_NB

0.1U/10V_4
SI

0.1U/10V_4
PR50 CPU_VRM8380_PG 10
3.65K/F_4 PR169
FCCM_NB 39
PUT COLSE PR255 499/F_4 *0_4/S

PR54
10K/F_4 NTC
TO VDDNB PWM2_NB 39

0_4
PC20 PR59

2
PR39
PR6 Inductor VSUMN_NB 42.2K/F_4
ISENS1_NB *1K/F_4
10K/F_4 PC42 *0.1U/10V_4 DB,SI SI
VSUMN_NBY2 PR8 VSUMN_NB
39 VSUMN_NBY2 DB
1/F_4 SI 0.1U/10V_4 PC28

FCCM_NB_1
PR12

PGOOD_NB
ISENS1_NB

VSUMP_NB
VSUMP_NB_Y2 ISENS2_NB

ISUMN_NB

COMP_NB

PWM2_NB
VSEN_NB
39 VSUMP_NB_Y2
10K/F_4 0.22U/10V_4 Reserve for

FB_NB
PR14 VSUMP_NB DB,SI ISL6277
3.65K/F_4 version A
issue.

48

46

47

43

44

45

42

41

40

36

38

37
PUT COLSE
SI-2

FCCM
ISEN1_NB

ISUMN_NB

ISUMP_NB

COMP_NB

FB_NB

VSEN_NB

PGOOD_NB

PWM2_NB

BOOTX

PHASEX

UGATEX
TO VDDNB
HOT SPOT SI-2 PC281 PC43
1000P/50V_4 ISENS2_NB 1 39
ISEN2_NB LGATEX PR56 1_6 +VIN_VCC_CORE
1 2 0.22U/10V_4 6277NTC_NB 2 35
NTC_NB VIN PC45 0.22U/25V_6
C PR217 6277IMON_NB 3 33 HG2 C
IMON_NB UGATE2 HG2 39
100K/F_4 NTC PC63
PR76 PR114 0_4 6277SVC 4 34 SW2_B SI
2 CPU_SVC SVC BOOT2
27.4K/F_4 PC59
1000P/50V_4

PR85 33,37 VRON PR132 0_4 6277EN 9 32 SW2 0.22U/25V_6 SW2 39


PR65 ENABLE PHASE2
105K/F_4
PR119 0_4 6277SVD 6 31 LG2
18.2K/F_4 2 CPU_SVD SVD LGATE2 LG2 39
SI-2 SI PU9
+1.5V PR92 0_4 6277VDDIO 7 30 +5VS5
VDDIO ISL6277 VDDP PR109 1_6 PC64 1U/6.3V_4
DB SI
PR128 0_4 6277SVT 8 29
+1.5V 4 CPU_SVT SVT VDD
PR86 PC78 1U/6.3V_4
4 VRHOT VRHOT *1K/F_4 PR87 0_4 6277VRHOT 5 28 6277_PWMY 6277_PWMY 39
VR_HOT_L PW MY
PR106 0_4 6277PWROK 10 25 HG1
HG1 39
2 CPU_PWRGD_SVID_REG PW ROK UGATE1 PC85
6277IMON 11 24 SW1_B
+1.5V IMON BOOT1
SI-2
PR107 1 2 6277NTC 12 26 SW1 0.22U/25V_6
NTC PHASE1 SW1 39

LGATE1
*10K/F_4

PGOOD
DB

ISUMN
ISUMP

COMP
ISEN3

ISEN2

ISEN1

VSEN
PR82 SI

GND

RTN

FB2
PR118 PC83 100K/F_4 NTC

FB
1000P/50V_4

105K/F_4 PR130
SI 27.4K/F_4

49

13

14

15

16

17

19

18

20

22

21

23

27
PR126
PC282
1000P/50V_4

ISENS3

ISENS2

ISENS1

VSUMP

6277ISUMN

6277RTN

6277VSEN

6277FB2

6277COMP

6277FB

6277PGOOD

LG1
18.2K/F_4 PR127
SI-2 LG1 39 +1.5V

PC91
PUT COLSE 10K/F_4
B TO VCORE CPU_VRM8380_PG 10 B
HOT SPOT PR171
PC130

10P/50V_4
PC100 301/F_4
+5VS5 PR135 0_4 1000P/50V_4

100P/50V_4
PC101 PC110
PR150 PR142 PR161
ISENS2
10K/F_4 137K/F_4 2.32K/F_4
0.22U/10V_4 390P/50V_4
VSUMN_1 PR162 VSUMN PC102
39 VSUMN_1 SI
1/F_4 SI PR131 PR160
*32.4K/F_4 *1K/F_4
PR152
VSUMP_1 ISENS1 0.22U/10V_4
39 VSUMP_1
10K/F_4 PR145
2.05K/F_4 PR214
PR151 VSUMP PC132 100/F_4
3.65K/F_4 *470P/50V_4 +VCC_CORE
SI
PR149
ISENS1 PR146 SI PC97 0_4 PR143
10K/F_4 11.5K/F_4 PC114 PC113 SI 330P/50V_4
1

CPU_VDD0_RUN_FB_H 4
0.22U/10V_4

0.033U/10V_4

VSUMN_2 PR158 VSUMN PR163 CPU_VDD0_RUN_FB_L 4


39 VSUMN_2
1/F_4 SI PUT COLSE PR233 619/F_4
10K/F_4 NTC 0_4 PR144
VSUMP_2
PR141
ISENS2 TO VCORE PC120 PC98
39 VSUMP_2
2

PR159
10K/F_4 Inductor VSUMN 2 1
A A
PR136 *1K/F_4
VSUMP PC112 *0.1U/10V_4 0.01U/25V_4
3.65K/F_4 0.1U/10V_4 PR213
100/F_4

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom A
ISL6277
Date: Friday, November 11, 2011 Sheet 38of 44
5 4 3 2 1
5 4 3 2 1

+VIN_VCC_CORE
DB
PL15

*0_8/S
+VIN

39

1
PC220 PC226 PC224 PC222 PC57 PC46 + PC259

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
PC218

*4.7U/25V_8

470U/25V_EC_10H
5

0.1U/25V_4
2

2
D
PR234 G
HG1 HG1_G 4
38 HG1 S
1_6
PQ20

1
2
3
TPCA8064-H SI +VCC_CORE
PL21
SW1
38 SW1
0.36uH

5
D PR89 D
D 2.2_6
G
LG1 4 SI
38 LG1 S PR236 PR244
PQ24 *0_2/S *0_2/S

1
2
3
TPCA8A10-H PC58

2200P/50V_4
VSUMN_1
VSUMN_1 38

VSUMP_1
VSUMP_1 38

+VIN_VCC_CORE

PC219 PC221 PC223 PC225 PC55 PC44


CPU CORE Volt

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
5 Countinue current:36A
D Peak current:50A
PR231 G
HG2 HG2_G 4
38 HG2 S OCP minimum:60A
1_6
PQ19
1
2
3

TPCA8064-H SI +VCC_CORE
PL20
SW2
38 SW2
0.36uH

1
5

PR111 + + + + + +
D 2.2_6 PC135 PC160 PC267 PC260 PC262 PC247 PC280

330U_2V_7343
0.1U/10V_4

*330U_2V_7343
390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
*390U/2.5V_6X5.8ESR10
G

2
C LG2 C
38 LG2 4 SI
S PR235 PR242
PQ23 *0_2/S *0_2/S
1
2
3

TPCA8A10-H PC66
2200P/50V_4

VSUMN_2
VSUMN_2 38
SI
VSUMP_2
VSUMP_2 38
SI

+VIN_VCC_GT DB +VIN
PL13

*0_8/S
PC193

0.1U/25V_4
PC199 PC200 PC198 PC197
VDDNB Volt
2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4

DB PR219
HNBY
PU16
Countinue current:25A
1_6
1

ISL6208BCRZ
Peak current:33A
UGATE

OCP minimum:40A
G1

D1

D1

D1

2BOOTY
BOOT
38 6277_PWMY 3
PWM SI
FCCM_NB 7 PC187 +VDDNB_CORE
S1/D2

38 FCCM_NB FCCM
0.22U/25V_6 PL29
B SWNBY SWNBY B
8 9
PHASE 0.36uH/24A_7X7X3
6
GND

+5VS5
PAD

G2

VCC

1
S2

S2

S2

5 LGNBY PR216
LGATE 2.2_6 + + +
8

PC196 PQ40 PC276 PC275 PC274 PC278 PC279


9
4

330U_2V_7343

22U/6.3V_8

22U/6.3V_8
1U/6.3V_4 FDMS7602S SI

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
2

2
3
PR254 PR252
*0_2/S *0_2/S
PC186
2200P/50V_4

VSUMN_NBY SI
VSUMN_NBY 38

VSUMP_NB_Y
VSUMP_NB_Y 38

+VIN_VCC_GT

DB PR218
HGNB2
PU15 1_6
1

ISL6208BCRZ PC194 PC195 PC192 PC191


2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
UGATE

2D1

D1
G1

D1

2BOOTY2
BOOT
38 PWM2_NB 3
PWM SI
7 PC190
S1/D2

FCCM PL28
SI 0.22U/25V_6
8 SWNB2 9 SWNB2
PHASE 0.36uH/24A_7X7X3
6
GND

+5VS5
PAD

G2

VCC
S2

S2

S2

5 LGNB2 PR215 SI
LGATE 2.2_6
8

PC188 PQ41
9
4

1U/6.3V_4 FDMS7602S
PR253 PR251
*0_2/S *0_2/S
PC185
A A
2200P/50V_4

VSUMN_NBY2
VSUMN_NBY2 38

VSUMP_NB_Y2
VSUMP_NB_Y2 38

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom ISL6208 1A

Date: Friday, November 11, 2011 Sheet 39 of 44


5 4 3 2 1
1 2 3 4 5

( VTT/2A )
PR90
DB DB
PR91
+1.5VSUS
+VIN_DDR
PL5
+VIN
+1.5V +/- 5%
40
0_4 *0_4
+0.75V_DDR_VTT *0_8/S
Countinue current:10A

4
PU5 PC36
24 23 EC5 PC12 PC22 PC31 PC11 DB PC16
Peak current:12A

MODE
VTT VLDOIN

2200P/50V_4
68P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
DB

8
7
6
5
2 *0.1U/50V_6
A PC68 PC67 VTTSNS OCP minimum 15A A

10U/6.3V_8

10U/6.3V_8
1 VTTGND DB,SI
UGATE 21 1116DRVH 4
1 2 +5VS5
3 PC24 PD12 +1.5VSUS
GND PR58
22 1116VBST *RB501V-40 PQ10

3
2
1
VBST EMB20N03V PL17
( 3mA ) 25 GND 2.2_6
0.1U/25V_4 NIMS0603-R82M/13A
3,12,13 DDR_VTTREF 5 VTTREF PHASE 20 1116LL

1
PC72 7 NC LGATE 19 1116DRVL PR117
0.033U/10V_4 D 2.2_6 +
G PR239 PC245 PC235
*0_2/S

0.1U/10V_4
390U/2.5V_5X5.8ESR10
4

2
MAINON PR46 0_4 1116_S3ON 10 18 +5VS5 S
9,33,34,36,41 MAINON S3 PGND PQ17

1
2
3
17 TPCA8A11-H PC86
CS_GND

2200P/50V_4
PC27 SUSON PR45 0_41116_S5ON 11 PC7
33,41 SUSON S5 1U/6.3V_4
*0.1U/10V_4

HWPG PR31 0_4 51116PG 13 PR16


4,23,33,35,36,37 HWPG PGOOD VDDP 15
10_6 DB
PR37 PR19 Rds(on) 5m ohm
+VIN_DDR 1116TONSET
12 16 1116CS
TON CS
619K/F_4 6.98K/F_4
PR62 SI
9 6 V5FILT
FB DEM
10K/F_4
8 VDDQSNS VDD 14
B B

PR72 RT8207LGQW PC8


10.2K/F_4 SI 1U/6.3V_4

PR83
4 VDDIO_FB_H
*10K/F_4

C C

D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDRIII(G5616)
Date: Friday, November 11, 2011 Sheet 40 of 44
1 2 3 4 5
5 4 3 2 1

41
+VH28
+5V 8,18,24,25,26,27,30,31,32
+VAD +VIN 23,34,35,36,37,39,40,42,44
+1.5V 2,4,11,23,32,38
+1.8V
+3VS5 3,4,6,8,9,10,12,33,35,36,42,44
PR170
+5VS5 27,28,30,35,36,37,38,39,40,42,43
PR164 *0_4
+VH28
22_6
+VAD_1 34
+3VSUS 30,32
+12VALW 9,34,44
PC137
+1.5VSUS 2,3,4,5,12,13,40,44
0.1U/25V_4 PC123
D +3VLANVCC 29 D
PC136 1U/35V_6
ACIN 33,34

G5934CN
PC131

G5934CP
0.1U/25V_4
0.47U/25V_6

20

19

18

17

16
PR175
0_4 +VAD_1

VOUT
CP

D_CAP
VIN

CN
33 LAN_POWER 1 ON1 PG 15 G5934PG

PR179
750K/F_4

MAINON 2 14 G5934VSENSE
9,33,34,36,40 MAINON ON2 VSENSE
DB
+12VALW PR185
PU12 100K/F_4
3 GS7502Q3-R 13
33,40 SUSON ON3 REG

PC152
1U/16V_4
MAINON 4 ON4
PR194
DISC3 7G5934DISC3 +3VSUS
0_6
PR188 PR193
+3VLANVCC G5934DISC1 5 6G5934DISC2 +5V
C DISC1 DISC2 C
0_6 0_6

DRIVER4

DRIVER3

DRIVER1

DRIVER2
DISC4
+5VS5 +1.5VSUS

GND
DB PQ54

12

11

G5934DISC4 8

10

21

5
EMB20N03V
PC201 PC254 +VIN +1.5V
0.1U/10V_4 0.1U/10V_4
DB
MAIND 4 4
+3VS5
PQ42 5.1A 2A PR256
PC161 EMB20N03V *22_8

3
2
1

3
2
1
DB 2200P/50V_4 PR257
5

PC268 PR195 +5V +1.5V *1M_4

3
PQ55 0_6 PQ56
EMB20N03V +3VS5 *2N7002K
0.1U/10V_4

4 MAIND3.3V 2
PC202 PC203 PC261 PC264
5.2A

3
0.1U/10V_4 *10U/6.3V_6 0.1U/10V_4 *10U/6.3V_8
PC266 +3V PC126
1
2
3

+3V

1
2
5
6
2200P/50V_4 0.1U/10V_4

1
2
LAN_ON 3 PR258
0.7A PQ57 *1M_4
PQ30 +3VLANVCC *2N7002K
PC269 PC270 PC107 QM3002V

1
0.1U/10V_4 +3VS5 2200P/50V_4
*10U/6.3V_6

B B
+1.1V
PC125 PC124
+1.1VS5

0.1U/10V_4

*10U/6.3V_6
PC138
6
5
2
1
0.1U/10V_4

0.04A PR259
3 SUSD *22_8
+3VSUS PC214

5
PQ34

0.1U/10V_4

3
QM3002V PC142 D PQ58
4

2200P/50V_4 G *2N7002K
4
S 2
PC143 PC145
(4A )

1
2
3
PQ43
0.1U/10V_4

*10U/6.3V_6

RJK0392DPA +1.1V

1
PC209 PC207

0.1U/10V_4

*10U/6.3V_6
A A

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom Dis-charge IC (GS7502) 1A

Date: Friday, November 11, 2011 Sheet 41 of 44


5 4 3 2 1
1 2 3 4 5 6 7 8

VGA Core 42
A A

+3VS5

DB
PR192
10K/F_4

PR189
7,18,33,43,44 DGPU_PWROK
0_4
PD15 +VIN_VGA
DB DB +VIN
PR184 PR198
1 2 +3V +5VS5 PL12
*10K/F_4 10_6
*1N4448WS-7-F *0_8/S
PC162
PR178 4.7U/6.3V_6
33,43,44 DGPU_PR_EN 12K/F_4 PC150 PC151 PC146 PC147 PC148 PC164 PC133
SI +VGACORE +/- 5%

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
8232VDD
DB D D Countinue current:20A

8232PG
8232EN
18 PX_MODE PR187 SI G G
0_4 PC154 8232UGATE 4 8232UGATE4
1U/6.3V_4 PD16 S S Peak current:23A
PR183 RB501V-40 PQ36 PQ39
+3V_DELAY OCP minimum 33A

1
2
3

1
2
3
2 18232BOOT_1 TPCA8064-H TPCA8064-H

21

12

15
*10K/F_4 +5VS5

3
8232G0 19 PC155 +VGA_CORE

EN/MODE

UGATE
PAD

PGOOD

VDD
B 15 GFX_CORE_CNTRL0 G0 8232BOOTPR190 B
13 PL26
8232G1 BOOT 0.36U28A(ETQP4LR36AFC)
18
15 GFX_CORE_CNTRL1 G1
14
2.2_6
8232PHASE 0.1U/25V_4 600 mils
8232G2 PHASE
PR181 17 G2 PR180
DB PR250
+3V_DELAY 20 8232TON +VIN_VGA SI
TON

5
+2VREFO 4 PU13 360K/F_4 PR196 *0_2/S
*10K/F_4 REFO

1
PC159 11 8232LGATE D D 2.2_6
RT8232AZ LGATE + + + +
15 GFX_CORE_CNTRL2 G G
2 8232FB 4 8232LGATE4 PC179 PC272 PC273 PC271 PC176
FB S S

*330U_2V_7343
0.22U/10V_4

0.1U/10V_4
390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
PR182

2
PR191 8232REFIN 5 8232CS PQ37 PQ38
+3V_DELAY 16

1
2
3

1
2
3
REFIN CS TPCA8A10-H TPCA8A10-H PC157
*10K/F_4 49.9K/F_4
PC163 2200P/50V_4

D2

D1

D0
S2

S1
100P/50V_4

PR186
PR197 56K/F_4
6

VSETD0 10
30K/F_4
DB RDSon=3.5m ohm

VSETD2

VSETD1
VSETS1
VSETS2
PR201

9.09K/F_4
PR203
3.3K/F_4
PR200
PR199
2.05K/F_4
3.65K/F_4 PR202
PWRCNTL2 PWRCNTL1 PWRCNTL0 1.87K/F_4
Symour-XT (GPIO16) (GPIO20) (GPIO15) V-CORE
C C

L 0 0 0 1.0V

M 0 0 1 0.9V

H 0 1 0 0.875V

0 1 1 0.85V

1 0 0 0.8V

1 0 1 0.75V

D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom +VGACORE (RT8232AZ) 1A

Date: Friday, November 11, 2011 Sheet 42 of 44


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

43
A A

+5VS5

+1.8V +/- 5%

2
PJP5
*POWER_JP/S
Countinue current:2A
Peak current:3A

1
+5VPCU_1.8V

PC37 PR71
OCP minimum 4.5A
DB
PC40 PC41 +1.8V_VGA
*2200P/50V_4 *2.2_6

10U/6.3V_8

0.1U/10V_4
PU6 G5193R41U

2
16 VIN PH 10
+1.8V_L PR237
1 VIN PH 11 *POWER_JP/S
PL16

1
2 12 G5173_PH +1.8V_L
VIN PH PC73 NIMS0603-1R0M/11A
PR98
G5173EN 15 13
33,42,44 DGPU_PR_EN EN BOOT 1.8_VFBJP PR230
PR104 2.2_6
PR105 14 6 0.1U/10V_4 *0_2/S
7,18,33,42,44 DGPU_PWROK PW RGD VSNS
33K/F_4 R1
0_4
G5173COMP 7 3 PC231 PC227 PC228
PC77 COMP GND PR35 PC19

0.1U/10V_4

10U/6.3V_8

10U/6.3V_8
1U/6.3V_4 G5173RT 12K/F_4

*82P/50V_4
DB 8 RT/CLK GND 4
B B

PAD
PAD
PAD
PAD
PAD
PAD
G5173SS9 5 G5173-1.8_VFB
PR41 PR38 SS AGND
20K/F_4

182K/F_4

22
21
20
19
18
17
2
PC13 R2 PR18
PC29 10.2K/F_4
*100P/50V_4

0.01U/25V_4
1
PC14
470P/50V_4

V0=0.827*(R1+R2)/R2

DB for prevent interference

+1.8V_VGA

C C

1
PC236 PC233 PC229 PC241 PC149 PC144 PC153 PC141
1000P/50V_4

1000P/50V_4
0.1U/10V_4

1U/6.3V_4

0.1U/10V_4

1U/6.3V_4
0.01U/25V_4

0.01U/25V_4
2

2
D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom +1.8V_VGA (G5193) 1A

Date: Friday, November 11, 2011 Sheet 43 of 44


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3VS5
44
+3V 2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,41,42
+1.0V/0.935V +/- 5% +VIN 23,34,35,36,37,39,40,41,42

2
+3VS5 3,4,6,8,9,10,12,33,35,36,41,42
PJP6
*POWER_JP/S
Countinue current:2A +5VS5 27,28,30,35,36,37,38,39,40,41,42,43
+3V_VGA 18,30
Peak current:3A +12VALW 9,34,41

1
+3VPCU_1.0VGA
A +1.5VSUS 2,3,4,5,12,13,40,41 A
PC177 PR212
OCP minimum 4.5A +1.5V_VGA 18,20,21,22
DB
PC166 PC165
*2200P/50V_4 *2.2_6

10U/6.3V_8

0.1U/10V_4
PU14 G5193R41U
16 10 +1.0V_VGA
VIN PH +1.0V_VGA_S2
1 VIN PH 11 DB
PL27
2 12 G5173_PH_1.0VGA
VIN PH PC172 MMD-05CZ-1R0M/7A
G5173EN_1.0VGA 15 PR209
EN BOOT 13
33,42,43 DGPU_PR_EN PR211
1.0_VFBVGAJP
PR205 2.2_6
PR204 14 6 0.1U/10V_4 *0_2/S
7,18,33,42,43 DGPU_PWROK PW RGD VSNS
12K/F_4 R1
0_4
DB G5173COMP_1.0VGA 7 3 PC175 PC180 PC178
PC170 COMP GND PR206 PC167

0.1U/10V_4

10U/6.3V_8

10U/6.3V_8
*82P/50V_4
G5173RT_1.0VGA 8 2.15K/F_4

1U/6.3V_4
RT/CLK GND 4

PAD
PAD
PAD
PAD
PAD
PAD
G5173SS_1.0VGA
9 SS 5 G5173-1.0VFBVGA
PR208 PR210 AGND

20K/F_4

182K/F_4

22
21
20
19
18
17
PC171 R2 PR207

*100P/50V_4
PC174 10.2K/F_4

0.01U/25V_4
PC173

470P/50V_4
B
V0=0.827*(R1+R2)/R2 B

Symour-XT Voltage level R1 Value R1 P/N

17W 1.0V 2.15K CS22152FB07

25W 0.935V 1.37K CS21372FB19

+1.5VSUS
+1.5V_VGA +12VALW

+12VALW
+3V_VGA +VIN PC158

5
+3VS5 PR108 PR96

0.1U/10V_4
+VIN *22_8 1M/F_4 D
G
PR66 1.5V_OND 4
1
2
5
6

PR73 1M/F_4 PR122 S

3
*22_8 PC35 PQ22
1M/F_4
(5A )

1
2
3
PR33 3VGFX_OND 3 0.1U/10V_4 *2N7002K PQ35
C
1M/F_4 PC156 RJK0392DPA +1.5V_VGA C
3

PQ5 PQ6 PQ12 1.5V_ONG

0.01U/25V_4
2 2
*2N7002K 2N7002K QM3002V 0.06A +3V 6 VGA_REQ
4

3
+3V_VGA
2 2 PQ26
PC34 PR103 PR121 2N7002K PC139 PC168 PC169
2

1
3

PQ7 0.01U/25V_4

0.1U/10V_4

*10U/6.3V_6

*10U/6.3V_6
*0_8 1M/F_4
2N7002K
PR67 PR32 PC61 PC62 PC189 PQ25
1

1
DGPU_PR_EN 0.1U/10V_4 0.1U/10V_4 PDTC144EU
*10U/6.3V_6

2 1M/F_4
0_4

3VGFX_ONG
1

DGPU_PR_EN PR116 33K/F_4 R40 0_4 PX_MODE1 PX_MODE1 18

PC105
0.47U/6.3V_4

D D

PROJECT : R53
Quanta Computer Inc.
Size Document Number Rev
Custom +1.0V_VGA (G5193) 1A

Date: Friday, November 11, 2011 Sheet 44 of 44


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