Sri Manakula Vinayagar Engineering College Department of Electrical and Electronics Engineering

SRI MANAKULA VINAYAGAR ENGINEERING COLLEGE, PUDUCHERRY
__________________________________________________________________________________________
DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING
Subject Name: ELECTRONIC DEVICES AND CIRCUITS Subject Code: EE T34
UNIT – II BIPOLARJUNCTION TRANSISTOR
BJT: NPN and PNP transistors –Ebers - Moll model - CB, CE and CC configurations – Transistor
Characteristic – Biasing– DC and AC load line – Operating point – Stabilization– Bias compensation techniques
– Thermal stability and runaway
Amplification –BJT as a switch
FET: JFET – Drain and transfer characteristics – Shockley’s equation – Comparison between JFET and BJT –
Biasing of FETs. –MOSFET: Types and characteristics –
MOSFET as a switch
Selection of devices using specification sheets– Introduction to SJT and SiC MOSFET
2Marks
1. Why base is made thin in BJT? [Nov/Dec 2014]
Transistor consists of three portions namely emitter, base and collector. Among them base
forms the middle part. It is very thin and lightly doped because it allows most of the emitter current
carriers towards the collector. Since base is acting as an interface it doesn't need more area.
2. What is meant by biasing a transistor? Why is it necessary?[Nov/Dec 2015]
For normal operation base emitter junction should be forward biased and collector base
junction should be reverse biased .The proper flow of zero signal collector current and the
maintenance of collector-emitter voltage during the passage of signal is called the transistor biasing.
The amount of biasing required is significant for the establishment of the operating or Q-point which
decides the mode of operation.
3. Define the different operating regions of transistor. . [Nov/Dec 2014]
Active region: It is defined in which transistor collector junction is biased in reverse direction and
emitter junction in forward direction.
Cutoff region: The region in which the collector and emitter junctions are both reverse-biased
Saturation region : The region in which both the collector and emitter junctions are forward biased.
4. Define Base width modulation (Early effect) . [Nov 2013]

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In a CB configuration, an increase in collector voltage increases the width of the depletion

region at the output junction diode. This will decrease the effective width of the base. This is known
as early effect. Due to this effect recombination rate reduces at the base region and charge gradient is
increased within the base.
5. Explain the significance of Base width modulation (Early effect) . [Nov 2013]
a) It reduces the charges recombination of electrons with holes in the base region, hence the current
gain increases with the increase in collector -base voltage
b) The charge gradient is increased within base; hence the current due to minority carriers injected
across emitter junction increases.
6. What are the three types of configurations? [Nov/Dec 2015]
Common base configuration, Common emitter configuration Common collector configuration
7. Among CB, CE, CC which is most important?
The CE configuration is important. The reasons
i) High current gain

ii) Output to input impedance ratio is moderate therefore easy coupling is possible
between various transistor stages
iii) It finds excellent usage in audio frequency applications hence used in receivers and
transmitters
8. Give the advantages of CE configuration. . [Nov 2013]
i. High output impedance
ii. High current gain
iii. High power gain
9. What is thermal runaway? [Nov 2013]
The reverse saturation current in a semiconductor doubles for every 100 C rise in temperature
I as temperature increases the leakage current increases I and the collector current also increases. The
increase in collector produces an increase in power dissipation at the collector - base junction. This I
in turn further increases the temperature of the collector-base junction causing the collector current to
further increase. This process may become cumulative and it is possible for the transistor to burn out.
This process is known as Thermal runaway.
10. How thermal runaway can be avoided?
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Thermal runaway can be avoided using a stabilization or heat sink with the transistor.
11. How a transistor is used as a switch?
A transistor should be operated in saturation and cutoff regions to use it as a switch .While
operating in saturation region transistor carry heavy current hence considered as ON state. In cutoff it
doesn't carry current and it is equivalent to open switch.
13. Which configuration is known as emitter follower and why it is named so?
CC configuration is known as emitter follower, whatever may be the signal applied at the
input, may produce same signal at the output. In other words, the gain of the circuit is unity. So that
the common collector circuit - the so called emitter follower is named as emitter follower. (Output
follows the input)
14. Why do the output characteristics of CB transistor have a slight upward slope?
The emitter and collector are forward biased under the saturation region. Hence a small
change in collector voltage causes a significant change in collector current .Therefore a slight upward
slope is found in the output characteristics.
15. Compare the performance of CE, CB, CC
Parameters CB CE CC
Current gain (Ai) Low High High
Voltage gain (Vi) High High Low
Input resistance (Ri) Low Medium High
Output resistance (Ro) High Medium Low
16. Compare BJT and JFET (May 2010)
BJT JFET
Low input impedance High input impedance
High Output impedance Low output impedance
Bipolar device Unipolar device
Noise is more Less noise
Cheaper Costlier
Gain is more Gain is less
Current controlled device Voltage controlled device
17. Mention the advantages of FET over BJT? (Nov 2013)
i) The noise level is very low in FET since there are no junctions.
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ii) FET has very high power gain iii) Offers perfect isolation between input and output since it has
very high input impedance.
iv) FET is a negative temperature coefficient device hence avoids thermal runaway.
18. Explain why an ordinary transistor is called bipolar?
Because the transistor operation is carried out by two types of charge carriers(majority and minority
carriers),an ordinary transistor is called bipolar.
19. Why transistor is called current controlled device?
The output voltage, current and power is controlled by the input current in a transistor so it is called
the current controlled device.
20. Why silicon type transistors are more used than germanium type?
Because silicon transistor has smaller cutoff current ICBO, small variations in ICBO due to
variations in temperature and high operating temperature as compared to those in case of germanium
type.
21. Why CC configuration is called a voltage buffer?
Because of its high input impedance and low output impedance, the common collector finds
wide application as a buffer amplifier between a high impedance source and low impedance load. Its
other name is emitter follower.
22. What do you mean by operating point?
Quiescent point is a point on the dc load line which represents VCE and IC in the absence of ac signal
and variations in VCE and IC take place around this point where ac signal is applied.
23. Why heat sinks are used in power amplifiers? Heat sink is a specially designed metal sheet
over which the power transistor is mounted so that it dissipates heat more effectively and protects the
power transistor from overheating. It increases the area of contact with the atmosphere.
24. What is stability factor?
Stability factor is defined as rate of change of collector current withrespect to reverse

saturation current with VBE and β constant
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(11 MARKS)
1. With diagram explain construction and operation of NPN transistor.

 A bipolar (junction) transistor (BJT) is a three-terminal electronic device constructed of
doped semiconductor material and may be used in amplifying or switching applications.
 Bipolar transistors are so named because their operation involves both electrons and holes.
 Charge flow in a BJT is due to bidirectional diffusion of charge carriers across a junction
between two regions of different charge concentrations.
 By design, most of the BJT collector current is due to the flow of charges injected from a
high-concentration emitter into the base where there are minority carriers that diffuse towards
the collector and so BJTs are classified as minority-carrier devices.
Construction:
 The BJT consists of silicon (or germanium) crystal in which a thin layer of N type silicon is
sandwiched between two layers of P type silicon. This transistor is referred to as PNP.
 Alternatively in a NPN transistor, a layer of P type material is sandwiched between two
layers of N type material.
 The three terminals of the transistor are as follows:
Emitter-Heavily doped so that it can inject large charge carriers to the base.
Base-It is lightly doped and very thin and it passes most of the injected charge carriers from
the emitter into the collector.
Collector-It is moderately doped
Fig 2.1 Schematic symbols for transistor

Operation:
Applying external voltage to a transistor is called biasing. In order to operate transistor properly
as an amplifier, it is necessary to correctly bias the two PN junctions with external voltages.
Depending upon external bias voltage polarities used, the transistor works in one of the three
regions.
OPERATION OF
S.NO REGION EMITTER BASE COLLECTOR BASE
TRANSISTOR
Acts as an
1. Active region Forward biased Reverse biased
amplifier
Acts as an open
2. Cut-off region Reverse biased Reverse biased
switch
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Saturation Acts as a closed

3. Forward biased Forward biased
region switch
To bias the transistor in its active region the emitter base junction is forward biased, while the
collector-base junction in reverse-biased as shown in Fig 2.2.Fig 2.2.shows the circuit
connections for active region for both NPN and PNP transistors.
Fig 2.2 Transistor biasing a)PNP b)NPN
Operation of NPN transistor:

 As shown in fig 2.3 the NPN transistor is biased in the forward active mode. The emitter –
base junction is forward biased only if VEB is greater than barrier potential which is 0.7V for
Si and 0.3 V for germanium.
 Forward bias applied to the emitter base junction of an NPN transistor causes a lot of
electrons from the emitter region to cross over to the base region.
 This constitutes the emitter current IE

 As the base is lightly doped with P-type impurity, the number of holes in the base region is
very small and hence the number of electrons that combine with holes in the P – type base
region is also very small.
 Hence a few electrons combine with holes to constitute a base current IB.
 The remaining electrons (more than 95%) crossover into the collector region to constitute a
collector current IC.
 Thus the base and collector current summed up give the emitter current i.e. IE= (IC+IB).
 This collector current is also called as injected current because this current is produced due to
electrons injected from the emitter region.
 There is also another component of collector current due to thermally generated carriers. This
is called reverse saturation current and is quite small.
 The equation gives the fundamental relationship between the currents in a bipolar transistor
circuit.
 Also, this fundamental equation shows that there are current amplification factors  and  in
common base transistor configuration and common emitter transistor configuration
respectively for the static (d.c) currents, and for small changes in the currents.
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Fig 2.3 Current in NPN transistor

Large – signal current gain ():
The large signal current gain of a common base transistor is defined as the ratio of the
negative of the collector – current increment to the emitter – current change from cut off (IE=0)
to IE,i.e.
 
Ic  ICBO 
IE  0
where ,ICBO (or ICO) is the reverse saturation current flowing through the reverse biased collector
– base junction. i.e. the collector to base leakage current with emitter open.
As the magnitude of ICBO is negligible when compared to IE, the above expression can be
written as
I
 C
IE
 Since IC and IE are flowing in opposite directions,  is always positive.
 Typical value of  ranges from 0.90 to 0.995.
 Also,  is not a constant but varies with emitter current IE, collector voltage VCB and the
temperature.
Operation of PNP transistor:

 As shown in fig.2.4 the forward bias applied to the emitter- base junction of a PNP transistor
causes a lot of hoses from the emitter regions to cross over to the base region as the base is lightly
doped with N-type impurity.
 The number of electrons in the base regions is very small and hence the number of holes
combined with electrons in the N – type base region is also very small. Hence a few holes
combined with electrons to constitute a base current IB.
 The remaining holes (more than 95%) cross over in to the collector region to constitute a
collector current IC. Thus the collector and base current when summed up gives the emitter
current. I.e. IE= (IC+IB).
 In the external circuit of the PNP bipolar junction transistor, the magnitudes of the emitter current
IE, the base current IB and the collector current IC are related by
 IE=IC+IB
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Fig 2.4 Current in PNP transistor
2. Explain the input and output of a transistor in CE configuration. Discuss the parameters and
various regions involved in it.
The input is applied between base and emitter, and output is taken from collector and emitter. Here
the emitter of transistor is common to both input and output circuits and hence the name common
emitter configuration.
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Input Characteristic:
 The curve between input current IB and input voltage VBE at constant collector emitter voltage
VCE.
 After the cut in voltage the base current increases rapidly with small increase in base emitter
voltage. It means the dynamic input resistance is small in CE configuration.
 It is the ratio of change in emitter to base voltage (∆VBE) to the corresponding change in
emitter current (∆IB) for a constant collector to base voltage (VCE).
∆𝑉𝐵𝐸
 Ri = at constant VCE
∆𝐼𝐵
 For a fixed value of VBE , base current decreases as VCE is increased. A larger value of VCE
results in large reverse bias at collector base p-n junction.
 This reduces the depletion region and reduces the effective width of the base. Hence there are
fewer recombination in the base region reducing the base current.
Output characteristics:
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(1) Active Region:
 If αdc is truly constant then IC would be independent of VCE.

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 But because of early effect, αdc increases by 0.1% (0.001) e.g. from 0.995 to 0.996 as
VCE increases from a few volts to 10V. Then βdc increases from 0.995 / (1-0.995) = 200 to
0.996 / (1-0.996) = 250 or about 25%.
 This shows that small change in a reflects large change in b. Therefore the curves are
subjected to large variations for the same type of transistors.
(2) Cut Off:
 Cut off in a transistor is given by IB = 0, IC= ICO. A transistor is not at cut off if the base
current is simply reduced to zero (open circuited) under this condition,
IC = IE= ICO / ( 1-αdc) = ICEO
 The actual collector current with base open is designated as ICEO. Since even in the
neighborhood of cut off, a dc may be as large as 0.9 for Ge, then IC=10 ICO(approximately), at
zero base current.
 Accordingly in order to cut off transistor it is not enough to reduce IB to zero, but it is
necessary to reverse bias the emitter junction slightly. It is found that reverse voltage of 0.1 V
is sufficient for cut off a transistor. In Si, the α dc is very nearly equal to zero, therefore, IC =
ICO.
 Hence even with IB= 0, IC= IE= ICO so that transistor is very close to cut off. In summary, cut
off means IE = 0, IC = ICO, IB = -IC = -ICO , and VBE is a reverse voltage whose magnitude is of
the order of 0.1 V for Ge and 0 V for Si.
 In this region both the junctions of the transistor are reverse biased.
(3)Saturation Region:
 If VCE is reduced to a small value such as 0.2V,then collector base junction becomes forward
biased ,since the emitter base junction is already F.B by 0.7V.When both the junctions are
forward biased the transistor operates in this region and the value ranges between 0.1 V to 03
V.
3. Explain the input and output of a transistor in CB configuration. Discuss the parameters
and various regions involved in it.
 This configuration is also called as grounded base configuration.
 In this case the input is connected between the emitter and base while the output is taken
across the collector and base.
 Thus the base of the transistor is common to both input and output circuits and hence the
name, common base configuration. The common base circuit arrangement for NPN
transistors is shown in Fig.2.5
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Fig 2.5 Circuit to determine CB characteristics
Current Amplification Factor (α):
The current amplification factor is defined as the ratio of changes in Collector current (∆IC) to the
change in emitter current (∆IE) when the collector to base voltage (VCB) is maintained at a constant
value.
α=(∆IC)/ (∆IE) (at constant VCB)
The value of α is always less than unity. The practical value of transistors lies between 0.95 and 0.99.
The circuit arrangement for determining the characteristics of a common base NPN transistors is
shown in Fig 2.5.In this circuit, the collector to base voltage (VCB) can be varied by adjusting the
potentiometer R2. The emitter to base voltage (VEB) can be varied by adjusting the potentiometer Rl.
The DC voltmeters and DC milliammeters are connected in the emitter and collector circuits to
measure the voltages and currents
1. Input Characteristics:
The curves plotted between the emitter current (IE) and the emitter to base voltage (VEB) at constant
collector to base voltage (VCB) are known as input characteristics of a transistor in common base
configuration.
 The collector base voltage (VCB) is kept constant at zero volt and emitter current is increased
from zero in suitable steps by increasing emitter to base voltage (VEB).
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 When VCB is equal to zero and emitter-base junction is forward biased, the junction behaves
as a forward biased diode so that the emitter current increases rapidly with small increase in
emitter-base (VEB).It means the input resistance is very small.
 Input Resistance (Ri):It is the ratio of change in emitter to base voltage (∆VEB) to the
corresponding change in emitter current (∆IE) for a constant collector to base voltage (VCB).
∆𝑉𝐸𝐵
 Ri = at constant VCB
∆𝐼𝐸
 When VCB is increased keeping VEB constant, the width of the base region will decrease. This
effect results in increase of IE .Thus the curves shift towards the left as VCB is increased.
 The width of the base region occupied by charge particles is known as electrical width of the
base region. When VCB increases the width of the depletion region in base region also
increases which reduces the electrical base width. This is called early effect or base width
modulation.
2. Output Characteristics:
 The curve plotted between the collector current (IC) and the collector to base voltage (VCB) at
constant emitter current (IE) are known as output characteristics of a transistor is common base
configuration. The curves are known as the output or collector or static characteristics.
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The output characteristics are as shown in Fig. and it can be divided into three important regions
namely (i) Saturation region (ii) Active region (iii) Cut-off region.
(1). Active region:

 In this region the collector base junction is reverse biased and the emitter base junction is
forward biased.
 In this region collector current is approximately equal to emitter current and transistor works as
an amplifier.
 Consider first that the emitter current is zero. Then the collector current is small and equals the
reverse saturation current ICO of the collector junction considered as a diode.
 If the forward current IB is increased, then a fraction of IE ie. αdcIE will reach the collector.
 In the active region, the collector current is essentially independent of collector voltage and
depends only upon the emitter current.
 This provides very high dynamic output resistance which is the ratio of change in collector base
voltage to the resulting change in collector current at constant emitter current.
∆𝑉𝐶𝐵
 VO = at constant IE
∆𝐼𝐶
 Because adc is, less than one but almost equal to unity, the magnitude of the collector current is
slightly less that of emitter current.
 The collector current slightly increases with voltage. This is due to early effect.
 At higher voltage collector gathers in a few more electrons.
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 This reduces the base current. The difference is so small, that it is usually neglected. If the
collector voltage is increased, then space charge width increases; this decreased the effective
base width.
 Then there is less chance for recombination within the base region.
 It means that the circuit has very high output resistance about 500 K Ω.
(2). Saturation region:
 The region to the left of the ordinate VCB = 0, and above the IE = 0, characteristic in which both
emitter and collector junction are forward biased, is called saturation region.
 When collector diode is forward biased, there is large change in collector current with small
changes in collector voltage.
 A forward bias means, that p is made positive with respect to n, there is a flow of holes from p
to n. This changes the collector current direction.
 If diode is sufficiently forward biased the current changes rapidly. It does not depend upon
emitter current.
(3). Cut off region:
 The region below IE = 0 and to the right of VCB for which emitter and collector junctions are
both reversed biased is referred to cutoff region.
 The characteristics IE = 0, is similar to other characteristics but not coincident with horizontal
axis.
 The collector current is same as ICO. ICBO is frequently used for ICO. It means collector to base
current with emitter open. This is also temperature dependent.
4. Explain the input and output of a transistor in CC configuration. Discuss the parameters
and various regions involved in it.
 The input is applied between base and collector, and output is taken from emitter and collector.
Here the collector of transistor is common to both input and output circuits and hence the name
common collector configuration
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 The common emitter configuration has a current gain approximately equal to the β value of
the transistor itself. In the common collector configuration the load resistance is situated in
series with the emitter so its current is equal to that of the emitter current.
Input characteristics:
i. The input current IB is plotted on the Y axis and the input voltage VCB is plotted on the X axis for a
constant output voltage VCE.
ii. The base emitter junction is not forward biased upto VCB =1.5volt. Therefore the base current is
zero upto VCB =1.5 volt at constant VCE of 1volt.
iii. Then it increases rapidly as VCB is inceased beyond 1.5volt. This is because junction VCB is more
and more forward biased.
iv.The input voltage VCB is largely determined by the level of collector to emitter voltage VCE
Output Characteristics:
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i. It is a graph of output current IE vs output voltage VEC at constant value of input current IB.
ii. Biasing of the 2 junctions of a transistor is done as follows.
Sl.
Region of operation Base emitter junction Collector base junction
No.
1. Cutoff region Reverse biased Reverse biased
2. Active region Forward biased Reverse biased
3. Saturation region Forward biased Forward biased
iii. The region below the curve for IB = 0 is called cutoff region. In the active region, at a fixed value
of VEC if IB is increased, it will cause IE to increase substantially. In the saturation region, emitter
current increases rapidly with increase in VEC.
The Common Collector Current Gain
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5. Explain about different Biasing compensation techniques.
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19
3) Diode bias compensation
IR = ID + IB (ID is reverse saturation Current increases with temp.)

When temperature increases, IC increases at the time, ID also increases, making IB to Reduce and
controlling IC.
6. Explain thermal runaway
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7. Explain in detail any two biasing methods for a transistor circuit with neat diagram and obtain
respective stability factors.
Fixed bias circuit
 In this method, a high resistance RB (several hundred kΩ) is connected between the base and
+ve end of supply for npn transistor (See Fig.) and between base and negative end of supply
for pnp transistor. Here, the required zero signal base current is provided by VCC and it flows
through RB
 It is because now base is positive w.r.t. emitter i.e. base-emitter junction is forward biased.
The required value of zero signal base current IB (and hence IC = βIB) can be made to flow by
selecting the proper value of base resistor RB.
Circuit analysis. It is required to find the value of RB so that required collector current flows in the
zero signal conditions. Let IC be the required zero signal collector current
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Considering the closed circuit ABENA and applying
Kirchhoff 's voltage law, we get,
 As VCC and IB are known and VBE can be seen from the transistor manual, therefore, value of
RB can be readily found from exp. (i).
 Since VBE is generally quite small as compared to VCC, the former can be neglected with little
error. It then follows from exp. (i) that :
 It may be noted that VCC is a fixed known quantity and IB is chosen at some suitable value.
Hence, RB can always be found directly, and for this reason, this method is sometimes called
fixed-bias method.
 In fixed-bias method of biasing, IB is independent of IC so that dIB/dIC = 0. Putting the value

of dIB / dIC = 0 in the above expression, we have,
Stability factor, S = β + 1
 Thus the stability factor in a fixed bias is (β + 1). This means that IC changes (β + 1) times as
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much as any change in ICO.

 For instance, if β = 100, then S = 101 which means that IC increases 101 times faster than ICO.
Due to the large value of S in a fixed bias, it has poor thermal stability.
Advantages:
(i) This biasing circuit is very simple as only one resistance RB is required.
(ii) Biasing conditions can easily be set and the calculations are simple.
(iii) There is no loading of the source by the biasing circuit since no resistor is employed across base-
emitter junction.
Disadvantages:
(i) This method provides poor stabilization. It is because there is no means to stop a self increase in
collector current due to temperature rise and individual variations. For example, if β increases due to
transistor replacement, then IC also increases by the same factor as IB is constant.
(ii) The stability factor is very high. Therefore, there are strong chances of thermal runaway.
Due to these disadvantages, this method of biasing is rarely employed.
Biasing with collector feedback resistor.
 In this method, one end of RB is connected to the base and the other end to the collector as
shown in Fig..
 Here, the required zero signal base current is determined not by VCC but by the collector
base voltage VCB. It is clear that VCB forward biases the base-emitter junction and hence
base current IB flows through RB. This causes the zero signal collector current to flow in the
circuit.
Circuit analysis.
 The required value of RB needed to give the zero signal current IC can be determined
as follows. Referring to Fig.
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 It can be shown mathematically that stability factor S for this method of biasing is less than
(β+ 1) i.e.
 Stability factor, S < (β+ 1)
 Therefore, this method provides better thermal stability than the fixed bias.
Note. It can be easily proved that Q-point values (IC and VCE) for the circuit are given by ;
Advantages
(i) It is a simple method as it requires only one resistance RB.
(ii) This circuit provides some stabilisation of the operating point as discussed below :
VCE = VBE + VCB
Suppose the temperature increases. This will increase collector leakage current and hence the
total collector current. But as soon as collector current increases, VCE decreases due to greater drop
across RC. The result is that VCB decreases i.e. lesser voltage is available across RB. Hence the base
current IB decreases. The smaller IB tends to decrease the collector current to original value.
Disadvantages
(i) The circuit does not provide good stabilization because stability factor is fairly high, though
it is lesser than that of fixed bias. Therefore, the operating point does change, although to lesser
extent, due to temperature variations and other effects.
(ii) This circuit provides a negative feedback which reduces the gain of the amplifier as explained
hereafter. During the positive half-cycle of the signal, the collector current increases. The
increased collector current would result in greater voltage drop across RC. This will reduce the base
current and hence collector current.
Voltage Divider Bias Method
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This is the most widely used method of providing biasing and stabilization to a transistor. In this
method, two resistances R1 and R2 are connected across the supply voltage VCC (See Fig. 9.24) and
provide biasing. The emitter resistance RE provides stabilization. The name ‘‘voltage divider’’ comes
from the voltage divider formed by R1 and R2. The voltage drop across R2 forward biases the base-
emitter junction. This causes the base current and hence collector current flow in the zero signals
conditions.
Circuit analysis. Suppose that the current flowing through resistance R1 is I1. As base current IB is very
small, therefore, it can be assumed with reasonable accuracy that current flowing through R2 is also I1.
(i) Collector current IC:
𝑉𝐶𝐶
𝐼1 =
𝑅1 + 𝑅2
∴ Voltage across resistance R2 is
𝑉𝐶𝐶
𝑉2 = ∗ 𝑅2
𝑅1 + 𝑅2
Applying Kirchhoff 's voltage law to the base circuit of Fig. 9.24,
V2 = VBE + VE
or V2 = VBE + IE RE
𝑉2 −𝑉𝐵𝐸
or 𝐼𝐸 = 𝑅𝐸
Since IE ≈IC
𝑉2 − 𝑉𝐵𝐸
𝐼𝐶 =
𝑅𝐸
It is clear from exp. (i) above that IC does not at all depend upon β. Though IC depends upon VBE but
in practice V2 >> VBE so that IC is practically independent of VBE. Thus IC in this circuit is almost
independent of transistor parameters and hence good stabilization is ensured. It is due to this reason
that potential divider bias has become universal method for providing transistor biasing.
(ii) Collector-emitter voltage VCE. Applying Kirchhoff 's voltage law to the collector side,
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VCC=IC RC +VCE + IE RE
= IC RC +VCE + IC RE
VCE = VCC -IC (RC + RE)
Stabilisation. In this circuit, excellent stabilisation is provided by RE. Consideration of eq. (i)
reveals this fact.
V2 = VBE + IC RE
Suppose the collector current IC increases due to rise in temperature. This will cause the
voltage drop across emitter resistance RE to increase. As voltage drop across R2 (i.e. V2) is
*independent of IC, therefore, VBE decreases. This in turn causes IB to decrease. The reduced value
of IB tends to restore IC to the original value.
Stability factor. It can be shown mathematically (See Art. 9.13) that stability factor of the circuit is
given by:
If the ratio R0/RE is very small, then R0/RE can be neglected as compared to 1 and the stability
factor becomes :
1
Stability factor = (𝛽 + 1) × 𝛽+1
This is the smallest possible value of S and leads to the maximum possible thermal stability. Due to
design considerations, R0 / RE has a value that cannot be neglected as compared to 1. In actual
practice, the circuit may have stability factor around 10.
8. Explain about the Transistor DC Load Line and AC load line

In the transistor circuit analysis, it is generally required to determine the collector current for various
collector-emitter voltages. One of the methods can be used to plot the output characteristics and
determine the collector current at any desired collector-emitter voltage. However, a more convenient
method, known as load line method can be used to solve such problems. As explained later in this
section, this method is quite easy and is frequently used in the analysis of transistor applications. d.c.
load line. Consider a common emitter npn transistor circuit shown in Fig. 8.35 (i) where no signal is
26
applied. Therefore, d.c. conditions prevail in the circuit. The output characteristics of this circuit are
shown in Fig.
The value of collector-emitter voltage VCE at any time is given by;
VCE = VCC- ICRC
As VCC and RC are fixed values, therefore, it is a first degree equation and can be represented by a
straight line on the output characteristics. This is known as d.c. load line and determines the locus of
VCE − IC points for any given value of RC. To add load line, we need two end points of the straight line.
These two points can be located as under :
(i) When the collector current IC = 0, then collector-emitter voltage is maximum and is equal to VCC
i.e. Max. VCE = VCC- ICRC
= VCC (Since IC = 0)
This gives the first point B (OB = VCC) on the collector-emitter voltage axis as shown in Fig. (ii).
(ii) When collector-emitter voltage VCE = 0, the collector current is maximum and is equal to VCC /RC
i.e. VCE = VCC − IC RC
or 0 = VCC − IC RC
∴ Max. IC = VCC /RC
This gives the second point A (OA = VCC /RC) on the collector current axis as shown in Fig. (ii).
By joining these two points, d.c. *load line AB is constructed.
Importance. The current (IC) and voltage (VCE) conditions in the transistor circuit are represented by
some point on the output characteristics. The same information can be obtained from the load line. Thus
when IC is maximum (= VCC /RC), then VCE = 0 as shown in Fig. below. If IC = 0, then VCE is maximum
and is equal to VCC. For any other value of collector current say OC, the collector-emitter voltage VCE =
OD. It follows, therefore, that load line gives a far more convenient and direct solution to the problem.
27
Note. If we plot the load line on the output characteristic of the transistor, we can investigate the
behavior of the transistor amplifier. It is because we have the transistor output current and voltage
specified in the form of load line equation and the transistor behaviour itself specified implicitly by the
output characteristics.
AC Load line
•
• The ac load line of a given amplifier will not follow the plot of the dc load line.
This is due to the dc load of an amplifier is different from the ac load.
IC(sat) = ICQ + (VCEQ/rC)

ac load line
ac load line
IC IC Q - point
dc load line
VCE(off) = VCEQ + ICQrC
VCE
VCE
• The ac load line is used to tell you the maximum possible output voltage swing for a given
common- emitter amplifier.
• In other words, the ac load line will tell you the maximum possible peak-to-peak output
voltage (Vpp ) from a given amplifier.
• This maximum Vpp is referred to as the compliance of the amplifier.
Operating Point
The zero signal values of IC and VCE are known as the operating point. It is called operating point
because the variations of IC and VCE take place about this point when signal is applied. It is also called
quiescent (silent) point or Q-point because it is the point on IC − VCE characteristic when the transistor is
silent i.e. in the absence of the signal.
Suppose in the absence of signal, the base current is 5 μA. Then IC and VCE conditions in the
circuit must be represented by some point on IB = 5 μA characteristic. But IC and VCE conditions in the
circuit should also be represented by some point on the d.c. load line AB. The point Q where the load
line and the characteristic intersect is the only point which satisfies both these conditions. Therefore, the
point Q describes the actual state of affairs in the circuit in the zero signal conditions and is called the
operating point. Referring to Fig. 8.37, for IB = 5 μA, the zero signal values are :
28
VCE = OC volts
IC = OD mA
It follows, therefore, that the zero signal values of IC and VCE (i.e. operating point) are determined
by the point where d.c. load line intersects the proper base current curve.
FET
(11 MARKS)
29
1. Explain the construction of N channel JFET .Also explain the drain and transfer
characteristics of N-channel JFET.
30
UNBIASED JFET
31
32
33
2. Explain the Transfer Characteristics of N channel JFET. [Nov/Dec 2014] [April/May 2014]
34
3. Explain about the P channel JFET in detail with its characteristics
35
4. Explain about JFET parameters.
36
37
38
5. Briefly explain different BIASING OF FET
39
40
41
42
6.With the help of a neat diagram explain the construction, operation and characteristics of N
channel and P channel depletion type MOSFET.
43
44
45
46
7. With the help of a neat diagram explain the construction, operation and
characteristics of N channel and P channel enhancement type MOSFET.
47
48
49
50
\
51
MOSFET as switch
In this circuit arrangement an Enhancement-mode N-channel MOSFET is being used to switch a

simple lamp “ON” and “OFF” (could also be an LED).
The gate input voltage VGS is taken to an appropriate positive voltage level to turn the device and
therefore the lamp load either “ON”, ( VGS = +ve ) or at a zero voltage level that turns the device
“OFF”, ( VGS = 0V ).
If the resistive load of the lamp was to be replaced by an inductive load such as a coil, solenoid or
relay a “flywheel diode” would be required in parallel with the load to protect the MOSFET from
any self generated back-emf.
Above shows a very simple circuit for switching a resistive load such as a lamp or LED. But when
using power MOSFETs to switch either inductive or capacitive loads some form of protection is
required to prevent the MOSFET device from becoming damaged. Driving an inductive load has the
opposite effect from driving a capacitive load.
For example, a capacitor without an electrical charge is a short circuit, resulting in a high “inrush” of
current and when we remove the voltage from an inductive load we have a large reverse voltage
build up as the magnetic field collapses, resulting in an induced back-emf in the windings of the
inductor.
Then we can summarise the switching characteristics of both the N-channel and P-channel type
MOSFET within the following table.
MOSFET Type VGS ≪ 0 VGS = 0 VGS ≫ 0
52
N-channel Enhancement OFF OFF ON
N-channel Depletion OFF ON ON
P-channel Enhancement ON OFF OFF
P-channel Depletion ON ON OFF
Note that unlike the N-channel MOSFET whose gate terminal must be made more positive
(attracting electrons) than the source to allow current to flow through the channel, the conduction
through the P-channel MOSFET is due to the flow of holes. That is the gate terminal of a P-channel
MOSFET must be made more negative than the source and will only stop conducting (cut-off) until
the gate is more positive than the source.
So for the enhancement type power MOSFET to operate as an analogue switching device, it needs to
be switched between its “Cut-off Region” where: VGS = 0V (or VGS = -ve) and its “Saturation
Region” where: VGS(on) = +ve. The power dissipated in the MOSFET ( PD ) depends upon the current
flowing through the channel ID at saturation and also the “ON-resistance” of the channel given
as RDS(on).
Major FET datasheet specifications & parameters
Some of the main FET specifications used in datasheets are defined below. Some of the parameters
are particularly important for different types of FET, e.g. JFET while others may be more applicable
to the MOSFET, etc.
 Gate source voltage, VGS : The FET parameter VGS is the rating for the maximum voltage that
can be tolerated between the gate and source terminals. The purpose for including this parameter
in the data sheet is to prevent damage of the gate oxide. The actual gate oxide withstand voltage is
typically much higher than this but it varies as a result of the tolerances that exist in the
manufacturing processes. It is advisable to remain well within this rating so that the reliability of
the device is maintained. Often many design rules indicate that the device should only be run to
60 or 70% of this rating.
 Drain-Source Voltage, VDSS: This is a rating for the maximum drain-source voltage that can be
applied without causing avalanche breakdown. The parameter is normally stated for the case
where the gate is shorted to the source and for a temperature of 25°C. Depending on temperature,
the avalanche breakdown voltage could actually be less than the VDSS rating.
When designing a circuit, it is always best to leave a significant margin between the maximum
voltage to be experienced and the VDSS specification. Often they may be run at around 50%
VDSS to ensure reliability.
 Gate reverse leakage current , Igss:
 Threshold voltage VGS(TH) : The threshold voltage VGS(TH) is the minimum gate voltage that
can form a conducting channel between the source and the drain. It is normally quoted for a
given source drain current.
53
 Drain current at zero gate voltage , Idss : This FET parameter is the maximum continuous
current the device can carry with the device fully on. Normally it is specified for a particular
temperature,typically25°C.
This FET specification is based on the junction-to-case thermal resistance rating

RθJC (junction/channel temperature) and the case temperature.
This FET parameter is of particular interest for power MOSFETs and when determining the
maximum current parameter no switching losses are accounted for. Also holding the case at
25°C is not feasible in practice. As a result the actual switching current should be limited to
less than half of the Idss at TC = 25°C rating in a hard switched application. Values of a third
to a quarter are commonly used.
 Gate source cut-off voltage , VGS(off): The gate source cut-off voltage is really a turn-off
specification. It defines the threshold voltage for a given residual current, so the device is
basically off but on the verge of turning on. The threshold voltage has a negative temperature
coefficient, i.e. it decreases with increasing temperature. This temperature coefficient also
affects turn-on and turn-off delay times which has an impact on some circuits.
 Forward transconductance, Gfs :
 Input capacitance, Ciss : The input capacitance parameter for a FET is the capacitance that
is measured between the gate and source terminals with the drain shorted to the source for AC
signals. In other words this is effectively the capacitance between the gate and channel. C iss is
made up of the gate to drain capacitance Cgd in parallel with the gate to source capacitance
Cgs. This can be expressed as:
C iss = C gs + C gd
 Drain-source on resistance, Rds(on) : With the FET turned hard on, this is the resistance in
ohms exhibited across the channel between the drain and source. It is particularly important
in switching applications from logic to power switching as well as in RF switching, including
applications in mixers. FETs typically are able to provide a good performance for switching
and have a relatively low Rds(on) value.
 Power dissipation, Ptot : This FET specification details the maximum continuous power that
the device can dissipate. The power dissipation is normally specified in free standing in air, or
with the base held at a given temperature, typically 25°C. The actual conditions, whether held
in a heat-sink, or in free air will depend upon the device types and the manufacturer.
Obviously power FETs are more likely to detailed in a condition where they are held on a
heatsink, whilst the free air condition is applicable to signal FETs
SiC (Silicon Carbide Junction Transistor):
 The Super Junction Transistor (SJT). SJTs are "Super-High" current gain SiC BJTs being
1200 V - 10 kV ratings.
 The SJT is a current controlled device require a
small gate current that can be driven by
commercial, commonly available gate drivers.
 Incorporating high voltage, high frequency and high-temperature capable SiC SJTs will
increase conversion efficiency and reduce the size/weight/volume of power electronics.
SJT PROPERTIES:
 Temperature independent switching performance
 Suitable for connecting an anti-parallel diode
 Positive temperature coefficient for easy paralleling
54
 Low gate charge

 Low intrinsic capacitance
 Low switching losses
 Higher efficiency
SJT FEATURES
 High temperature operation
 High short circuit withstand capability
 High circuit efficiency
 Minimal input signal distortion
 High in amplification process
 >= 20μs short circuit withstand capability
SJT APPLICATIONS
 own Hole Oil Drilling, Geothermal Instrumentation
 Hybrid Electric Vehicles
 Solar Inverters
 Switched-Mode Power Supply
 Power Factor Correction
 Induction Heating
 Uninterruptible Power Supply
 Motor Drives
SiC MOSFET
 The internal gate resistance of a SiC-MOSFET is higher than that of a Si-MOSFET, and so in
order to achieve fast switching, the external gate resistance must be kept as low as possible,
on the order of a few Ohms or so.
 Low capacitances
 Simple to drive
 Higher system efficiency
 Reduced cooling requirement
SiC MOSFET PROPERTIES
 SiC MOSFET is able to gain lower ON-Resistance and higher voltage with the same chip size
of conventional Si MOSFET.
 SiC MOSFETs generate no tail current and reduce a turn-off loss for replacement of Si-
MOSFET.
 achieve both high load voltage with high load current and low and stable On-Resistance.
 By these superior characteristics, these products are suitable for applications in Energy
Storage System (ESS) and Battery Management Systems (BMS).
55
SiC MOSFET APPLICATIONS

 Solar Inverters
 Power Factor Correction
 Motor Drives
56

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SRI MANAKULA VINAYAGAR ENGINEERING COLLEGE, PUDUCHERRY

Subject Name: ELECTRONIC DEVICES AND CIRCUITS Subject Code: EE T34

UNIT – II BIPOLARJUNCTION TRANSISTOR

2. What is meant by biasing a transistor? Why is it necessary?[Nov/Dec 2015]

3. Define the different operating regions of transistor. . [Nov/Dec 2014]

4. Define Base width modulation (Early effect) . [Nov 2013]

In a CB configuration, an increase in collector voltage increases the width of the depletion

Common base configuration, Common emitter configuration Common collector configuration

7. Among CB, CE, CC which is most important?

The CE configuration is important. The reasons

i) High current gain

i. High output impedance

ii. High current gain

iii. High power gain

9. What is thermal runaway? [Nov 2013]

10. How thermal runaway can be avoided?

11. How a transistor is used as a switch?

15. Compare the performance of CE, CB, CC

18. Explain why an ordinary transistor is called bipolar?

19. Why transistor is called current controlled device?

21. Why CC configuration is called a voltage buffer?

22. What do you mean by operating point?

24. What is stability factor?

Stability factor is defined as rate of change of collector current withrespect to reverse

1. With diagram explain construction and operation of NPN transistor.

Fig 2.1 Schematic symbols for transistor

Saturation Acts as a closed

Fig 2.2 Transistor biasing a)PNP b)NPN

Operation of NPN transistor:

Fig 2.3 Current in NPN transistor

Operation of PNP transistor:

Fig 2.4 Current in PNP transistor

(1) Active Region:

 If αdc is truly constant then IC would be independent of VCE.

Fig 2.5 Circuit to determine CB characteristics

Current Amplification Factor (α):

α=(∆IC)/ (∆IE) (at constant VCB)

(1). Active region:

ii. Biasing of the 2 junctions of a transistor is done as follows.

1. Cutoff region Reverse biased Reverse biased

2. Active region Forward biased Reverse biased

3. Saturation region Forward biased Forward biased

The Common Collector Current Gain

5. Explain about different Biasing compensation techniques.

3) Diode bias compensation

IR = ID + IB (ID is reverse saturation Current increases with temp.)

Considering the closed circuit ABENA and applying

Kirchhoff 's voltage law, we get,

 In fixed-bias method of biasing, IB is independent of IC so that dIB/dIC = 0. Putting the value

much as any change in ICO.

Biasing with collector feedback resistor.

VCE = VCC -IC (RC + RE)

8. Explain about the Transistor DC Load Line and AC load line

IC(sat) = ICQ + (VCEQ/rC)

3. Explain about the P channel JFET in detail with its characteristics

4. Explain about JFET parameters.

5. Briefly explain different BIASING OF FET

In this circuit arrangement an Enhancement-mode N-channel MOSFET is being used to switch a

MOSFET Type VGS ≪ 0 VGS = 0 VGS ≫ 0

N-channel Enhancement OFF OFF ON

N-channel Depletion OFF ON ON

P-channel Enhancement ON OFF OFF