DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Subject Code: U20EST107

Subject Name:MICROELECTRONICS AND DIGITAL SYSTEM DESIGN
Unit No: II

Department:CSE
Prepared By:
Mrs. K.Kavitha, AP/ECE
Mr.Kalaiyarasan, AP/ECE
Mr. K. Vinoth, AP/ECE
Verified and Approved by
HOD/CSE

UNIT II -TRANSISTORSANDAPPLICATIONS (12Hrs)

Introduction to BJT – Construction of BJT – BJT Circuit configurations: CB, CE,CC – Current Gain of a BJT
in CB, CE, CC – Transistors as switch, Amplifier and Buffer – Logic gates using transistors – Operational
Amplifiers – Inverting and Non-Inverting Op-Amps –Voltage follower– Summing amplifiers and Differential
amplifiers.

PART-A (2 Marks)
1. What is a transistor? Why this electronic device is aptly named?
Transistor is a two junction three terminal bipolar device. In basic amplifying action of a transistor the signal
is transferred from a lower resistance to a high resistance. Hence the combination of two terms Transfer +
resistor Transistor is named to the device.
2. Describe the basic structure of a BJT.
Bipolar junction transistor (BJT) is a three- layer semiconductor device consisting of two PN junctions. If a
layer of n-type material is sandwitched between two layers of p-type, the transistor is known as PNP
transistor. On the other hand if a layer of p-type material is sandwitched between two layers of n-type the
transistor is known as NPN transistor.
3. What are the three terminals in a BJT?
 Emitter (E)
 Collector (C)

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  Base (B)

4. If the collector current is 2mA and the base current is 25µA, what is the emitter current?
Solution
Given IC=2mA, IB=25µA,
We know that IE=IB+IC
=2mA+25µA
IE =2.025mA
5. Why is silicon preferred to germanium in the manufacture of semiconductor devices?
As the knee voltage of silicon is higher (0.7V) than the knee voltage of germanium (0.3V), silicon will be
more stable for temperature variation than germanium.
6.What are the types of circuit connections known as configurations, for operating a transistor?
 Common-Base(CB)
 Common-Emitter(CE)
 Common-Collector(CC)

7. Why an ordinary transistor is called bipolar?

Because the transistor operation is carried out by two types charge carriers—majority and minority carriers.
8. Why transistor (BJT) is called current controlled device?
The output voltage, current or power is controlled by the input current in a transistor. So,it is called the
current Controlled device.
9. Why collector is made larger than emitter and base?
Collector is made physically larger than emitter and base because collector is to dissipate much power.
10. Why the width of the base region of a transistor is kept very small as compared to other
regions?
Base region of a transistor is kept very smalland lightly doped so as to pass most of the injected charge
carriers to the collector.
11. Define Transistor.
It consists of two PN Junctions formed by sandwiching either p-type or n-type semiconductor between a
pair of opposite types.
12. Mention the types of transistor?
 NPN Transistor
 PNPTransistor

13. Mention the terminals of transistor.

The transistor has three terminals namely emitter, base and collector.
14.Why emitter is heavily doped in a transistor?
Emitter region is more heavily doped because the main function of the emitter is to supply majority
charge carriers to the base.

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15.What is the need for biasing in the transistor?
Under normal operating condition, the base-emitter junction is forward biased and the collector-base
junction is reverse biased. The biasing arrangement is required to establish a stable Q-point which
indicates the desired mode of operation. If the transistor is not biased adequately, a distorted output signal
is obtained from transistor. Due to temperature variation, transistor parameters are changed and the
operating point gets shifted and the amplifier output will be unstable.
16.Define the different operating modes of a transistor.
Transistors can be considered as two diodes connected back to back. It can be operated in three different
regions depending on the biasing of the two junctions.
Active region:
Emitter – Base junction  forward biased
Collector – Base junction  Reverse biased
Saturation region:
Emitter – Base junction  forward biased
Collector – Base junction  forward biased
Cut-off region:
Emitter – Base junction  Reverse biased
Collector – Base junction  Reverse biased
17. What is α of a transistor?
It is defined as the ratio of the collector current to the emitter current. It is also called as common base
current gain.
𝑰𝑪
𝜶=
𝑰𝑬
18. What is β of a transistor? (or) What is large signal current gain?
It is defined as the ratio of the collector current to the base current. It is also known as common emitter
current gain.
𝑰𝑪
𝜷=
𝑰𝑩
19. Deduce the relationship between 𝜶and 𝜷.
𝜶
𝜷=
𝟏−𝜶
20. What is the relationship between𝜶𝒂𝒏𝒅𝜸?
𝟏
𝜸=
𝟏−𝜶
21. What is early effect or Base width modulation?
As the reverse voltage of the collector junction is increased, the depletion layer width at the collector
junction increases, which reduces the effective width of the base.It is otherwise called as Base width
modulation.

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22. Why does the CE configuration provide large current amplification while the CB configuration
does not?
The current amplification factor of CE is
𝑰𝑪
𝜷=
𝑰𝑩
The current amplification factor of CB is
𝑰𝑪
𝜶=
𝑰𝑬
Ina transistor the base current is very low and collector, emitter currents are almost equal. Therefore the
current amplification of CE is larger than CB.
23. Which configuration provides better current gain?
The current gain of CC is higher than all other transistor configurations.
24. Which amplifier has lowest input impedance?
Common base amplifier has the lowest input impedance.
25. What are the different ways of transistor breakdown?
There are two different ways of transistor breakdown. They are as follows,
 Avalanche multiplication
 Punch-through (or) reach-through
26.Describe how amplification and switching are achieved by BJT.
 For amplification, BJT must operate in the active region.
 For switching, cut-off and saturation regions of output characteristics are used. When it is saturated, it acts
as a closed switch. When it is in cut-off state, it acts as an open switch.
27. What are the applications of bipolar junction transistor?
BJT is used in various applications. They are as follows,
 Radio receiver,
 Electronic clock,
 Television remotes,
 High power welding laser,
 Traffic light control system,
 Wireless telephone modem,
 Computer projector,
 Electronic camera, etc.
28. Why base region is made very thin in BJT?
 Base region is very lightly doped and is very thin as compared to either emitter or collector.
 It is made very thin to reduce recombination of charge carriers in the base region.
29. What is the main function of the collector region?

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  The main function of the collector region is to collect majority charge carriers through the base. Collector
region is moderately doped.
 The collector region is made physically larger than the emitter region. This is due to the fact that collector
has to dissipate much greater power.
30. What is reverse saturation current?
As the collector junction is reverse biased, electrons from the collector cross the junction and move into the
base and holes from the base cross the junction and move into the collector. This current is called reverse
saturation current𝑰𝒄𝒐 .
31. Is transistor a current controlled device? Justify.
Transistor is a current controlled device, because in transistor the output current is controlled by the input
current.
32. Define h- parameters.
Any linear circuit having input and output terminals can be analyzed using four parameters. One measured
in ohm. Other one measured in mho and two dimensionless called hybrid or h-parameters.
33. What is the most commonly used transistor configuration? Why?
CE configuration is the most commonly used transistor configurations. The reasons are,
 High current gain,
 High voltage gain,
 High power,
 Moderate input to output ratio.

34.Define early effect.

As the output voltage VCB is increased, the collector base junction is more reverse biased, therefore the
depletion layer width at the collector junction increases, which reduces the effective width of the base. It is
called early effect
35.List the characteristics of digital ICs
o Propagation delay
o Power dissipation
o Fan- in
o Fan-out
o Noise margin

36. What is propagation delay?

It is defined as the average transistion time and delay time for the signal to
propagate from input to output when signal change in value.
Propagation delay times are defined as follows:
- It is the propagation delay time in going from low level (0) to high level (1).
- It is the propagation delay time in going from High level (1) to high level (0).

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37. What is power dissipation?
The power consumed by the gate which must be avail from power supply. Expresses in mill watts or
nanowatts.
Power dissipation = Supply voltage * meant current taken from that supply.
(Vcc*Iccavg
38.Define Fan-in & Fan-out.
Fan-in: The fan-in of a gate is the number of inputs connected to the gate without any degradation in the
voltage levels.
Fan-out: It is defined as the maximum number of inputs of the same IC family that a gate can drive
maintaining its output levels within the specified limits.
39. What is Noise margin?
Noise margin is the maximum external noise voltage added to an input signal
that does not cause an undesirable change in the circuit output.
40. Define Figure of Merit (SPP).
Figure of merit is defined as the product of speed and power. The speed is specified in terms of
propagation delay time expressed in nano seconds.
Figure of merit = Propagation delay time (ns) * Power (mW).
41. Define Noise Immunity.
The ability of a logic circuit to tolerate the noise without causing any unwanted changes in the output.
42.Mention the characteristics of MOS transistor?
1. The n- channel MOS conducts when its gate- to- source voltage is positive.
2. The p- channel MOS conducts when its gate- to- source voltage is negative
3. Either type of device is turned off if its gate- to- source voltage is zero.
43.State advantages and disadvantages of TTL.
Advantage:
 Easily compatible with other ICs
 Low output impedance

Disadvantage:
 Wired output capability is possible only with tri state and open collector Types.
 Special circuits in Circuit layout and system design are required.

44.State the advantages of CMOS Technologies.

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  Consumes low power
 Can be operated at high voltages resulting in improved noise immunity
 Better noise margin
 High packaging density.

45. What is an OP-AMP?

An operational amplifier is a direct coupled high gain amplifier consisting of one or more
differential amplifiers, followed by a level translator and an output stage. It is a versatile device that can be
used to amplify ac as well as dc input signals & designed for computing mathematical functions such as
addition, subtraction, multiplication, integration and differentiation etc.,
46. Why IC 741 is not used for high frequency applications?
IC741 has a low slew rate because of the predominance of capacitance present in the circuit at higher
frequencies. As frequency increases the output gets distorted due to limited slew rate.
47. What are the different kinds of packages of IC741?
 Metal can (TO) package
 Dual-in-line package
 Flat package or flat pack
48. What are the classification of opamp ICs based on temperature ranges.
 Military temperature range: -55 0 C to – 125 0 C.
 Industrial temperature range: - 20 o C to + 85 0 C.
 Commercial temperature range: 00 C to 70 0 C.

49. What are the features of IC 741.

 No frequency compensation required.
 Short circuit protection provided.
 Offset voltage null capability.
 No latch up.
 Large common mode and differential voltage range.

50. Define supply voltage rejection ratio (SVRR).

The change in OPAMP’s input offset voltage due to variations in supply voltage is called the supply
voltage rejection ratio. It is also called Power Supply Rejection Ratio (PSRR) or Power Supply Sensitivity
(PSS).
51. Draw the circuit diagram of Inverting amplifiers and state its gain.

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 Gain (ACL) =V o/Vi = -Rf/R1
52 .Draw the circuit diagram of Non--Inverting amplifiers and state its gain.

Gain( ACL) =V o/Vi = 1+Rf/R1.

53.Draw
Draw Practical Opamp equivalent circuit.

54. What is the input impedance of non inverting amplifier?

Input impedance of non inverting amplifier is

55. In practical op-amps,

amps, what is the effect of high frequency on its performance?
The open-loop gain of op-amp
amp decreases at higher frequencies due to the presence of parasitic
capacitance. The closed-loop
loop gain increases at higher frequencies and leads to instability.
56. What are the basic opamp terminals?
Two i/p terminals,one o/p terminal & two power supply terminals.
57.Draw the pin diagram of IC 741.

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58. What are the assumptions made from ideal op-amp characteristics?
 The current drawn by either of the input terminals (non- inverting/inverting) is negligible.
 The potential difference between the inverting & non-inverting input terminals is zero
 If the common point of the two supplies is not grounded, twice the supply voltage will get applied and it
may damage the op-amp
59. List out the ideal characteristics of OP-AMP?
 Open loop gain infinite
 Input impedance infinite
 Output impedance low
 Bandwidth infinite
 Zero offset, ie, Vo=0 when V1=V2=0
60. What is the value of open loop gain and output impedance of an ideal op amp?
The value of open loop gain=infinity
The value of output impedance=0
61. Differentiate ideal and practical op-amp characteristics .

62. What are the basic requirements of the input stage of Op-amp?

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  High voltage gain.
 High input impedance
 Two input terminals.
 Small input offset voltage.
 Small input offset current.
 High CMRR.
 Low input bias current.
63. What are the basic requirements of the output stage of Op-amp?
 Large output voltage swing capability.
 Large output current swing capability.
 Low output impedance.
 Low quiescent power dissipation.
 Short circuit protection.
64. Draw the block diagram of a general op-amp.(Nov/Dec 2016)(Apr/May 2018)

65. List out different types of op-amp?

 Bipolar opamp
 FET opamp
 MOSFET opamp
 Bi FET opamp
 BiMOSopamp

66. What is gain margin and phase margin?

Gain margin:
The gain measured at phase cross over frqquency is called gain margin.
Phase margin:
It is the amount of additional phase lag at gain cross over frequency required to bring the system to the
very large instability.
67. What are the D.C Characteristics of Op-amp?(May/June-2012)
 Input Bias current.
 Input offset current.
 Input offset voltage.

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  Thermal Drift.

68. What are the A.C Characteristics of Op-amp?

 Slew rate.
 Frequency response.
69.Define open loop opamp.
 OPamp without feedback is called open loop opamp.
 In open loop opamp gain is infinity.
70. What is closed loop opamp?
OPamp with feedback is called open loop opamp.
71. Design an amplifier with a gain of -10 and input resistance equal to 10 KΩ
Solution:
Since the gain of the amplifier is negative,an inverting amplifier has to be made.
Choose R1=10KΩ
Then Rf= - ACL R1
= - (-10)*10KΩ
=100KΩ
Part-B (5 Marks)
1. Explain in detail about the construction of NPN Transistor.
Introduction:
Bipolar Junction Transistor is a two junction, three terminal device whose operation is dependent on the
interaction of both majority and minority carriers hence it is named as bipolar device. Transistor means
transfer resistor i.e., signals are transferred from low resistance (input) to high resistance (output) circuit.
The BJT is analogous to a vacuum tube (triode) and it is comparatively smaller in size and consumes
less power, has less weight, has longer life. It is used in amplifiers, oscillator circuits and digital circuits.
Conduction due to both majority and minority charge carriers. (i.e., Bipolar).

Fig: 2.1 Transistor (a) NPN & (b) PNP

Transistor is simply a sandwich of one type semiconductor material between two layers of other type.
There are two types of Transistor, they are

NPN transistor –P type material is sandwich between two layer of N type material.
PNP transistor -N type material is sandwich between two layer of P type material.

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 Fig: 2.2 Circuit symbol of (a) NPN & (b) PNP Transistor

Arrowhead should be at the emitter terminal. It indicates the directional of current flow when emitter base
junction is forward biased.
Terminals
Emitter: The main function of this region is to supply majority charge carriers to the base. Emitterregion is
more heavily doped when compared with other regions.
Base: The middle section of the transistor is known as base. Base region is very lightly dopedand is very
thin as compared to either emitter or collector. It is made very thin to reduce recombination of charge
carriers in the base region.
Collector: The main function of the collector is to collect majority charge carriers through thebase.
Collector region is moderately doped. The collector region is made physically larger than the emitter region.
This is due to the fact that collector has to dissipate much greater power. Due to this difference, collector
and emitter are not interchangeable.

Operating Modes

Fig: 2.3 Graphical representation of different regions with its voltages

Transistor can be considered as two diodes connected back to back. Consider current flowingfrom collector
to emitter of an NPN. It is operated in three regions

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Saturation – The transistor acts like a short circuit. Current freely flows from collector to emitter.i.e., both
collector base and emitter base junction are forward biased

Cut-off – The transistor acts like an open circuit. No current flows from collector to emitter. i.e.,both
collector base and emitter base junction are Reverse biased
Active - Emitter base junction is Forward biased and collector base junction is Reverse biased.
Active – Forward Active: The current from collector to emitter is proportional to the currentflowing into the
base.
Active – Reverse Active: Like forward active mode, the current is proportional to the basecurrent, but it
flows in reverse. Current flows from emitter to collector.
Transistor biasing
As shown in Fig 2.4, usually the emitter-base junction is forward biased (F.B) and collector-base junction is
reverse biased (R.B). Due to the forward bias on the emitter-base junction, an emitter current flows through
the base into the collector. Though the collector-base junction is reverse biased, almost the entire emitter
current flows through the collector circuit.

Fig: 2.4 Transistor biasing (a) NPN transistor and (b) PNP transistor

Operation of NPN transistor

As shown in Fig.2.5, the forward bias applied to the emitter base junction of an NPN transistor causes a lot
of electrons from the emitter region to crossover to the base region. As the base is lightly doped with P-
type impurity, the number of holes in the base region is very small and hence the number of electrons that
combine with holes in the P-type base region is also very small. Hence a few electrons combine with holes
to constitute a base current IB. The remaining electrons (more than 95%) crossover into the collector
region to constitute a collector current IC. Thus the base and collector current summed up gives the emitter
current, i.e.

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 Fig: 2.5 Current in NPN transistor
In the external circuit of the NPN bipolar junction transistor, the magnitudes of the emitter current IE, the
base current IB and the collector current IC are related by
𝐼 = 𝐼 +𝐼

2. Explain in detail about the construction of PNP T

Transistor

As shown in Fig 2.6, the forward bias applied to the emitter

emitter-base
base junction of a PNP transistor causes a lot
of holes from the emitter region to crossover to the base region as the base is lightly doped with N-type
N
impurity. The number of electrons
ns in the base region is very small and hence the number of holes
combined with electrons in the N-type
type base region is also very small. Hence a few holes combined with
electrons to constitute a base current I B. The remaining holes (more than 95%) crossover into the collector
region to constitute a collector current Ic. Thus the collector and base current when summed up gives the
emitter current, i.e.
𝐼 = −(𝐼 +𝐼 )

Fig: 2.6 Current in PNP transistor

In the external circuit of the PNP bipolar junction transistor, the magnitudes of the emitter current IE, the
base current IB and the collector current Ic are related by
𝐼 = 𝐼 +𝐼
This equation gives the fundamental relationship between the currents iin
n a bipolar transistor circuit. Also,
this fundamental equation shows that there are current amplification factors α and β in common base
transistor configuration and common emitter transistor configuration respectively for the static (D.C)

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currents, and for small changes in the currents.
TYPES OF CONFIGURATION
Depending upon the common terminal between the input and output of the transistor, three configurations
are classified.
They are: (i) Common base (CB) configuration, (ii) common emitter (CE) configuration, and (iii) common
collector configuration.
(i) (CB) configuration
This is also called grounded base configuration. In this configuration, emitter is the input terminal, collector
is the output terminal and base is the common terminal.
(ii) (CE) configuration
This is also called grounded emitter configuration. In this configuration, base is the input terminal, collector
is the output terminal and emitter is the common terminal.
(iii) (CC) configuration
This is also called grounded collector configuration. In this configuration, base is the input terminal, emitter
is the output terminal and collector is the common terminal.
3.Compare CB,CE and CC configurations.
Property CB CE CC
Input resistance Low (about 100 R) Moderate (about 750 R) High (about 750 KR)
Output resistance High (about 450 KR) Moderate (about 45 KR) Low (about 25 R)
Current gain 1 High High
Voltage gain About 150 About 500 Less than 1
Phase shift between
0 or 360o 180o 0 or 360o
input & output voltages
For high frequency For audio frequency For Impedance
Applications
circuits circuits Matching
Current amplification
factor=(output current) /
(input current)

4.Write the rRelationship between α and β

We know that ΔI E= ΔI C+ΔIB
By definition, ΔI C=α ΔIE
Therefore, ΔI E=αΔ I E+ ΔIB
i.e. IB = IE (1−α)
IC, we get
Dividing both sides by

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Therefore,

α β 1 1
β = 1 −α and α = 1 + β , or α − β = 1

From this relationship, it is clear that as α approaches unity, β approaches infinity. The CE configuration is
used for almost all transistor applications because of its high current gain,β

5.Write the relationship among α, β and γ:

In the CC transistor amplifier circuit, IB is the input current and IE is the output current.
ΔIE
Current amplification factor for CC configuration is γ = ΔIB , substituting ΔIB = IE − IC ,

IE
γ=
I E − IC
Dividing the numerator and denominator on RHS by ΔIE

Therefore

6. With neat diagram ,explain in detail about Transistor as a Switch.

The BJT as a Switch .When used as an electronic switch, a transistor normally is operated alternately in
cutoff and saturation. A transistor is in cutoff when the base -emitter junction is not forward-biased. VCE is
approximately equal to VCC. When the base-emitter junction is forward-biased and there is enough base
current to produce a maximum collector current, the transistor is saturated.

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 Fig: 2.19 Transistor as a switch

7.With neat diagram ,explain in detail about Transistor as an Amplifier:

Definition: Amplifier is an electronic circuit constructed by using transistor to increase the magnitude of
given weak signal.
Fig. shows the common emitter NPN transistor amplifier circuit. DC voltage V BB is connected in the input
circuit in addition to the signal voltage. The dc voltage is known as bias voltage and its magnitude is such
that it always keeps the emitter base junction in forward bias. TheDC supply VCC keeps the collector base
junction in reverse bias.

Fig: 2.20 Transistor as a amplifier

Operation of an Amplifier
During the positive half cycle of the input weak signal, the forward bias across the emitter base junction is
increased. Therefore more electrons flow from the emitter to the collector through the base region.
Thiscauses an increase in collector current. This increased collector current produces higher voltage drop

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across the load resistor RC,now we get the positive half cycle of strengthened output signal. During
negative half cycle of the input signal, forward bias across emitter-base junction is decreased. Therefore
collector current decreases. Due to this decreased collector current, the output voltage is also decreased.
The amplified output is obtained across the load resistor RC

8. With neat diagram ,explain in detail about Transistor Buffer

A Buffer Amplifier is an amplifier that isolates one circuit from another, and could provide amplification. A
buffer might be used to impedance match an input circuit to an output circuit. In the circuit example a
transistor buffer is used to decrease the loading effect on an oscillator [the input circuit which is not shown]
by reducing the interaction between the load and the oscillator.

Fig: 2.21 Transistor as a Buffer

This buffer uses an NPN transistor as the amplifier. The selected transistor needs to operate at the
selected voltage supply and be able to handle the current required by the load. No example transistor part
number is provided because the component selection would depend on the circuit parameters, which are
unknown in this case.

9. With neat diagram ,explain in detail about TTL Inverter( LOGIC GATES USING TRANSISTORS)
We know that when the input voltage is low, the output voltage is HIGH and vice versa for NOT gate.
Therefore, we can make a logic inverter from an NPN transistor in common emitter configuration.

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 Fig: 2.22 TTL Inverter

The operation of transistor inverter for both the input (HIGH and LOW) using switching analogy is shown
below.
When Vin = 1, VCE = 0 say Q1 = ON [Transistor Saturated], makes VO = 0.

When Vin = 0, VCE = VCC say Q1 = OFF [Transistor is cut OFF], makes VO = 1 [VO = VCC]

10. Write about Voltage Follower.

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Definition:
The output voltage is equal to input voltage, both in magnitude and phase. VO=VI
In the non-inverting amplifier, if Rf=0 and R1=∞,
∞, we get modified circuit as voltage follower shown in
Fig. 2.25. VO=VI

Fig.2.25 Voltage Follower

That is, the output voltage is equal to input voltage, both in magnitude and phase. In other words, we can
also say that the output voltage follows the input voltage exactly. Hence, the circuit is called a voltage
follower.
The use of the unity gain circuitit lies in the fact that its input impedance is very high (i.e. MΩ
M order) and
output impedance is zero. Therefore, it draws negligible current from the source. Thus a voltage follower
may be used as buffer for impedance matching, that is, to connect a high impedance source to a low
impedance load.

Part-C(10 marks)
1.Explain
Explain in detail the characteristics of a transistor in common base (CB) configuration.[

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The circuit diagram for determining the static characteristics curves of an NPN transistor in the common
base configuration is shown in fig 2.9

Fig: 2.8 Circuit to determine CB static characteristics

Input Characteristics
To determine the input characteristics, the collector
collector-base voltage VCB is kept constant at zero volt and the
emitter current IE is increased from zero in suitable equal steps by increasing V EB. This is repeated for
higher fixed values of VCB. A curve is drawn between emitter current I E and emitter-base
emitter voltage VEB at
constant collector-base voltage VCB. The input characteristics thus obtained are shown in fig 2.10

Fig: 2.9 CB Input Characteristics

When VCB is equal to zero and the emitter
emitter-base
base junction is forward biased as shown in the fig 2.10
characteristics, the junction behaves as a forward biased d
diode
iode so that emitter current IE increases rapidly
with small increase in emitter-base
base voltage VEB. When VCB is increased keeping VEB constant, the width of
the base region will decrease. This effect results in an increase of I E. Therefore, the curves shift towards
the left as VCB is increased.

Output Characteristics

To determine the output characteristics, the emitter current IE is kept constant at a suitable value by

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adjusting the emitter-base voltage VEB. Then VCB is increased in suitable equal steps and
an the collector
current IC is

Fig: 2.1
2.10 CB Output Characteristics
Noted for each value of IE. This is repeated for different fixed values of IE, Now the curves of Ic versus VCB
are plotted for constant values of IE and the output characteristics thus obtained is shown in Fig. 2.11
From the characteristics, it is seen that for a constant value of I E, IC is independent of VCB and the curves
are parallel to the axis of VCB. Further, Ic flows even when VCB is equal to zero. As the emitter-base
emitter junction
is forward biased, the majority carriers, i.e. electrons, from the emitter are injected into the base region.
Due to the action of the internal potential barrier at the reverse biased collector
collector-base
base junction, they flow to
the collector region and give rise to Ic even when VCB is equal to zero.

Early Effect or Base-Width

Width Modulation
As the output voltage Vcc increased, the collector base junction is more reverse biased, therefore the
depletion layer width at the
e collector junction increases, which reduces the effective width of the base. This
dependency of base-width on collector--to-emitter voltage is known as the Early effect.
effect

This decrease in effective base-width

width has three consequences:

(i) There is less chance

nce for recombination within the base region. Hence, α increases with increasing |VCE|.
(ii) The charge gradient is increased within the base, and consequently, the current of minority carriers
injected across the emitter junction increases,
(iii) For extremely large output voltage, the effective base
base-width
width may be reduced to zero, causing voltage
breakdown in the transistor. This phenomenon is called the punch through or Reach through.
through
For higher values of VCB, due to Early effect, the value of α increases. For exampl
example,
e, α changes, say from
0.98 to 0.935. Hence, there is a very small positive slope in the CB output characteristics and hence the
output resistance is not zero.

22
Thermal runaway
Flow of collector current produces heat in the collector junction which increases the reverse saturation
current ICO, again the IC increases. This process goes in cumulative way, the heat at the junction increases
and burns the transistor. The process of self-destruction of transistor is called Thermalrunaway.

Transistor Parameters
The slope of the CB characteristics will give the following four transistor parameters. Since these
parameters have different dimensions, they are commonly known as common base hybrid parameters or
h-parameters.
(I) Input impedance (hib).It is defined as the ratio of the change in (input) emitter voltage to thechange
in (input) emitter current with the (output) collector voltage VCB kept constant. Therefore,

∆𝑉
ℎ = , 𝑉 𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
∆𝐼

(ii) Output admittance (hob): It is defined as the ratio of change in the (output) collector currentto
the corresponding change in the (output) collector voltage with the (input) emitter current IE kept constant.
Therefore,
∆𝐼
ℎ = , 𝐼 𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
∆𝑉
(iii)Forward current gain (hfb): It is defined as a ratio of the change in the (output) collectorcurrent to the
corresponding change in the (input) emitter current keeping the (output) collector voltage V CB constant.
Hence,
∆𝐼
ℎ = , 𝑉 𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
∆𝐼
(iv) Reverse voltage gain (hrb): It is defined as the ratio of the change in the (input) emittervoltage
and the corresponding change in (output) collector voltage with constant (input) emitter current, I E.
∆𝑉
ℎ = , 𝐼 𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
∆𝑉

2. Explain in detail the characteristics of a transistor in common emitter (CE) configuration.

Base – Input terminal
Collector – Output terminal
Emitter - Common

23
 Fig. 2.11 CE configuration

Fig: 2.12 Circuit to determine CE static characteristics

Input characteristics
To determine the input characteristics, the collector to emitter voltage is kept constant at zero volt and base
current is increased from zero in equal steps by increasing VBE in the circuit shown in Fig. 2.13.
The value of VBE is noted for each setting of IB. This procedure is repeated for higher fixed values of VCE,
and the curves of IB Vs. VBE are drawn. The input characteristics thus obtained arc shown in Fig. 2.14

Fig: 2.1
2.13 CE Input Characteristics

24
When VCE =0, the emitter-base junction is forward biased and the junction behaves as a forward biased
diode. Hence the input characteristic for VCE= 0 is

Similar to that of a forward-biased diode. When VCE is increased, the width of the depletion region at the
reverse biased collector-base junction will increase. Hence the effective width of the base will decrease.
This effect causes a decrease in the base current I B. Hence, to get the same value of IB as that for VCE = 0,
VBE should be increased. Therefore, the curve shifts to the right as VCE increases.

To determine the output characteristics, the base current IB is kept constant at a suitable value by adjusting
base-emitter voltage, VBE. The magnitude of collector-emitter voltage VCE is increased in suitable equal
steps from zero and the collector current Ic is noted for each setting VCE.
Output characteristics

Fig: 2.14 CE Output Characteristics

For larger values of VCE, due to early effect, a very small change in α is reflected in a very large change in
β. For example, when α=0.98 , β = 49. If α increases to 0.985, then β = 66. Here, a slight increase in α by
about 0.5 results in an increases in by β about 34%.Hence, the output characteristics of CE configuration
show a larger slope when compared with CB Configuration.

The output characteristics have three regions, namely, saturation region, cutoff region and active region.
The region of curves to the left of the line OA is called the saturation region (hatched), and the line OA is
called the saturation line. In this region, both junctions are forward biased and an increase in thebase

25
current does not cause a corresponding large change in Ic. The ratio of VCE(sat) to IC region is called
saturation resistance,
The region below the curve for IB= 0 is called the cut-off region (hatched). In this region, both junctions are
reverse biased. When the operating point for the transistor enters the cut-off region, the transistor is OFF.
Hence, the collector current becomes almost zero and the collector voltage almost equals Vcc, the
collector supply voltage. The transistor is virtually an open circuit between collector and emitter
The central region where the curves are uniform in spacing and slope is called the active region
(unhatched). In this region, emitter-base junction is forward biased and the collector-base junction is
reverse biased. If the transistor is to be used as a linear amplifier, it should be operated in the active
region,
If the base current is subsequently driven large and positive, the transistor switches into the saturation
region via the active region, which is traversed at a rate that is dependent on factors such as gain and
frequency response. In this ON condition, large collector current flows and collector voltage falls to a very
low value, called VCEsat, typically around 0.2 V for a silicon transistor, the transistor is virtually a short circuit
in this state.

High speed switching circuits are designed in such a way that transistors are not allowed to saturate, thus
reducing switching times between ON and OFF times.

Transistor parameters
The slope of the CE characteristics will give the following four transistor parameters. Since these
parameters have different dimensions, they are commonly known as common emitter hybrid parameters or
h-parameters,
(i) Input impedance (hie): It is defined as the ratio of the change in (input) base voltage to
thechange in (input) base current with the (output) collector voltage VCE kept constant. Therefore,
∆V
h = at V constant
∆I
(ii) Output admittance (hoe): It is defined as the ratio of change in the (output) collector currentto
the corresponding change in the (output) collector voltage with the (input) base current IB kept constant.
Therefore,
∆I
h = at I constant
∆V
(iii) Forward current gain (hfe). It is defined as a ratio of the change in the (output)
collectorcurrent to the corresponding change in the (input) base current keeping the (output) collector
voltage VCE constant. Hence,
∆I
h = at V constant
∆I

26
(iv) Reverse voltage gain (hre): It is defined as the ratio of the change in the (input) basevoltage
and the corresponding change in (output) collector voltage with constant (input) base current, IB. Hence,
∆V
h = at I constant
∆V
3. Explain in detail the characteristics of a transistor in common collector (CC) configuration.
Base – Input terminal
Emitter – Output terminal
Collector - Common

Fig.2.15 CC configuration
The circuit diagram for determining
ining the static characteristics of an NPN transistor in the common collector
configuration is shown in fig. 2.17.

Fig: 2.16 Circuit to determine CC static characteristics

Input characteristics
To determine the input characteristics, VEC is kept at a suitable
table fixed value. The base-collector
base voltage VBC
is increased in equal steps and the corresponding increase in IB is noted. This is repeated for different fixed
values of VEC. Plots of VBC versus IB for different values of VEC shown in Fig. 2.18 are the input
characteristics.

27
 Fig: 2.17CE Input Characteristics

Output characteristics
The output characteristics are the same as those of the common emitter configuration.

Fig: 2.18 CE Output Characteristics

Transistor parameters:
(i) Input impedance (hic):
∆V
h = at V constant
∆I

(ii) Output admittance (hoc):

∆I
h = at I constant
∆V

(iii) Forward current gain (hfc):

28
 ∆I
h = at V constant
∆I

(iv) Reverse voltage gain (hrc):

∆V
h = at I constant
∆V

4. Explain how the TTL NAND Gates and CMOS NOR gates are working.(( LOGIC GATES USING
TRANSISTORS)

1.Two - Input TTL NAND Gates:

The circuit diagram of 2-input
input TTL NAND Gate is as shown in figure. Its input structure consists of multiple-
multiple
emitter transistor and output structure consists of totem
totem-pole output. Here, Q1 is an NPN transistor having
two emitters, one for each input to the gate. Although this circuits looks complex, we can simplify its
analysis
is by using the diode equivalent of the multiple
multiple-emitter transistor Q1.
Q3 is Emitter follower and D2, D3 are emitter diodes. The diodes D2 and D3 represents the two E-B
E junction
of Q1 and D4 is the collector-base(C--B) junction. The input voltages A and B are either LOW (ideally
grounded) or HIGH (ideally +5 volts).

Fig. 2.23 (a) 2-input

input TTL NAND gate (b) Diode equivalent for Q1
Working:
If either A and B or both are low, the corresponding diode conducts and the base of Q 1 0.7V. This
reduces the base voltage of Q2 to at most zero. Therefore, Q2 cuts off. With Q2 open, Q4 goes into cut-off
and the Q3 Base is pulled HIGH. Since Q 3 acts as an emitter follower, the Y output is pulled up to a HIGH
voltage.
On the other hand, when
hen A and B both are HIGH, the emitter diode of Q1 is reverse biased making

29
them off. This causes the collector diode D4 to get in to forward conduction. This forces Q2 base to go
HIGH. In turn, Q4 goes into saturation, producing a low output in all input and output conditions.Without
diode D1 in the circuit, when the output is low Q3 will conduct slightly.
To prevent this, the diode is inserted. Its voltage drops keeps the base-emitter diode of Q 3 reverse biased.
In this way, only Q4 conducts when the output is low.
A B Q1 Q2, Q4 VO
0 0 ON OFF 1
0 1 ON OFF 1
1 0 ON OFF 1
1 1 ON ON 0
Fig. 2.19 Truth table for 2-input NAND gate

2.CMOS NOR Gate:

Below figure shows 2-input CMOS NOR gate. Here, p-channel MOSFET’s Q 1 and Q2 are connected in
series and n-channel MOSFET’s Q3 and Q 4 are connected in parallel. Like NAND circuit, this circuit can be
analyzed by realizing that a LOW at any input turns ON its corresponding p-channel MOSFET and turns
OFF its corresponding n-channel MOSFET, and vice versa for a HIGH input.

30
 Fig.2.24 CMOS NOR gate

A B Q1 Q2 Q3 Q4 Output
0 0 ON ON OFF OFF 1
0 1 ON OFF OFF ON 0
1 0 OFF ON ON OFF 0
1 1 OFF OFF ON ON 0

5.Write the basic information of Operational Amplifier.

Linear integrated circuits are being used in a number of electronic applications such as in fields like audio
and radio communication, medical electronics, instrumentation control, etc. An important linear IC is
operational amplifier.
The operational amplifier (commonly referred to as op-amp) is a multi-terminal device which internally is
quite complex. Fortunately, for the ordinary user, it is not necessary to know about the op-amp's internal
make-up.
An operational amplifier is a very high gain amplifier having very high input impedance (typically a few
Megohms) and low output impedance (less than 100Ω). The basic circuit is made using a difference
amplifier having two inputs (plus and minus) and one output.Operational Amplifier amplifies the given input
signal and also it performs various mathematical operations such as addition, subtraction,
multiplication,division,integration,differentiation, etc.
Circuit symbol:
Op-amp has two input terminals and one output terminal. The plus (+) input produces an output that is in
phase with the signal applied, while an input to the minus (-) input results in an opposite polarity output.
Figure2.20 .shows a basic op-amp unit.

31
 Fig. 2.20 Circuit symbol

Different packages:
There are three popular packages available.
1) The metal can (TO) package
2) The dual-in-line package (DIP)
3) The flat package or flat pack
Op-amp
amp packages may contain single, two (dual) or four (quad) op
op-amps.
amps. Typical packages have 8
terminals (the can and the DIP or MINI DIP), 10 terminals ( flatpacks and some cans) and 14 terminals (the
DIP and the flat pack).
The widely used very popular type, for example µA741 is a single op
op-amp
amp and is available as an 8-pin
8 can,
an 8-pin DIP, a 10-pin flatpack or a 14
14-pin
pin DIP. The µA747 is a dual 741 and comes in either a 10-pin
10 can
or a 14-pin DIP.
Figure .2.21 shows the various IC packages along with the top view of connection diagram.

32
 Fig. 2.21 Different packages of op
op-amp

OP-AMP Terminals
Op-amps have five basic terminals, that is, two input terminals, one output terminal and two power supply
terminals
Power Supply Connections
The V+ and V- power supply terminals are connected to two dc voltage sources. The V+pin is connected to
the positive terminal off one source and the V- pin is connected to the negative terminal of the other source
as illustrated in Fig. where the two sources are 15 V batteries each.
These are typical values, but in general, the power supply voltage may range from about ± 5 V tot 22 V.
The common terminal of the V+ and V- sources is connected to a reference point or ground. Some op-amps
op
have a ground terminal, but most do not.
The ground is simply a convenient point on the circuit bread
bread-board
board to which the op-amp
op is connected
through the power supplies. The common point of the two supplies must be grounded, otherwise twice the
supply voltage will get applied and it may damage the op
op-amp.

33
Manufacturer's Designation for Linear ICs
Each manufacturer uses a specific code and assigns a specific type number to the ICs produced. For
example, 741 an internally compensated op-amp originally manufactured by Fairchild is sold as µA741.
Here µA represents the identifying initials used by Fairchild.
The codes used by some of the well-known manufacturers of linear ICs are:
(1) Fairchild µA, µAF
(2) National Semiconductor LM, LH, LF, TBA
(3) Motorola MC, MFC
(4) RCA CA, CD
(5) Texas Instruments SN
(6) Signetics N/S, NE/SE
(7) Burr-Brown BB

Ideal op-amp characteristics:

An op-amp is said to be ideal if it satisfies the following characteristics
1. Infinite voltage gain A.
It is denoted as AoL. It is the differential open loop gain and is infinite for an ideal op-amp.
2. Infinite input resistance Ri, so that almost any signal source can drive it and there is no loading of the
proceeding stage.The input impedance is denoted as Rin and is infinite for an ideal op-amp. This ensures
that no current can flow into an ideal op-amp.
3. Zero output resistance Ro, so that the output can drive an infinite number of other devices.The output
impedance is denoted as Ro and is zero for an ideal op-amp. This ensures that the output voltage of the
op-amp remains same, irrespective of the value of the load resistance connected.
4. Zero output voltage, when input voltage is zero.
The presence of the small output voltage though V1 = V2 = 0 is called an off voltage. It is zero for an ideal
op-amp. This ensures zero output for zero input signal voltage.
5. Infinite bandwidth, so that any frequency signals from o to ∞ HZ can be amplified without
attenuation.The range of frequency over which the amplifier performance is satisfactory is called its

34
bandwidth. The bandwidth of an ideal op
op-amp
amp is infinite. This means the operating frequency range is from
0 to infinity. This ensures that the gain of the op
op-amp
amp will be constant over the frequency range from d.c.
(zero frequency)
quency) to infinite frequency. So op
op-amp
amp can amplify d.c. as well as a.c. signals.
6. Infinite common mode rejection ratio
ratio,, so that the output common mode noise voltage is zero.The
ratio of differential gain and common mode gain is defined as CMRR.Thus infini
infinite
te CMRR of an ideal op-
op
amp ensures zero common mode gain. Due to this common mode noise output voltage is zero for an ideal
op-amp.
7. Infinite slew rate,, so that output voltage changes occur simultaneously with input voltage changes. The
slew rate is defined as the maximum rate of change of output voltage caused by a step input voltage. An
ideal slew rate is infinite which means that op
op-amp’s
amp’s output voltage should change instantaneously in
response to input step voltage. It is expressed as s =dvo/dtand measured
ed in voltage/second.
The slew rate equation is, s = 2πf VmV/Sec
8. PSRR(power supply sensitivity )=0
The power supply rejection ratio is defined as the ratio of the change in input offset voltage due to the
change in supply voltage producing it, keeping other power supply voltage constant. It is also called power
supply sensitivity. PSRR is expressed as,
∆
PSRR=
∆

Op-amp equivalent circuit:

Fig. 2.22 Equivalent circuit

Practical op-amp characteristics:

The practical op-amp
amp characteristics are classified into two types.
1. DC Characteristics
2. AC Characteristics
DC Characteristics of op-amp:
DC Characteristics of op-amp are,
1. Input bias current
2. Input offset current
3. Input offset voltage

35
4. Thermal drift
AC Characteristics:
DC Characteristics of op-amp are,
1. Fequency response
2. Slew-rate

Op-amp applications:
Linear applications of op – amp:
Adder, subtractor, voltage to current converter, current to voltage converter, instrumentation amplifier,
analog computation, power amplifier are some of the linear op
op-amp circuits.
Non – linear applications of op-amp:
amp:
Rectifier, peak detector, clipper, clamper,
amper, sample and hold circuit, log amplifier, anti –log amplifier,
multiplier are some of the non – linear op
op-amp circuits.

6.Derive the closed loop gain for an ideal Inverting and Non-inverting op-amps..

1.Inverting operational amplifier:

Fig. 2.23 Inverting amplifier

The output voltage vois fed back to the inverting input terminal through the R f- R1network where Rfis the
feedback resistor. Input signal vi is applied to the inverting input terminal through R 1and non-inverting
non input
terminal of op-amp is grounded.
The nodal equation at the node 'a' is
V −V V −V
+ =0
R R
Since node 'a' is at virtual ground Va = 0.
Therefore, we get,

36
 −V −V
+ =0
R R
−V V
=
R R
V R
A = =−
V R
Output voltage
𝑅
𝑉 =− 𝑉
𝑅

The negative sign indicate a phase shift of 180̊ between Vi and V0.

If the resistance is replaced by impedance, then the closed loop gain is given by,

𝑉 𝑍
𝐴 = =−
𝑉 𝑍

2. Non-Inverting
Inverting operational amplifier:
If the signal is applied to the non-inverting
inverting input terminal and feedback is given as shown in Fig.2.24. The
circuit amplifies without inverting the input signal, such a circuit is called non-inverting
inverting amplifier.
amplifier It may be
noted that it is also a negative feed-back
back system as output is being fed back to the inverting input terminal.

Fig.2.24 Non
Non-inverting amplifier
As the differential voltage Vd at the input terminal of op
op-amp
amp is zero, the voltage at node 'a' in Fig. 2.7 (a) is
Vi, same as the input voltage
e applied to non
non-inverting input terminal.
V −0 V −V
+ =0
R R
V V −V
+ + =0
R R R

37
 V V V
+ =
R R R
R R
V( + ) = V
R R
V R
=1+
V R

𝑅
𝑉 = 1+ 𝑉
𝑅

Hence, the closed loop gain of the Non-inverting amplifier is, 𝑉 𝑅

𝐴 = =1+
𝑉 𝑅

The gain can be adjusted to unity or more, by proper selection of resistors Rfand R1. Compared to the
inverting amplifier, the input resistance of the non-inverting amplifier is extremely large (= infinity) as the op-
amp draws negligible current from the signal source.

7. With neat circuit diagram, derive the output voltage of Summing Amplifier
Op-amp may be used to design a circuit whose output is the sum of several input signals. Such a circuit is
called a summing amplifier or a summer.
Types:
(i) Inverting summer and
(ii) non-inverting summer
1. Inverting Summing Amplifier:
A typical summing amplifier with three input voltages V1, V2 and V3 ,three input resistors R1, R2, R3 and a
feedback resistor Rf is shown in figure.2.26
The following analysis is carried out assuming that the op-amp is an ideal one, that is, A OL = ∞. Since the
input bias current is assumed to be zero, there is no voltage drop across the resistor Rcomp and hence the
non-inverting input terminal is at ground potential.

Fig.2.26 Inverting Summing Amplifier

38
The voltage at nod ‘a’ is zero as the non-inverting terminal is grounded. The nodal equation be KCL at
node ‘a’ is
V  V V  V V  V V  V
1 a
 2 a
 3 a
 0 a
 0
R1 R 2 R 3 R f
Sub ,V a  0 , Then
V1 V V V
 2
 3
 0
 0
R1 R 2 R 3 R f

V V1 V V
0
  (  2
 3
)
R f R1 R 2 R 3

V1R f V 2 R f V 3 R f
V 0   (   )
R 1 R 2 R 3

Sub , R 1  R 2  R 3  R f

(V 1  V 2  V 3 )R f
Then ,V 0  
R f

V 0   (V 1  V 2  V 3 )              (1 )
If , R 1  R 2  R 3  3 R f , Then
(V  V 2  V )
V 0   1 3
           (2)
3

Thus eqn (1) output Vo is the inverted sum of the input signals.Eqn (2) is output is the average of the input
signals (inverted).To find Rcomp, make all inputs V1 = V2 = V3 = 0. So the effective input resistance Ri = R1 ||
R2 || R3. Therefore, Rcomp = Ri || Rf = R1 || R2 || R3 || R,f.
2 .Non-Inverting Summing Amplifier:
Definition: A summer that gives a non-inverted sum is the non-inverting summing amplifier of figure 2.27.
Let the voltage at the (-) input terminal be Va.

Fig.2.27 Non-Inverting Summing Amplifier

The nodal equation at node ‘a’ is given by

39
V1  Va V2  Va V3  Va V0  Va
   0
R1 R2 R3 Rf
V1 V2 V3 Va Va Va
    
R1 R2 R3 R1 R2 R3

1 1 1 V V V
Va      1  2  3
 R1 R2 R3  R1 R2 R3
V1 V V
(  2  3 )
R1 R2 R3
Va 
1 1 1
(   )
R1 R2 R3

Rf
The op-amp and two resistors and R constitute a non-inverting amplifier with V0  (1  )Va
R
Therefore, the output voltage is,
V1 V V
 2  3)
(
Rf R1 R2 R3
V 0  (1  )
R ( 1  1  1 )
R1 R2 R3
which is a non-inverting weighted sum of inputs. Let R1 = R2 = R3 = R = Rf/2,
Then, Vo = V1+V2+V3

8. With neat circuit diagram, derive the output voltage of Differential amplifier.
A circuit that amplifies the difference between two signals is called a difference or differential amplifier.

Fig.2.28 Differential amplifier

Since, the differential voltage at the input terminals of the op-amp is zero, nodes 'a' and 'b' are at the name

40
potential, designated as v3. The nodal equation at 'a' is.

v −v v −v
+ =0
R R
and at 'b' is
v −v v
+ =0
R R
Rearranging, we get
1 1 v v
+ v − = (1)
R R R R

1 1 v
+ v − =0 (2)
R R R
Subtract(1)-(2 ),
1 v
(v − v ) =
R R

R
v = (v − v ) (3)
R
Difference-mode and Common-mode Gains:
 The output voltage depends not only upon Vd, but is also affected by the average voltage, called the
common-mode signal Vcm defined as,
( )
v = 2v = (v + v ) (4)

even with the same voltage applied to both inputs, the output is not zero. The output, therefore, must be
expressed as,
v =A v +A v (5)
where, A1 (A2)is the voltage amplification from input 1(2)
w. k. t v = (v − v ) (6)
(4)+(6)
1
v =v + v (7)
2
(4)-6)
1
v =v − v (8)
2
Sub the value of v1 and v2ineqn (5),we get
1 1
v = A [v + v ] + A [v − v ]
2 2
1
v = (A − A )v + (A + A )v
2
v =A v +A v (4)

41
Where
A = (A − A )And A = (A + A )

ADM = voltage gain for the difference signal

and ACM = voltage gain for the common-mode signal

Common-Mode Rejection Ratio

 The relative sensitivity of an op-amp to a difference signal as compared to a common-mode signal
is called common-mode rejection ratio (CMRR) and gives the figure of merit p for the differential amplifier.
 So, CMRR is given by
A
ρ=
A
CMRR is usually expressed in decibels (dB). higher the value of CMRR better is the op-amp.

42