VN5160S-E

Single channel high side driver for automotive applications

Features
Max supply voltage VCC 41V
Operating voltage range VCC 4.5 to 36V
Max on-state resistance (per ch.) RON 160 m
Current limitation (typ) ILIMH 5.4 A
SO-8
– Reverse battery protection (see Figure 28)
Off-state supply current IS 2 µA(1)
– Electrostatic discharge protection
1. Typical value with all loads connected

Applications
■ Main
■ All types of resistive, inductive and capacitive
– Inrush current active management by loads
power limitation
– Very low stand-by current
Description
– 3.0V CMOS compatible input
– Optimized electromagnetic emission The VN5160S-E is a monolithic device made
– Very low electromagnetic susceptibility using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
– In compliance with the 2002/95/EC
inductive loads with one side connected to
european directive
ground. Active VCC voltage clamp protects the
■ Diagnostic Functions device against low energy spikes.The device
– Open drain status output detects open load condition both in on and off-
– On-state open load detection state, when STAT_DIS is left open or driven low.
– Off-state open load detection Output shorted to VCC is detected in the off-state.
When STAT_DIS is driven high, STATUS is in a
– Thermal shutdown indication
high impedance condition. Output current
■ Protection limitation protects the device in overload
– Undervoltage shutdown condition. In case of long duration overload, the
– Overvoltage clamp device limits the dissipated power to safe level up
– Output stuck to Vcc detection to thermal shutdown intervention. Thermal
shutdown with automatic restart allows the device
– Load current limitation
to recover normal operation as soon as fault
– Self limiting of fast thermal transients condition disappears.
– Protection against loss of ground and loss
of VCC
– Thermal shutdown
Table 1. Device summary
Order codes
Package
Tube Tape and reel

SO-8 VN5160S-E VN5160STR-E

September 2013 Doc ID 13493 Rev 5 1/31

www.st.com 1
Contents VN5160S-E

Contents

1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/31 Doc ID 13493 Rev 5

VN5160S-E List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pins function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 17. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Doc ID 13493 Rev 5 3/31

List of figures VN5160S-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Input high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Input low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Status low-output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 18. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 19. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. High-level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. Low-level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. SO-8 Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 34. Thermal fitting model of a single-channel HSD in SO-8(1) . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 35. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4/31 Doc ID 13493 Rev 5

VN5160S-E Block diagram and pins description

1 Block diagram and pins description

Figure 1. Block diagram

VCC

VCC
CLAMP UNDERVOLTAGE

PwCLAMP
GND DRIVER

INPUT ILIM

LOGIC VDSLIM
STATUS OPENLOAD ON

STAT_DIS OPENLOAD OFF

OVERTEMP.

PwrLIM

Table 2. Pins function

Name Function

VCC Battery connection.

OUTPUT Power output.
Ground connection. Must be reverse battery protected by an external
GND
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
INPUT
switch state.
STATUS Open drain digital diagnostic pin.
STAT_DIS Active high CMOS compatible pin, to disable the STATUS pin.

Doc ID 13493 Rev 5 5/31

Block diagram and pins description VN5160S-E

Figure 2. Configuration diagram (top view)

VCC 5 4 STAT_DIS
OUTPUT 6 3 STATUS
OUTPUT 7 2 INPUT
VCC 8 1 GND

SO-8

Table 3. Suggested connections for unused and N.C. pins

Connection / Pin Status N.C. Output Input STAT_DIS

Floating X X X X X
Through 10K Through 10K
To ground N.R.(1) X N.R.
resistor resistor
1. Not recommended.

6/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

IS
VCC
VF VCC

ISD IOUT
STAT_DIS OUTPUT
VSD VOUT
IIN ISTAT
INPUT STATUS
VINn VSTAT
GND

IGND

Note: VF = VOUT - VCC during reverse battery condition.

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

VCC DC supply voltage 41 V

- VCC Reverse DC supply voltage 0.3 V

- IGND DC reverse ground pin current 200 mA

Internally
IOUT DC output current A
limited
- IOUT Reverse DC output current 6 A

IIN DC input current +10 / -1 mA

ISTAT DC status current +10 / -1 mA

ISTAT_DIS DC status disable current +10 / -1 mA

Maximum switching energy (single pulse)
EMAX 34 mJ
(L= 12mH; RL= 0; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.))

Doc ID 13493 Rev 5 7/31

Electrical specifications VN5160S-E

Table 4. Absolute maximum ratings (continued)

Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R=1.5K C=100pF)
– INPUT
4000 V
– STATUS 4000 V
VESD
– STAT_DIS 4000 V
– OUTPUT 5000 V
5000 V
– VCC
VESD Charge device model (CDM-AEC-Q100-011) 750 V

Tj Junction operating temperature -40 to 150 °C

Tstg Storage temperature -55 to 150 °C

2.2 Thermal data

Table 5. Thermal data
Symbol Parameter Value Unit

Rthj-pins Thermal resistance junction-pins (MAX) 30 °C/W

°C/W
Rthj-amb Thermal resistance junction-ambient (MAX) See Figure 32

8/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.

Table 6. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

Operating supply
VCC 4.5 13 36 V
voltage
VUSD Undervoltage shutdown 3.5 4.5 V
Undervoltage shutdown
VUSDhyst 0.5 V
hysteresis
IOUT=1A; Tj=25°C 160 m
(1)
RON On-state resistance IOUT=1A; Tj=150°C 320 m
IOUT=1A; VCC=5V; Tj=25°C 210 m
Vclamp Clamp voltage IS= 20mA 41 46 52 V

Off-state; VCC=13V; VIN=VOUT=0V;

Tj=25°C; 2(2) 5(1)(2) µA
IS Supply current
On-state; VCC=13V; VIN=5V;
IOUT=0A 1.9 3.5 mA
VIN=VOUT=0V; VCC=13V; Tj=25°C 0 0.01 3
IL(off1) Off-state output VIN=VOUT=0V; VCC=13V; Tj=125°C 0 5 µA
current(2)
IL(off2) VIN= 0V; VOUT= 4V -75 0
Output - VCC diode
VF -IOUT= 0.6A; Tj= 150°C 0.7 V
voltage
1. Guaranteed by design/characterization
2. PowerMOS leakage included

Table 7. Switching (VCC = 13V; Tj = 25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(on) Turn-on delay time RL= 13 (see Figure 6) 10 µs

td(off) Turn-off delay time RL= 13(see Figure 6) 15 µs
dVOUT/dt(on) Turn-on voltage slope RL= 13 See Figure 21 Vµs
dVOUT/dt(off) Turn-off voltage slope RL= 13 See Figure 22 Vµs
Switching energy
WON RL= 13(see Figure 6) 0.04 mJ
losses during twon
Switching energy
WOFF RL= 13(see Figure 6) 0.04 mJ
losses during twoff

Doc ID 13493 Rev 5 9/31

Electrical specifications VN5160S-E

Table 8. Status pin (VSD=0)

Symbol Parameter Test conditions Min. Typ. Max. Unit

VSTAT Status low output voltage ISTAT= 1.6 mA, VSD= 0V 0.5 V
Normal operation or VSD= 5V,
ILSTAT Status leakage current 10 µA
VSTAT= 5V
Status pin input Normal operation or VSD=5V,
CSTAT 100 pF
capacitance VSTAT= 5V
ISTAT= 1mA 5.5 7 V
VSCL Status clamp voltage
ISTAT= - 1mA -0.7 V

Table 9. Protection (1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

VCC= 13V 3.8 5.4 7.5 A

IlimH DC short circuit current
5V<VCC<36V 7.5 A
Short circuit current during
IlimL VCC= 13V; TR<Tj<TTSD 2 A
thermal cycling
TTSD Shutdown temperature 150 175 200 °C
TR Reset temperature TRS + 1 TRS + 5 °C
TRS Thermal reset of STATUS 135 °C
THYST Thermal hysteresis (TTSD-TR) 7 °C
Status delay in overload
tSDL Tj>TTSD 20 µs
conditions
Turn-off output voltage
VDEMAG IOUT=150mA; VIN=0 VCC-41 VCC-46 VCC-52 V
clamp
IOUT= 0.03A;
Output voltage drop
VON Tj=-40°C...+150°C 25 mV
limitation
(see Figure 5)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

10/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

Table 10. Openload detection

Symbol Parameter Test conditions Min. Typ. Max. Unit

Openload on-state See

IOL VIN = 5V, 8V<VCC<18V 10 40 mA
detection threshold Figure 19
Openload on-state IOUT = 0A, VCC=13V
tDOL(on) 200 µs
detection delay (see Figure 4)
Delay between INPUT falling
tPOL edge and STATUS rising IOUT = 0A (see Figure 4) 200 500 1000 µs
edge in openload condition
Openload off-state voltage See
VOL VIN = 0V, 8V<VCC<16V 2 4 V
detection threshold Figure 20
Output short circuit to Vcc
tDSTKON (see Figure 4) 180 tPOL µs
detection delay at turn-off

Table 11. Logic input

Symbol Parameter Test conditions Min. Typ. Max. Unit

VIL Input low level voltage 0.9 V

IIL Low level input current VIN= 0.9V 1 µA
VIH Input high level voltage 2.1 V
IIH High level input current VIN= 2.1V 10 µA
VI(hyst) Input hysteresis voltage 0.25 V
IIN= 1mA 5.5 7 V
VICL Input clamp voltage
IIN= -1mA -0.7 V
VSDL STAT_DIS low level voltage 0.9 V
ISDL Low level STAT_DIS current VCSD= 0.9V 1 µA
VSDH STAT_DIS high level voltage 2.1 V
ISDH High level STAT_DIS current VCSD= 2.1V 10 µA
VSD(hyst) STAT_DIS hysteresis voltage 0.25 V
ISD= 1mA 5.5 7 V
VSDCL STAT_DIS clamp voltage
ISD= -1mA -0.7 V

Doc ID 13493 Rev 5 11/31

Electrical specifications VN5160S-E

Figure 4. Status timings

OPEN LOAD STATUS TIMING (without external pull-up) OPEN LOAD STATUS TIMING (with external pull-up)

VIN IOUT < IOL VIN IOUT < IOL

VOUT < VOL VOUT > VOL

VSTAT VSTAT

tDOL(on) tDOL(on)
tPOL

OUTPUT STUCK TO Vcc OVER TEMP STATUS TIMING

IOUT > IOL Tj > TTSD

VIN
VOUT > VOL VIN

VSTAT
VSTAT
tDOL(on) tDSTKON tSDL tSDL

Figure 5. Output voltage drop limitation

Vcc-Vout

Tj=150oC Tj=25oC

Tj=-40oC

Von

Iout
Von/Ron(T)

12/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

Table 12. Truth table

Conditions INPUT OUTPUT STATUS (VSD=0V)(1)

L L H
Normal operation
H H H
L L H
Current limitation
H X H
L L H
Overtemperature
H L L
L L X
Undervoltage
H L X
L H L(2)
Output voltage > VOL
H H H
L L H(3)
Output current < IOL
H H L
1. If the VSD is high, the STATUS pin is in a high impedance.
2. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge.
3. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge.

Figure 6. Switching characteristics

VOUT
tWon tWoff

90%
80%

dVOUT/dt(on) dVOUT/dt(off)

tr 10% tf
t

INPUT
td(on) td(off)

Doc ID 13493 Rev 5 13/31

Electrical specifications VN5160S-E

Table 13. Electrical transient requirements (part 1/3)

ISO 7637-2: Test levels Number of
2004(E) Burst cycle/pulse Delays and
pulses or
repetition time impedance
Test pulse III IV test times

1 -75V -100V 5000 pulses 0.5 s 5s 2 ms, 10 

2a +37V +50V 5000 pulses 0.2 s 5s 50 µs, 2 

3a -100V -150V 1h 90 ms 100 ms 0.1 µs, 50 

3b +75V +100V 1h 90 ms 100 ms 0.1 µs, 50 

100 ms,
4 -6V -7V 1 pulse
0.01

5b(1) +65V +87V 1 pulse 400 ms, 2 

1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 2/3)

ISO 7637-2: Test level results(1)
2004(E)
Test pulse III IV

1 C C

2a C C

3a C C

3b C C

4 C C

5b(2) C C

1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 15. Electrical transient requirements (part 3/3)

Class Contents

C All functions of the device are performed as designed after exposure to disturbance.

One or more functions of the device are not performed as designed after exposure to
E
disturbance and cannot be returned to proper operation without replacing the device.

14/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

Figure 7. Waveforms
NORMAL OPERATION
INPUT
STAT_DIS
LOAD CURRENT
STATUS

UNDERVOLTAGE
VUSDhyst
VCC VUSD
INPUT
STAT_DIS
LOAD CURRENT
STATUS undefined

OPEN LOAD with external pull-up

INPUT
STAT_DIS
VOUT>VOL
LOAD VOLTAGE VOL
STATUS

OPEN LOAD without external pull-up

INPUT

STAT_DIS
LOAD VOLTAGE
LOAD CURRENT IOUT<IOL
tPOL
STATUS

RESISTIVE SHORT TO Vcc, NORMAL LOAD

INPUT
STAT_DIS
IOUT>IOL VOUT>VOL
LOAD VOLTAGE VOL
STATUS
tDSTKON

OVERLOAD OPERATION

Tj TR TTSD
TRS
INPUT
STAT_DIS
ILIMH
ILIML
LOAD CURRENT

STATUS

current power thermal cycling

limitationlimitation
SHORTED LOAD NORMAL LOAD

Doc ID 13493 Rev 5 15/31

Electrical specifications VN5160S-E

2.4 Electrical characteristics curves

Figure 8. Off-state output current Figure 9. Input clamp voltage

Iloff[nA] Vicl[V]
600 7.0
6.8
500
6.6 Iin = 1mA

400
Off-state 6.4
Vcc=13V
6.2
Vin=Vout=0V
300 6.0
5.8
200
5.6
5.4
100
5.2
0 5.0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Tc (°C)

Figure 10. High-level input current Figure 11. Input high-level voltage

Iih[µA] Vih[V]

5.0 4.0
4.5 3.5
4.0
3.0
3.5
3.0 Vin = 2.1V 2.5

2.5 2.0
2.0 1.5
1.5
1.0
1.0
0.5 0.5
0.0 0.0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Figure 12. Input low-level voltage Figure 13. Input hysteresis voltage

Vil[V] Vihyst[V]

2.0 1.0
1.8 0.9
1.6 0.8
1.4 0.7
1.2 0.6
1.0 0.5
0.8 0.4
0.6 0.3
0.4 0.2
0.2 0.1
0.0 0.0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

16/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

Figure 14. Status low-output voltage Figure 15. Status leakage current

Vstat[V] Ilstat[µA]
1.0 0.075
0.9
0.8 0.065
0.7
0.055
0.6 Vstat = 5V
0.5 0.045
0.4
Istat = 1.6mA
0.3 0.035
0.2
0.025
0.1
0.0 0.015
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Figure 16. Status clamp voltage Figure 17. On-state resistance vs Tcase

Vscl[V] Ronl[m Ohm ]

9.0 300
8.5
250
8.0
7.5
200
7.0
6.5 150
6.0
Istat = 1mA Iout = 1A
100
5.5 Vcc = 13V
5.0
50
4.5
4.0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Figure 18. On-state resistance vs VCC Figure 19. Open-load on-state detection
threshold

Ronl[m Ohm ] Iol[m A]

300 100
275 90
Tc = 150°C
250 80
225 70
200 Tc = 125°C 60
175 50
150 40
125 Tc = 25°C 30
100 20
75 Tc = -40°C 10
50 0
0 5 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 150 175
Vcc[V] Tc (°C)

Doc ID 13493 Rev 5 17/31

Electrical specifications VN5160S-E

Figure 20. Open-load off-state voltage Figure 21. Turn-on voltage slope
detection threshold

Vol[V] (dVout/dt)on[V/m s]

5.0 1000
4.5 900
4.0 800
3.5 700
3.0 600
Vin = 0V
2.5 500 Vcc = 13V
RL = 13Ohm
2.0 400
1.5 300
1.0 200
0.5 100
0.0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Figure 22. Turn-off voltage slope Figure 23. ILIM vs Tcase

(dVout/dt)off[V/m s] Ilim h[A]

1000 16
900 14
800
12
700
600 10

500 Vcc = 13V 8 Vcc = 13V

RL = 13Ohm
400 6
300
4
200
100 2

0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Figure 24. Undervoltage shutdown Figure 25. STAT_DIS clamp voltage

Vusd[V] Vsdcl[V]
16 8.0

14 7.5

12 7.0
10 6.5

8 6.0 Ini = 1mA

6 5.5

4 5.0
2 4.5

0 4.0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

18/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications

Figure 26. High-level STAT_DIS voltage Figure 27. Low-level STAT_DIS voltage

VsdH[V] VsdL[V]

8 8

7 7

6 6

5 5

4 4

3 3

2 2

1 1

0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Doc ID 13493 Rev 5 19/31

Application Information VN5160S-E

3 Application Information

Figure 28. Application schematic

+5V +5V
VCC

Rprot STAT_DIS

Dld
Rprot INPUT
µC
OUTPUT
Rprot STATUS

GND

RGND
VGND DGND

3.1 GND protection network against reverse battery

3.1.1 Solution 1: resistor in the ground line (RGND only)

This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1. RGND  600mV / (IS(on)max)
2. RGND VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum On-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).

20/31 Doc ID 13493 Rev 5

VN5160S-E Application Information

3.1.2 Solution 2: a diode (DGND) in the ground line

A resistor (RGND=1kshould be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-VCCpeak/Ilatchup  Rprot  (VOHC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup  20mA; VOHµC  4.5V
5k  Rprot  180k.
Recommended Rprot values is 10k

3.4 Open load detection in off-state

Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. no false open load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT= (VPU/(RL+RPU))RL<VOlmin.
2. no misdetection when load is disconnected: in this case the Vout has to be higher than
VOLmax; this results in the following condition RPU<(VPU–VOLmax)/IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.

Doc ID 13493 Rev 5 21/31

Application Information VN5160S-E

The values of VOLmin, VOLmax and IL(off2) are available in the Electrical characteristics
section.

Figure 29. Open-load detection in off-state

V batt. VPU

VCC

RPU

DRIVER
INPUT + IL(off2)
LOGIC

OUT
+
R
-
STATUS
VOL
RL

GROUND

22/31 Doc ID 13493 Rev 5

VN5160S-E Application Information

3.5 Maximum demagnetization energy (VCC = 13.5V)

Figure 30. Maximum turn-off current versus inductance

10
A
B
C

1
I (A)

0,1
0,1 1 L (mH) 10 100

A: Tjstart = 150°C single pulse

B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse

VIN, IL

Demagnetization Demagnetization Demagnetization

Note: Values are generated with RL =0 In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.

Doc ID 13493 Rev 5 23/31

Package and PCB thermal data VN5160S-E

4 Package and PCB thermal data

4.1 SO-8 thermal data

Figure 31. SO-8 PC board

Note: Layout condition of Rth and Zth measurements (PCB: FR4 area= 4.8 mm x 4.8 mm, PCB
thickness=2 mm, Cu thickness= 35 µm, Copper areas: from minimum pad lay-out to 2 cm2).

Figure 32. Rthj-amb vs PCB copper area in open box free air condition

RTHj_amb(°C/W)
110

100

90

80

70

60
0 0.5 1 1.5 2 2.5
PCB Cu heatsink area (cm^2)

24/31 Doc ID 13493 Rev 5

VN5160S-E Package and PCB thermal data

Figure 33. SO-8 Thermal impedance junction ambient single pulse

ZTH (°C/W)
1000

Footprint

100 2 cm2

10

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Equation 1: pulse calculation formula

Z TH = R TH   + Z THtp  1 –  
where  = tP/T

Figure 34. Thermal fitting model of a single-channel HSD in SO-8(1)

1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.

Doc ID 13493 Rev 5 25/31

Package and PCB thermal data VN5160S-E

Table 16. Thermal parameter

Area/island (cm2) Footprint 2

R1 (°C/W) 1.2

R2 (°C/W) 6

R3 (°C/W) 3.5

R4 (°C/W) 21

R5 (°C/W) 16

R6 (°C/W) 58 28

C1 (W.s/°C) 0.0008

C2 (W.s/°C) 0.0016

C3 (W.s/°C) 0.0075

C4 (W.s/°C) 0.045

C5 (W.s/°C) 0.35

C6 (W.s/°C) 1.05 2

26/31 Doc ID 13493 Rev 5

VN5160S-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

5.2 Package mechanical data

Figure 35. SO-8 package dimensions

Doc ID 13493 Rev 5 27/31

Package and packing information VN5160S-E

SO-8

Table 17. SO-8 mechanical data

Millimeter
Dim.
Min. Typ. Max.

A 1.75

a1 0.1 0.25

a2 1.65

a3 0.65 0.85

b 0.35 0.48

b1 0.19 0.25

C 0.25 0.5

c1 45 (typ.)

D 4.8 5

E 5.8 6.2

e 1.27

e3 3.81

F 3.8 4

L 0.4 1.27

M 0.6

S 8 (max.)

L1 0.8 1.2

28/31 Doc ID 13493 Rev 5

VN5160S-E Package and packing information

5.3 Packing information

Figure 36. SO-8 tube shipment (no suffix)

B
C Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A A 3.2
B 6
C (± 0.1) 0.6

All dimensions are in mm.

Figure 37. SO-8 tape and reel shipment (suffix “TR”)

Reel dimensions

Base Q.ty 2500

Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

All dimensions are in mm.

Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+ 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

Doc ID 13493 Rev 5 29/31

Revision history VN5160S-E

6 Revision history

Table 18. Document revision history

Date Revision Changes

Feb-2007 1 Initial release.

Document rewritten, restructured and put in corporate technical
May-2007 2
literature template.
Table 4: Absolute maximum ratings: changed EMAX value from
14 to 34 mJ.
Table 13: Electrical transient requirements (part 1/3): updated
test level values III and IV for test pulse 5b and notes.
17-Dec-2007 3
Added Section 3.5: Maximum demagnetization energy (VCC =
13.5V).
Figure 34: Thermal fitting model of a single-channel HSD in
SO-8(1): added note.
Updated Section 2.3: Electrical characteristics.
23-Nov-2009 4 Updated Section 2.4: Electrical characteristics curves.
Updated Table 6: Power section.
20-Sep-2013 5 Updated Disclaimer

30/31 Doc ID 13493 Rev 5

VN5160S-E

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2013 STMicroelectronics - All rights reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com

Doc ID 13493 Rev 5 31/31