Chapter 3: JUMP, LOOP AND CALL INSTRUCTIONS:

LOOP (none like 8086): a repeating a sequence of instructions a certain number of times is called a loop.
- Loop action is performed by “DJNZ register, Label”.
- In this ins., the register is decremented and if it is not zero, it jumps to the target address referred to by label.
- Prior to the start of loop == the register is loaded with the counter for the number of repetitions.
- Counter/register can be R0 – R7 or RAM location  DJNZ…
Example 3-1: The following program adds value 3 to the ACC (register A) ten times
MOV A,#0 ; A=0, clear ACC
MOV R2,#05h ; load Note counter R2=05 decimal  maximum 0FFH=256D times
AGAIN:ADD A,#01 ; add 01 to ACC
DJNZ R2,AGAIN ; repeat until R2=0, as we need (R2-1),10 times to get ZF=NZ
MOV R5,A ; save A in R5  R5 = ???
Note: A LOOP can be repeated FFH (or 255) times. But Nested LOOPs can be used for more looping action.
Example 3-3: Write a program to (a) load the ‘A’ with the value 55H, and (b) complement the ‘A’ 700 times
MOV A,#55H ; A=55H
MOV R3,#10 ; R3=10, outer loop count
NEXT:MOV R2,#70 ; R2=70, inner loop count
AGAIN:CPL A ; complement A register
DJNZ R2, AGAIN ; repeat (complement) it 70 times  Dec R2, check if zero, if not ZR jump to line
DJNZ R3, NEXT ; repeat inner LOOP 10 times or complement a total of 10x70=700 times
JUMP: (a) Conditional Jump, if only certain condition is meet…… (b) Unconditional Jump, always jumps (sjmp)
Short Jumps (-128 to 127 Bytes)  By default only works with register “A” as counter
Example of JZ  MOV A, #34H ;A=34h
JZ OVER ;jump if A = 0, as ZF=ZR for 8088 case
MOV A, R1 ;A=R1
JZ OVER ;jump if 1 = A = 0, as ZF=ZR for 8088 case
................
OVER: MOV A,B
• Notice that JZ and JNZ instructions by default checks if register A or accumulator is zero or not.
(1) JNC  If CY = 0, will Jump .. CPU starts to fetch and execute instruction from the address of the label.
If CY = 1, it will not jump .. but will execute the next instruction below JNC
Example 3-5: Find the sum of values 79H, F5H, E2H. Put the sum in registers R0 (low byte) and R5 (high byte)
MOV A,#0 ;clear A or A=0
MOV R5,A ;clear R5
ADD A,#79H ;A=0+79H=79H and CF=’0’=NC
JNC N_1 ;if CY=0, add next number ;
INC R5 ;if CY=1, increment R5
N_1: ADD A,#0F5H ;A=79H+F5H=6EH and CF=1=CY
JNC N_2 ;jump if CY=0
INC R5 ;if CY=1,increment R5 (R5=1)
N_2: ADD A,#0E2H ;A=6EH+E2H=50H and CF=1=CY
JNC OVER ;jump if CY=0
INC R5 ;if CY=1, increment 5
OVER:MOV R0,A ;now R0=50H, and R5=02
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• Table 3-1 of 8051 conditional instructions. These short JUMPs have addresses within -128 and +127 bytes.
• Note again that JZ and JNZ instructions by default checks if register A or accumulator is zero or not.

Instructions Actions
JZ line-number Jump if A ＝ 0  bydefault
JNZ line-number Jump if A ≠ 0
DJNZ register, line-number Decrement & Jump if register R0-R7≠ 0
CJNE A, byte address , line-no. Jump if A ≠ content of byte address
CJNE Rn, #data, line-no. Jump if byte stored in Rn≠ #data
CJNE @Ri(i=0,1), #data, line-no. Jump if byte stored in Ri ≠ #data
JC line-number Jump if CF ＝ 1 = CY
JNC line-number Jump if CF ＝ 0 = NC
JB bit, line-number Jump if bit ＝ 1 (ex: JB PSW.0 to check PF)
JNB bit, line-number Jump if bit ＝ 0
JBC bit, line-number Jump if bit ＝ 1 and clear bit
The Unconditional JUMP instructions: (1) LJMP (long jump) and (2) SJMP (short jump).
• LJMP is three-byte instruction with 2-byte target address that allows a jump to any Mem. location with PA=
0000 to FFFFH (64Kbyte). The 1st byte is op-code and the 2nd and 3rd byte represent the 16-bit target address.
• SJMP is two byte instruction with 1-byte op-code and 1-byte target address that allows a jump to any Mem.
location with PA= 00 to FFH (-128 to 127 = 255 byte). Original 8051 has only 4Kbyte of on-chip ROM.
• To calculate the target address of a short jump (SJMP, JNC, JZ, DJNZ, etc.), the second byte is added to the
program counter (PC) of the instruction, immediately below the jump. If the target address is more than -128 to
+127 bytes from the address, below the short jump instruction address: the assembler will generate an error
stating the jump is out of range. Figure below shows the calculation process of the target address:

F2H+15H=107H
drop carry 07H

CALL Instruction: Instruction used to call subroutine; (1) LCall (long call 2-byte address can access 64Kbytes) or
(2) ACALL (absolute call 11-bits of address out of 2-byte instruction  can access 2Kbyte = 2048D=7FFH)
CALLs subroutine: - Subroutines are often used to perform tasks that need to be performed frequently
- This makes a program more structured in addition to saving memory space
• When a subroutine is called, control is transferred to that subroutine. The process involves the MC to:
• Save on the stack the Physical address of the instruction immediately below the LCALL
• Begins to fetch/execute instructions from the new location (target address mentioned in LCALL)
• After finishing execution of the subroutine
• Instruction RET transfers control back to the PUSHed physical address immediately below the LCALL
• Every subroutine needs RET as the last instruction
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• LCALL (long call)  3-byte instruction  First byte is the op-code  Second and third bytes are used for
address of target subroutine  Subroutine is located anywhere within 64K byte address space
• ACALL (absolute call)  2-byte instruction  11 bits are used for address within 2K-byte range
• The following Example demonstrates the use of LCALL instructions to generate time-delay

• Note that in above the DELAY subroutine produces time-delay that is dependent of the speed of MC.
• The following program is an example for PUSH within CALL instruction and how it uses STACK segment :

• So in the above example, note that the CALL instruction initiates a “PUSH next program counter (PC) value”
before loading the target subroutine address to program counter (PC) of the MC

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• The following example will demonstrate the use of PUSH and POP instructions within CALL instruction
• Since the stack pointer (SP) is disturbed, using PUSH with subroutine needs to re-adjust the SP to return to
desired part of the main program.

If RET is here
 error

RET
No
error

• The following program is an example CALLing SUBRUTINE in a structured MC program

• Remember that CALL by default has a PUSH and RET by default has a POP

• The only difference between ACALL and LCALL is: (a) the target address for LCALL can be anywhere within
the 64K byte address, (b) the target address for ACALL can be anywhere within the 2K byte address.
• For MC with small ROM, using ACALL can save a number of byte of program ROM space (as code=2byte)
• Additional example on CALL instruction: LCALL  3-byte, ACALL 2BYTE

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• Clock cycles are needed to Mic. Cont. CPU to execute an instruction.
• These are referred as to as machine cycles and the length of machine cycle depends on the frequency of the
crystal oscillator connected to 8051.
• In original 8051, one machine cycle = 12 oscillator/clock pulses/periods
• Example: Find the period of the machine cycle for 11.0592 MHz crystal frequency
• Solution: CLK pulse of OSC.= f = 11.0592/12 = 921.6 kHz; Machine cycle is T=1/921.6 kHz = 1.085μs
• OR T=1/f=1/11.0592 MHz = 0.09042 micro-sec  Machine Cycle = 12*T = 1.085 micro-sec
• OR T=1/f; Machine Cycle (MC) =12*T, where T=1/crystal or xtal freq
• The following example will find the time needed to execute instructions:

• Note that the time duration also depends on the speed of the CPU …...
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• The following program will help to generate required delay for practical application:

• Increasing the time delay (if needed in application) using NOP instructions

• Normally two factors can affect the accuracy of the time delay of various 8051 family MC’s:
(1) Crystal frequency: as the duration of the “period of the machine cycle” is a function of crystal frequency
(2) 8051 Design: 12-Clocks was the original machine cycle duration of 8051. Recent 8051 family with
improved IC and CPU design have made 1-Clock machine cycle a common feature

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Example: Delay calculation without ignoring overhead: Execute the following program. Assume the crystal
frequency is 11.0592 MHz and the system is using 8051 microcontroller (MC). When calculating
delay, don’t ignore overhead

00H: MOV R2, #05H

02H: MOV A, #0AAH
04H: MOV P0, A
06H: ACALL DELAY ; DELAY is address 0DH
08H: CPL A
09H: DJNZ R2, 02H
0BH: SJMP $
0DH: MOV R5, #0FH ; 1 MC****
0FH: PUSH 05H ; 2 MC****
11H: MOV R4, #18H ; 1 MC***
13H: MOV R3, #25H ; 1 MC**
15H: DJNZ R3, 15H ; 2 MC*
17H: DJNZ R4, 13H ; 2 MC**
19H: DJNZ R5, 11H ; 2 MC***
1BH: RET ; 2 MC****

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 - This is demonstrate in the TABLE below:

Chip/Maker Clocks per Machine Cycle

AT89C51 Atmel 12  1.085 microsec
P89C54X2 Philips 6
DS5000 Dallas Semi 4
DS89C420/30/40/50 Dallas Semi 1  90 nanosec

• TIME DELAY calculation process: Here given is Machine Cycle of MC ( Bus-cycle for M.P.)
(Hint: 12 CLK pulses per Machine-cycle with frequent of fXTAL….. Frequency of CLK (per M. Cycle)
f=fXTAL/12, ….. Time duration of the Machine Cycle,T=1/f ) OR M.C.=12*T; T=1/fXTAL

• Different MC for same ins. per microprocessor