MPMC I Mid & Quiz Question Paper Format

BABA INSTITUTE OF TECHNOLOGY AND SCIENCES (BITS)
(Approved by AICTE, New Delhi & Affiliated to JNTU, Kakinada)

PM Palem, Visakhapatnam-530 048
(An ISO 9001:2008 Certified Institution)
III B.Tech II Semester I-Mid Examination Question Paper Set-1
Subject: S.C Regulation: R16
Max. Time: 90 min Date:30:07:2021
Branch: E.C.E Max Marks: 15M
NOTE: Answer all questions and carry equal Marks
==========================================================================================================
1. With a neat block diagram explain the architecture of 8086 Microprocessor. [5M]
2. Explain the physical address formation in 8086 microprocessor. [5M]
3. With a neat sketch explain the internal architecture of 8255. [5M]

Max. Time: 90 min Date:30.07.2021
Branch:E.C.E Max Marks: 15M
==========================================================================================================
1. With a neat block diagram explain the architecture of 8086 Microprocessor. [5M]
2. Explain the physical address formation in 8086 microprocessor. [5M]
3. With a neat sketch explain the internal architecture of 8255. [5M]

1. Discuss the significance of Memory Organization of 8086. [5M]
2. With a neat diagram, discuss the internal architecture of 8086 microprocessor. [5M]
3. Explain the modes of operation of 8255 PPI. [5M]

Max. Time: 90 min Date: 30.07.2021
Branch: E.C.E Max Marks: 15M
==========================================================================================================
1. Discuss the significance of Memory Organization of 8086. [5M]
2. With a neat diagram, discuss the internal architecture of 8086 microprocessor. [5M]
3. Explain the modes of operation of 8255 PPI. [5M]

Subject:S.C Regulation: R16
==========================================================================================================
1. Explain the Accumulator, temporary register and special purpose registers of 8086
microprocessor. [5M]
2. Explain the four conditional jump instructions of 8086. [5M]
3. Draw and explain the four-phase stepper motor interface circuit . [5M]

==========================================================================================================
1. Explain the Accumulator, temporary register and special purpose registers of 8086
microprocessor. [5M]
2. Explain the four conditional jump instructions of 8086. [5M]
3. Draw and explain the four-phase stepper motor interface circuit . [5M]
==========================================================================================================
1. Draw and explain the 16-bit flag register format of 8086.[5M]
2. Explain the addressing modes of 8086 (i) Implicit or Inherent addressing mode
(ii) Immediate addressing mode (iii) Direct addressing mode

(iv) Register indirect addressing mode.. [5M]
3. Explain about interfacing of a DAC 0809 with 8086 using 8255? [5M]

==========================================================================================================
1. Draw and explain the 16-bit flag register format of 8086.[5M]
2. Explain the addressing modes of 8086 (i) Implicit or Inherent addressing mode
(ii) Immediate addressing mode (iii) Direct addressing mode

(iv) Register indirect addressing mode.. [5M]
3. Explain about interfacing of a DAC 0809 with 8086 using 8255? [5M]
III B.Tech II Semester I-Quiz Examination Question Paper
==========================================================================================================
1) If the segment address is 1005H and the offset is 5555H , Then the physical address is
[ ]
a) 155A5 H b) 16560 H c) 155105 H d) 155B5 H
2) the CPU of 8086 is able to address [ ]

a) 64KB B) 1Mb c) 1MB d) 64 MB
3) MOV AX,[BX] instruction indicates what type of addressing mode [ ]

a) Register b) Register Direct c) Register Indirect d) Immediate
4) A MACRO can be defined in a program [ ]

a) any where b) only at the top c) outside of the program d) only at the bottom
5) In BSR mode of 8255 PPI which port can be set or reset [ ]

a) Port A B) Port B c) Port A ND B d) Port C
6) Programmable interrupt controller is [ ]

a) 8258A b) 8259A c) 8255A d) 8295A
7) Paging operation existed in which Microprocessor [ ]

a) 8086MP b) 80286 MP c) 80386MP d)8085MP
8) Pentium Processor is _____________ architecture processor [ ]

a) RISC b) CISC c) Hybrid RISC-CISC d) RISC or CISC
9) 8051Micro controller is a _______________ [ ]

a) 8 bit MC b) 16 bit MC c) 20 bit MC d) 4 bit MC
10) Which register is used to store one of the operands for multiply and divide
instructions in 8051MC [ ]
a) B Register b) A Register c) Both A and B d) None
11) 8051 MC have ________________ Bytes of RAM [ ]

a) 64 b)128 c)256 d)512
12) the bellow processor is a numeric co-processor [ ]

a) 8087 b)8086 c)8088 d)8085
13) " cycle stealing ",this term is belongs to which controller [ ]

a) 8255 PPI B) 8257DMA c) 8086MP d) none
14) The interrupt type RST 7.5 has [ ]
a ) no priority b) Lowest priority c)Highest priority d) none
15) microprocessor address bus is [ ]

a) bidirectional b)unidirectional c) both a & b c) none
16) memory size can be defined as__________________(A=address lines , D= data lines )

[ ]
a) 2A *D b) 2D *A c) 2*A*D d) none
17) for 8086 microprocessor has_____________ ground pins [ ]

a) only one b) two c) three d) none
18) the instruction NOP means [ ]

a) No Operation b) No Out Pins c)No Out Processing d)none
19) the instruction JNC is _______________instruction [ ]

a) control b) branching c) transfer d) logical
20) 80286MP can be able to address _____________physical memory [ ]

a) 20MB b)16MB c) 1MB d) 24MB

MPMC I Mid & Quiz Question Paper Format

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BABA INSTITUTE OF TECHNOLOGY AND SCIENCES (BITS)

(Approved by AICTE, New Delhi & Affiliated to JNTU, Kakinada)

2. Explain the physical address formation in 8086 microprocessor. [5M]

3. With a neat sketch explain the internal architecture of 8255. [5M]

BABA INSTITUTE OF TECHNOLOGY AND SCIENCES (BITS)

2. Explain the physical address formation in 8086 microprocessor. [5M]

3. With a neat sketch explain the internal architecture of 8255. [5M]

3. Explain the modes of operation of 8255 PPI. [5M]

BABA INSTITUTE OF TECHNOLOGY AND SCIENCES (BITS)

1. Discuss the significance of Memory Organization of 8086. [5M]

3. Explain the modes of operation of 8255 PPI. [5M]

2. Explain the four conditional jump instructions of 8086. [5M]

BABA INSTITUTE OF TECHNOLOGY AND SCIENCES (BITS)

2. Explain the four conditional jump instructions of 8086. [5M]

1. Draw and explain the 16-bit flag register format of 8086.[5M]

(ii) Immediate addressing mode (iii) Direct addressing mode

BABA INSTITUTE OF TECHNOLOGY AND SCIENCES (BITS)

1. Draw and explain the 16-bit flag register format of 8086.[5M]

(ii) Immediate addressing mode (iii) Direct addressing mode

2) the CPU of 8086 is able to address [ ]

3) MOV AX,[BX] instruction indicates what type of addressing mode [ ]

4) A MACRO can be defined in a program [ ]

5) In BSR mode of 8255 PPI which port can be set or reset [ ]

6) Programmable interrupt controller is [ ]

7) Paging operation existed in which Microprocessor [ ]

8) Pentium Processor is _____________ architecture processor [ ]

9) 8051Micro controller is a _______________ [ ]

11) 8051 MC have ________________ Bytes of RAM [ ]

12) the bellow processor is a numeric co-processor [ ]

13) " cycle stealing ",this term is belongs to which controller [ ]

15) microprocessor address bus is [ ]

16) memory size can be defined as__________________(A=address lines , D= data lines )

17) for 8086 microprocessor has_____________ ground pins [ ]

18) the instruction NOP means [ ]

19) the instruction JNC is _______________instruction [ ]

20) 80286MP can be able to address _____________physical memory [ ]

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