EC_CE08 - Digital Circuits

Test Summary
No. of Sections: 1
No. of Questions: 33
Total Duration: 90 min

Section 1 - Technical

Section Summary
No. of Questions: 33
Duration: 90 min

Additional Instructions:
1. The question paper contains 33 questions
2. Maximum marks that can be obtained are 50 Marks
3. The total duration of the test is 90 Minutes
4. This question paper consists of subject wise questions
a. Question numbers 1 to 16  : 1 mark
b. Question numbers 17 to 33  : 2 marks 
5. The question paper consists of Multiple Choice Questions (MCQ) and Numerical Answer Type ( NAT)
6. MCQ questions will have four choices, out of which only ONE is correct answer. 
For NAT questions, there will not be any choice. Answer should be entered with the help of mouse using virtual keyboard 
7. Negative Marking 
a. For 1-mark MCQ, 1/3 mark will be deducted for a wrong answer
b. For 2-mark MCQ, 2/3 mark will be deducted for a wrong answer
8. There is NO negative marking for a wrong answer in NAT questions

Q1. A 10 bit ADC is used to digitize an Analog Signal in the range of 0.12V. The maximum peak to peak ripple voltage that can be
allowed in the DC supply voltage is

Nearly 12 mV

Nearly 120 mV

Nearly 100 mV

Nearly 20 mV

Q2. For a dual ADC type 3$\frac{1}{2}$ DVM reference voltage is 200 mv and first integration time is 400 ms. For the same input
voltage, deintegration is 512.2 ms. The DVM will indicate.

199 mV

235.1 mV

256.1 mV

128.5 mV

Q3. In case of a dual-slope integrating type ADC, If the output of 10 bit counter is clocked at 10 MHz, maximum frequency of analog
signal that can be converted using ADC is
 10 kHz

5 kHz

20 kHz

2 kHz

Q4. Which of the following is true statement?

The lowest power consumption in TTL

Lowest noise margin of CMOS gates

Least propagation delay for ECL

TTL has the largest fanout

Q5. In standard TTL gates totem pole refers to

Output buffers

Input emitter stage

Phase spitter

Open collector O/P state

Q6. Following figure represents which gate?

XOR

NAND

NOR

XNOR

Q7. In the 8085 microprocessor, the RST3 instruction transfers the programe execution to the following location?

30 H
 18 H

81 H

80 H

Q8. What is the size of PSW (Programe Status word) register?

8 bit

16 bit

32 bit

4 bit

Q9. A single instruction to clear the lower four bits of the accumulator in 8085 assembly language is?

XRI 0FH

ANI 0FH

XRI FOH

ANI OFH

Q10. In 8085 MP, if the clock frequency is 5 MHz, the time required (in microsecond) to execute an instruction of 18T states is?

3.0 μs

3.6 μs

4.0 μs

6.0 μs

Q11. The total number of memory accesses involved (inclusive of the opcode fetch), when an 8085 processor executes the instruction
3TA2003 is

4
Q12. [A + C{  + (  + A )}][  +  (A + B)] = 1, then

B=C

B = 

C=0

C=1

Q13. D's complement of (ABCD)E is

1230

0123

3210

1320

Q14. The number of digit 1 present in the binary representation of 5 × 1026 + 3 × 514 + 7 × 258 + 9 × 8 + 3 is

10

12

Q15. What is the addition of (–64)10 and (80)16?

(–16)10

(16)16

(1100000)2

(01000000)2

Q16. Consider the following multiplication

(10A1B)2 × (15)10 = (X01011001)2
Which one of the following given appropriate value of A, B and X?

A = 0, B = 0, X = 1
 A = 0, B = 1, X = 1

A = 1, B = 1, X = 1

A = 1, B = 1, X = 0

Q17. The logic function f(A, B, C) = Σ m(0, 2, 4, 5, 6) can be represented by

1 Only

1, 2 only

1, 3 only

1, 2 and 3

Q18. The Boolean expression for the shaded area in the venn diagram is

None of the above

Q19. The output Y of the original circuit is equal to

Q20. The circuit below does not represent

 ρ(A, B) = Σ(1, 2)

Error Gate with A & B as inputs

ρ(A, B) = π(0, 3)

Equality function

Q21. Consider the following circuit

If f(x, y, z) is Σm(0, 3, 5, 7) then what will be the value of I0 and I2 (respectively)?

,z

, 

z, z

z, 

Q22. For the sequential circuit shown in the figure, state diagram is
Q23. The Boolean expression for the output of the multiplexer shown below is

Q24. Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of n variables. What is
the minimum size of the multiplexer needed?

2n line to 1 line

2n+1 line to 1 line

2n–1 line to 1 line

2n–2 line to 1 line

Q25. For the circuit shown in the figure below, two 4-bit parallel in serial-out shift registers loaded with the data shown are used to feed
the data to a full adder. Initially all the flip-flops are in clear state. After applying two clock pulses, the output of the full adder
should be :-

S = 0, C0 = 0

S = 0, C0 = 1

S = 1, C0 = 0

S = 1, C0 = 1
Q26. The stable state of LED display is

13

10

Q27. The magnitude of error between VDC and Vin at steady in volts.

0.6 V

0.8 V

0.5 V

0.2 V

Q28. The input clk frequency for the flip-flop given is 12 kHz. Then the frequency 'Q' will be

_________

Q29.
A 4-bit weighted DAC has VR = 1V and   = for an input 1000, the output will be
_________

Common Content:

The assembly language program

MVI H, 35 H
MVI B, 0E H
XRI 69 H
ADD B
ANI 9BH
CPI 9FH
STA 3010H
HLT

Q30. The contents of the Accumulator just after execution of the ANI instruction is

EAH

8AH

DCH

58H

Q31. The status of flags after execution of STA instruction will be

 Z = 0, Cy = 1

Z = 0, Cy = 0

Z = 1, Cy = 1

Z = 1, Cy = 0

Common Content:

An 8085 assembly language program is given

Q32. At 1010H address, which operation performed of subroutine?

The contents of register pair B & D are interchanged

The contents of SP & HL register paired swaped

Move the contents of BD register pair on the top of stack

Copies the top of stack to DE register pair

Q33. When instruction at 1014H is executing then contents of stack points are

1020H

101BH

201EH

203BH
 Answer Key & Solution
Section 1 - Technical
Q1
Nearly 12 mV

Solution

Q2
256.1 mV

Solution

Q3
10 kHz

Solution

Q4
Least propagation delay for ECL

Solution

Q5
Open collector O/P state

Solution

No Solution

Q6
NOR

Solution

Q7
18 H
 Solution

Q8
16 bit

Solution

Q9
ANI 0FH

Solution

Q10
3.6 μs

Solution

Q11
4

Solution

No Solution

Q12
C=0

Solution

Q13
3210

Solution

Q14
6
 Solution

Q15
(01000000)2

Solution

Q16
A = 1, B = 1, X = 1

Solution

Q17
1, 2 only

Solution
Q18
None of the above

Solution

Q19

Solution
Q20
Equality function

Solution

Q21
,z

Solution

Q22

Solution

Q23

Solution

Q24
2n–1 line to 1 line

Solution
Q25
S = 1, C0 = 1

Solution

Q26
13

Solution

Q27
0.6 V

Solution

Q28
6

Solution
Q29
-8

Solution

Q30. 8AH

Solution

Q31. Z = 0, Cy  = 1

Solution

Q32. The contents of register pair B & D are interchanged

Solution

Q33. 201EH

Solution