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November 2006
Ordering Information
Maximum Output Power(1)
Product Operating Current RDS(ON) 230VAC±15%(2) 85-265VAC Replaces
PKG.
Number(5) Temp. Limit Max. Open Open Devices
Adapter(3) Adapter(3)
Frame(4) Frame(4)
FSDL321
FSQ311 8-DIP -25 to +85°C 0.6A 19Ω 7W 10W 6W 8W
FSDM311
FSQ0165RN 8-DIP -25 to +85°C 0.9A 10Ω 10W 15W 9W 13W FSDL0165RN
FSDM0265RN
FSQ0265RN 8-DIP -25 to +85°C 1.2A 6Ω 14W 20W 11W 16W
FSDM0265RNB
FSDM0365RN
FSQ0365RN 8-DIP -25 to +85°C 1.5A 4.5Ω 17.5W 25W 13W 19W
RSDM0365RNB
Notes:
1. The junction temperature can limit the maximum output power.
2. 230VAC or 100/115VAC with doubler. The maximum power with CCM operation.
3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.
4. Maximum practical continuous power in an open frame design at 50°C ambient.
5. PB-free package per JEDEC J-STD-020B.
FPSTM is a trademark of Fairchild Semiconductor Corporation.
VO
AC
IN
Vstr
Drain
PWM
Sync GND
FB VCC
FSQ0365RN Rev.00
+
OSC
0.7V/0.2V
-
+
+
Vref
0.35/0.55
VCC good -
VCC Vref VBurst -
8V/12V
Idelay IFB
FB 3R PWM
S Q
3
Gate
Soft- LEB
R
Start R Q driver
200ns
AOCP
1
6V TSD S Q VOCP
VSD GND
(1.1V)
2.5μs time R Q
Sync delay
6V
Vovp
VCC good
FSQ0365RN Rev.00
GND D
VCC D
8-DIP
FB D
Sync Vstr
FSQ0365RN Rev.00
Pin Definitions
Pin # Name Description
1 GND Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply input. This pin provides internal
2 VCC
operating current for both start-up and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM
comparator. The collector of an opto-coupler is typically tied to this pin. For
3 FB stable operation, a capacitor should be placed between this pin and GND. If
the voltage of this pin reaches 6V, the overload protection triggers, which shuts
down the FPS.
Sync. This pin is internally connected to the sync-detect comparator for quasi-
4 Sync resonant switching. In normal quasi-resonant operation, the threshold of the
sync comparator is 0.7V/0.2V.
Start-up. This pin is connected directly to the high-voltage DC link. At start-up,
the internal high-voltage current source supplies internal bias and charges the
5 Vstr
external capacitor connected to the VCC pin. Once VCC reaches 12V, the in-
ternal current source is disabled.
6 Drain SenseFET drain. High-voltage power SenseFET drain connection.
7 Drain SenseFET drain. High-voltage power SenseFET drain connection.
8 Drain SenseFET drain. High-voltage power SenseFET drain connection.
Notes:
6. Repetitive rating: Pulse width limited by maximum junction temperature.
7. L=14mH, starting TJ=25°C.
8. Meets JEDEC Standards JESD 22-A114 and 22-A115.
Thermal Impedance(9)
Symbol Parameter Value Unit
8-DIP
θJA(10) Junction-to-Ambient Thermal Resistance 80
θJC(11) Junction-to-Case Thermal Resistance 20 °C/W
θJT(12) Junction-to-Top Thermal Resistance 35
Notes:
9. All items are tested with the standards JESD 51-2 and 51-10 (DIP).
10. Free-standing, with no heat-sink, under natural convection.
11. Infinite cooling condition - refer to the SEMI G30-88.
12. Measured on the PKG top surface.
Notes:
13. Though guaranteed, it is not tested in the mass production.
14. Propagation delay in the control IC.
15. Include gate turn-on time.
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 4. Operating Supply Current (IOP) vs. TA Figure 5. UVLO Start Threshold Voltage (VSTART)
vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 6. UVLO Stop Threshold Voltage (VSTOP) Figure 7. Start-up Charging Current (ICH) vs. TA
vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 8. Initial Switching Frequency (fS) vs. TA Figure 9. Maximum On Time (tON.MAX) vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 10. Blanking Time (tB) vs. TA Figure 11. Feedback Source Current (IFB) vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 12. Shutdown Delay Current (IDELAY) vs. TA Figure 13. Burst-Mode High Threshold Voltage
(Vburh) vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 14. Burst-Mode Low Threshold Voltage Figure 15. Peak Current Limit (ILIM) vs. TA
(Vburl) vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 16. Sync High Threshold Voltage (VSH) vs. TA Figure 17. Sync Low Threshold Voltage (VSL) vs. TA
1.2 1.2
1.0 1.0
Normalized
Normalized
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 18. Shutdown Feedback Voltage (VSD) vs. TA Figure 19. Over-Voltage Protection (VOV) vs. TA
VCC Vref
Idelay IFB
VDC VO VFB SenseFET
3 OSC
FOD817A
D1 D2
CB 3R
Ca + Gate
VFB* R driver
KA431 -
VCC Vstr
2 5 OLP Rsense
VSD
that the 0.9mA current source flows only through the MOSFET Gate
internal resistor (3R + R = 2.8k), the cathode voltage of
diode D2 is about 2.5V. Since D1 is blocked when the
feedback voltage (VFB) exceeds 2.5V, the maximum
ON ON
through the Sense FET is limited, and therefore the FSQ0365RN Rev.00
VOCP
5. Soft-Start: The FPS has an internal soft-start circuit 7. Switching Frequency Limit: To minimize switching
that increases PWM comparator inverting input voltage loss and EMI (Electromagnetic Interference), the
with the SenseFET current slowly after it starts up. The MOSFET turns on when the drain voltage reaches its
typical soft-start time is 15ms, The pulse width to the minimum value in quasi-resonant operation. However,
power switching device is progressively increased to this causes switching frequency to increases at light load
establish the correct working conditions for transformers, conditions. As the load decreases, the peak drain current
inductors, and capacitors. The voltage on the output diminishes and the switching frequency increases. This
capacitors is progressively increased with the intention of results in severe switching losses at light-load condition,
smoothly establishing the required output voltage. This as well as intermittent switching and audible noise.
mode helps prevent transformer saturation and reduces Because of these problems, the quasi-resonant
stress on the secondary diode during startup. converter topology has limitations in a wide range of
applications.
To overcome this problem, FSQ-series employs a
6. Burst Operation: To minimize power dissipation in frequency-limit function, as shown in Figures 27 and 28.
standby mode, the FPS enters burst-mode operation. As Once the SenseFET is turned on, the next turn-on is
the load decreases, the feedback voltage decreases. As prohibited during the blanking time (tB). After the
shown in Figure 26, the device automatically enters
blanking time, the controller finds the valley within the
burst-mode when the feedback voltage drops below
detection time window (tW) and turns on the MOSFET, as
VBURL (350mV). At this point, switching stops and the
shown in Figures 27 and 28 (Cases A, B, and C). If no
output voltages start to drop at a rate dependent on
valley is found during tW, the internal SenseFET is forced
standby current load. This causes the feedback voltage
to rise. Once it passes VBURH (550mV), switching to turn on at the end of tW (Case D). Therefore, our
resumes. The feedback voltage then falls and the devices have a minimum switching frequency of 55kHz
process repeats. Burst-mode operation alternately and a maximum switching frequency of 67kHz, as shown
enables and disables switching of the power SenseFET, in Figure 28.
thereby reducing switching loss in standby mode.
tB=15μs
Burst
mode
ts
IDS IDS
B PO
FSQ0365RN Rev. 00
tB=15μs
Figure 28. Switching Frequency Range
ts
IDS IDS
tB=15μs
ts
IDS IDS
tB=15μs
D
tW=3μs
Features
High efficiency ( >77% at universal input)
Low standby mode power consumption (<1W at 230VAC input and 0.5W load)
Reduce EMI noise through Quasi-Resonant Operation
Enhanced system reliability through various protection functions
Internal soft-start (15ms)
1. Schematic
C209
47pF
T101
L201
EER2828
16V, 0.3A
11
RT101 1 D201 C202
C201
5D-9 UF4003 470μF
470μF
R105 C104 C210 35V 35V
R102 2
100kΩ 56kΩ 10nF 47pF
630V L202
C103 D101
R108 1N 4007 12V, 0.4A
33μF
62Ω 3
400V 10 D202 C203 C204
2 UF4003 470μF 470μF
IC101 35V 35V
FSQ0365RN 12
BD101 5 8
1 3 Vstr Drain
Bridge 7
Drain L203
Diode 4 6
Drain C106 C107
Sync 6 5.1V, 1A
100nF 22μF R103
3 Vcc 2 SMD 50V 5Ω C205 C206
4 FB D203
GND 4 1000μF 1000μF
C102 C105 D102 SB360
1 10V 10V
100nF,275VAC 47nF 1N 4004 R104
50V 12kΩ 5 L204
9
ZD101 3.4V, 1A
1N4746A D204 C207 C208
C110
6.2kΩ 6.2kΩ
1000μF
R106 R107
LF101
40mH
8
C302
3.3nF R201
C101 510Ω
100nF R203
275VAC 6.2kΩ
R202
R204 C209
1kΩ
20kΩ 100nF
IC202
TNR FOD817A
10D471K F101
FUSE IC201 R205
KA431 6kΩ
AC IN FSQ0365RN Rev:00
EER2828
12
1 Np/2
Np/2 11
N16V N16V
Np/2 2 10
N12V N12V
3
9 N Na
3.4V
Na 4 8 N5.1V
6mm 3mm
5 N3.4V
7
Np/2
6 N
5.1V
FSQ0365RN Rev: 00
3. Winding Specification
4. Electrical Characteristics
)
6.40 ±0.20
0.031
0.79
0.252 ±0.008
1.524 ±0.10
0.060 ±0.004
0.018 ±0.004
0.46 ±0.10
(
#1 #8
0.362 ±0.008
MAX
9.20 ±0.20
0.378
9.60
#4 #5
0.100
2.54
5.08 3.30 ±0.30
MAX 0.130 ±0.012
0.200
7.62
0.300 3.40 ±0.20 0.33
0.134 ±0.008 0.013 MIN
+0.10
0.25 –0.05
+0.004
0.010 –0.002
0~15° September 1999, Rev B
8dip_dim.pdf
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In This datasheet contains the design specifications for product
Design development. Specifications may change in any manner without
notice.
Preliminary First Production This datasheet contains preliminary data; supplementary data will
be published at a later date. Fairchild Semiconductor reserves the
right to make changes at any time without notice to improve design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any time
without notice to improve design.
Obsolete Not In Production This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed
for reference information only.
Rev. I20