You are on page 1of 9

EXPERIMENT-2

REPORT

DEAD BAND
CIRCUIT DESIGN

MARCH 4,2021

NITENDRA AGARWAL
18BEE064

1
DEAD BAND CIRCUIT DESIGN

EXPERIMENT-1
AIM: To Design, fabricate, and test dead-band circuit for one leg of an inverter, and
understand its importance.
Apparatus: Simulation performed using Multisim software.
COMPONENTS USED:
1. Square wave generator, voltage source of 1 Volt and 1 kHz rating
2. 5 NAND logic gates with two inputs(IC 4093)
3. 2 digital buffer logic (IC 4050)
4. 2 resistors of 1 Ω each
5. 1 resistor of 0.5 KΩ
6. 1 resistor of 1.38 KΩ
7. 2 capacitors of 0.01 μΩ each
Circuit Schematic:

2
Calculation:

3
Simulation diagram:

4
Results:

5
6
Analysis:
• In a single-phase inverter gate pulse are generated by controllers. That can be either
given by an IGBT or SCR switch. Both these are known for their low- frequency
operation.
 Output pulses of switches S1 and S4 are complementary to each other and so
are those of switches S2 and S3, i.e. S1 turns off and just after that S4 turns on,
or starts conduction.
• But practically, turning off of S1 switch is more due to some extra
computation time, making S1 and S4 both conducting simultaneously.
• This simultaneous operation/conduction of two switches leads to a DEAD
SHORT CIRCUIT.
• DEADBAND is nothing but the time gap given to the circuitry between the
instance at which a device is commuted and another one is switched off.
• Minimum margin of safety is kept to ensure there’s no dead short circuit in
any way.
• We use NAND gates and buffers.
• For high input impedance and better output driving capability we do power
amplification on output side by buffer.
• By varying values of R and C, we can vary the value of dead band as these
both are responsible for the time lapse.
• Values of R and C on both ends are selected such that they give a dead band

7
of 8.7 μs.
• As we were getting different values of dead band at both rising and falling
edge, we calculated R at falling edge such that dead band doesn’t vary.

Conclusion:
8
By performing this experiment, we learnt about dead band circuit, its
importance and we performed a simulation while varying values of R and C
components to get similar dead bands at rising and falling end both.
We had a hands-on experience on simulating software Multisim. We also learnt
about buffer and NAND logic gates IC and their significance in the circuit.
Value or rating of different components can also be easily calculated using
graphical interpretations and mathematical equations of time constant.

*********************************

You might also like