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Islamic University of Gaza

Chapter 5:
BJT AC Analysis Dr. Talal Skaik
Common-Base Configuration
• The input is applied to the
emitter.
• The output is taken from the
collector.
• Low input impedance.
• High output impedance.
• Very high voltage gain.
• No phase shift between input
and output.

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 2 Upper Saddle River, New Jersey 07458 • All rights reserved.
Calculations
Input impedance:
Z i  R E || re

Output impedance:
Zo  R C

Voltage gain:
Vo  I o RC  (I C )RC Current gain:
  I e RC
Assuming R E  re
Vi V i 
Ie   Vo     RC Ie  I i
re  re 
V  RC RC I o   I e   I i
Av  o  
Vi re re Io
A i     1
Ii
Av positive… Vi and Vo in phase.
Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 3 Upper Saddle River, New Jersey 07458 • All rights reserved.
Example 5.8
Determine re, Zi , Zo , Av , Ai

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 4 Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Collector Feedback Configuration

• This is a variation of the common-emitter fixed-bias configuration


• Input is applied to the base
• Output is taken from the collector
• There is a 180 phase shift between input and output

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 5 Upper Saddle River, New Jersey 07458 • All rights reserved.
Calculations
Output impedance:
Zo  R C ||R F

Voltage gain:
Io  Ib  I '
For  I b  I '  I o   I b
V o   I o RC     I b  RC
Vi Vi
Ib  V o    RC
 re  re
Vo RC Defining Zo
Av  
Vi re

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 6 Upper Saddle River, New Jersey 07458 • All rights reserved.
Calculations Input impedance:
Vi V
Zi  , V o   i RC
Ii re
V o V i V o V i RV V 1  RC 
I '    C i  i  1  V i
RF RF RF re R F R F RF  re 
V i  I b  re  (I i  I ')  re  I i  re  I '  re
1  RC 
V i  I i  re  1    rV
e i
RF  re 
  re  RC  
or Vi 1  1     I i  re
 RF  re  
V  re
Zi  i 
Ii  re  RC 
1 1
R F  re 
re
R R  re Zi 
1 C  C  Z i  1 RC
re re  RC 
1
RF  RF
Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 7 Upper Saddle River, New Jersey 07458 • All rights reserved.
Determining the current gain using the voltage gain

Io Vi Vo
Current Gain Ai  , Ii  , Io  
Ii Zi RL
Vo

I RL Vo Z i
Ai L  o   .
Ii Vi V i RL
Zi
Zi
A iL  Av L
RL

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 8 Upper Saddle River, New Jersey 07458 • All rights reserved.
Determining the current gain using the voltage gain
From example 5.2
Zi=1.35 kΩ.
Av=-368.76
Io
Current Gain A i  ,
Ii
Vi Vo
Ii  , Io  
1.35k 6.8k
Vo

I V 1.35k
A i L  o  6.8k   o .
Ii Vi V i 6.8k
1.35k
1.35k
 (368.76)  73.2
6.8k
Z 1.35k
or A iL  Av L i  (368.76)  73.2
RL 6.8k

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 9 Upper Saddle River, New Jersey 07458 • All rights reserved.
Effect of RL and RS

Vo Vo
AvNL  , AvL  , with R L
Vi Vi
Vo
AvS  , with R L and R S
Vs

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 10 Upper Saddle River, New Jersey 07458 • All rights reserved.
Effect of RL and RS

Vi
Vo    I b (R C ||ro ||R L ) =   I b (R C ||R L ) , I b  ,
 re
 Vi  Vo (R C ||R L )
Vo      (R C ||R L )  A vL  
  re  Vi re

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 11 Upper Saddle River, New Jersey 07458 • All rights reserved.
Effect of RL and RS

Input impedance: Zi  R B || re


Output Impedance: Zo  R C ||rO
Z iV s Vi Zi
To find overall gain: V i  , 
Z i  Rs V S Z i  Rs
Vo Vo Vi Zi Zi
AvS   .  AvL  AvS  AvL
VS Vi VS Z i  Rs Z i  Rs
Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 12 Upper Saddle River, New Jersey 07458 • All rights reserved.
Darlington Connection

•The Darlington circuit provides a very high current gain—the


product of the individual current gains: D = 12
•A Darlington transistor connection provides a transistor having a
very large current gain, typically a few thousand.
•Darlington pairs are available as complete packages.
•A Darlington pair is sufficiently sensitive to respond to the small
current.
Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 13 Upper Saddle River, New Jersey 07458 • All rights reserved.
DC Bias of Darlington Circuits
Base current:
VCC  VBE
IB 
R B   DR E

Emitter current:
I E  ( D  1)I B   DI B

Emitter voltage:
VE  I E R E

Base voltage:
VB  VE  VBE
Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 14 Upper Saddle River, New Jersey 07458 • All rights reserved.
Darlington Circuits

When light falls on the LDR,


its resistance reduces.
The bias voltage is supplied to
the transistor and this voltage is
enough to make the transistor
and relay work.
A variable resistor is also
connected on the base of
transistor to adjust the
sensitivity.

Electronic Devices and Circuit Theory, 10/e Dr. Talal Skaik 2014 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky 15 Upper Saddle River, New Jersey 07458 • All rights reserved.

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