CT303 : Digital Communication

Lab1 and Lab2 Report

NAME – Lakshya Singh

Roll No. - 201901248

TOPIC 1: PAM(Pulse Amplitude Modulation)

PART 1: OpAmp as an Adder and Pulse Amplitude

Modulation

Objective : Analyze Adder Circuit

Circuit:
Observation:

- In Adder circuit the magnitude & polarity of the output at any given time
is the algebraic sum of various inputs. If we give two sine wave the output
will be sum of those waves.
- Depending on the relationship between feedback resistor Rf and the
input resistors Ra & Rb the circuit can be used as a summing amplifier.
- Applying KCL at node V2
Ia + Ib = Ic + If
For an ideal OP-AMP Ic=0 & V1=V2=0V.
Therefore
Vo= -(Rf /Ra)Va + (Rf/Rb) Vb

If Ra=Rb=Rf=R then

Vo= -(Va+Vb)

Therefore circuit works as summing amplifier & output voltage is equal to

negative sum of all input voltages.
- Here is the equation is for ideal scenarios in practical life because of R
and other noise factor the output voltage will be less than ideal output

OUTPUT:

- Here is the output of the non-inverting OpAmp.

- but in this practical we are using the inverting OpAmp
that’s why the output wave form will be inverted.

PART 2:Pulse Amplitude Modulation (PAM)

Objective :
Pulse-amplitude modulation is a form of signal
modulation where the message information is encoded in
the amplitude of a series of signal pulses.

Circuit:

Observation:
- In this experiment, due to constraint of function generators, we
will use a single frequency sine wave to test the circuit.
- Also we are using square wave gene rater which will work as
pulse input.
- This circuit is nothing but a Multiplier circuit implemented with
help of BJT
- note that here we are providing DC offset to input sine wave
so that BJT works in active mode.
OUTPUT:

Exercise:

1. Plot the generated PAM output vs. time and the input message
signal vs. time.

Ans: as shown above

2. Check the the generated output for different frequencies of

the carrier signal. Vary the carrier signal from 800 Hz to 4K Hz.
Comment on the results obtained.

Ans:when we increase frequency then distance between to

pulse(Ts) will be decrease . so that we can observe the output is
skewed.

3. Count the number of pulses in one period for carrier frequency

= 1K Hz, 1.5K Hz and 2K Hz.
Ans: here we are using fm=100 Hz -> Tp =10 ms
So the modulating signal has time period of 10 ms
1) fc=1k Hz -> Tc= 1ms = 1 pulse per time period
So total number of pulse count = Tp * Tc
= 10 * 1
= 10 pulses

2) fc=1.5k Hz -> Tc= 1.5ms = 1.5 pulse per time period

So total number of pulse count = Tp * Tc
= 10 * 1.5
= 15 pulses

3) fc=2k Hz -> Tc= 2ms = 2 pulse per time period

So total number of pulse count = Tp * Tc
= 10 * 2
= 20 pulses

TOPIC 2: PWM(Pulse Width Modulation) and

PPM(Pulse Position Modulation)

Objective : to study PWM and PPM

- Pulse-width modulation (PWM) of a signal involves the

modulation of its duty cycle, to convey information over a
communications channel. PWM uses a square wave whose duty
cycle is modulated resulting in the variation of the average value
of the waveform.
- FOR that we are using 555 timer circuit to generate PWM wave.
The timer output waveform may be changed by modulating the
control voltage applied to the timer's pin 5 by changing the
reference of the timer's internal comparators. When the
continuous trigger pulse train is applied in the mono stable mode,
the timer output width is modulated according to the signal
applied to the control terminal.
- In PPM The amplitude and width of the pulse is kept constant in
the system. The position of each pulse, in
relation to the position of a recurrent reference pulse, is varied
by each instantaneous sampled value of the modulating wave.

Timer 555 Circuit:

- Initially, when the 555 Timer IC is reset, its output is LOW. This
will turn ON the internal transistor, which will provide a discharge
path for the Capacitor through R1(st discharging side).

- As the capacitor voltage drops below 1/3 VCC, the output

becomes HIGH and transistor is turned OFF. This will make the
capacitor to charge through R1 . As the capacitor voltage rises
above 2/3 VCC, the output becomes LOW and the cycle continues.
- Since the duration of output being HIGH or LOW is dependent
on the charging and discharging times of the capacitor, we can
control the duty cycle and the frequency of the output pulse.

We can derived all the timing and frequency related values as

following:

TON = 0.693 * (R1 + R2) * C

TOFF = 0.693 * R2 x C

Period T = TON + TOFF = 0.693 * (R1 +2*R2) * C

Frequency F = 1/T = 1.44 / ( (R1 + 2R2) * C) Hz

- If we know the frequency then we can choose the values of

rR1,R2 AND C According to this formulas.

PROCEDURE:

1) Connect the Circuit as Shown in the figure and initially don’t

apply any modulating signal
2) Apply Square Wave of 8Vp-p and frequency of 2 KHz as
Triggering input. Note the values of
capacitor charging period at PIN 6 and voltage at PIN 5 for both
555 timers.
3) For first 555 timer time period should satisfy the criteria
T=1.1RC as 555 operating in mono
stable mode.
4) Now Apply D.C off set of 8V from function Generator as
modulating signal at PIN 5 and
observe PWM, PPM waves. Now vary the D.C offset; observe the
results and plot diagrams.
5) Now Apply sine wave of voltage 2Vp-p and frequency of 500Hz
along with D.C offset of 8V
from Function Generator.
6) Adjust the Amplitudes and frequencies of Modulating Signal
and Triggering Signal until you
obtain clear PWM and PPM waves.

Circuit : PWM GENERATION