IMPORTANT GUIDELINES

Dear students ,your CA will be scheduled in the form of assignment in which you have to solve
the questions on paper.(paper should have your registration number ,name and roll no) on it. There
will be 3 questions in your assignment each question will carry 10 marks. You need to submit the
assignment on ums. Within the provided timelines. Copying the work of others is strictly
prohibited if anyone found doing it he/she will be awarded zero marks in the assignment.
Submit your files in PDF format on the online link provided. Also all the diagrams should be well
explanatory and should be complete in all aspects. Otherwise, marks will be deducted.

First 25 Roll NumbersSET 1

Second 25 Roll NumbersSET2
Next 25 Roll Numbers SET 3

Set 1
1. Enable bit plays an important role in decoder expansions. How is this justified in
designing 6X64 line decoder using 4x16 decoders. 10 MARKS
2. Bidirectional shift register can be used to perform multiple operations. Design a 4-bit
bidirectional shift register which performs shift up operation when all the selection input
lines are having input zero. 10 MARKS
3. Construct a bus system using tri state buffer for 2 registers having 8 bits each. Draw a
neat and clean diagram to explain the process.
10 MARKS

Set 2
1. Enable bit plays an important role in decoder expansions. How is this justified in
designing 6X64 line decoder using 3X8 decoders. 10 marks
2. Bidirectional shift register can be used to perform multiple operations. Design a 4-bit
bidirectional shift register which performs shift up operation when all the selection
input lines are having input one. 10 marks
3. Construct a bus system using tri state buffer for 4 registers having 2 bits each. 10
marks

Set 3
1. Enable bit plays an important role in decoder expansions. How is this justified in
designing 5X32 line decoder using 2x4 decoders. 10 marks
2. Bidirectional shift register can be used to perform multiple operations. Design a 4-bit
bidirectional shift register which gives previous output when all selection lines are having
input 1 and performs parallel load when all selection lines are having input 0.
 10 marks
3. Construct a bus system using tri state buffer for 2 registers having 4 bits each.
10 marks