what is dma? function? wat if no dma?

Direct memory access. It is a feature which allows some subsytems in computers to

access memory directly for read/write operations independent of CPU especially used in
multiprocessor system on chips where each processing element has a local memory and DMA is
used for data transfers between this local memory and main memory.
If DMA is not used then the load on CPU is more. it is mostly busy doing read and writes
to subsystems and thus unable to do other work. while using DMA, CPU would initiate the
transfer process and does other work meanwhile DMA transfer is in progress. Once the transfer
is done the DMA would send an interrupt to CPU indicating the end of transfer.

power on sequence
When we power on the PC the power supply unit take some time to generate sufficient
power. The processor will be in reset state initially and it exits from reset state when it receives
the power good signal from the power supply unit. Then the processor is pre-programmed to
look at FFFF0h location where a jump instruction to the address where BIOS program is stored.
It executes BIOS- initializing hardware components like video card, memory, keyboard and
mouse. It checks for them and gives a beep if it finds an error. The information is displayed on
the screen as well. If there is no error then it looks for the operating system. If it finds it, it loads
it and runs it.
interrupts and polling
Polling is continuously sampling the status register of a device to know if a transaction is
done or not. During this time the processor does nothing but checking the status which is a pure
waste of time. This is where interrupts come into picture. When interrupts are used processor no
longer spends time to determine if the transaction is done or not. The device sends an interrupt
signal to ask the processor for attention. Until the interrupt is enabled the processor can do other
tasks.
 1) What is pipelining?
It is an implementation technique in which multiple instructions are overlapped in
execution. The throughput of an instruction pipeline is the measure of how often an instruction
exists the pipeline. Pipeline does not reduce the latency. It improves instruction throughput.
2) What are the five stages in a DLX pipeline?
Fetch, read registers while decoding, execute the operation, access an operand in
memory, writeback the result into a register

3) For a pipeline with 'n' stages, what is the ideal throughput? What prevents us from
achieving this ideal throughput?
The throughput must be n instructions as each stage is not perfectly balanced and the
overhead.

4) What are the different hazards? How do you avoid them?

Structural- hardware cannot support the combination of instructions that we want to
execute in the same clock cycle, data-when the pipeline must be stalled because one step must
wait for another to complete, and control hazards-arising from the need to make a decision based
on the results of one instruction while others are executing.

5) Instead of just 5-8 pipe stages why not have, say, a pipeline with 50 pipe stages?
penalty
6) What are Branch Prediction and Branch Target Buffers?

7) How do you handle precise exceptions or interrupts?

8) What is a cache?
Small amount of high cost, fast access SRAM. Main memory is DRAM, slow and cheap.
9) What's the difference between Write-Through and Write-Back Caches? Explain
advantages and disadvantages of each.
In write-through, the memory is updated when only other device wants to read the
location and in write back the memory is updated as soon as the new value is written to cache.
 10) Cache Size is 64KB, Block size is 32B and the cache is Two-Way Set Associative.
For a 32-bit physical address, give the division between Block Offset, Index and Tag.
No of sets = 64KB/32B*2 = 1K sets requires 10bits to identify the block i.e index is
10bits, tag is 5bits
No of blocks = 64KB/32=2K blocks- 11bits
No of pages = main mem/ cache size =64K pages=> 16bits tag
Tag bits = 32-11-5=16bits
11) What is Virtual Memory?
Idea of separating the address space (virtual memory) and memory address(physical
address ). Page table for mapping. Page size is always in powers of 2 so that each piece of main
memory is capable of holding exactly one page. The pieces of main memory into which the
pages go are called page frames. When a reference is made to an address on a page not present
in main memory, it is called a page fault.
12) What is Cache Coherency?
A read must return the latest value written to the location regardless of which process
wrote it.
13) What is MESI?
Modified Exclusive Shared Invalid- cache coherence protocol
14) What is a Snooping cache?
Snooping is the process where the individual caches monitor address lines for accesses to
memory locations that they have cached. When a write operation is observed to a location that a cache
has a copy of, the cache controller invalidates its own copy of the snooped memory location.

15) What are the components in a Microprocessor?

An input/output (I/O) unit, a control unit, and one or more arithmetic logic units (ALUs)

16) What is ACBF(Hex) divided by 16?

17) Convert 65(Hex) to Binary
18) Convert a number to its two's compliment and back
Write it in binary form. Negate the number and add one to it which gives you the 2’s
compliment. Repeat the same on 2’s compliment for getting the original number.
19) The CPU is busy but you want to stop and do some other task. How do you do it?
Arise a non maskable interrupt and give jump instruction to the subroutine.
 hash tables
it is a mapping table that maps the identified keys to the values associated with
that keys.
global,local and static variables
global variable- persists for the life time of the program. It can be accessed from
anywhere in the compilation unit. Local variable is a variable which has scope limited to its
compilation unit or program or function depending on its declaration. Static variable static in
nature, references to this from various function or multiple programs or threads containing static
variable refers to the same variable.
pass by reference and pass by value
in functions, when we pass the value the changes to these in function does not reflect in
main function unlike when we pass by reference, any modifications on these will reflect in main
function.
advantages and disadv of linked list and array
linked list-easy to remove and insert nodes
arryas- results in fragmentation
pointers
control statements (if-else,for,while,do-while)

no of flipflops-no of states
setp and hold time
fsm-mealy and moore

perl
 Pipeline
CPU architecture
Virtual memory
Cache coherence protocols
Cache write policies
FSM
PCI
PCIX
Arrandale
Sandybridge
Generations of CPU-how they are different and what is the change in the architecture
between each other.