r etho

B.Kaku
I. Miyashita
SSone

Indexing terms: Switching loss, IGBT 3-level inverter, P WM strategy

Vinvq = @axis component of inverter output

Abstract: In the inverter-fed motor drive system, voltage vector
inverter output-current distortion is reduced by SI, ..., S6 = divided sectors of inverter output voltage
enhancing the switching frequency and the motor vector space
torque ripples; magnetic noise is also reduced as a
consequence. However, the system efficiency is A l , ..., A 4 = divided areas of each sector
also reduced due to the switching loss; this, in = input power from DC link
turn, sets a limit on any further enhancement of = device switching loss
the switching frequency. This is particularly the = device conduction loss
case for the IGBT three-level inverter, since it is
used in high switching frequency applications: the = snubber loss
number of switching devices is twice that of the = switching device turn-on time
two-level inverter, thus the switching loss problem = switching device turn-off time
is more serious. The authors describe a new
PWM strategy for the three-level inverter with an = inverter output period
ability to reduce switching loss. In comparison = vector output interval of V,
with conventional sinusoidal PWM methods = vector output interval of Vsl
generating almost the same distorted load
current, every phase of the inverter can have its = vector output interval of Vs2
switching stopped for 120" in one period by this = vector output interval of V,
new method. According to the load power factor = vector output interval of V,,
angle p, if /3 5 30" the 'no switching duration' can
= vector output interval of VL2
be set just in the centre of the peak value region
of the load current, hence the switching loss can = PWM control period
be greatly reduced. The reduction of switching = inverter system efficiency improved factor
loss is not dependent on /3. = half of DC link voltage
= snubber condenser
= stray inductance of inverter main circuit
List of symbols = load power factor angle
V,, = motor phase voltage (U, V, W) = inverter modulation index
V,, = inverter phase voltage (U, V, W) = rotating angle of command voltage vec-
i, = load current (U, V, W)
tor V
V = motor voltage vector = position where the phase-U no switching
pattern should be started from
I = motor current vector
= inverter system efficiency of being con-
V = motor voltage amplitude trolled by proposed method (ql) and
I = motor current amplitude conventional method (q2)
V,,, = inverter output voltage vector
1 Introduction
= D-axis component of inverter output voltage
vector It is well known that multiple-configured inverter cir-
0 IEE, 1997 cuits can be applied to reduce the harmonic distortion
ZEE Proceedings online no. 19970989 of the inverter output. Also, recent advances in power
Paper first received 4th July 1996 and in revised form 30th October 1996 semiconductor technology associated with the develop-
B. Kaku and I. Miyashta are with the Technical Research Laboratory, ment of fast switching devices, such as the IGBT,
Toyo Electric Manufacturing Co. Ltd., 338-1 Kam-soyagi, Yamato-shi, favour the use of high switching modulation techniques
Kanagawa Pref. 242, Japan in power converters, so that the harmonic distortion
S. Sone is with the Electrical Engineering Department, University of can be reduced further. For these reasons, the three-
Tokyo, Hongo 7-3-1, Bunkyo-ku, Tokyo 113, Japan level inverter, configured with IGBT devices, has been
182 IEE Proc.-Electr. Power Appl., Vol. 144, No. 3, May 1997
popularly studied [l-41, and it seems to be particularly
suited for high voltage and high power applications.
Otherwise, certain optimal PWM techniques have been
developed, such as the minimisation of RMS values of
the harmonic current, or the elimination of lower order
voltage harmonics. However, these techniques are
rarely used today; a good quality inverter output is
now achieved by the high-modulation frequency of the
inverter (5-20 kHz). Unfortunately, the problem of
power loss, such as the switching loss, becomes more
serious as the switching frequency is increased. This
means that the system efficiency is reduced significantly
because of switching loss, and this, in turn, limits any
further enhancement on the switching frequency. This
is particulary true for the IGBT three-level inverter,
since it is used in high switching frequency applica-
tions. Also, since there are twelve switching devices (i.e.
twice as many as for the two-level inverter), the switch-
ing loss problem is consequently more serious.
To solve this problem, some new types of inverter
and switching techniques, such as ZCS or ZVS, have
been introduced [5]. However, these methods cannot be
directly applied to the ready-made system. A kind of
PWM technique, the so-called discontinuous modula-
tion, is introduced to reduce the switching loss [6]. By
this method, the reduction of switching loss is depend-
ent on the load power factor angle /3; it is not suitable
for the three-level inverter. It is well known that the
three-level inverter supplies 33 (= 27) output voltage
space vectors. Thus, control of the three-level inverter
is more complex, also the degree of freedom to gener-
ate the command vector V is increased. Making use of
the increased degree of freedom, a kind of new space
vector PWM method for the three-level inverter, with
an ability to reduce the switching loss at least by 33%,
is presented here. Using this method, the load power
factor angle, /3, is estimated instantaneously and then,
according to this estimate, the 'no switching' duration
included in the low switching loss PWM patterns is
determined. For p I 30°, the no switching duration can
be set in the centre of the peak value region of the load
current, and the reduction of switching loss is not
dependent on /3. This is also the principal difference
when compared with other methods.
t v,
power
Loss
' psat '
tL
Y
Fig .I Transistor switching action waveform in one switching cycle
2 Switching loss and system efficiency
First, the concept of switching loss should be clarified.
In switching applications, power losses in the converter
will comprise: (i) switching loss, (ii) snubber loss, (iii)
conduction loss and (iv) off-state loss [7]. In low-
switching frequency applications, where the total
switching times are much less than the period,
switching loss is generally negligible. Also, if the
ambient temperature extreme is limited, the off-state
IEE Proc-Electr. Power Appl,, Vol. 144, No. 3, May 1997
loss is generally insignificant. However, in high-
switching frequency applications, as the switching
frequency is increased, the switching loss becomes the
dominant part of the inverter total power loss. This
may be determined approximately as a function of
switching time, the instantaneous value of the current
and voltage at the switching time. Fig. 1 shows an
example of transistor switching action waveform in one
switching cycle, and the switching loss, P,,, in the
device can be expressed approximately as
P
SUJ = (1)
T
where T is the inverter output period of the fundamen-
tal component, Tonis the turn-on time and Toffis the
turn-off time. n is the total number of the switching
cycles in one period T, j is the jth switching, and vj, $
are the instantaneous values of voltage and current at
jth switching as shown in Fig. 1. From eqn. 1, it is very
easy to see that switching loss can be reduced by reduc-
ing the switching frequency or by reducing the instan-
taneous value of current or voltage at the switching
time. Here, for the purpose of reducing the switching
loss, a new kind of PWM pattern will be proposed
which can be characterised as follows:
(i) Stop switching for some duration within one period
T.
(ii) Set the 'no switching' duration in the centre of the
peak value region of current. Points (i) and (ii) consti-
tute the principle of the new method.
For later comparison, and also because the switching
loss is not easily measured accurately, the system effi-
ciency improved factor (EIF), defined in eqn. 2, is
introduced to appraise the system efficiency according
to the proposed method:
ql refers to the inverter system efficiency when control-
led with respect to the proposed PWM method; q2
refers to that when controlled with respect to the
former conventional PWM method. The inverter sys-
tem efficiency, q, is defined here as follows:
q = - Pout
D
1 zn
Pout = pzn - p s w - Psnb - Psat (3)
where Pin refers to the input power of the inverter from
the DC link, Po,, is the inverter output total power, P,T,
the switching loss, P,,,, the conduction loss, and P s n b the
snubber loss. The circuital loss and the device leakage
loss are neglected. Since, in the high switching fre-
quency applications, the switching loss becomes the
dominant part of the total power losses in the inverter
system, so the EIF will be used to evaluate the reduc-
tion of switching loss by the proposed method, even
though other kinds of power loss, such as snubber loss
or conduction loss, are also reduced meanwhile.
3 New PWM strategy based on voltage space
vector
3. I Definition of voltage and current vectors
Now it will be shown that a certain PWM switching
pattern with the characteristics listed above exists
exactly. A typical three-level inverter motor system
183
appears in Fig. 2. Motor phase voltages (fundamental current vector I are also illustrated in the Figure. Fig. 4
components) are indicated as V,,, V,, and Vw,.The shows the definition of vectors and vector output
inverter output voltages, the voltages between the intervals in sector S1.
inverter output point and input DC link neutral point
0, are indicated as Vue, V,, and VwO.Available values
for these are 1 (= E), -1 (= -E) and 0 (= 0). The rela-
tionship between motor phase voltage and inverter out-
put voltage is described in eqn. 4:
A s2

IQ /
E
vu, = -(2V,o
3
- VVO - VWO)
E
vn = -(2Vvo
3
- vu0 - VWO)
E
vu, = -(2Vwo
3
- vu0 - KO) (4)
'L

Fig.3
s5
Voltage space vector for three-level inverter
\
V,,, = inverter voltage space vector
V = motor voltage vector
I = current vector

1-E I sector SI VL2(TL2)

Fig.2 Three-level inverter basic circuit

Motor phase voltages and load currents can be

expressed in eqn. 5:

(5) 111
000
where /3 is the load power factor angle, j = 0, 1, 2 cor- -1 -1 -1 1-1 -1
responds to phases U, V, W, respectively. The motor Vo(To1 100 VLI (TL1)
voltage vector, V, and current vector, I, are defined in 0-1-1 Vsl(Tsl)
eqns. 6 and 7: Fig.4 Voltage space vector for three-level inverter Vectors and vector
output intervals' definition in sector SI

Substituting eqn. 5 into eqns. 6 and 7, respectively,

provides the following expressions:
v = vpt
I = lej("t-P) (9)
and substituting eqn. 4 into eqn. 6 allows the inverter
output voltage vector V,, to be derived:
V i n w Vinvd +jVinwy
(10)
On substituting the possible values of Vu,,, V,, and
V,, into eqn. 10, the inverter output voltage vector Vi,,
can be drawn in the well known hexagon form
illustrated in Fig. 3. The whole vector space can be
divided into six sectors (indicated as S1, 5'2, ..., S6) and
the corresponding motor phase voltage vector V and
184
(8)
Fig.5 Relationship among vector space sectors, p h a s e 4 voltage and
current
From the assumption of the motor phase voltage and
the load current (eqn. 5), and also from the definition
of the vectors V and I, the corresponding relationship
among vector space sectors (from S1 to S6), phase-U
voltage waveform and current waveform is illustrated
in Fig. 5 .
3.2 Switching loss reduced switching pattern
In the following discussion it is assumed that the com-
mand vector V is located in sector S1. Sector S1 can
also be divided into four areas, indicated as A l , A2, A3
IEE Proc-Electr. Power Appl., Vol. 144, No. 3, May 1997
and A4 in Fig. 4. In each of these areas, there are two be described as shown in Fig. 6. It can be seen that the
switching patterns (listed below) that can be used to possible no switching duration for each phase is 120" in
generate the command vector V, respectively, and meet the positive half-period and a further 120" in the nega-
the needs of the switching loss reduced principle men- tive half-period. According to the principle described
tioned above. for reducing the switching loss, it is better to set the no
Case 1: Command vector V is located in area A 1. switching duration in the centre of the positive and
Vector output sequence I: negative peak value region of load current. Considering
the symmetry of three phases, the no switching dura-
To (Vo) Ts2 (V.2) T s l (Vs11 tion must be 60" (360" / 6) for positive and negative
(111) e* (110) c* (100) peak value region of load current, respectively. Hence,
In this output sequence, phase-U arm of the inverter is the actual no switching durations are the black block
fixed as VuO= +1, means the phase-U arm of inverter is parts illustrated in Fig. 6.
not switched.
Vector output sequence 11:
To (Vo) Tsl W s l ) Ts2 (Vs21 lei possible no switching duration

(-1-1-1) 4-* (0-1-1) e* (00-1)

actual no switching duration
In this output sequence, phase-W arm of the inverter is
fixed as VwO = -1, means the phase-W arm of inverter
is not switched.
Case 2: Command vector V is located in area A2.
Vector output sequence I:
Ts2 (Vs21 ?I (Vsd T m ( V m )
(110) e* (100) e* (10-1)
In this output sequence, phase-U arm of the inverter is
fixed as Vu, = +1, means the phase-U arm of inverter is -c-
not switched. ut
Vector output sequence 11:
Tsl Wd Ts2 (Vs21 Tm ( V m )
(0-1-1) c* (00-1) c* (10-1)
In this output sequence, phase-W arm of the inverter is
fixed as Vwo= -1, means the phase-W arm of inverter
is not switched.
Case 3: Command vector V is located in area A3. Fig.6
- TC
Distribution ojno switching duration
Vector output sequence I:
Tsl(VsJ T m ( V m ) TLl (VLJ
(100) e* (10-1) e* (1-1-1)
I
I I , I _ I I
In this output sequence, phase-U arm of the inverter is
fixed as Vu, = + 1, means the phase-U arm of inverter is
I I 1-1
not switched. I 1
Vector output sequence 11: I

Tsl V.1) TL1 (VI,,) T m ( V m )

(0-1-1) C L ( l - l - l ) e * (10-1)
In this output sequence, phase-W arm of the inverter is
fixed as Vwo = -1, means the phase-W arm of inverter
is not switched.
Case 4: Command vector V is located in area A4. -goo 56 SI goo
Vector output sequence I: O0
Ts2 ( Vs2) TL2 ( V L 2 ) Tm ( V m ) Fig. 7 No switching durution, /3 s 30"
(110) e* (11-1) e* (10-1)
In this output sequence, phase-U arm of the inverter is As listed above, in each of the command vector V
fixed as Vu, = +1, means the phase-U arm of inverter is located areas there are two switching patterns that can
not switched. be used to generate the command vector V, and in
which one of the three arms of inverter is not switched,
Vector output sequence 11:
so the next problem is how to decide which kind of
Ts2 ( V2) T m (Vm) TL2 ( V L 2 ) switching patterns (vector output sequence I or vector
(00-1) c* (10-1) *e (11-1) output sequence 11) should be selected. From Fig. 6,
In this output sequence, phase-W arm of the inverter is within the 120" range from sector S6 to sector S1, it is
fixed as V, = -1, means the phase-W arm of inverter very near to the peak value region of the phase-U load
is not switched. current iu7 hence the phase-U no switching pattern,
Analysed in the same way, considering the whole namely, the pattern such as the vector output sequence
vector space, the possible no switching durations can I, is preferably selected from within this range. The
IEE Proc -Electr. Power Appl., Vol. 144, No. 3, May 1997 185
ideal case (Fig. 7) is to set the 60" no switching dura-
tion just in the centre of the peak value region of the
load current. From the definition of the vector V, it
can be shown that the rotating angle I9 of command
vector V (Fig. 4) is the same to the phase angle of
phase-U voltage. In Fig. 7, /3 is the load power factor
angle, and $I is the position from where the phase-U no
switching pattern should be started. This means that if
the rotating angle I9 of command vector V is equal to 4
(8 = $), the switching pattern should be changed to the
phase-U no switching pattern. It should be understood
that if /3 s 30", the 60" no switching duration of phase-
U can always be set in the centre of the peak value
region of the load current. In this case, since it is in the
current peak value region, the switching device is not
switched, hence the switching loss can be minimised,
and $I can be obtained from the following relation:
4 = 330" + ,8 (11)
However, if /3 > 30", since the no switching duration
cannot be set in the centre of the peak value region of
the load current, there is a certain influence on the
effect of reducing the switching loss, and in this case,
the phase-U no switching pattern should be started
from I9 = 4 = 0". For example, Fig. 8 shows the case
for /3 > 30" where the 60" no switching duration has
drifted to the left of the centre of the load current peak
value region. In comparison with the case in Fig. 7, the
effect of reducing the switching loss will be less than
that of setting the 60" no switching duration just in the
centre of the load current peak value region.
I I I TO = T, - T,, - 7 2
I I $=O I
I I I
-90" I 56 I SI I 90'
O0
Fig.8 No switching duration, /3 > 30"
It can be seen that, by using this new approach,
every phase of inverter can stop switching for 60",
respectively, when the corresponding phase load cur-
rent moves into the positive peak value region, and
stop switching for another 60" when the current moves
into the negative peak value region. During the 360"
period, the no switching duration will be 120". If /3 2
30", the no switching duration can be set just in the
centre of the load current peak value region, thus the
switching loss will be minimised. If > 30", the effect
of reducing the switching loss will be somewhat
decreased.
3.3 Estimation of the load power factor angle
B are arranged in Table 1. The inverter modulation index
As discussed above, it is necessary to estimate the load
power factor angle, 8, for the determination of output
vector patterns. /3 can be estimated instantaneously by
the measured current message and inverter output volt-
186
age pulse waveform. Fig. 9 shows the basic idea of the
estimation.
Fig.9 Estimation of loadpower factor angle p
For the purpose of controlling the motor, the load
current must be measured. From the measured data,
the time, t2, that the current (e.g. the fundamental com-
ponent of current ),i takes to become zero can be deter-
mined. Since the output voltage pulse of the voltage-
type inverter is controlled by software, the line-line
voltage pulse waveform can be formed by software,
and the time, ta, that corresponds to the down edge of
last positive puke and the time, tb, that corresponds to
the up edge of the first negative pulse can be calcu-
lated. Thus tl = ( t , + tb)/2 may be considered as the
time for the fundamental component of line-line volt-
age to become zero. From tl and t2, the load power
factor angle /3 can be estimated:
p = wt x (ta - t l ) - -
7r
6
Table 1: Vector output intervals' calculation
AI T,,= a x 2 x T, x sin (60" - 0)
T , , = a x 2 x T,xsin0
A2 T,, = T, - a x 2 x T, x sin 8
Ts2= T, - a x 2 x T,x sin (60" - 0)
T, = a x 2 x T, x sin (60" + 0) - T,
A3 T,, = 2 T, - a x 2 x T,x sin (60" + 0)
TL1= a x 2 x T, x sin (60" - 0) - T,
T m = a x 2 x TcxsinO
A4 Ts2= 2Tc- a x 2 x T, x sin (60" + 8)
TL2= a x 2 x T, x sin0 - T,
T
'
= a x 2 x T,x sin0 (60" - 8)
3.4 Calculation of vector output intervals
After the determination of switching PWM patterns,
the concrete vector output intervals can be calculated
as follows. Assuming that the command vector V is
located in sector S1 shown in Fig. 4, the vector output
intervals can be calculated according to the following
vector equation:
+
TlVi T2Va T3V3 = T,V +
T1+T2+T3=Tc (13)
where VI, V2, V3 are the vectors that surround the
command vector V, and TI, T2, T3 are the correspond-
ing vector output intervals. T, is the PWM control
period. For example, if the command vector V is
located in area Al, the surrounded three voltage vec-
tors are VI = Vo, V2 = Vsl, V3 = Vs2, and the corre-
sponding vector output intervals are TI = To, T2 = Tsl,
T, = Ts2. Based on eqn. 13, the corresponding results
a employed in the Table is defined as
V
a=- (14)
v?n
IEE Proc.-Electr. Power Appl,, Vol. 144, No. 3, May 1997
where V is the voltage command vector, and V, is volt-
age space vector defined in Fig. 4. The modulation
index lies in the range a = 0 1. - load power factor. The general R-L load is adopted, in
4 Analytical comparison
To evaluate the switching loss reduced performance of
the inverter controlled by this method, and to compare
this technique with other PWM methods, a compara-
tive calculation is performed employing the concept of
EIF (defined in eqn. 2) and PSw (calculated from
eqn. 1). Now Pin is calculated using the following
expression:
$ Jd
T of inverter
Pin= 2Ei~dt (15)
where T refers to the period of inverter output, 2E =
200 (V) is the DC link voltage, and iL is the DC link
current (shown in Fig. 2). The switching device used in
the experimental system is an IGBT (MG150J2YS2)
[lo]. The turn-on time, Tonis 0 . 8 ~ the
; turn-off time,
Toflis 1 . 0 ~ ;the saturated voltage, V,,, = 2.5V. The
properties of all the devices are assumed the same, so
Pfat can be calculated approximately according to the
expressions:
where n is the total number of the switching cycles of
device in one period T, is the vector output interval
in thejth switching. The RCD snubber is adopted and
its power loss Psnb can be calculated from the following
expression [l 11:
where C, = 1pF is the snubber capacitance, iJ is the
instantaneous value of current at the switching time,
and L is the stray inductance of the main circuit with a
measured value of L = 1.3 x 10-6mH. Based on the
above mentioned equations, the calculation of EIF is
performed and the results are shown in Fig. 24. It can
be seen that, as the switching frequency is increased,
the differences in EIF between the proposed method
and conventional sinusoidal PWM method is quite
marked. Thus, the reduction of switching loss is partic-
ularly significant for the high switching frequency
region according to the new method. As shown in Fig.
24, the inverter system efficiency can be improved by
about 5% for a switching frequency of 20kHz using the
proposed method.
Other results are illustrated in Fig. 25. This shows
the relationship between the EIF and load power factor
angle p under the condition of the same modulation
index a = 0.8. As already analysed, there is no influ-
ence on the reduction of switching loss as j3 is changed
from 0" to 30", hence the curve is a horizontal line and
in this case the switching loss is at a minimum. How-
ever if p is larger than 30", the reduction of switching
loss will be decreased somewhat as the /3 is increased.
5 Simulation and experimental results
To verify the effectiveness of the proposed method, an
experimental system was built. This is schematically
shown in Fig. 10. For this system it is required that the
IEE ProcElectr. Power Appl.. Vol. 144, No. 3, May 1997
load power factor can be changed easily, since the
power loss of the inverter is measured at a different
which L = 3mH, R is adjustable and hence the load
power factor angle, p, can be changed easily. A DSP
(TMS320C15) is used to realise the PWM algorithm
explained above, and a DSK (TMS320C50) is only
used as a generator to provide the maximum 20kHz
PWM waveform. The necessary data can be transmit-
ted from DSP to DSK by DPRAM (MB8441). To
measure the inverter system efficiency, a model 2533E
power meter is used, and the measurement is executed
between the DC link input and AC three-phase output
4
I I
rectitier
diode 3-level
inverter
j
I
4-
motor control
console
Fig. 10 Experimental system
The simulation conditions are identical to the experi-
mental system and the results are given in Figs. 11-13
and Figs. 14-16 to show the main characteristics of the
proposed method. For comparative purposes, two
approaches are executed: Figs. 11-13 are based on the
proposed method and Figs. 14-16 are based on the
conventional sinusoidal PWM method in which there is
no reduction of switching loss control. Within these
comparative sets of Figures, Figs. 11 and 14 show the
results in the case that modulation index a < 0.5, p =
30", Figs. 12 and 15 show the results for a > 0.8, j3 =
30", and Figs. 13 and 16, likewise, for a = 0.8, /3 = 45".
From these results, it can be shown that the proposed
method can be applied for both low and high modula-
tion index. From these Figures, it is very difficult to
point out the differences between the current wave-
forms of the two methods, because the switching fre-
quency is sufficiently high, and the waveforms of line-
line voltage are almost the same, even though the
waveforms of phase voltage are very different. In Figs.
11 and 12, since B s 30" the no switching duration is
located in the centre of the peak value region of cur-
rent. In Fig. 13, since p > 30" the no switching dura-
tion drifts to the left of the centre of the current peak
value region. When compared with the conventional
sinusoidal PWM methods, illustrated in Figs. 1416, it
is anticipated that the proposed method is very effec-
tive in reducing the switching loss, even though the
load power factor angle j3 has a certain influence on the
reduction of switching loss if B > 30".
187
 1.LO 1.L 2 1 LO ?.L2 1.42
Fig. 11 Simulation results ofproposed method Fig. 14 Simulation results of conventional method
a = 0.4, p = 30" a = 0 4, /3 = 30"

1 LO 1.L2 1.LL t, s
Fig. 12 Simulation results of proposed method Fig. 15 Simulation results of conventional method
a = 0.8, p = 30" a = 0.8, p = 30"

1.LO lL2 7.LL l.&O 1.42 1.L L t, 5

Fig. 13 Simulation results of proposed method Fig. 16 Simulation results of conventional method
a = 0.8, /3 = 45' cy = 0.8, /3 = 45"

Figs. 17-19 and Figs. 20-22 show the experimental
results. It can be seen that the experimental results are
nearly coincident with the simulation results, thus the
correctness of the proposed method is confirmed. In
addition, from both simulation and experimental
results, it can be seen that the phase voltage waveforms
generated by the proposed PWM method are half-wave
symmetrical and the line-line voltage are full-wave
symmetrical. Therefore, there is no extra even
harmonic components in the voltage and current, and
no influence on the properties of motor driving. As an
example, Fig. 23 shows the frequency spectrum of the
188
motor load line-line voltage and the current, measured
at a rated state, with a switching frequency f, = 5 kHz
and inverter modulation index a = 0.8.
As already explained, since it is difficult to measure
the switching loss directly, the efficiency of the inverter
system is measured and by comparing the improved
efficiency effect, the effectiveness of the proposed
method can be evaluated: Fig. 24 shows the measured
and calculated EIF and Fig. 25 shows the influence of
load power factor angle /3 on EIF. Both results show
that by applying the proposed method, since the
switching loss is reduced, the inverter system efficiency
can be improved.
IEE Proc-Electr. Power Appl., Vol. 144, No. 3, May 1997
 "U,
150 Vldiv
vu v
150Vldiv

vu0 vu0
150 Vldiv 150 Vldiv

iu 'U
60 A ldiv 60 Aldiv

Fig. 17 Experimental results of proposed method Fig.2 1 Experimental results of conventional method
a = (1.4, p = 30" a = 0.8 , p = 30"

vuv
150 Vldiv \'Uv
150 Vldiv

vu 0 vu0
150 V/div 150 Vldiv

Iu 'U
60 Aldiv 60 Aldiv

Fig. 18 Experimental results of proposed method Fig.22 Experimental results of conventional method
a = 0.8, p = 30" a = 0.8, p = 45"

vLV
150 V d*v

\'U0
150 Vldiv

'U
60 Aldiv

Fig. 19 Experimental results of proposed method

a = (1.8. L3 = 45"
Fi .23 Fre uency spectrum of motor current (upper) and line-line
vo!age (lowery
Rated state: f,= 5kHz, a = 0.8

6 Conclusions
vu " High switching techniques can produce very a good
150 Vldiv
output performance for the inverter, although the
inverter internal switching loss problem must be solved,
especially in the high switching frequency region. In
vu0
150 Vldiv
this paper, a new PWM method for the three-level
inverter with an ability to reduce the switching loss is
introduced. Using the proposed method, every phase of
iu the inverter can cease switching for 120" of which there
60 Aldtv is 60" for the positive half-period and 60" for the
negative half-period. If the load power factor angle /3 s
Fig.2O Experimental results of conventional method 30", the no switching duration can be set in the centre
a = 0.4, /3 = 30" of peak value region of the load current, so the
IEE Proc-Electr. Power Appl., Vol. 144, No. 3, May 1997 189
 switching loss can be minimised at least by 33%. If /3 >
30” there is a certain influence on the reduction of
switching loss. The simulation and experimental results
show that proposed method is very effective, the system
efficiency can be improved and the improved effect
becomes all the more remarkable as the switching
frequency is increased. The experimental results also
show that the system efficiency can be improved by
about 5% at 20kHz switching frequency and this
method can be applied in the whole modulation index
range for the ready-made inverter system.

7 References
0
0 5 10 15 20 1 SAWADA, T., OGASAWARA, S., and AKAGI, H.: ‘Analysis
fS of the neutral point potential variation of neutral-point-clamped
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7 , proposed method Q conventional method 1993, 113, (l), pp. 41-48
~~~~ calculated results __ experimental results 2 KAKU, B., MIYASITA, I., and SONE, S.: ‘New PWM method
for three level inverter based on voltage space vector suppressing
neutral point potential variation’, Trans. Inst. Electr. Eng. Jpn. -D,
1996, 116, (I), pp. 4 2 4 9
3 ROJAS, R., OHNISHI, T., and SUZUKI, T.: ‘PWM technique
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6 TRZYNADLOWSKI, A.M.: ‘Space vector PWM technique with
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8 KAKU, B., MIYASITA, I., and SONE, S.: ‘Switching loss
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0 10 20 30 LO 50 and realization of a pulsewidth modulator based on voltage s p k e
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Fig.25 Influence of p on EIF 10 TOSHIBA, ‘GTR Module’, 1990
_ _ _ _ calculated results ------experimental results
0 5 kHz 0 IOkHz 11 FUJI ELECTRIC, ‘MBT (IGBT) Module application manual’,
A 15kFIz W 2OkHz 1988

190 IEE Proc.-Electr. Power Appl., Vol. 144, No. 3, May 1997