Professional Documents
Culture Documents
BJT AC Analysis
BJT Transistor Modeling
• A model is an equivalent circuit that represents the AC
characteristics of the transistor.
– re model
– Hybrid equivalent model
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
The re Transistor Model
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
The re Transistor Model
Common-Emitter Configuration
• The equivalent circuit of Fig above will be used throughout the
analysis to follow for the common-emitter configuration.
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Fixed-Bias Configuration
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Fixed-Bias Configuration
AC equivalent
re model
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Fixed-Bias Calculations
Input impedance:
Z i R B || re
Z i re R E 10 re
Output impedance:
Z o R C || rO
Z o R C ro 10R C
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Voltage-Divider Bias
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Voltage-Divider Bias Cal.
Input impedance:
R R 1 || R 2
Z i R || re
Output impedance:
Z o R C || ro Current gain:
I R ro
Z o R C ro 10R C Ai o
I i (ro R C )(R re )
I R
Voltage gain: Ai o r 10R C
I i R re o
Vo R C || ro I
Av A i o ro 10R C , R 10 re
Vi re Ii
Vo R
Av C ro 10R C
Vi re Current gain from voltage gain:
Z
Ai A v i
RC
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Emitter Emitter-Bias Config.
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Impedance Calculations
Input impedance:
Z i R B || Z b
Z b re ( 1)R E
Z b (re R E )
Z b R E
Output impedance:
Zo R C
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Gain Calculations
Voltage gain:
Vo R C
Av
Vi Zb
Vo RC
Av
Vi re R E Z b (re R E )
Vo R
Av C Z b R E
Vi RE
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Feedback Pair
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Current Mirror Circuits
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.