‫ن ا ْلعِْلِم إِاَّل قَلِ ًيل‬ِ ‫وما أُوتِيتم‬

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4 September 2021 1443 ‫ محرم‬27

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Analog/Mixed-Signal Simulation and Modeling

Module 05
Analog Design Automation Overview

Dr. Hesham A. Omran

Integrated Circuits Laboratory (ICL)
Electronics and Communications Eng. Dept.
Faculty of Engineering
Ain Shams University
 Introduction

ENIAC, U.S. Army, 1946 Smart phone, 2017

Size → Large hall (> 150m2) Size → Your pocket
Power Consumption ≈ 150kW Power consumption < 1W
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 Moore’s Law

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 How to Design a Billion Transistor Chip?
1. Abstraction
▪ Hiding details until they become necessary
2. Structured design
▪ Hierarchy: Block, sub-blocks, …
• Tree structure (from root to leaf cells)
▪ Regularity: Min no. of different blocks
• Block reuse (e.g., standard cells)
▪ Modularity: Blocks are black boxes that have well-defined interfaces
• Combine modules to build larger system without surprises!
3. CAD Tools (EDA: Electronic Design Automation)
▪ Automation, automation, automation!
▪ Analog automation is way behind digital automation…

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 Why Analog?
❑ All the physical signals in the world around us are analog
▪ EM waves (wireless), voice, light, temperature, pressure, etc.
▪ We (will) always need an “analog” interface circuit to connect between our physical
world and our digital electronics
❑ Reference circuits (voltage, current, clock frequency)
❑ High speed digital design is actually analog design!

Digital
Amplifier A/D processing
and storage

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 The Analog Bottleneck
❑ There is almost no “pure-digital” chip: an analog part always exists.
❑ The analog/mixed-signal (AMS) part dominates the design time and cost.
❑ Need analog automation to address:
▪ Increasing circuit/system complexity
▪ Stringent time-to-market requirements.

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 Analog Design Flow
❑ No major changes in the analog design flow for the
Specifications
past 40 years!
▪ Hand-crafting circuits at the transistor level
Topology selection

❑ Actually, 40 years ago there was a better design flow! Transistor sizing
▪ Long-channel transistors obeyed the square-law.

Iterations
▪ Designers used an equation-based design Verification
methodology.
Layout
❑ Now the nanometer transistor is much more complex.
▪ Time-consuming multi-variable sweeps on SPICE Post-layout
verification
simulation tools.
▪ SPICE-monkey design methodology  Tape-out

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 Analog Automation History
❑ Analog automation efforts have been around since late 1980s.

❑ Tools can be categorized into two broad categories:

▪ Knowledge-based tools
• The designer transforms his heuristic design procedure (plan), which is based on his
knowledge and experience, into a computer program.
▪ Optimization-based tools
• Optimization techniques are used to size the circuit without resorting to a detailed
design plan.
• Equation-based optimization
• Simulation-based optimization (SPICE-in-the-loop)

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 Analog Design Automation Approaches
Optimization-based approach
Knowledge-based approach
Equation-based Simulation-based
Methodology Heuristic design plan based Optimization using Optimization using iterative
on designer’s knowledge analytical equations simulation runs
and experience
Dependence on designer’s Strong Moderate Weak
knowledge
Execution speed (CPU time) Very fast Moderate Very slow
Setup time for a new Very long Moderate Short
topology (flexibility)
Circuit complexity High Moderate Low

Accuracy Low Low High

Number of simulation runs Low Low Very high
Optimum solution No Yes Yes
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 Survey of Analog Automation Tools

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 Survey of Analog Automation Tools

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 Survey of Analog Automation Tools

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 Survey of Analog Automation Tools

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 Survey of Analog Automation Tools

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 Not Yet Done?!
❑ Several startups appeared in the first decade of the 21st century.
▪ Some died, some continued, and some acquired by big EDA players.

❑ But the problem is not yet solved!

▪ None of these tools managed to acquire widespread acceptance.
• The majority of analog designers still use the same design methodology that was
used more than 40 years ago.
▪ New startups continue to appear and raise significant funding, trying to address market
needs.
• Ex: Movellus (Intel Capital Fund) and Intento Design
▪ New research effort on analog automation is still being published by prominent figures
in the field of AMS IC design.

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 Let’s Learn from History!
❑ what are the reasons that can make a CAD tool successful?
❑ An inspiring example is SPICE.
▪ One of the most successful CAD tools in history.
▪ The core around which today’s multi-billion EDA industry was built.
❑ It is instructive to reflect on the reasons that made SPICE so successful!

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 Psychological Reasons
❑ Experienced designers are reluctant to apply new tools/methodologies.
❑ SPICE did not address experienced designers.
▪ It started by targeting new generations of designers (undergraduate and graduate
students).
❑ The new generations of students embraced this new tool.
▪ They took SPICE wherever they go: conferences, companies, and universities.
▪ They started to impress the design community with their SPICE-based work.
▪ More people started to embrace the concept.
▪ SPICE became the de facto standard!

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 Financial Reasons
❑ SPICE was free.
❑ Moreover, the source code was provided to anyone at a nominal fee.
❑ Inspired by the success of SPICE, startup companies added more features and
improvements to SPICE.
▪ Several commercial versions were offered.
❑ Today’s big players in the EDA market (Synopsys, Cadence, and Mentor) started in this
period (the 1980s).

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 Usage Model Reasons
❑ SPICE was easy to use.
▪ All the sophisticated device models were built-in inside SPICE.
❑ The learning curve required from the user was minimal.
▪ You just have to put your netlist and run.
❑ On the other hand, the underlying technology was well understood and documented.
▪ The designer knows what is going on inside the tool and does not deal with the tool as a
black box.

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 Technical Reasons
❑ SPICE worked well most of the time.
▪ Sometimes it may fail to converge, but at least it tells you when it does so.
❑ It rarely gives meaningless results that cannot be interpreted.
▪ Most of the time meaningless results will be due to bad device models or bad model
parameters.
▪ But this is a well-known rule for any CAD tool: “garbage-in, garbage-out”.

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 Too busy to improve?

“If you can't describe what you are doing as a process, you don't know what you're doing.”
W. Edwards Deming
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 Symbolic Analysis
❑ Solve the circuit (same as SPICE) but using symbolic variables

❑ Why Symbolic Analysis?

▪ Insight into circuit behavior (knowledge acquisition and educational/training purposes)
▪ Analytical model generation for automated circuit sizing
▪ Design space exploration
▪ Repetitive formula evaluation
▪ Analog behavioral model generation

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 Basic Flow of Symbolic Analysis

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 Basic Flow of Symbolic Analysis

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 Symbolic Analysis Simplification Techniques
❑ The number of symbolic terms grows exponentially
with circuit complexity
❑ Simplification before generation (SBG)
▪ The circuit schematic, or some associated matrix or
graph(s), are simplified before the symbolic
analysis starts
❑ Simplification during generation (SDG)
▪ Generating the contributing dominant terms one
by one in decreasing order of magnitude, until the
expression has been generated with the desired
accuracy
❑ Simplification after generation (SAG)
▪ Generating the exact symbolic expression followed
by pruning the unimportant contributions
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 Capabilities of Symbolic Analysis Tools
❑ Symbolic analysis limitations
▪ Combined s-domain and z-domain
analysis (to include s-domain effects in
discrete-time circuits)
▪ Strongly non-linear circuits
▪ Time domain behavior
▪ Large signal behavior (e.g., slew rate)

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 Symbolic Analysis Tools

❑ SapWin (C++): http://www.prodid.it/Sapwin4/

❑ SLiCAP (Matlab): https://www.analog-electronics.eu/slicap/slicap.html
❑ SSPICE (C): http://www.willowelectronics.com/index.html
❑ Analog Insydes (Wolfram Mathematica): http://www.analog-insydes.de
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 Knowledge-based gm/ID Synthesis
Optimization-based approach
Knowledge-based approach
Equation-based Simulation-based
Methodology Heuristic design plan based Optimization using Optimization using iterative
on designer’s knowledge analytical equations simulation runs
and experience
Dependence on designer’s Strong Moderate Weak
knowledge
Execution speed (CPU time) Very fast Moderate Very slow
Setup time for a new Very long Moderate Short
topology (flexibility)
Circuit complexity High Moderate Low

Accuracy Low Low High

Number of simulation runs Low Low Very high
Optimum solution No Yes Yes
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 Knowledge-based gm/ID Synthesis
❑ Use Gm/ID design methodology to author knowledge-based design plans.
▪ Describe the transistor behavior using a dataset that is one-time generated from
simulation sweeps rather than inaccurate simple models.
▪ Sporadically call the simulator for special design curves.
❑ Long setup-time and limited flexibility
▪ Good for “personal” design automation

Expert
Designer

Device LUTs
Knowledge-
based Circuit sizing
synthesis
Specs
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 Example: Switched Cap Amp

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 Example: Switched Cap Amp

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 LUT-in-the-Loop Optimization-based Synthesis
Optimization-based approach
Knowledge-based approach
Equation-based Simulation-based
Methodology Heuristic design plan based Optimization using Optimization using iterative
on designer’s knowledge analytical equations simulation runs
and experience
Dependence on designer’s Strong Moderate Weak
knowledge
Execution speed (CPU time) Very fast Moderate Very slow
Setup time for a new Very long Moderate Short
topology (flexibility)
Circuit complexity High Moderate Low

Accuracy Low Low High

Number of simulation runs Low Low Very high
Optimum solution No Yes Yes
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 LUT-in-the-Loop Optimization-based Synthesis

Specs Circuit sizing

Optimization
Engine

Symbolic
solver

Device LUTs
Vectorized Objectives
evaluation of and
Design design metrics constraints
space

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 Example: Bandgap Reference

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 Example: Bandgap Reference

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 Example: Bandgap Reference
❑ 𝜌 = 𝑔𝑚 /𝐼𝐷

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 Example: Bandgap Reference
❑ 𝜌 = 𝑔𝑚 /𝐼𝐷

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 Optimization Theory Overview
❑ Optimization techniques are used to find a set of design parameters, x = {x1,x2,...,xn}, that
can in some way be defined as optimal.
❑ In a simple case this might be the minimization or maximization of some system
characteristic that is dependent on x.
❑ In a more advanced formulation the objective function, f(x), to be minimized or maximized,
might be subject to constraints in the form of:
▪ equality constraints, 𝐺𝑖 𝑥 = 0 𝑖 = 0, … , 𝑚𝑒
▪ inequality constraints, 𝐺𝑖 𝑥 < 0 𝑖 = 𝑚𝑒 + 1, … , 𝑚
▪ and/or parameter bounds, xl, xu

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 Optimization Theory Overview
❑ A General Problem (GP) description is stated as
❑ min 𝑓 𝑥 ,
𝑥
❑ 𝑠𝑢𝑏𝑗𝑒𝑐𝑡 𝑡𝑜 𝑠. 𝑡.
❑ 𝐺𝑖 𝑥 = 0, 𝑖 = 0, … , 𝑚𝑒
❑ 𝐺𝑖 𝑥 < 0, 𝑖 = 𝑚𝑒 + 1, … , 𝑚
❑ x is the vector of length n design parameters, f(x) is the objective function, which returns a
scalar value, and the vector function G(x) returns a vector of length m containing the values
of the equality and inequality constraints evaluated at x.
❑ An efficient and accurate solution to this problem depends not only on the size of the
problem in terms of the number of constraints and design variables but also on
characteristics of the objective function and constraints.

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 Optimization Theory Overview
❑ When both the objective function and the constraints are linear functions of the design
variable, the problem is known as a Linear Programming (LP) problem.
❑ Quadratic Programming (QP) concerns the minimization or maximization of a quadratic
objective function that is linearly constrained.
❑ For both the LP and QP problems, reliable solution procedures are readily available.
❑ More difficult to solve is the Nonlinear Programming (NP) problem in which the objective
function and constraints can be nonlinear functions of the design variables.
❑ A solution of the NP problem generally requires an iterative procedure to establish a
direction of search at each major iteration.
❑ This is usually achieved by the solution of an LP, a QP, or an unconstrained subproblem.

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 MATALB fmincon
❑ Find minimum of constrained nonlinear multivariable function

Objective Objective function: 𝑓 𝑥

nonlcon Nonlinear constraint function: 𝑐 𝑥 𝑎𝑛𝑑 𝑐𝑒𝑞 𝑥
x0 Initial point for x
A Matrix for linear inequality constraints
b Vector for linear inequality constraints
Aeq Matrix for linear equality constraints
beq Vector for linear equality constraints
lb Vector of lower bounds
ub Vector of upper bounds
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 Tolerances and Stopping Criteria
❑ A tolerance is a threshold which, if crossed, stops the iterations of a solver.
❑ Setting small tolerances does not always result in accurate results.
▪ Instead, a solver can fail to recognize when it has converged and can continue futile
iterations.
❑ Function tolerance cannot be set easily
▪ You must write your own stop function:
https://www.mathworks.com/matlabcentral/answers/433479-set-fmincon-function-
tolerance

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 Feasible Solutions
❑ A feasible solution is a set of values for the decision variables that satisfies all of the
constraints in an optimization problem.
❑ The set of all feasible solutions defines the feasible region of the problem.
❑ Most optimization algorithms operate by first trying to locate any feasible solution, and
then attempting to find another (better) feasible solution that improves the value of the
objective function.
❑ This process of trying to find improving feasible solutions repeats until either no further
improvement is possible or some other stopping criteria is met.

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 Feasible Solutions
❑ A local optimal solution is one where there is no other feasible solution "in the vicinity"
with a better objective function value.
❑ A global optimal solution is one where there is no other feasible solution with a better
objective function value.

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 Basins of Attraction

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 Local vs. Global Optima
❑ In general, solvers return a local minimum. The result might be a global minimum, but there is no
guarantee that it is.
▪ They find the optimum in the basin of attraction of the starting point.
❑ If you need a global optimum, you must find an initial value for your solver in the basin of attraction
of a global optimum.
❑ Suggestions for ways to set initial values to search for a global optimum:
▪ Use a regular grid of initial points.
▪ Use random points drawn from a uniform distribution if your problem has all its coordinates
bounded. Use points drawn from normal, exponential, or other random distributions if some
components are unbounded. The less you know about the location of the global optimum, the
more spread-out your random distribution should be.
▪ Use identical initial points with added random perturbations on each coordinate, bounded,
normal, exponential, or other.
▪ Use the GlobalSearch or MultiStart solvers. These solvers automatically generate random start
points within bounds.
▪ The more you know about possible initial points, the more focused and successful your search
will be.
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 Optimization App
❑ optimtool opens the Optimization app.

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 Selected Related Publications
❑ Journal Publications
1. H. Omran, M. H. Amer and A. M. Mansour, "Systematic Design of Bandgap Voltage Reference Using Precomputed Lookup Tables," IEEE
Access, vol. 7, pp. 100131-100142, 2019.
2. M. N. Sabry, H. Omran and M. Dessouky, "Systematic design and optimization of operational transconductance amplifier using gm/ID
design methodology," Microelectronics Journal, vol. 75, pp. 87-96, May 2018.

❑ Conference Publications
1. A. Abd El Khalik and H. Omran, "Automated Optimization of Capacitive Feedback Folded Cascode Amplifier Using Precomputed Lookup
Tables," 2019 International Japan-Africa Conference on Electronics, Communications and Computations (JAC-ECC), Alexandria, 2019.
2. K. Khalil, N. Soliman and H. Omran, "Automation of Bandgap Voltage Reference Optimization Using Vectorized Coarse-Fine Grid Search,”
2019 International Japan-Africa Conference on Electronics, Communications and Computations (JAC-ECC), Alexandria, 2019.
3. K. Khalil, N. Soliman and H. Omran, "Application of Neural Networks to the Automation of Bandgap Reference Synthesis,“, submitted.
4. A. M. Abdel-Aziz, O. H. Fawzy, H. O. Zahran, K. A. Tera, M. N. Sabry and H. Omran, "Design Automation of Fully-Differential Folded
Cascode OTA Using Nested Iterations," 2018 International Japan-Africa Conference on Electronics, Communications and Computations
(JAC-ECC), Alexandria, 2018.
5. O. A. Abu-El-ela, A. A. Aldaly, Y. A. Abd-El-Azim and H. Omran, "Design Automation of a Fully Differential Switched Capacitor Amplifier
Using a Telescopic Cascode OTA," in 35th National Radio Science Conference (NRSC 2018), Cairo, 2018.

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 References
❑ Gielen, G. G. E. & Rutenbar, R. A., Computer-aided design of analog and mixed-signal
integrated circuits, Proceedings of the IEEE, 2000, 88, 1825-1854
❑ Toumazou, C.; Moschytz, G. S. & Gilbert, B., Trade-offs in analog circuit design: the
designer's companion, Springer Science & Business Media, 2002
❑ Shi, G.; Tan, S. X.-D. & Cuautle, E. T., Advanced Symbolic Analysis for VLSI Systems, Springer,
2014
❑ Fakhfakh, M.; Tlelo-Cuautle, E. & Fernandez Fndez, F. V., Design of analog circuits through
symbolic analysis, Bentham Science Publishers, 2012
❑ Barros, M. F.; Guilherme, J. M. & C.G.Horta, N., Analog Circuits and Systems Optimization
Based on Evolutionary Computation Techniques, Springer, 2010
❑ Castro-Lopez, R.; Fernandez Fndez, F.; Guerra-Vinuesa, O. & Rodriguez-Vazquez, A., Reuse-
Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated
Circuits, Springer, 2006

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 Thank you!

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