Professional Documents
Culture Documents
INTRODUCTION TO SDH
Introduction to SDH
Introduction
It is an international standard networking principle and a multiplexing
method. The name of hierarchy has been taken from the multiplexing method
which is synchronous by nature. The evolution of this system will assist in
improving the economy of operability and reliability of a digital network.
1. Historical Overview
In February 1988, an agreement was reached at CCITT (now ITU-TS)
study group XVIII in Seoul, on set of recommendations, for a synchronous digital
hierarchy representing a single world wide standard for transporting the digital
signal. These recommendations G-707, G-708, G-709 cover the functional
characteristic of the network node interface, i.e. the bit rates and format of the
signal passing over the Network Node Interface (NNI).
2. Merits of SDH
(i) Simplified multiplexing/demultiplexing techniques.
NSCBTTC, KALYANI 1
Introduction to SDH
3. Advantages
(i) Multi-vendor environment (mid span meet) : Prior to 1988
international agreement on SDH all vendors used proprietary non-
standard techniques for transporting information on fibre. The only
way to interconnect was to convert to the copper transmission
standards (G702/703/704). The cost and complexity levels were
very high.
NSCBTTC, KALYANI 2
Introduction to SDH
4. S.D.H. Evolution
S.D.H. evolution is possible because of the following factors :
(iv) Customer Service Needs : The requirement of the customer with respect
to different bandwidth requirements could be easily met without much
additional equipment. The different services it supports are :
5. S.D.H. Standards
The S.D.H. standards exploit one common characteristic of all PDH
networks namely 125 micro seconds duration, i.e. sampling rate of audio signals
(time for 1 byte in 64 k bit per second). This is the time for one frame of SDH.
The frame structure of the SDH is represented using matrix of rows in byte units
as shown in Figs. 2 and 3. As the speed increases, the number of bits increases
and the single line is insufficient to show the information on Frame structure.
Therefore, this representation method is adopted. How the bits are transmitted
on the line is indicated on the top of Fig.2. The Frame structure contains 9 rows
and number of columns depending upon synchronous transfer mode level
NSCBTTC, KALYANI 3
Introduction to SDH
(STM). In STM-1, there are 9 rows and 270 columns. The reason for 9 rows
arranged in every 125 micro seconds is as follows :
For 1.544 Mbit PDH signal (North America and Japan Standard), there
are 25 bytes in 125 micro second and for 2.048 Mbit per second signal, there are
32 bytes in 125 micro second. Taking some additional bytes for supervisory
purposes, 27 bytes can be allotted for holding 1.544 Mbit per second signal, i.e.
9 rows x 3 columns. Similarly, for 2.048 Mbit per second signal, 36 bytes are
allotted in 125 micro seconds, i.e. 9 rows x 4 columns. Therefore, it could be said
9 rows are matched to both hierarchies.
A typical STM-1 frame is shown in Fig. 3. Earlier this was the basic rate
but at present STM-0 which is just 1/3rd of STM-1, i.e. 51.840 Mbit per second
has been accepted by CCITT. In STM-1 as in Fig.3 the first 9 rows and 9
columns accommodate Section Overhead (SOH) and 9 rows x 261 columns
accommodates the main information called pay load. The interface speed of the
STM-1 can be calculated as follows :
The STM-0 contains just 1/3rd of the STM-1, i.e. 9 rows x 90 columns out
of that 9 rows x 3 columns consist of section overhead and 9 rows x 87 columns
consist of pay load. The STM-0 structure was accepted so that the radio and
satellite can use this bit rate, i.e. 51.840 Mbit/s across their section.
Principles of SDH
• SDH defines a number of “Containers”, each corresponding to an
existing plesiochronous rate.
NSCBTTC, KALYANI 4
Introduction to SDH
6. Basic Definitions
NSCBTTC, KALYANI 5
Introduction to SDH
(ii) Container
The first entry point of the PDH signal is the container in which the signal
is prepared so that it can enter into the next stage, i.e. virtual container. In
container (container-I) the signal speed is increased from 32 bytes to 34 bytes in
the case of 2.048 Mbit/s signal. The additional bytes added are fixed stuff bytes
(R), Justification Control Bytes (CC and C’), Justification Opportunity bytes (s).
eight information bit (I) or eight fixed stuff bits (R) or One justification
control bit (C) plus five fixed stuff bits (R) plus two overhead bits (o). or Six
information bits (I) plus one justification opportunity bit (s) plus one fixed stuff bit
(R). The last 12 bytes of one block consists of information bits (I).
NSCBTTC, KALYANI 6
Introduction to SDH
NSCBTTC, KALYANI 7
Introduction to SDH
(vii) Pointer
An indicator whose value defines frame offset of a VC with respect to the
frame reference of transport entity, on which it is supported.
(x) Concatenation
The procedure with which the multiple virtual container are associated
with one another, with the result their combined capacity could be used as a
single container across which bit sequence integrity is maintained.
8. Multiplexing Principles
The basic multiplexing principles and processing stage by stage, the
information signal is shown in Fig.7. In C-11, 1.544 Mbit per sec is mapped. In C-
12 container, the entry is 2.048 Mbit/sec. In C-2 container the entry, i.e. 6.312
Mbit/sec which is of American standard. These three containers passes through
their respective virtual containers and tributary unit pointers. At TUG-2 it can be
either 4VC-11 with TU-11 or 3VC-12 with TU-12 or 1 VC-2 with TU-2. The C-3
NSCBTTC, KALYANI 8
Introduction to SDH
container takes the input 34 Mb/s or 44.7 Mb/s of the American Standard. These
through VC-3 container and with tributary unit-3 goes to Tributary Unit Group–3.
3 Nos. VC-3 with AU-3 can directly go to AUG and enter STM-frame. Similarly, 7
TUG-2 can be mapped into one VC-3. Otherwise one VC-3 with TU-3 or 7 TUG-
2 can go to TUG-3 and 3 TUG-3 are mapped into one VC-4. A 139.264 Mbit/sec
signal can be mapped into one VC-4 through C-4. VC-4 with AU-4 goes to AUG
and then to STM-frame. The different possibilities are shown in Fig.
The details of processing and adding pointers from the base level to VC–4
container and then to AUG and then to STM–N is given in Fig.8, where the entry
2M bit/sec is shown. In the Fig.8, it can be noted that pointers gives the phase
alignment between the shaded and unshaded areas, i.e. the pointer locates the
position of the virtual container which are floating in the STM–frames.
NSCBTTC, KALYANI 9
Introduction to SDH
(i) These two types of bytes form 16 bit Frame Alignment Word
(FAW). FAW formed by the last A-1 byte and the adjacent A-2
byte, in the transmitter sequence defines the frame reference for
each of signal rates. There are 3 A-1 bytes in STM-1 and 3 A-2
bytes in STM-1. In higher order STM their number increases with
STM order. In STM-4, there will be 12 A-1 bytes and 12 A-2 bytes.
(ii) STM Identifier with C-1 Byte : In STM-1 there is a single C-1 byte
which is used to identify each of inter-leaved STM’s and in an
STM-N signal. It takes binary equivalent to position in inter-leave.
(iii) D-1 or D-12 : These bytes are for data communication channel.
Inthis D-1, D-2 and D-3 are for regenerator section. It can support
192 kilo bit per section. D-4 to D-12 are for multiplex section. They
can support 576 kilo bit per second.
(vi) B-1 byte are called bit inter-leave parity-8. This is used for error
monitoring in the regenerator section. There is only 1 byte in STM-
1 or STM-4 or STM-16. On line monitoring done in this case.
(vii) B-2 bytes. These are used for error monitoring in the multiplex
section. There are 3 bytes for STM-1, STM-4 and 16 will have
more number of B-2 bytes as per their order.
(viii) K-1, K-2 bytes. There are 2 bytes for STM-1, 4 or 16. These are
used for co-ordinating the protection switching across a set of
multiplex section organised as protection group, they are used for
automatic protection switching. Z-1, Z-2 : These bytes are located
for functions and yet defined, as per CCITT recommendations.
NSCBTTC, KALYANI 10
Introduction to SDH
Fig. 1
Network Reference Model and Standardization of Digital Hierarchies
NSCBTTC, KALYANI 11
Introduction to SDH
Fig. 2
SDH Interface Frame Representation Method
NSCBTTC, KALYANI 12
Introduction to SDH
Fig. 3
STM-N Frame Structure
NSCBTTC, KALYANI 13
Introduction to SDH
Fig. 4
SDH Standards – Bit Rates (G.707 Recommendation)
NSCBTTC, KALYANI 14
Introduction to SDH
Fig. 5
SDH–based Transport Network Layered Model
NSCBTTC, KALYANI 15
Introduction to SDH
Fig. 6(a)
SDH Layers
NSCBTTC, KALYANI 16
Introduction to SDH
Fig. 6(b)
Layer Interaction
NSCBTTC, KALYANI 17
Introduction to SDH
Fig. 7(a)
Generic Multiplexing Structure
NSCBTTC, KALYANI 18
Introduction to SDH
Fig. 7(b)
Reduced Multiplexing Structure
NSCBTTC, KALYANI 19
Introduction to SDH
Fig. 12
Section and High Order Path Overhead Bytes
The purpose of individual bytes is detailed below.
A1,A2 Frame Alignment.
B1,B2 Parity bytes for errors monitoring.
D1…D3 Data communication channel (DCC) network management.
D4…D12 Data communication channel (DCC) network management.
E1,E2 Orderwire channel.
F1 Maintenance
J0 Trace identifier
K1,K2 Automatic protection switching (APS) channel.
M1 Transmission error acknowledgement.
S1 Clock quality indicator.
* Media dependent bytes.
NSCBTTC, KALYANI 20
Introduction to SDH
B3 B – BIT INTERLEAVED PARITY CODE (BIP–8) BYTE FOR PATH ERR. MON.
CALCULATED OVER ALL BITS OF PREVIOUS VC BEFORE SCRAMBLING.
C2 C – PATH SIG. LABEL BYTE TO INDICATE, SPE EQPD (1) OR NOT (0)
ATM – 00010011, MAN – 00010100, FDDI – 00010101, LOCKED TU –
00000011.
G1 G – PATH STATUS BYTE OR REMOTE STN. (BIT 1–4 FEBE, BIT 5 – FERF,
BIT 6–8 NOT USED)
Z Z – FUTURE USE
(F3)
Z K3 – APS FOR PROTN. SWG. (b1 …. b4) SPARE (b5 …. b8) TO INCREASE
(K3) N/W CAPABILITY
J2 PATH TRACE
K- 4 PATH APC
NSCBTTC, KALYANI 21
Introduction to SDH
NSCBTTC, KALYANI 22
Introduction to SDH
The wide range of alarm signals and parity checks built into the SDH
signal structure support effective in–service testing. Major alarm
conditions such as Loss of Signal (LOS), Loss of Frame (LOF), and Loss
of Pointer (LOP) cause Alarm Indication Signal (AIS) to be transmitted
downstream. Different AIS signals are generated depending upon which
level of the maintenance hierarchy is affected. In response to the different
AIS signals, and detection of major receiver alarm conditions, other alarm
signals are sent upstream to warn of trouble downstream. Far End
Receive Failure (FERF) is sent upstream in the Multiplexer Section
Overhead after Multiplexer Section AIS, or LOS, or LOF has been
detected by equipment terminating in a Multiplexer Section span; a
Remote Alarm Indication (RAI) for a high order path is sent upstream after
Path AIS or LOP has been detected by equipment terminating a Path, and
similarly, a Remote Alarm Indication (RAI) for a Low Order Path is sent
upstream after Low Order Path AIS or LOP has been detected by
equipment terminating a Low Order Path.
NSCBTTC, KALYANI 23