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Embedded Systems
1 Introduction
cryptography necessary to understand the academic exercise and with which the stu-
dent will generate respective data-path or pseudo codes to make both hardware and
software.
In this type of encryption, the plain-text message is divided into blocks of n bits each
[7, 18]. The main feature of such ciphers is that each block is encrypted in the same
way, regardless of its place in the chain so all bits of the block are estimated together,
participating in operations that try to obscure the possible relationships they had with
the original message [22]. This can be seen in Fig. 1.
Symmetric algorithms encrypted text block, but this length change per each algo-
rithm.
In the block cipher four basic operations are performed:
∙ Electonic CodeBlock (ECB): within it blocks are ciphered separately.
∙ Cipher BlockChainning (CBC): the cryptogram blocks to relate between them
through OR excusive funtions.
∙ Cipher feedback (CFB): it is performed XOR between character or isolated bits of
the text along with the output to the algorithm.
∙ Output feedback (OFB): equal than CFB, it is performed XOR between character
or isolated bits of the text and the algorithms outputs, but this uses the feedback
between the output with the inputs, therefore it does not depend on text, it is a
generator of the random numbers.
The designer have to exactly know the algorithm to applied the concepts of pro-
gramming to do each of the blocks and this will be done on PLD device and embed-
ded systems.
The basic operations of the cipher block algorithm are shown in the Fig. 2. They
could change depending on the proposed algorithm.
498 E. Jacinto et al.
For all of the cipher block is generated the combination of operations ByteSub,
ShiftRow, MixColum y AddRoundKey, or equivalent, when this subroutines execute
in one time is named round. the complex and security of the algorithm depending
on previous combining operations, the among of rounds made, with the key length
used [3, 4].
Each round is composed for three operations based on a uniform and invertible
transformations are named layer, which have been designed to resist the lineal and
differential cryptanalysis, they are shown next:
∙ No linear layer: It makes pass the data through the S box in parallel with non-
linearity optimal properties.
∙ Linear mix layer: It guaranties the high level of diffusion along the multiples lay-
ers.
∙ Key additions layer: It is applied for XOR operation between the intermediate state
and each round key.
After explaining each one, the functional blocks of any cipher. The next section,
the functional blocks of the PRESENT algorithm will be shown and analyzed.
In the Fig. 3 the basic structure of the PRESENT algorithm is shown, it can see their
blocks and each one of their 31 rounds [8].
Learning Strategies for Cryptography Using Embedded Systems 499
In embedded systems, the among of memory is short, for this reason the stu-
dents have to check and analyse what the best way to describe the algorithm is. After
that, simulations and resources reports are necessary to determine which is the best
methodology to guarantee the algorithm be lightweight type [2, 3, 7].
For verification to the algorithm works in a good way, the makers of the algorithm [8]
give a table in Hexadecimal notation, the plain text with their respective encrypted
known text after mixing with certain key is shown in the Table 1:
In the last decade the revolution of the digital programmable devices field has been an
significant increase, which has allowed the possibilities to make designs with a high
performance in a small devices and low price [11]. For this advantage, it is possible
to make designs of the lightweight ciphers algorithms in a embedded systems type
hardware [9] and software [5]. For this reason as the universe of possible devices is
infinitive, the study case requires a check the most relevance characteristics of the
logic programmable devices and microcontroller in our local market [5].
The design meets with the Top-Down methodology and requires a certain number
of phases, in dependence of the tool, but the general list of this steps are shown next
[12]:
∙ Description a system level.
∙ Description a behaviour level.
∙ Validation (verification).
∙ Co-simulation.
∙ Estimation performance.
When the designer wants to make a whole system with different sub-systems,
He must follow the next steps to get a correct verification of the algorithm. This
procedure is called map and mapping and partitioning [11, 12]:
Learning Strategies for Cryptography Using Embedded Systems 501
For the result measuring of the PRESENT algorithm implementation over microcon-
trollers and PLD’s devices, it will be used the ciphering and desciphering functions
with 80 bits key length and 64 bits data blocks.
For each microcontrollers platform is necessary to define certain metrics: pro-
gram memory (FLASH), data memory (RAM) and throughput would be consider.
Depending on the previous metrics, they must be taken into account: the processor
bus length, pointers hardware, functions or manage of tables and the speed of the
CPU system measured in MIPS (Million Instruction Per Second).
As to PLD’s, the metrics are totally different, the throughput importance increases
due to the parallelism of the devices, it is searched the reduction of the resources
measured in Slices (CLB-GE).
The student must probed the algorithm through simulations using the test vectors,
one of this tests is shown in the Fig. 5:
To probe the firmware in the microcontrollers, initially the students should write
a standard code in C language, this procedure with the help of the intermediate steps
of the hardware simulation shows above en the Fig. 5. The simulation or implementa-
tion would change on depending of the device chosen. With the reports thrown from
the compiler, it is possible to compare de metrics of the different implementations.
Real tests with a measuring of one pin of the device could be made.
5 Results
This hardware and software tools were used in a test group of 10 undergraduate stu-
dents of the seed research annexed to DIGITI (Smart Digital Systems) and ARMOS
(Modern Architectures to Power Supply Systems). The research groups had worked
with the students in the second semester of the 2015, a quick bonding was achieved
Learning Strategies for Cryptography Using Embedded Systems 503
with their research projects. Because the students have got the theorical concepts and
they have acquired skills designing and working on embedded systems.
A collateral effect was seen with the increase in the academic interest of the stu-
dents in their different activities and major compromise with the researching group.
DIGITI researching group have got big amount of thesis, in the field of the cryptology
and cryptography, so far it has two undergraduate thesis, one of them in lightweight
block cipher algorithm HIGH implementation in microcontroller, the second one in
the HSM implementation in a 32 bits microcontroller. The research group just ended
the new work master thesis, this task is going to increases the performance of the
CLEFIA algorithm in a 32 bits microcontroller.
6 Conclusions
With this educational exercise the research group achieves two undergraduate and
one master thesis, without delays on the mathematical foundation; this methodology
guarantee the success of the learning process on the seed research. Students in the
firsts semesters could work in a real project which to prepare the degree work. The
mathematical foundation in the cryptology has been complicated to the undergrad-
uate students, our methodology had decreased the development time of the mathe-
matical knowledge application using the embedded systems over a real problem.
On the other hand it was detected that the design and implementation of these
ciphered algorithms on programmable logic devices clinched all previous knowl-
edgement of group students. They improves their skills on combinational and sequen-
tial digital circuits, finite state machines and of course, devices description using
VHDL and Verilog. That is why, ARMOS and DIGITI researching groups will pro-
pose to implement similar issues as practical projects for digital circuits courses for
electrical and electronical technology students. It will work as a final course project
and it is possible that it improves the learning process in that area.
Acknowledgments This work was supported by the District University Francisco Jos de Caldas,
in part through CIDC, and partly by the Technological Faculty. The views expressed in this paper
are not necessarily endorsed by District University. The authors thank the research groups DIGITI
and ARMOS for the evaluation carried out on prototypes of ideas and strategies.
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