A243 Final Examination

I. Write J if the statement is TRUE and H if the statement is FALSE. Erasures are not allowed. (20pts)
1. The JFET always operates with a reverse-biased gate-to-source pn junction.
2. The channel resistance of a JFET is always constant.
3. The gate-to source voltage of an n-channel JFET must be negative.
4. ID becomes zero at the pinch-off voltage.
5. VGS has no effect on ID.
6. The JFET is a square-law device because of the mathematical expression of its transfer characteristic curve.
7. The D-MOSFET can be operated in two modes.
8. An E-MOSFET operates in the depletion mode.
9. A D-MOSFET has a physical channel and an E-MOSFET has an induced channel.
10. MOSFETs must be handled with care.
11. A bipolar junction transistor has three terminals.
12. The three regions of a BJT are base, emitter and cathode.
13. For operation in the linear or active region, the base-emitter junction of a transistor is forward-biased.
14. Two types of BJT are npn and pnp.
15. The base and the collector current are approximately equal.
16. The dc voltage gain of a transistor is designated 𝛽𝐷𝐶 .
17. Cutoff and saturation are the two normal states of a linear transistor amplifier.
18. When a transistor is saturated, the collector current is maximum.
19. Amplification is the output voltage divided by the input current.
20. A transistor in cutoff acts as an open switch.

II. Circuit analysis. Show complete and detailed solutions. Express all answers in two significant decimal
places for your calculations. Use graphing paper if necessary. Enclose all final answers in a box. (70 pts)
1. For the network shown below:
a. Draw the dc equivalent circuit. (5 pts)
b. Find the dc voltages VB, VCB, and VCE. (15 pts)
c. Draw the ac equivalent circuit. (5 pts)
d. Determine re. (5 pts)

2. Find VS. (15 pts)

3. Determine the quiescent values of ID and VGS. (25 pts)