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AMD 01 Cover Sheet 39 SATA


02 Block Diagram 40 DVI
AM4 03 FM4 DDR4 I/F 41 HDMI

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04 AM4 PCIE/SATAE 42 ACPI 5VDIMM/3VSB

r
05 AM4 Display/Audio 43 DDR VPP25/VTT

.
06 AM4 SVI/ACPI/GPIO 44 DDR Power-RT8125E

7
07 AM4 LPC/SPI/USB/CLK/STRAP 45 CPU Power RT8894 4+2
08 AM4 Power/VDDIO_AUDIO Power 46,47 CPU Phase1-5

-b x
09,10 RTC/Clear CMOS/RTC Power/GND 48,49 CPU NB,CPU NB_S5
11,12,13,14 DDR4-POWER ∥ GND 50 CPU 1.8_S0/S5

15 Promontory-PCIE/SATA/SATAE 51 CPU Power VDDP - MP8712


16 Promontory-USB/OC 52 Prom-GS7133/2.5V

d
17 Promontory-CLK/ACPI/GPIO 53 Prom- SY8288RAC / 1.05V

.
18,19 Promontory-Power ∥ GND 54 VRM-EN/PWRGD
20 PCI_E1/E4 X16

d
55 RT9553B CURRENT SENSE/OV Control
21 PCI_E2_E3_E5/E4 X1/X4 56 ATX/Front Panel
22 PCIE Switch X4 / X1/X1 57 ALL LED Control

m
23 PCIE Switch M2_2/SATA 58 TEMP SENSOR/EMI CAP
A A

s
24 SIO NCT6797D 59 LED MCU Control
25 SIO HWM/COM 60 Power/JPIPE
26 M.2_1 61 JLED1/2/3/4
27 CPU FAN1/PUMP_FAN1 TYPE L 62 RGB LED Control_1
28 SYS_FAN1-3 TYPE K 63 RGB LED Control_2
29 SYS_FAN4 TYPE K/NCT5605Y 64 BOM Option
30 LAN 8111H 65 Manual Parts
31 Audio ALC892 66 PG MAP
32 Audio De-POP 67 Power Sequence
33 USB Power 68 GPIO MAP
34 Rear PS2_USB2.0/LAN_USB3.0 69 Power Delivery
35 Rear USB3.1 Type A / redrive 70 History1
36 Rear USB3.1 Type C / mux 71 History2
37 Front USB2.0 72 History3
38 Front USB3.0 180° Header
MS-7B86 BOM List
Schematic Cfg ERP NO. Remark BOM
* MS-7B86/B450 GAMING PLUS A
Title
MICRO-START INT'L CO.,LTD.
MS-7B86/B450-A PRO COVER SHEET
Size Document Number Rev
C MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 1 of 68
1
5 4 3 2 1

MS-7B86 CHA PC4-2933 DDR4 UDIMM x2 Bristol x2


P_GPP[0]
P_GPP[1]
Rear I/O DP0 [3:0] P_GPP[2] Summit x4
AMD
HDMI HDMI1 CHB PC4-2933 DDR4 UDIMM x2 P_GPP[3]
M.2

u
Rear I/O DP1 [3:0] Raven Ridge GPP[1] PCIe Gen3 x2

r
D
PCIe Gen3 x4 D

DVI-D DVI1 M2_1

.
GPP[0] Switch PCIE[0:2]
Rear I/O DP to VGA Pinnacle Ridge PCIE[2] ASM1480

7
VGA DP2 [0:1]
DVI-D VGA1 IT6516
Switch PCIE[3]

-b x
95W GPP[2:3] SATA 3.0 x2
SPI Flash ROM ASM1480 SATA[5:6] SATA5 6
128M bit 1.8V SPI
SIO
105W Rear I/O
LPC NUVOTON PS2 I/F PS2 Combo
PCIe x16 Slot PCIe GEN3 x16 P_GFX[15:0] NCT6797D-M PS2_USB1
PCIe_E1 SOCKET 1331

. d
C
ALC892 HD Audio
USB 3.0 x2 USB_SS[1:0]
C

USB 2.0 x2 USB_HSD[1:0] Rear I/O

d P_HUB
USB 3.0 x2

[3:0]
HDMI_USB1

m
PCI x1 Slot PCIe GEN2 x1 USB 2.0 x1 USB_HSD[4] Rear I/O
USB 2.0 x2

s
PCIe_E6 GPP[0]
Flast BIOS
PCIe x1 Slot PCIe GEN2 x1 USB 2.0 x1 USB_HSD[3] Fimtek USB
F75504N
PCIe_E2 GPP[6] PS2_USB1
Promontory
PCIe x1 Slot PCIe GEN2 x1
B
PCIe_E3 GPP[7] Front I/O B

USB 2.0 x2 USB_HSD[2] USB 2.0 x2


PCIe x1 Slot PCIe GEN2 x1
B450 USB_HSD[1] JUSB1
PCIe_E5 GPP[5] (PROM2) Front I/O
USB 2.0 x2 USB_HSD[13] USB 2.0 x2
USB_HSD[12] JUSB2
PCIe GEN2 x3 Switch PCIe GEN2 x3
PCI x4 Slot ASM1480 GPP[5:7] Rear I/O
PCIe_E4 USB 3.1 Gen2 x2 USB_SSP[0] USB 2.0 x2 USB_HSD[0] GEN2 TYPE-A
USB_SSP[1] USB_HSD[5] LAN_USB1
PCIe GEN2 x1 PCIe GEN2 x2
GPP[4] Front I/O
USB 3.1 Gen1 x2 USB_SS[0] USB 2.0 x2 USB_HSD[10] USB 3.0 x2
SATA 3.0 x1 SATA [0] USB_SS[1] USB_HSD[11] JUSB3
SATA1
SATA 3.0 x1 LAN Rear I/O
SATA2 PCIe GEN2 x1 GPP[1] Realtek LAN RJ45
A
SATA [1] A

RTL8111H LAN_USB1

SATA 3.0 x1 SATA [2]


SATA3
MICRO-START INT'L CO.,LTD.
Title

SATA 3.0 x1 SATA [3]


Block Diagram
SATA4 Size
Custom
Document Number
MS-7B86 30
Rev

Date: Wednesday, April 17, 2019 Sheet 2 of 68


5 4 3 2 1
5 4 3 2 1

CPU1A CPU1B
[11] MA_ADD[13..0] MA_DATA[63..0] [11] [12] MB_ADD[13..0] MB_DATA[63..0] [12]
MAMORY-A MEMORY-B
MA_ADD0 AA32 E18 MA_DATA0 MB_ADD0 AC36 D20 MB_DATA0
MA_ADD1 T32 MA_ADD[0] MA_DATA[0] J18 MA_DATA1 MB_ADD1 U36 MB_ADD[0] MB_DATA[0] B21 MB_DATA1
MA_ADD2 T35 MA_ADD[1] MA_DATA[1] J20 MA_DATA2 MB_ADD2 U37 MB_ADD[1] MB_DATA[1] B24 MB_DATA2
MA_ADD3 T31 MA_ADD[2] MA_DATA[2] H21 MA_DATA3 MB_ADD3 T38 MB_ADD[2] MB_DATA[2] C24 MB_DATA3

u
MA_ADD4 R30 MA_ADD[3] MA_DATA[3] H18 MA_DATA4 MB_ADD4 T37 MB_ADD[3] MB_DATA[3] A20 MB_DATA4
MA_ADD5 R33 MA_ADD[4] MA_DATA[4] F18 MA_DATA5 MB_ADD5 R39 MB_ADD[4] MB_DATA[4] C20 MB_DATA5
MA_ADD6 R32 MA_ADD[5] MA_DATA[5] G20 MA_DATA6 MB_ADD6 R36 MB_ADD[5] MB_DATA[5] A23 MB_DATA6
MA_ADD[6] MA_DATA[6] MB_ADD[6] MB_DATA[6]

r
D MA_ADD7 P34 F20 MA_DATA7 MB_ADD7 P39 C23 MB_DATA7 D
MA_ADD8 P30 MA_ADD[7] MA_DATA[7] MB_ADD8 R38 MB_ADD[7] MB_DATA[7]
MA_ADD9 P31 MA_ADD[8] MB_ADD9 P36 MB_ADD[8]

.
MA_ADD10 AA36 MA_ADD[9] H22 MA_DATA8 MB_ADD10 AC39 MB_ADD[9] A26 MB_DATA8
MA_ADD11 P33 MA_ADD[10] MA_DATA[8] G22 MA_DATA9 MB_ADD11 P37 MB_ADD[10] MB_DATA[8] C26 MB_DATA9
MA_ADD12 N35 MA_ADD[11] MA_DATA[9] E24 MA_DATA10 MB_ADD12 N38 MB_ADD[11] MB_DATA[9] A29 MB_DATA10
MA_ADD13 AE32 MA_ADD[12] MA_DATA[10] J24 MA_DATA11 MB_ADD13 AG38 MB_ADD[12] MB_DATA[10] C29 MB_DATA11
MA_ADD[13] MA_DATA[11] F21 MA_DATA12 MB_ADD[13] MB_DATA[11] A25 MB_DATA12

7
MA_DATA[12] J21 MA_DATA13 MB_DATA[12] B25 MB_DATA13
MA_ACT_L M35 MA_DATA[13] H24 MA_DATA14 MB_ACT_L M38 MB_DATA[13] A28 MB_DATA14
[11] MA_ACT_L MA_BG0 MA_ACT_L MA_DATA[14] MA_DATA15 [12] MB_ACT_L MB_BG0 MB_ACT_L MB_DATA[14] MB_DATA15
N31 F24 M36 B28
[11] MA_BG0 MA_BG1 MA_BG[0] MA_DATA[15] [12] MB_BG0 MB_BG1 MB_BG[0] MB_DATA[15]
N32 M39
[11] MA_BG1 MA_BG[1] [12] MB_BG1 MB_BG[1]

-b x
MA_BANK0 AA35 J26 MA_DATA16 MB_BANK0 AD38 A31 MB_DATA16
[11] MA_BANK0 MA_BANK1 MA_BANK[0] MA_DATA[16] MA_DATA17 [12] MB_BANK0 MB_BANK1 MB_BANK[0] MB_DATA[16] MB_DATA17
AA33 J27 AC37 B31
[11] MA_BANK1 MA_BANK[1] MA_DATA[17] MA_DATA18 [12] MB_BANK1 MB_BANK[1] MB_DATA[17] MB_DATA18
G28 B34
MA_DATA[18] H28 MA_DATA19 MB_DATA[18] C35 MB_DATA19
MA_DM0 K19 MA_DATA[19] H25 MA_DATA20 MB_DM0 C21 MB_DATA[19] B30 MB_DATA20
[11] MA_DM0 MA_DM1 MA_DM[0] MA_DATA[20] MA_DATA21 [12] MB_DM0 MB_DM1 MB_DM[0] MB_DATA[20] MB_DATA21
J23 G25 D26 C30
[11] MA_DM1 MA_DM2 MA_DM[1] MA_DATA[21] MA_DATA22 [12] MB_DM1 MB_DM2 MB_DM[1] MB_DATA[21] MB_DATA22
G26 E28 A32 B33
[11] MA_DM2 MA_DM3 MA_DM[2] MA_DATA[22] MA_DATA23 [12] MB_DM2 MB_DM3 MB_DM[2] MB_DATA[22] MB_DATA23
H30 H27 D37 A34
[11] MA_DM3 MA_DM4 MA_DM[3] MA_DATA[23] [12] MB_DM3 MB_DM4 MB_DM[3] MB_DATA[23]
AJ31 AL38
[11] MA_DM4 MA_DM5 MA_DM[4] [12] MB_DM4 MB_DM5 MB_DM[4]
AM31 AR39
[11] MA_DM5 MA_DM6 MA_DM[5] MA_DATA24 [12] MB_DM5 MB_DM6 MB_DM[5] MB_DATA24
AL29 F29 AT35 B36
[11] MA_DM6 MA_DM7 MA_DM[6] MA_DATA[24] MA_DATA25 [12] MB_DM6 MB_DM7 MB_DM[6] MB_DATA[24] MB_DATA25
AL26 J30 AW29 E36
[11] MA_DM7 MA_DM[7] MA_DATA[25] MA_DATA26 [12] MB_DM7 MB_DM[7] MB_DATA[25] MB_DATA26
G34 H31 F39 C39
MA_DM[8] MA_DATA[26] F32 MA_DATA27 MB_DM[8] MB_DATA[26] D38 MB_DATA27

d
MA_DATA[27] J29 MA_DATA28 MB_DATA[27] A35 MB_DATA28
MA_DQS_H0 H19 MA_DATA[28] G29 MA_DATA29 MB_DQS_H0 B22 MB_DATA[28] C36 MB_DATA29

.
[11] MA_DQS_H0 MA_DQS_L0 MA_DQS_H[0] MA_DATA[29] MA_DATA30 [12] MB_DQS_H0 MB_DQS_L0 MB_DQS_H[0] MB_DATA[29] MB_DATA30
G19 E31 A22 B38
[11] MA_DQS_L0 MA_DQS_H1 MA_DQS_L[0] MA_DATA[30] MA_DATA31 [12] MB_DQS_L0 MB_DQS_H1 MB_DQS_L[0] MB_DATA[30] MB_DATA31
F23 G31 C27 C38
[11] MA_DQS_H1 MA_DQS_L1 MA_DQS_H[1] MA_DATA[31] [12] MB_DQS_H1 MB_DQS_L1 MB_DQS_H1] MB_DATA[31]
C G23 B27 C
[11] MA_DQS_L1 MA_DQS_H2 MA_DQS_L[1] [12] MB_DQS_L1 MB_DQS_H2 MB_DQS_L[1]
F27 C33
[11] MA_DQS_H2 MA_DQS_L2 MA_DQS_H[2] MA_DATA32 [12] MB_DQS_H2 MB_DQS_L2 MB_DQS_H[2] MB_DATA32
F26 AH34 C32 AK39
[11] MA_DQS_L2 MA_DQS_L[2] MA_DATA[32] [12] MB_DQS_L2 MB_DQS_L[2] MB_DATA[32]

d
MA_DQS_H3 F30 AJ30 MA_DATA33 MB_DQS_H3 B37 AL37 MB_DATA33
[11] MA_DQS_H3 MA_DQS_L3 MA_DQS_H[3] MA_DATA[33] MA_DATA34 [12] MB_DQS_H3 MB_DQS_L3 MB_DQS_H[3] MB_DATA[33] MB_DATA34
E30 AK30 A37 AN36
[11] MA_DQS_L3 MA_DQS_H4 MA_DQS_L[3] MA_DATA[34] MA_DATA35 [12] MB_DQS_L3 MB_DQS_H4 MB_DQS_L[3] MB_DATA[34] MB_DATA35
AJ33 AL34 AM37 AN39
[11] MA_DQS_H4 MA_DQS_L4 MA_DQS_H[4] MA_DATA[35] MA_DATA36 [12] MB_DQS_H4 MB_DQS_L4 MB_DQS_H[4] MB_DATA[35] MB_DATA36
AJ34 AH31 AM36 AK38
[11] MA_DQS_L4 MA_DQS_H5 MA_DQS_L[4] MA_DATA[36] MA_DATA37 [12] MB_DQS_L4 MB_DQS_H5 MB_DQS_L[4] MB_DATA[36] MB_DATA37
AN32 AH32 AT38 AK36
[11] MA_DQS_H5 MA_DQS_L5 MA_DQS_H[5] MA_DATA[37] MA_DATA38 [12] MB_DQS_H5 MB_DQS_L5 MB_DQS_H[5] MB_DATA[37] MB_DATA38
AN33 AK33 AT39 AM39
[11] MA_DQS_L5 MA_DQS_H6 MA_DQS_L[5] MA_DATA[38] MA_DATA39 [12] MB_DQS_L5 MB_DQS_H6 MB_DQS_L[5] MB_DATA[38] MB_DATA39
AP29 AK32 AU34 AN38
[11] MA_DQS_H6 MA_DQS_L6 MA_DQS_H[6] MA_DATA[39] [12] MB_DQS_H6 MB_DQS_L6 MB_DQS_H[6] MB_DATA[39]
AN29 AV34
[11] MA_DQS_L6 MA_DQS_L[6] [12] MB_DQS_L6 MB_DQS_L[6]

m
MA_DQS_H7 AP26 MB_DQS_H7 AU28
[11] MA_DQS_H7 MA_DQS_L7 MA_DQS_H[7] MA_DATA40 [12] MB_DQS_H7 MB_DQS_L7 MB_DQS_H[7] MB_DATA40
AN26 AM34 AU29 AR36
[11] MA_DQS_L7 MA_DQS_L[7] MA_DATA[40] MA_DATA41 [12] MB_DQS_L7 MB_DQS_L[7] MB_DATA[40] MB_DATA41
H34 AM33 G38 AR37
H33 MA_DQS_H[8] MA_DATA[41] AP31 MA_DATA42 G37 MB_DQS_H[8] MB_DATA[41] AU37 MB_DATA42
MA_DQS_L[8] MA_DATA[42] AR33 MA_DATA43 MB_DQS_L[8] MB_DATA[42] AV37 MB_DATA43
MA_DATA[43] MB_DATA[43]

s
AL32 MA_DATA44 AP37 MB_DATA44
MA_CLK_H0 T34 MA_DATA[44] AL31 MA_DATA45 MB_CLK_H0 U39 MB_DATA[44] AP38 MB_DATA45
[11] MA_CLK_H0 MA_CLK_L0 MA_CLK_H[0] MA_DATA[45] MA_DATA46 [12] MB_CLK_H0 MB_CLK_L0 MB_CLK_H[0] MB_DATA[45] MB_DATA46
U34 AP34 V39 AT36
[11] MA_CLK_L0 MA_CLK_H1 MA_CLK_L[0] MA_DATA[46] MA_DATA47 [12] MB_CLK_L0 MB_CLK_H1 MB_CLK_L[0] MB_DATA[46] MB_DATA47
U33 AP32 V38 AU38
[11] MA_CLK_H1 MA_CLK_L1 MA_CLK_H[1] MA_DATA[47] [12] MB_CLK_H1 MB_CLK_L1 MB_CLK_H[1] MB_DATA[47]
V33 W38
[11] MA_CLK_L1 MA_CLK_H2 MA_CLK_L[1] [12] MB_CLK_L1 MB_CLK_H2 MB_CLK_L[1]
V35 W37
[11] MA_CLK_H2 MA_CLK_L2 MA_CLK_H[2] MA_DATA48 [12] MB_CLK_H2 MB_CLK_L2 MB_CLK_H[2] MB_DATA48
V36 AR31 Y37 AW35
[11] MA_CLK_L2 MA_CLK_H3 MA_CLK_L[2] MA_DATA[48] MA_DATA49 [12] MB_CLK_L2 MB_CLK_H3 MB_CLK_L[2] MB_DATA[48] MB_DATA49
V32 AK29 Y39 AU35
[11] MA_CLK_H3 MA_CLK_L3 MA_CLK_H[3] MA_DATA[49] MA_DATA50 [12] MB_CLK_H3 MB_CLK_L3 MB_CLK_H[3] MB_DATA[49] MB_DATA50
W32 AM28 AA39 AW32
[11] MA_CLK_L3 MA_CLK_L[3] MA_DATA[50] MA_DATA51 [12] MB_CLK_L3 MB_CLK_L[3] MB_DATA[50] MB_DATA51
AL28 AU32
MA_RESET_L L33 MA_DATA[51] AM30 MA_DATA52 MB_RESET_L K35 MB_DATA[51] AV36 MB_DATA52
[11] MA_RESET_L MA_EVENT_L MA_RESET_L MA_DATA[52] MA_DATA53 [12] MB_RESET_L MB_EVENT_L MB_RESET_L MB_DATA[52] MB_DATA53
W35 AN30 AA38 AW36
[11] MA_EVENT_L MA_EVENT_L MA_DATA[53] MA_DATA54 [12] MB_EVENT_L MB_EVENT_L MB_DATA[53] MB_DATA54
AP28 AW33
MA_DATA[54] AR28 MA_DATA55 MB_DATA[54] AV33 MB_DATA55
MA0_CKE0 M32 MA_DATA[55] MB0_CKE0 L37 MB_DATA[55]
B [11] MA0_CKE0 MA0_CKE1 MA0_CKE[0] [12] MB0_CKE0 MB0_CKE1 MB0_CKE[0] B
M30 K37
[11] MA0_CKE1 MA1_CKE0 MA0_CKE[1] MA_DATA56 [12] MB0_CKE1 MB1_CKE0 MB0_CKE[1] MB_DATA56
M33 AK27 L39 AW30
[11] MA1_CKE0 MA1_CKE1 MA1_CKE[0] MA_DATA[56] MA_DATA57 [12] MB1_CKE0 MB1_CKE1 MB1_CKE[0] MB_DATA[56] MB_DATA57
L34 AK26 L36 AV30
[11] MA1_CKE1 MA1_CKE[1] MA_DATA[57] MA_DATA58 [12] MB1_CKE1 MB1_CKE[1] MB_DATA[57] MB_DATA58
AP25 AW27
MA_DATA[58] AR25 MA_DATA59 MB_DATA[58] AW26 MB_DATA59
MA0_ODT0 AD35 MA_DATA[59] AN27 MA_DATA60 MB0_ODT0 AF39 MB_DATA[59] AV31 MB_DATA60
[11] MA0_ODT0 MA0_ODT1 MA0_ODT[0] MA_DATA[60] MA_DATA61 [12] MB0_ODT0 MB0_ODT1 MB0_ODT[0] MB_DATA[60] MB_DATA61
AF31 AM27 AH36 AU31
[11] MA0_ODT1 MA1_ODT0 MA0_ODT[1] MA_DATA[61] MA_DATA62 [12] MB0_ODT1 MB1_ODT0 MB0_ODT[1] MB_DATA[61] MB_DATA62
AD33 AL25 AF37 AV28
[11] MA1_ODT0 MA1_ODT1 MA1_ODT[0] MA_DATA[62] MA_DATA63 [12] MB1_ODT0 MB1_ODT1 MB1_ODT[0] MB_DATA[62] MB_DATA63
AF34 AM25 AH38 AV27
[11] MA1_ODT1 MA1_ODT[1] MA_DATA[63] [12] MB1_ODT1 MB1_ODT[1] MB_DATA[63]

MA0_CS_L0 AC33 F33 MB0_CS_L0 AE37 F38


[11] MA0_CS_L0 MA0_CS_L1 MA0_CS_L[0] MA_CHECK[0] [12] MB0_CS_L0 MB0_CS_L1 MB0_CS_L[0] MB_CHECK[0]
AE35 G32 AG39 F36
[11] MA0_CS_L1 MA1_CS_L0 MA0_CS_L[1] MA_CHECK[1] [12] MB0_CS_L1 MB1_CS_L0 MB0_CS_L[1] MB_CHECK[1]
AC34 K31 AE38 H39
[11] MA1_CS_L0 MA1_CS_L1 MA1_CS_L[0] MA_CHECK[2] [12] MB1_CS_L0 MB1_CS_L1 MB1_CS_L[0] MB_CHECK[2]
AE34 K32 AG36 J39
[11] MA1_CS_L1 MA1_CS_L[1] MA_CHECK[3] [12] MB1_CS_L1 MB1_CS_L[1] MB_CHECK[3]
E33 E37
MA_CHECK[4] E34 MB_CHECK[4] E39
MA_ADD_17 AF33 MA_CHECK[5] J32 MB_ADD_17 AH37 MB_CHECK[5] H36
[11] MA_ADD_17 MA_RAS_L MA_ADD_17 MA_CHECK[6] [12] MB_ADD_17 MB_RAS_L MB_ADD_17 MB_CHECK[6]
AB34 J33 AD36 H37
[11] MA_RAS_L MA_CAS_L MA_RAS_L_ADD[16] MA_CHECK[7] [12] MB_RAS_L MB_CAS_L MB_RAS_L_ADD[16] MB_CHECK[7]
AD32 AF36
[11] MA_CAS_L MA_WE_L MA_CAS_L_ADD[15] VCC_DDR [12] MB_CAS_L MB_WE_L MB_CAS_L_ADD[15]
AB35 AD39
[11] MA_WE_L MA_WE_L_ADD[14] [12] MB_WE_L MB_WE_L_ADD[14] VCC_DDR
Type0 Only Type0 Only
MA_ALERT_L N34 Y34 MA_ZVDDIO_MEM_S3 R161 X_39.2R1%/4 MB_ALERT_L N37 Y36 MB_ZVDDIO_MEM_S3 R162 X_39.2R1%/4
[11] MA_ALERT_L MA_PAROUT MA_ALERT_L MA_ZVDDIO_MEM_S3 MA_ZVSS [12] MB_ALERT_L MB_PAROUT MB_ALERT_L MB_ZVDDIO_MEM_S3 MB_ZVSS
Y33 AJ37 R172 X_40.2R1%/4 AB38 AJ39 R173 X_40.2R1%/4
[11] MA_PAROUT MA_PAROUT MA_ZVSS [12] MB_PAROUT MB_PAROUT MB_ZVSS
AM4 Type2/3 Only AM4 Type2/3 Only
PART 1 OF 9 PART 2 OF 9
N12-331A040-F02 ZIF-SOCKET1331-HF N12-331A040-F02 ZIF-SOCKET1331-HF
A A

Schematic Cfg Project


MICRO-START INT'L CO.,LTD.
MS-7B86/B450 GAMING PLUS V A Title
AM4 DDR4 I/F
MS-7B86/B450-A PRO Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 3 of 68
5 4 3 2 1
5 4 3 2 1

CPU1C
PCIE
AE8 AE4 APUTXP0 C252 C0.22u6.3X/4 APU_TXP0 [15]
[15] APU_RXP0 P_HUB_RXP[0] P_HUB_TXP[0]
AD8 AE5 APUTXN0 C251 C0.22u6.3X/4 APU_TXN0 [15]
[15] APU_RXN0 P_HUB_RXN[0] P_HUB_TXN[0]
AB8 AA5 APUTXP1 C236 C0.22u6.3X/4 Promontory

u
[15] APU_RXP1 P_HUB_RXP[1] P_HUB_TXP[1] APU_TXP1 [15]
Promontory AA8 AB5 APUTXN1 C237 C0.22u6.3X/4 APU_TXN1 [15]
[15] APU_RXN1 P_HUB_RXN[1] P_HUB_TXN[1]
Y6 AC6 APUTXP2 C242 C0.22u6.3X/4 APU_TXP2 [15]
[15] APU_RXP2 P_HUB_RXP[2] P_HUB_TXP[2]

r
D Y7 AC7 APUTXN2 C247 C0.22u6.3X/4 APU_TXN2 [15] D
[15] APU_RXN2 P_HUB_RXN[2] P_HUB_TXN[2]
Not supported HUB on TYPE 1 Not supported HUB on TYPE 1
W4 AD5 APUTXP3 C239 C0.22u6.3X/4

.
[15] APU_RXP3 P_HUB_RXP[3] P_HUB_TXP[3] APU_TXP3 [15]
W5 AD6 APUTXN3 C238 C0.22u6.3X/4 APU_TXN3 [15]
[15] APU_RXN3 P_HUB_RXN[3] P_HUB_TXN[3]

AR9 AT12

7
[23] APU_GPP_RXP0 P_GPP_RXP[0] P_GPP_TXP[0] APU_GPP_TXP0 [23]
AT9 AR12 APU_GPP_TXN0 [23]
[23] APU_GPP_RXN0 P_GPP_RXN[0] P_GPP_TXN[0]
M.2 PCIe SATA M.2 PCIe
AM9 Express AP13 APU_GPP_TXP1 [26]
[26] APU_GPP_RXP1 P_GPP_RXP[1] P_GPP_TXP[1]
AM10 AR13 APU_GPP_TXN1 [26]
[26] APU_GPP_RXN1 P_GPP_RXN[1] P_GPP_TXN[1]

-b x
AR10 AL13 APU_GPP_TXP2 [23]
[23] APU_GPP_RXP2 P_GPP_RXP[2]/SATA_RX0P P_GPP_TXP[2]/SATA_TX0P
M.2 PCIe / SATA5,SATA6 AP10 AM13 APU_GPP_TXN2 [23] M.2 PCIe / SATA5,SATA6
[23] APU_GPP_RXN2 P_GPP_RXN[2]/SATA_RX0N P_GPP_TXN[2]/SATA_TX0N
Not supported PCIE on TYPE 0,1 AP11 AN14 APU_GPP_TXP3 [23] Not supported PCIE on TYPE 0,1
[23] APU_GPP_RXP3 P_GPP_RXP[3]/SATA_RX1P P_GPP_TXP[3]/SATA_TX1P
AN11 AP14 APU_GPP_TXN3 [23]
[23] APU_GPP_RXN3 P_GPP_RXN[3]/SATA_RX1N P_GPP_TXN[3]/SATA_TX1N

PCIE SATA
F6 D1 GFX_TXP0 [20]
[20] GFX_RXP0 P_GFX_RXP[0] P_GFX_TXP[0]
TYPE 0 2 2 F5 E1 GFX_TXN0 [20]
[20] GFX_RXN0 P_GFX_RXN[0] P_GFX_TXN[0]
2 2 G5 E3 GFX_TXP1 [20]
[20] GFX_RXP1 P_GFX_RXP[1] P_GFX_TXP[1]
TYPE 2/3 G4 F3
or or [20] GFX_RXN1 P_GFX_RXN[1] P_GFX_TXN[1] GFX_TXN1 [20]

d
4 0 [20] GFX_RXP2
H7 F2 GFX_TXP2 [20]
H6 P_GFX_RXP[2] P_GFX_TXP[2] G2 GFX_TXN2 [20]

.
[20] GFX_RXN2 P_GFX_RXN[2] P_GFX_TXN[2]
J6 G1 GFX_TXP3 [20]
[20] GFX_RXP3 P_GFX_RXP[3] P_GFX_TXP[3]
C J5 H1 GFX_TXN3 [20] C
[20] GFX_RXN3 P_GFX_RXN[3] P_GFX_TXN[3]
K8 H3 GFX_TXP4 [20]
[20] GFX_RXP4 P_GFX_RXP[4] P_GFX_TXP[4]

d
K7 J3 GFX_TXN4 [20]
[20] GFX_RXN4 P_GFX_RXN[4] P_GFX_TXN[4]
K5 J2 GFX_TXP5 [20]
[20] GFX_RXP5 P_GFX_RXP[5] P_GFX_TXP[5]
K4 K2 GFX_TXN5 [20] PCIe1
[20] GFX_RXN5 P_GFX_RXN[5] P_GFX_TXN[5]
Not supported GFX 4~15 on TYPE,1 L7 K1 GFX_TXP6 [20]
[20] GFX_RXP6 P_GFX_RXP[6] P_GFX_TXP[6]
L6 L1 GFX_TXN6 [20]
[20] GFX_RXN6 P_GFX_RXN[6] P_GFX_TXN[6]

m
M6 L3 GFX_TXP7 [20]
[20] GFX_RXP7 P_GFX_RXP[7] P_GFX_TXP[7]
M5 M3 GFX_TXN7 [20]
[20] GFX_RXN7 P_GFX_RXN[7] P_GFX_TXN[7]
N8 M2 GFX_TXP8 [20]
[20] GFX_RXP8 P_GFX_RXP[8] P_GFX_TXP[8]
N7 N2 GFX_TXN8 [20]
[20] GFX_RXN8 P_GFX_RXN[8] P_GFX_TXN[8]

s
N5 N1 GFX_TXP9 [20]
[20] GFX_RXP9 P_GFX_RXP[9] P_GFX_TXP[9]
N4 P1 GFX_TXN9 [20]
[20] GFX_RXN9 P_GFX_RXN[9] P_GFX_TXN[9]
P7 P3 GFX_TXP10 [20]
[20] GFX_RXP10 P_GFX_RXP[10] P_GFX_TXP[10]
P6 R3 GFX_TXN10 [20]
[20] GFX_RXN10 P_GFX_RXN[10] P_GFX_TXN[10]
Only supported on TYPE 2 R6 R2 GFX_TXP11 [20] Only supported on TYPE 2
[20] GFX_RXP11 P_GFX_RXP[11] P_GFX_TXP[11]
R5 T2 GFX_TXN11 [20]
[20] GFX_RXN11 P_GFX_RXN[11] P_GFX_TXN[11]
Not supported GFX 8~15 on TYPE 0,3
T8 T1 GFX_TXP12 [20]
[20] GFX_RXP12 P_GFX_RXP[12] P_GFX_TXP[12]
T7 U1 GFX_TXN12 [20]
[20] GFX_RXN12 P_GFX_RXN[12] P_GFX_TXN[12]
T4 U3 GFX_TXP13 [20]
[20] GFX_RXP13 P_GFX_RXP[13] P_GFX_TXP[13]
T5 V3 GFX_TXN13 [20]
B [20] GFX_RXN13 P_GFX_RXN[13] P_GFX_TXN[13] B
U7 V2 GFX_TXP14 [20]
[20] GFX_RXP14 P_GFX_RXP[14] P_GFX_TXP[14]
U6 W2 GFX_TXN14 [20]
CPU_VDDP [20] GFX_RXN14 P_GFX_RXN[14] P_GFX_TXN[14]
V6 W1 GFX_TXP15 [20]
[20] GFX_RXP15 P_GFX_RXP[15] P_GFX_TXP[15]
V5 Y1 GFX_TXN15 [20]
[20] GFX_RXN15 P_GFX_RXN[15] P_GFX_TXN[15]
Within 1500 mils from APU W7 APU_P_ZVSS R124 X_196R1%/4 Within 1500 mils from APU
Type0 Only P_ZVSS
CPU_VDDP R156 X_196R1%/4APU_P_ZVDDP W8 Type0 Only V8 APU_P0A_ZVSS R157 X_200R1%/4 Within 1500 mils from APU
P_ZVDDP Type2 Only P0A_ZVSS AT8 APU_P0B_ZVSS R196 X_200R1%/4
AM4 P0B_ZVSS Within 1500 mils from APU
C281 C843 C847 C287 R229 X_1KR1%/4 APU_SATA_ZVDDP AV7 AV6 APU_SATA_ZVSS R207 X_1KR1%/4 Within 1000 mils from APU
SATA_ZVDDP Type0 Only SATA_ZVSS
C0.1u16X7/4 C22u6.3X/6 C22u6.3X/6 C0.1u16X7/4 PART 3 OF 9
Within 1000 mils from APU
N12-331A040-F02 ZIF-SOCKET1331-HF

A A

Schematic Cfg Project


MICRO-START INT'L CO.,LTD.
MS-7B86/B450 GAMING PLUS V A Title
AM4 PCIE/SATAE
MS-7B86/B450-A PRO Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 4 of 68
5 4 3 2 1
5 4 3 2 1

R210 1KR/4 AZ_BITCLK_R EMI


R204 1KR/4 AZ_RST_R
R192 1KR/4 AZ_SYNC_R AZ_BITCLK_R C231 X_C10p50N/4
R205 1KR/4 AZ_SDOUT_R

u
CPU1D

R222 33R/4 AZ_BITCLK_R AW3 D2 For HDMI


[31] AZ_BITCLK AZ_BITCLK DP0_TXP[0] DP0_TX2P_APU [41]

r
D AZ_SDIN0 AV3 C2 D
[31] AZ_SDIN0 AZ_SDIN1 AZ_SDIN0 DP0_TXN[0] DP0_TX2N_APU [41]
AU5 C3
AZ_SDIN1 DP0_TXP[1] DP0_TX1P_APU [41]

AUDIO

DISPLAY-0
AZ_SDIN2 AV4 B3 Differential impedance = 85 ohm

.
R193 X_10KR/4 AZ_SDIN0 R221 33R/4 AZ_RST_R AU1 AZ_SDIN2 DP0_TXN[1] B4 DP0_TX1N_APU [41]
[31] AZ_RST# AZ_RST_L DP0_TXP[2] DP0_TX0P_APU [41]
R206 10KR/4 AZ_SDIN1 R234 33R/4 AZ_SYNC_R AU2 A4
[31] AZ_SYNC AZ_SYNC DP0_TXN[2] DP0_TX0N_APU [41]
R195 10KR/4 AZ_SDIN2 R211 33R/4 AZ_SDOUT_R AU4 C5
[31] AZ_SDOUT AZ_SDOUT DP0_TXP[3] DP0_CLKP_APU [41]
C6
DP0_TXN[3] DP0_CLKN_APU [41]

7
G10
DP0_AUXP DP0_AUXP [41]
H10
CPU_1P8_S5 APU_TDI DP0_AUXN DP0_AUXN [41]
A14 H9
APU_TDO TDI DP0_HPD DP0_HDMI_HPD [41]
C14
APU_TCK C15 TDO D4

-b x
APU_TMS B15 TCK DP1_TXP[0] D5 DP1_TX2P_APU [40]
For Debug1 TMS DP1_TXN[0] DP1_TX2N_APU [40] For DVI
R104 1KR/4 APU_TCK APU_TRST# B13 D7
TRST_L DP1_TXP[1] DP1_TX1P_APU [40]

DISPLAY-1
R105 1KR/4 APU_TMS APU_DBRDY E13 D8
R103 1KR/4 APU_TDI APU_DBREQ# D14 DBRDY DP1_TXN[1] F8 DP1_TX1N_APU [40]
R93 1KR/4 APU_TRST# DBREQ_L DP1_TXP[2] G8 DP1_TX0P_APU [40]
DP1_TXN[2] DP1_TX0N_APU [40] Not supported on TYPE 2
E9
R94 1KR/4 APU_DBREQ# DP1_TXP[3] F9 DP1_TX3P_APU [40]
APU_TEST0 AM6 DP1_TXN[3] DP1_TX3N_APU [40]
APU_TEST1 AM7 TEST0 F11
3VSB APU_TEST2 TEST1/TMS DP1_AUXP DP1_AUXP [40]
AT3 G11
APU_TEST4 TEST2 DP1_AUXN DP1_AUXN [40]
TP14 L23 D10
APU_TEST5 TEST4 DP1_HPD DP1_DP_HPD [40]
TP15 M22
D13 TEST5 B6
R237 X_1KR/4 APU_TEST1 AB4 TEST6 DP2_TXP[0] B7 DP2_TX0P_APU [42]

d
TEST10 DP2_TXN[0] DP2_TX0N_APU [42] For VGA
R202 X_2.2KR/4 APU_TEST0 APU_TEST11 A13 A7 AM4 Type 1 processors: DP2 is not supported
TEST11 DP2_TXP[1] DP2_TX1P_APU [42]

DISPLAY-2
R213 X_2.2KR/4 APU_TEST2 APU_TEST14 C12 A8
50724 1_13

.
APU_TEST15 B12 TEST14 DP2_TXN[1] C8 DP2_TX1N_APU [42]
TP5 TEST15 DP2_TXP[2]

TEST
For Debug2 APU_TEST16 C11 C9
C APU_TEST17 D11 TEST16 DP2_TXN[2] B9 C
TEST17 DP2_TXP[3] RV2 AM4 35W is a de-featured version
R191 15K/4 APU_TEST0 APU_TEST18 G16 B10
R236 15K/4 APU_TEST1 APU_TEST19 H16 TEST18 DP2_TXN[3] of RV1 AM4 65W, RV2 AM4 35W
TEST19 can only support 2 displays

d
R201 15K/4 APU_TEST2 APU_TEST46 AL4 A10
TP19 TEST46[13] DP2_AUXP DP2_AUXP [42]
APU_TEST47 P28 A11
TP16 TEST47 DP2_AUXN DP2_AUXN [42]
E10 Here is the example of Raven2 AM4’s DP2 function on existing AM4 board :
APU_TEST11 DP2_HPD DP2_DP_HPD [42] 1.D-sub : DP to VGA translator (e.g. ANX62xx) ok
R102 X_1KR/4
R101 X_1KR/4 APU_TEST14 APU_TEST28_H E6 F12 DP_ZVSS R100 X_2KR1%/4 2.DP : only 2 lanes can work (lane 0 and lane1)
APU_TEST17 TP10 APU_TEST28_L TEST28_H DP_ZVSS DP_AUX_ZVSS 3.DVI-D : no display (no TMDS clock on lane3)
R115 X_1KR/4 E7 E12 R90 X_150R1%/4 Type0 Only
APU_TEST16 TP9 TEST28_L DP_AUX_ZVSS DP_BLON 4.HDMI : no display (no TMDS clock on lane3)
R114 X_1KR/4 G13 by mail 2017-11-28
APU_TEST31 DP_BLON DP_DIGON TP11
AA30 H13 For Debug2
TP18 TEST31 DP_DIGON TP12

m
APU_TEST40 W30 H12 DP_VARY_BL
APU_TEST18 TP17 APU_TEST41 TEST40 DP_VARY_BL TP13
R110 1KR/4 A16 R91 1KR/4 CPU_1P8 Not support Type2
APU_TEST19 TP6 TEST41 DP_STEREOSYNC R92
R109 1KR/4 K14 X_1KR/4
DP_STEREOSYNC
AM4 K14 PIN: 不管SPEC有沒有HDMI,都需PU HIGH,

s
PART 4 OF 9 這樣使用DVI轉HDMI Dongle,接上HDMI螢幕才會有聲音輸出
N12-331A040-F02 ZIF-SOCKET1331-HF

CPU_1P8_S5
CPU_1P8_S5 20190328
HDT circuit unstuff.
R122 X_1KR/4 HDT_PWROK IB=(AMD_HDTPWR-Vbe)/4.7k
R125 X_1KR/4 HDT_RST_L (1.8-0.95)/4.7k=0.181mA
Q23
3VSB R120 X_4.7K/4 PWROK_LS 2 6 HDT_PWROK IC=(Vc-Vce)/10k B*Ib>Ic=10*0.181=1.81>0.16
B AMD_HDT1 1 B
(1.8-0.2)/10k=0.16mA
CPU_1P8_S5 1 2 APU_TCK R119 X_10KR/4 5 3 PWROK_LS
CPU_VDDIO CPU_TCK APU_TMS [6] PWROK
3 4 4 IB=(Vb-Vbe)/10k
5 GND CPU_TMS 6 APU_TDI
GND CPU_TDI (1.75-0.95)/10k=0.08mA
7 8 APU_TDO X_NN-CMKT3904 B*Ib>Ic=10*0.08=0.8>0.16
APU_TRST# R113 X_33R/4 TRST# 9 GND CPU_TDO 10 HDT_PWROK
CPU_TRST_L CPU_PWROK_BUF
IC=(Vc-Vce)/10k
R131 X_10KR/4 DBRDY3 11 12 HDT_RST_L (3.3-0.2)/10k=0.16mA
CPU_DBRDY3 CPU_RST_L_BUF
1

R132 X_10KR/4 DBRDY2 13 14 APU_DBRDY


C83 R133 X_10KR/4 DBRDY1 15 CPU_DBRDY2 CPU_DBRDY0 16 DBREQ# R127 X_22R/4 APU_DBREQ# Q24
17 CPU_DBRDY1 CPU_DBREQ_L 18 APU_TEST19 R123 X_4.7K/4 RESET_L_LS2 6 HDT_RST_L
X_C0.01u16X/4 3VSB IB=(AMD_HDTPWR-Vbe)/4.7k
2

CPU_1P8_S5 19 GND CPU_PLLTEST0 20 APU_TEST18 1


CPU_VDDIO CPU_PLLTEST1 (1.8-0.95)/4.7k=0.181mA
R126 X_10KR/4 5 3 RESET_L_LS
[6] RESET_L
X_H2X10SM-1.27PITCH_BLUE-RH 4 IC=(Vc-Vce)/10k B*Ib>Ic=10*0.181=1.81>0.16
N31-2100170-S88 (1.8-0.2)/10k=0.16mA
X_NN-CMKT3904
IB=(Vb-Vbe)/10k
(1.75-0.95)/10k=0.08mA
B*Ib>Ic=10*0.08=0.8>0.16
IC=(Vc-Vce)/10k
(3.3-0.2)/10k=0.16mA

A A

20190409 Remove

Schematic Cfg Project


MICRO-START INT'L CO.,LTD.
MS-7B86/B450 GAMING PLUS V A Title
AM4 DISPLAY/AUDIO
MS-7B86/B450-A PRO Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 5 of 68
5 4 3 2 1
5 4 3 2 1

VCC3
3VSB
SCL0 R294 2.2KR/4
C288 C0.1u16X7/4 SDA0 R295 2.2KR/4

5
U22 3VSB
VCC
A 1 APU_SLP_S3# R274 100KR/4 3VSB
[24,33,34,43,51,54,55] SLP_S3# 4 Y
SCLK1 R183 2.2KR/4
B 2 APU_S0A3_GPIO R199 2.2KR/4 SDATA1 R182 2.2KR/4
20190409 Rvmove

u
GND
SN74LVC1G08DBVR_SOT23-5

3
T70-7SZ0800-T07

r
D
VCC3 D

SLP_S3# R273 X_0R/4 APU_SLP_S3# AGPIO5_DEVSLP0 R255

.
10KR/4
by check list
Within 500mils

7
CPU1E
VCC3 PWROK
[5] PWROK RESET_L
[46] APU_SVC R118 X_R/4 SVC D17 AU25 SCL0 R293 0R/4 SCLK0 [9,11,29,34,46,56]
[5] RESET_L SVC SCL0/I2C2_SCL/EGPIO113

SVI
AV25 SDA0 R296 0R/4 SDATA0 [9,11,29,34,46,56]

SMBus
R107 1KR/4 APU_ALERT# R117 X_R/4 SVD C17 SDA0/I2C2_SDA/EGPIO114
Add for HDT and

-b x
[46] APU_SVD SVD
R82 1KR/4 APU_PROCHOT# AK3 SCLK1 [20]
R111 1KR/4 APU_THERMTRIP# close to PIN E16 & B16 [46] APU_SVT
R116 X_R/4 SVT A17
SVT
SCL1/I2C3_SCL/AGPIO19
SDA1/I2C3_SDA/AGPIO20
AK2 SDATA1 [20]
CPU_1P8
3VSB R86 X_R/4 PWROK E16
[46] APU_PWROK PWROK
AM3 AT6 AGPIO3 [7]
[55] ALL_PWR_PWRGD PWR_GOOD AGPIO3

ACPI
R89 1KR/4 APU_SIC R209 10KR/4 PWRBTN# KBRST# D15 RESET_L B16 AR6 M.2_1_DET For CNTL M.2 PCIE or SATA
APU_SID APU_AM4R1 RESET_L AGPIO4 AGPIO5_DEVSLP0 M.2_1_DET [23,26]
R96 1KR/4 R248 X_10KR/4 3.3V X_S-LRB520S-40T1G 1.8V AP22 AGPIO5_DEVSLP0 [26]
R223 10KR/4 BLINK APU_PROCHOT# H15 AGPIO5/DEVSLP0 AN8
R214 10KR/4 WAKE_L APU_THERMTRIP# A19 PROCHOT_L AGPIO6 AP7
[56] APU_THERMTRIP# THERMTRIP_L AGPIO8
R106 300R/4 PWROK R203 10KR/4 PCIE_RST AN2
AGPIO9/SGPIO0_DATAOUT HW_BIOS_MODE [22,23]
R108 300R/4 RESET_L C220 X_C100p50N/4 AN3
APU_SLP_S3# AT2 AGPIO23/SGPIO0_LOAD AR4
[9] APU_SLP_S3# SLP_S3_L AGPIO40/SGPIO0_DATAIN VCC3
AP2 AW17

d
Follow CRB [9,24,33,34,43,44,45] SLP_S5# SLP_S5_L AGPIO86
APU_S0A3_GPIO AR3 AV22 GENINT1_L

GPIO
AP4 S0A3_GPIO/AGPIO10/SGPIO0_CLK GENINT1_L/AGPIO89 AU23 R231 8.2K/4 GENINT1_L

.
CPU_1P8_S5 S5_MUX_CTRL/EGPIO42 GENINT2_L/AGPIO90 AM22 SATA_LED# R232 X_10KR/4
SATA_ACT_L/AGPIO130 SATA_LED# [15,57]
PWRBTN# AN5 AMD Hardware Validated Boot
[9,24] PWRBTN# PWR_BTN_L/AGPIO0 (HVB)
C BLINK AT5 AT18 C
AW23 BLINK/AGPIO11 EGPIO70 AW11 0 or NC:Disable
[57] SPKR SPKR/AGPIO91 EGPIO95 1:Enable
R235 22KR/4 RSMRST# AV12
EGPIO96

d
RSMRST# AP5 AW12 GPIO97_CPU [58]
[24,55] RSMRST# RSMRST_L EGPIO97
AM4 AU13 GPIO98_DRAM [58]
[7,53,55,57] SYSREST# PCIE_RST AL7 SYS_RESET_L/AGPIO1 EGPIO98
C241 [25] PCIE_REST# R220 33R/4 AV13 GPIO99_VGA [58] GPIO97~100 for Debug LED
C259 C1u6.3X/4 KBRST# R260 X_R/4 KBRST_L AN24 PCIE_RST_L/EGPIO26 EGPIO99 AT14
[24] KBRST# ESPI_RESET_L/KBRST_L EGPIO100 GPIO100_DEVICE [58] VCC3

MISC
C10u6.3X5/6
R219 X_R/4 WAKE_L AL5
[17,20,21,26] APU_WAKE# WAKE_L/AGPIO2 SATA_LED#
AL2 R258 560R/4
[17,24] APU_LPC_PME# LPC_PME_L/AGPIO22

m
AT23
APU_SIC B18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 AV24 CLK_REQ1
[24] APU_SIC SIC CLK_REQ1_L/AGPIO115 CLK_REQ1 [17]
Q18 IB=(Vcc3-Vbe)/4.7k APU_SID C18 AT24 CLK_REQ2_M.2
[24] APU_SID SID CLK_REQ2_L/AGPIO116 CLK_REQ2_M.2 [26]
R85 4.7K/4 PROCHOT#_LS 2 6 APU_PROCHOT# (3.3-0.95)/4.7k=0.5mA APU_ALERT# D16 AL23
VCC3 ALERT_L CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
1 AR22 CLK_REQG
CLK_REQG_L/OSCIN/EGPIO132

s
5 3 PROCHOT#_LS IC=(VCC2-Vce)/1k 3VSB 11/20
[24,46] PROCHOT#
4 (3.3-0.2)/1k=3.1mA APU_AM4R1 AL8
[43,45,52,55] APU_AM4R1 AM4R1 AL1 APU_USB_OC#
USB_OC0_L/AGPIO16 APU_USB_OC# [35] APU_USB_OC#
NN-CMKT3904 CORETYPE0 AM24 AM1 R184 200KR/4
CORETYPE1 AN9 CORETYPE[0] USB_OC1_L/TDI/AGPIO17 AR1
IB=(Vcc3-Vbe)/4.7k

OC
CORETYPE[1] USB_OC2_L/TCK/AGPIO18
HDMI+USB (USB3.0)
(3.3-0.95)/4.7k=0.5mA AP1 USB(2.0)
USB_OC3_L/TDO/AGPIO24
IC=(VCC2-Vce)/4.7k

FAN
(3.3-0.2)/1k=0.65mA TP22 AGPIO84 AN23
20180402 AP23 FANIN0/AGPIO84 F14
Connect GP_6516 to [42] GP_6516 FANOUT0/AGPIO85 VDDCR_CPU_SENSE VDDCR_CPU_SENSE+ [46]
E15 VDDCR_SOC_SENSE+ [46]
AGPIO85. VDDCR_SOC_SENSE

[7] RTCCLK AP8


RTCCLK G14

SENSE
VDDIO_MEM_S3_SENSE VDDIO_MEM_S3_SENSE [45]
APU_32K_X1 AW5 F15 VSS_SENSE_A CP20 X_COPPER
B X32K_X1 VSS_SENSE_A VDDCR_CPU_SENSE- [46]

RTC
CP19 X_COPPER B
VDDCR_SOC_SENSE- [46]
Turn off power when
AL22 CPU_VDDP_SENSE
BIOS into deep mode APU_32K_X2 AW6 VDDP_SENSE AM23 VSS_SENSE_B
CPU_VDDP_SENSE [52]
X32K_X2 VSS__SENSE_B TP20
APU_AM4R1
AM4
PART 5 OF 9 VCC3
D
Q52 N12-331A040-F02 ZIF-SOCKET1331-HF
[24,43,54] DEEP_S5 G
CLK_REQ1
S N-2N7002 R2553 X_10KR/4
R256 X_10KR/4 CLK_REQ2_M.2

Layout:Place x'tal within 1.5 inch of APU CORETYPE R292 10KR/4 CLK_REQ1
AM4 CPU TYPE Circuit CPU TYPE 1 0 R246
R245
X_10KR/4
10KR/4
CLK_REQ2_M.2
CLK_REQG
APU_32K_X2
20190329 BR 0 0 0
ATX_5VSB
Remove TYPE1_CPU_SEL, not support BR.
NA 0 1
Y6
2 1 APU_32K_X1 CPU_1P8_S5 R389 TYPE1_CPU_SEL Schematic Cfg Project
SR 2 1 0 47KR/4 0:BR/NA
32.768KHZ12.5p R324
1KR/4 1:ST/RV/ZP MS-7B86/B450 GAMING PLUS V A
A 3VSB RV/ZP 3 1 1 R391
1KR/4
MS-7B86/B450-A PRO A

R208 20MR/6 TYPE0_CPU_SEL [7,52,55]


R390

C
20190410 Remove 4.7K/4
C226 C225 20190410 Remove CORETYPE0 CORETYPE0R B
C15p50N/6 C15p50N/6
CORETYPE0 Q57
IB=(CPU_1P8_S5-Vbe)/5.7k
(1.8-0.95)/5.7k=0.149mA MICRO-START INT'L CO.,LTD.
E

0:BR/SR N-SST3904_SOT23 Title


[23,35] CORETYPE1 CORETYPE1 IC=(VCC5-Vce)/47k AM4 SVI/ACPI/GPIO
PLACE THESE COMPONENTS CLOSE TO 1:RV/ZP (5-0.2)/47k=0.102mA
U600, AND USE GROUND GUARD FOR Size Document Number Rev
32K_X1 AND 32K_X2 Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 6 of 68
5 4 3 2 1
5 4 3 2 1

EMI
LPCCLK1

TPM_LPCCLK0 C249
C248 X_C10p50N/4

X_C10p50N/4
Strapping Options
VCC3 PWR_1P8B_SW VCC3
CPU1F
11/20 LPC/SPI/USB/CLOCK
33M R230 0R/4 LPCCLK0 AU20 AR7 APU_48M_OSC

u
[57] TPM_LPCCLK0 LPCCLK0/EGPIO74 48M_OSC
33M R251 0R/4 LPCCLK1 AU19 TP21 R242 R253 R239
[24] SIO_LPCCLK1 LPCCLK1/EGPIO75
10KR/4 10KR/4 10KR/4
AW20 AU7
[24,57] LPC_AD0 LAD0/EGPIO104 USB_HSD0P APU_USB0+ [35]

r
D AV21 AU8 D
[24,57] LPC_AD1 LAD1/EGPIO105 USB_HSD0N APU_USB0- [35] SPI_CLK_R
AT21 HDMI+USB3.0 LPCCLK1 LPCCLK0
[24,57] LPC_AD2 LAD2/EGPIO106

LPC
AT20 AW8

.
[24,57] LPC_AD3 LAD3/EGPIO107 USB_HSD1P APU_USB1+ [35]
AW9
USB_HSD1N APU_USB1- [35]

USB2.0
[24,57] LPC_LFRAME# AW18
AT15 LFRAME_L/EGPIO109 AU10 R226 R244 R218
[24] LPC_LDRQ0# ESPI_ALERT_L/LDRQ0_L/EGPIO108 USB_HSD2P
[24,57] LPC_SERIRQ AW21 AU11 remove LED MCU X_2K/4 X_2K/4 X_2K/4
R227 2K/4 LPC_CLKRUN AV19 SERIRQ/AGPIO87 USB_HSD2N

7
AV18 LPC_CLKRUN_L/AGPIO88 AV9
LPC_RST# R313 33R/4 LPC_RST_L AU22 LPC_PD_L/AGPIO21 USB_HSD3P AV10
[24,57] LPC_RST# LPC_RST_L USB_HSD3N
C338 C150p50N/4
follow CRB

-b x
SPI_CLK R252 10R/4 SPI_CLK_R AW14 AF3
LPCCLK1 SPI_CLK LPCCLK0
SPI_CLK/ESPI_CLK/EGPIO117 USB_SS_0TXP APU_USB_SSTX0+ [35]
[34] SPI_CS#
SPI_CS# AT17
SPI_CS1_L/EGPIO118 USB_SS_0TXN
AF4
APU_USB_SSTX0- [35] (Type4 CPU)

SPI
AW15
SPI_DATAIN AU14 SPI_CS2_L/ESPI_CS_L/EGPIO119 Y3
SPI_DATAOUT SPI_DI/ESPI_DAT1/EGPIO120 USB_SS_0RXP APU_USB_SSRX0+ [35]
AU16 Y4 PULL Configured for Use 48Mhz crystal clock 32MB ROM
SPI_WP#_R SPI_DO/ESPI_DAT0/EGPIO121 USB_SS_0RXN APU_USB_SSRX0- [35]
AV16 HDMI+USB3.0 HIGH Internal clock generator and generate both internal
SPI_HOLD#_R AV15 SPI_WP_L/ESPI_DAT2/EGPIO122 AB1

USB3.0
AU17 SPI_HOLD_L/ESPI_DAT3/EGPIO133 USB_SS_1TXP AC1
APU_USB_SSTX1+ [35] and external clocks
[23,26] M.2_1_CARD_DET SPI_TPM_CS_L/AGPIO76 USB_SS_1TXN APU_USB_SSTX1- [35]
(Default)
AA2 (Default) (Default)
USB_SS_1RXP APU_USB_SSRX1+ [35]
AA3
USB_SS_1RXN APU_USB_SSRX1- [35]
[20] PE16_GFX_CLKP AF6
AF7 GFX_CLKP AC3
PCIE X16 [20] PE16_GFX_CLKN GFX_CLKN USB_SS_2TXP Configured for <=16MB ROM
AC4

d
USB_SS_2TXN PULL External clock generator Use 100Mhz PCIE clock as
AG5 LOW reference clock and generate
AG6 GPP_CLK0P AD2 ?????
internal clocks only

.
GPP_CLK0N USB_SS_2RXP AE2
AH4 USB_SS_2RXN
[17] APU_CLKP GPP_CLK1P
C Promontory [17] APU_CLKN AH5 AG2 C
GPP_CLK1N USB_SS_3TXP AG3
AH7 USB_SS_3TXN
[26] CLK_M2_DP GPP_CLK2P

CLOCK

d
M.2_1 [26] CLK_M2_DN AH8 AE1 3VSB VCC3 3VSB
GPP_CLK2N USB_SS_3RXP AF1
AJ6 USB_SS_3RXN
AJ7 GPP_CLK3P Only Support Type0
GPP_CLK3N
AJ4 USB_SS_ZVSS R175 X_1KR1%/4 R212 R240 R188
USB_SS_ZVSS AK8 USB_SS_ZVDDP R177 X_1KR1%/4
USB_SS_ZVDDP CPU_VDDP_S5 10KR/4 10KR/4 10KR/4
APU_48M_X1 AJ1
X48M_X1

m
AT11 USB_ZVSS R197 X_11.8K1%/4
USB_ZVSS LPC_LFRAME#
[6] AGPIO3 [6,53,55,57] SYSREST#
AJ3 USB0_ZVSS R174 X_200R1%/4
USB0_ZVSS AN6 USB1_ZVSS R181 X_200R1%/4
USB1_ZVSS AK6 USB2_ZVSS R176 X_200R1%/4
USB2_ZVSS

s
APU_48M_X2 AH1 AK5 USB3_ZVSS R179 X_200R1%/4 R194 R225 R187
X48M_X2 USB3_ZVSS
X_2KR1%/4 X_2K/4 X_2K/4
Within 1000 mils from APU
AM4
PART 6 OF 9 VDDP_S5
(S5 Wake
ZIF-SOCKET1331-HF Only Support Type2/3 Implemented)
N12-331A040-F02 or
VDDP
(S5 Wake Not
Implemented)
AGPIO3 SIO_LFRAME SYSREST#

PULL
Schematic Cfg Project HIGH Enhanced SPI ROM Normal reset
Reset logic mode
MS-7B86/B450 GAMING PLUS
B B
V A
(Default)
MS-7B86/B450-A PRO (Default) (Default)
20190402 SPI1 change to 32MByte
20190409 SPI1 footprint
->"SIC8_SST_S2A_COLAY_T" for colay PULL Traditional short reset
LOW Reset logic LPC ROM mode
16M.
SPI ROM(1.8V) PWR_1P8B_SW
AMD SPEC no stuff
R374 X_10KR/4 SPI_HOLD#
Layout:Place x'tal within 1.5 inch of APU PWR_1P8B_SW R362 X_10KR/4 SPI_WP#
AVL:M31-2512883-W03 R376 10KR/4 SPI_CS# CPU_1P8_S5
APU_48M_X2 C394 C10u6.3X5/6
RTCCLK PULL DOWN 10K(DNI)
SPI1 C395 C0.1u16X7/4 (Type 4 only)
R2556 SPI_CS# R377 X_R/4CS# 1 8 11-15
0R/4 SPI_DATAIN R378 0R/4 DATAIN 2 CS VCC 7 SPI_HOLD#R375 X_R/4SPI_HOLD#_R
[34] 504_DATAIN DO(IO1) HOLD(IO3)
SPI_WP#_R R366 X_R/4SPI_WP# 3 6 SPI_CLK R2555 0R/4 R238
WP(IO2) CLK 504_CLK [34]
R170 1MR/6 APU_48M_X1 R close SPI ROM 4 5 DATAOUT R365 0R/4 SPI_DATAOUT R2554 0R/4 X_10KR/4
GND DI(IO0) 504_DATAOUT [34]
MX25U25673GZ4I40-HF change footprint co-lay R close SPI ROM
R171 M31-2567300-M24 [6] RTCCLK
49.9R1%0402 SPI CS# < 20pF ATX_5VSB CPU_1P8
Y5 PWR_1P8B_SW PWR_1P8B_SW
3 4
D0G-0402510-SI0
APU_48M_R

GND
2 GND
1 R228
JSPI1 R398 X_10KR/4
48MHZ12p_S-HF 1 2 47KR/4 D03-PA00209-N03

D
SPI_DATAIN 3 4 SPI_DATAOUT
A D04-2501000-T16 SPI_CS# 5 6 SPI_CLK SPI_PWR_SW G Q58
A

C186 C189 7 8 P-PA002FMG


X_ESD-SFI0402-050E100NP

C8.2p50N/4 C8.2p50N/4 SPI_SW_SEL 9 TYPE0_CPU_SEL: CPU_1P8_S5

S
D35 SPI_WP#_R 11 12 SPI_HOLD#_R PWR_1P8B_SW
0:CPU_1P8_S5 (Type1,3)
1

H2X6[10]M-2PITCH_BLACK-RH-3 1:CPU_1P8(Type2) G
D
Q56
PLACE THESE COMPONENTS CLOSE TO U600, AND USE
GROUND GUARD FOR48M_X1 AND 48M_X2
D36
C0.1u16X7/4
N31-2061451-H06 S
MICRO-START INT'L CO.,LTD.
D
TYPE0_CPU_SEL Q59 Title
[6,52,55] TYPE0_CPU_SEL
2

S N-2N7002 AM4 LPC/SPI/USB/CLK/STRAP


變成0.1u N-PM514BA_SOT23-3-HF
D03-514BA09-N03 Size Document Number Rev
R388 X_R/4 SPI_SW_SEL Custom
[34,55] ALL_PWR_MUX MS-7B86 30
P.S Close to JSPI1
Date: Wednesday, April 17, 2019 Sheet 7 of 68
5 4 3 2 1
5 4 3 2 1

20190328 unstuff OCP=3.8A VDDIO_AUDIO Circuit


3VSB
5VDUAL
1.5V@0.25A TOP SIDE
R438 X_10R/4CPU_V_AUDIO_CNTL C485 X_C1u6.3X/4 VDDIO_AUDIO
VCORE VCCP_NB VCC_DDR CPU_1P8
X_GS7133SO-R_PSOP8-HF
R440 I31-7133S02-N03 CPU_1P8_S5 R269 0R/6 C81 X_C22u6.3X5/8

4
X_10KR1%/4 U41 CPU_V_1P5V R421 X_0R/6 C72 X_C22u6.3X5/8 C54 X_C22u6.3X5/8 C295 C22u6.3X/6

EC29 +

EC17 +
1 C53 X_C22u6.3X5/8 C301 C22u6.3X/6

VDD
u
POK 6 C76 X_C22u6.3X/6 C52 X_C22u6.3X5/8 C266 C22u6.3X/6
VOUT CPU_V_1P5V

1
CPU_V_AUDIO_EN 2 C87 X_C22u6.3X/6 C51 X_C22u6.3X5/8
EN R1 C118 X_C22u6.3X/6 C55 X_C22u6.3X5/8 C96 C292 C0.22u6.3X/4

r
VCORE

CD560u6.3SO

CD560u6.3SO
D C500 3 C467 R429 C200 X_C22u6.3X/6 C56 X_C22u6.3X5/8 X_C1u6.3X/6 C273 C0.22u6.3X/4 D
3VSB

2
CPU1H VCCP_NB VIN X_C560p50X/4 X_10KR1%/4 C190 X_C22u6.3X/6
POWER X_C0.1u16X7/4 7 CPU_V_AUDIO_FB C132 X_C22u6.3X/6 C597 X_C22u6.3X/6 C275 C0.1u16X7/4

GND

GND
.
M7 B5 5 FB
VDDCR_CPU_0 VDDCR_SOC_0 NC
VFB=0.8 R2
N3 B8 C501 C463 C69 X_C2.2u6.3X/4 C84 X_C0.1u16X7/4
N6 VDDCR_CPU_1 VDDCR_SOC_1 B11 X_C10u6.3X5/6 R426 C73 X_C2.2u6.3X/4
X_C22u6.3X/6

9
P2 VDDCR_CPU_2 VDDCR_SOC_2 B14 X_11.3KR1%/4 C161 X_C2.2u6.3X/4
R7 VDDCR_CPU_3 VDDCR_SOC_3 B17 C221 X_C2.2u6.3X/4
Vout = Vref * (1 +(R1/R2))

7
T3 VDDCR_CPU_4 VDDCR_SOC_4 B20
T6 VDDCR_CPU_5 VDDCR_SOC_5 C4 = 0.8 * (1 +(10K/11.3K)) C74 X_C0.1u16X7/4
T9 VDDCR_CPU_6 VDDCR_SOC_6 C7 = 1.507V C95 X_C0.1u16X7/4
VDDCR_CPU_7 VDDCR_SOC_7
AVL: I31-3730S02-N62
U2 C10 C208 X_C0.1u16X7/4
U10 VDDCR_CPU_8 VDDCR_SOC_8 C13 C215 X_C0.1u16X7/4

-b x
V9 VDDCR_CPU_9 VDDCR_SOC_9 C16
V11 VDDCR_CPU_10 VDDCR_SOC_10 C19
VDDCR_CPU_11 VDDCR_SOC_11 15.5A
W3 D3
W6 VDDCR_CPU_12 VDDCR_SOC_12 E2 VCC_DDR CPU1G CPU_VDDP
VDDCR_CPU_13 VDDCR_SOC_13 8.5A VCC3 CPU_VDDP_S5 3VSB
W10 F7 POWER
W12 VDDCR_CPU_14 VDDCR_SOC_14 F10 K36 AM18
Y2 VDDCR_CPU_15 VDDCR_SOC_15 F13 K39 VDDIO_MEM_S3_0 VDDP_0 AM19
Y9 VDDCR_CPU_16 VDDCR_SOC_16 F16 L32 VDDIO_MEM_S3_1 VDDP_1 AM20 C263 C10u6.3X5/6 C260 C10u6.3X5/6 C261 C10u6.3X5/6
Y11 VDDCR_CPU_17 VDDCR_SOC_17 G3 L35 VDDIO_MEM_S3_2 VDDP_2 AN18
Y13 VDDCR_CPU_18 VDDCR_SOC_18 G6 L38 VDDIO_MEM_S3_3 VDDP_3 AN19 C253 C0.22u6.3X/4 C257 C0.22u6.3X/4 C230 C0.22u6.3X/4
AA7 VDDCR_CPU_19 VDDCR_SOC_19 G9 M29 VDDIO_MEM_S3_4 VDDP_4 AN20
AA10 VDDCR_CPU_20 VDDCR_SOC_20 G12 M31 VDDIO_MEM_S3_5 VDDP_5 AP18
AA12 VDDCR_CPU_21 VDDCR_SOC_21 G15 M34 VDDIO_MEM_S3_6 VDDP_6 AP19
AB3 VDDCR_CPU_22 VDDCR_SOC_22 G18 M37 VDDIO_MEM_S3_7 VDDP_7 AP20 20190409

d
AB6 VDDCR_CPU_23 VDDCR_SOC_23 H2 N28 VDDIO_MEM_S3_8 VDDP_8
AB9 VDDCR_CPU_24 VDDCR_SOC_24 J7 N30 VDDIO_MEM_S3_9 Not support BR CPU, C304, C262, Remove.

.
VDDCR_CPU_25 VDDCR_SOC_25 VDDIO_MEM_S3_10

BOTTOM SIDE TOP CAVITY


AB11 J10 N33 AM15 VDDIO_AUDIO 0.25A
AB13 VDDCR_CPU_26 VDDCR_SOC_26 J12 N36 VDDIO_MEM_S3_11 VDDIO_AUDIO C255 C0.22u6.3X/4
C AC2 VDDCR_CPU_27 VDDCR_SOC_27 J14 N39 VDDIO_MEM_S3_12 C258 C10u6.3X5/6 C
AC10 VDDCR_CPU_28 VDDCR_SOC_28 J16 P27 VDDIO_MEM_S3_13 AJ20 VCORE CPU_1P8 CPU_1P8_S5 VCORE
VDDCR_CPU_29 VDDCR_SOC_29 VDDIO_MEM_S3_14 VDD_18_0 CPU_1P8 2A
AC12 K3 P29 AK20
VDDCR_CPU_30 VDDCR_SOC_30 VDDIO_MEM_S3_15 VDD_18_1

d
AD7 K6 P32
AD9 VDDCR_CPU_31 VDDCR_SOC_31 K9 P35 VDDIO_MEM_S3_16 AJ21 C798 C22u6.3X/6 C844 C0.22u6.3X/4 C846 C10u6.3X5/6 C150 C22u6.3X/6
VDDCR_CPU_32 VDDCR_SOC_32 VDDIO_MEM_S3_17 VDD_33_0 VCC3 0.25A
AD11 K11 P38 AK21 C800 C22u6.3X/6 C148 C22u6.3X/6
AD13 VDDCR_CPU_33 VDDCR_SOC_33 K13 R28 VDDIO_MEM_S3_18 VDD_33_1 C801 C22u6.3X/6 C845 C0.22u6.3X/4 C168 C22u6.3X/6
AE3 VDDCR_CPU_34 VDDCR_SOC_34 K15 R31 VDDIO_MEM_S3_19 C802 C22u6.3X/6 C169 C22u6.3X/6
AE6 VDDCR_CPU_35 VDDCR_SOC_35 L2 R34 VDDIO_MEM_S3_20 C812 C22u6.3X/6 VCCP_NB C153 C22u6.3X/6
AE10 VDDCR_CPU_36 VDDCR_SOC_36 L10 R37 VDDIO_MEM_S3_21 AJ16
VDDCR_CPU_37 VDDCR_SOC_37 VDDIO_MEM_S3_22 VDDP_S5_0 CPU_VDDP_S5 1A
AE12 L12 T27 AJ17 C813 C22u6.3X/6 C771 C22u6.3X/6 C149 C22u6.3X/6
VDDCR_CPU_38 VDDCR_SOC_38 VDDIO_MEM_S3_23 VDDP_S5_1

m
AF2 L14 T29 C814 C22u6.3X/6 C782 C22u6.3X/6 C166 C22u6.3X/6
AF9 VDDCR_CPU_39 VDDCR_SOC_39 L16 T33 VDDIO_MEM_S3_24 C815 C22u6.3X/6 C765 C22u6.3X/6 C167 C22u6.3X/6
AF11 VDDCR_CPU_40 VDDCR_SOC_40 L18 T36 VDDIO_MEM_S3_25 AJ15 C816 C22u6.3X/6 C763 C22u6.3X/6 C170 C22u6.3X/6
VDDCR_CPU_41 VDDCR_SOC_41 VDDIO_MEM_S3_26 VDD_18_S5_0 CPU_1P8_S5 0.5A
AF13 L20 T39 AK15 C817 C22u6.3X/6 C764 C22u6.3X/6 VCC_DDR C151 C22u6.3X/6
AG7 VDDCR_CPU_42 VDDCR_SOC_42 L22 U28 VDDIO_MEM_S3_27 VDD_18_S5_1
VDDCR_CPU_43 VDDCR_SOC_43 VDDIO_MEM_S3_28

s
AG10 L24 U30 C818 C22u6.3X/6 C785 C22u6.3X/6 C152 C22u6.3X/6
AG12 VDDCR_CPU_44 VDDCR_SOC_44 L26 U32 VDDIO_MEM_S3_29 AJ19 C819 C22u6.3X/6 C783 C22u6.3X/6 C773 C0.22u6.3X/4 C839 C22u6.3X/6
VDDCR_CPU_45 VDDCR_SOC_45 VDDIO_MEM_S3_30 VDD_33_S5_0 3VSB 0.25A
AG14 M9 U35 AK19 C761 C22u6.3X/6 C807 C180P50N/4
AG16 VDDCR_CPU_46 VDDCR_SOC_46 M11 U38 VDDIO_MEM_S3_31 VDD_33_S5_1 C832 C180P50N/4 C784 C22u6.3X/6
AG18 VDDCR_CPU_47 VDDCR_SOC_47 M13 V27 VDDIO_MEM_S3_32 C766 C22u6.3X/6
AG20 VDDCR_CPU_48 VDDCR_SOC_48 M15 V29 VDDIO_MEM_S3_33 AL15
VDDCR_CPU_49 VDDCR_SOC_49 VDDIO_MEM_S3_34 VDDBT_RTC_G VDDBT_RTC_G 4.5uA
AG22 M17 V31 C270 C1u6.3X/4 C750 C180P50N/4 C835 X_C22u6.3X/6
AG24 VDDCR_CPU_50 VDDCR_SOC_50 M19 V34 VDDIO_MEM_S3_35 C269 C0.22u6.3X/4 C805 X_C22u6.3X/6
AG26 VDDCR_CPU_51 VDDCR_SOC_51 M21 V37 VDDIO_MEM_S3_36 AM12 C778 X_C22u6.3X/6 C777 X_C22u6.3X/6 VCCP_NB
AH3 VDDCR_CPU_52 VDDCR_SOC_52 M23 W28 VDDIO_MEM_S3_37 RSVD_0 AT25 C840 X_C22u6.3X/6 C822 X_C22u6.3X/6
AH6 VDDCR_CPU_53 VDDCR_SOC_53 M25 W33 VDDIO_MEM_S3_38 RSVD_1 AR15 C797 X_C22u6.3X/6 C772 X_C2.2u6.3X/4 C136 C22u6.3X/6
AH9 VDDCR_CPU_54 VDDCR_SOC_54 N10 W34 VDDIO_MEM_S3_39 RSVD_2 AP15 C743 X_C2.2u6.3X/4 C740 X_C2.2u6.3X/4 C137 C22u6.3X/6
AH11 VDDCR_CPU_55 VDDCR_SOC_55 N12 W36 VDDIO_MEM_S3_40 RSVD_3 AN12 C781 X_C22u6.3X/6 C767 X_C2.2u6.3X/4 C769 X_C2.2u6.3X/4 C138 C22u6.3X/6
AH13 VDDCR_CPU_56 VDDCR_SOC_56 N14 W39 VDDIO_MEM_S3_41 RSVD_4 AN15 C753 X_C2.2u6.3X/4 C806 X_C2.2u6.3X/4 C139 C22u6.3X/6
AH15 VDDCR_CPU_57 VDDCR_SOC_57 N16 Y27 VDDIO_MEM_S3_42 RSVD_5 AT30 C779 X_C22u6.3X/6 C747 X_C2.2u6.3X/4 C786 X_C2.2u6.3X/4 C140 C22u6.3X/6
B AH17 VDDCR_CPU_58 VDDCR_SOC_58 N18 Y29 VDDIO_MEM_S3_43 RSVD_6 AW24 C795 X_C22u6.3X/6 C824 X_C2.2u6.3X/4 B
AH19 VDDCR_CPU_59 VDDCR_SOC_59 N20 Y31 VDDIO_MEM_S3_44 RSVD_7 AR24 C780 X_C22u6.3X/6 C759 X_C2.2u6.3X/4 C793 X_C2.2u6.3X/4
AH21 VDDCR_CPU_60 VDDCR_SOC_60 N22 Y32 VDDIO_MEM_S3_45 RSVD_8 A5 C796 X_C22u6.3X/6 C760 X_C2.2u6.3X/4 C825 X_C2.2u6.3X/4
AH23 VDDCR_CPU_61 VDDCR_SOC_61 N24 Y35 VDDIO_MEM_S3_46 RSVD_9 AD3 C799 X_C22u6.3X/6 C755 X_C2.2u6.3X/4
AH25 VDDCR_CPU_62 VDDCR_SOC_62 N26 Y38 VDDIO_MEM_S3_47 RSVD_10 AB2 C754 X_C2.2u6.3X/4 C738 X_C2.2u6.3X/4
AH27 VDDCR_CPU_63 VDDCR_SOC_63 P9 AA28 VDDIO_MEM_S3_48 RSVD_11 AH2 C790 X_C2.2u6.3X/4 C757 X_C2.2u6.3X/4 C794 X_C2.2u6.3X/4
AJ2 VDDCR_CPU_64 VDDCR_SOC_64 P11 AA34 VDDIO_MEM_S3_49 RSVD_12 AL16 C821 X_C2.2u6.3X/4 C787 X_C2.2u6.3X/4
AJ10 VDDCR_CPU_65 VDDCR_SOC_65 P13 AA37 VDDIO_MEM_S3_50 RSVD_13 AL17 C809 X_C2.2u6.3X/4 C736 X_C2.2u6.3X/4 VCC_DDR
AJ12 VDDCR_CPU_66 VDDCR_SOC_66 R10 AB27 VDDIO_MEM_S3_51 RSVD_14 AL18 C833 X_C2.2u6.3X/4 C762 X_C2.2u6.3X/4 C829 X_C2.2u6.3X/4
AJ14 VDDCR_CPU_67 VDDCR_SOC_67 R12 AB29 VDDIO_MEM_S3_52 RSVD_15 AL19 C837 X_C2.2u6.3X/4 C811 X_C2.2u6.3X/4 C131 C22u6.3X/6
AJ22 VDDCR_CPU_68 VDDCR_SOC_68 T11 AB31 VDDIO_MEM_S3_53 RSVD_16 AL20 C735 X_C0.22u6.3X/4 C752 X_C2.2u6.3X/4 C144 C22u6.3X/6
AJ24 VDDCR_CPU_69 VDDCR_SOC_69 T13 AB32 VDDIO_MEM_S3_54 RSVD_17 AL21 C789 X_C2.2u6.3X/4 C748 X_C0.22u6.3X/4 C155 C22u6.3X/6
AK7 VDDCR_CPU_70 VDDCR_SOC_70 U12 AB33 VDDIO_MEM_S3_55 RSVD_18 AM16 C830 X_C2.2u6.3X/4 C756 X_C0.22u6.3X/4 C770 X_C0.22u6.3X/4 C171 C22u6.3X/6
AK9 VDDCR_CPU_71 VDDCR_SOC_71 V13 AB36 VDDIO_MEM_S3_56 RSVD_19 AM17 C841 X_C2.2u6.3X/4 C744 X_C0.22u6.3X/4 C741 X_C0.22u6.3X/4 C141 X_C22u6.3X/6
AK11 VDDCR_CPU_72 VDDCR_SOC_72 AB39 VDDIO_MEM_S3_57 RSVD_20 AM21 C746 X_C0.22u6.3X/4 C774 X_C0.22u6.3X/4
AK13 VDDCR_CPU_73 AC28 VDDIO_MEM_S3_58 RSVD_21 AN16 C776 X_C0.22u6.3X/4 C135 X_C22u6.3X/6
AL3 VDDCR_CPU_74 AC30 VDDIO_MEM_S3_59 RSVD_22 AN17 C804 X_C0.22u6.3X/4 C742 X_C0.22u6.3X/4 C788 X_C0.22u6.3X/4 C147 X_C22u6.3X/6
AL6 VDDCR_CPU_75 AC32 VDDIO_MEM_S3_60 RSVD_23 AN21 C831 X_C0.22u6.3X/4 C734 X_C0.22u6.3X/4 C826 X_C0.22u6.3X/4 C160 X_C22u6.3X/6
AL10 VDDCR_CPU_76 AC35 VDDIO_MEM_S3_61 RSVD_24 AP16 C810 X_C0.22u6.3X/4 C749 X_C0.22u6.3X/4 C836 X_C0.22u6.3X/4
AL12 VDDCR_CPU_77 AC38 VDDIO_MEM_S3_62 RSVD_25 AP17 C828 X_C0.22u6.3X/4 C758 X_C0.22u6.3X/4 C739 X_C0.22u6.3X/4
AL14 VDDCR_CPU_78 AJ18 AD27 VDDIO_MEM_S3_63 RSVD_26 AP21 C768 X_C0.22u6.3X/4 C823 X_C0.22u6.3X/4
AM2 VDDCR_CPU_79 VDDCR_SOC_S5_0 AK18 AD29 VDDIO_MEM_S3_64 RSVD_27 AR16 C820 X_C0.22u6.3X/4
AM8 VDDCR_CPU_80 VDDCR_SOC_S5_1 AD31 VDDIO_MEM_S3_65 RSVD_28 AR18 C834 X_C0.22u6.3X/4 C737 X_C180P50N/4
AN7 VDDCR_CPU_81 AD34 VDDIO_MEM_S3_66 RSVD_29 AR19 C838 X_C0.22u6.3X/4 C745 X_C180P50N/4 C808 X_C180P50N/4
AN10 VDDCR_CPU_82 AD37 VDDIO_MEM_S3_67 RSVD_30 AR20 C775 X_C0.22u6.3X/4 C751 X_C2.2u6.3X/4
AN13 VDDCR_CPU_83 AE28 VDDIO_MEM_S3_68 RSVD_31 AR21 C792 X_C0.22u6.3X/4
AP3 VDDCR_CPU_84 20190409 Not AE30 VDDIO_MEM_S3_69 RSVD_32 AT19
VDDCR_CPU_85 VDDIO_MEM_S3_70 RSVD_33
AP9
VDDCR_CPU_86
support BR, AE33
VDDIO_MEM_S3_71 RSVD_34
D28 C803 X_C0.22u6.3X/4
AP12 AE36 E19
AR2 VDDCR_CPU_87 Remove. AE39 VDDIO_MEM_S3_72 RSVD_35 E22 C842 X_C180P50N/4
AT4 VDDCR_CPU_88 AF27 VDDIO_MEM_S3_73 RSVD_36 E25 C791 X_C180P50N/4
A VDDCR_CPU_89 VDDIO_MEM_S3_74 RSVD_37 A
AU3 AF29 G17
AU6 VDDCR_CPU_90 AF32 VDDIO_MEM_S3_75 RSVD_38 J36 C827 X_C1000p50X/4
AU9 VDDCR_CPU_91 AF35 VDDIO_MEM_S3_76 RSVD_39 J38
AU12 VDDCR_CPU_92 AF38 VDDIO_MEM_S3_77 RSVD_40 K34
AU15 VDDCR_CPU_93 AG33 VDDIO_MEM_S3_78 RSVD_41 K38
AV5 VDDCR_CPU_94 AG34 VDDIO_MEM_S3_79 RSVD_42 R35
VDDCR_CPU_95 VDDIO_MEM_S3_80 RSVD_43
AV8
AV11 VDDCR_CPU_96
AG35
AG37 VDDIO_MEM_S3_81 RSVD_44
AB37
AH35 MICRO-START INT'L CO.,LTD.
AV14 VDDCR_CPU_97 AH39 VDDIO_MEM_S3_82 RSVD_45 AK34 Title
VDDCR_CPU_98 VDDIO_MEM_S3_83 RSVD_46
AM4 AM4 08 AM4 Power/VDDIO_AUDIO Power
PART 8 OF 9 PART 7 OF 9 Size Document Number Rev
Custom MS-7B86 30
ZIF-SOCKET1331-HF N12-331A040-F02 N12-331A040-F02 ZIF-SOCKET1331-HF
Date: Wednesday, April 17, 2019 Sheet 8 of 68
5 4 3 2 1
5 4 3 2 1

Placement Bottom Side


TP_BAT1

F_check
RTC & Clear CMOS Circuit VDDBT_RTC_DIS
VBAT
4.5uA 1.5V
RTC Backup
R498 X_0R/4 R492 1KR/4

u
VDDBT_RTC_G
U43 BAT1
C538 C0.22u6.3X/4 VBAT R444 1KR/6 VBAT_R 1 2

r
D 1 5 C539 C1u6.3X/4 D

Y
Vin Vout BAT-2P-RH-1
4 N91-01F0151-H06

.
2 NC 3 CLRCMOS_EN R509 10KR/4 Z D42
GND EN S-BAT54C
GS7159S5-1P5-R C526
I31-7159S09-N03 C552 C1u6.3X/4 Q68

X
G2 D2 RTC_CLK

7
X_C1u6.3X/4 SIO_3VA VCC3
VBAT RTC_DATA D1
D01-BAT54C9-D07 S2 SCLK0
R428 2.2KR/4 RTC_CLK G1
VCC3
R433 2.2KR/4 RTC_DATA

-b x
Q74 2N7002D

S1
2N7002D SDATA0
G2 D2 CLRCMOS_EN
[24] CUT_VBAT CLRCMOS_EN [24]
R514 X_1KR/4 D1 VBAT
VDDBT_RTC_DIS VBAT
S2 U39
R507 X_4.7K/4 G1 8 1 OSC1
R508
RSMRST# VCC X1
100KR/4 C557 7 2 OSC2

S1
SQW/INTB# X2 C471
X_C1u6.3X/4
R427 X_0R/4 RTC_CLK 6 3 INTA# R432 X_0R/4 C1u6.3X/4
[6,11,29,34,46,56] SCLK0 SCL INTA#
R434 X_0R/4 RTC_DATA 5 4
[6,11,29,34,46,56] SDATA0 SDA GND

d
1337AGDVGI8_MSOP8-RH
I91-1337A02-I09

.
11-17
C C
CLRCMOS_EN

d
R736
JBAT1 100R/4
1
2

H1X2M_BLACK-RH OSC2
N31-1020151-H06

m
Y7
2 1 OSC1

s
32.768KHZ12.5p
D04-0305500-SC6

C487 C486
C8.2p50N/4 C8.2p50N/4

B B

SIO_3VA

C541 C0.1u16X7/4
SIO_3VA

U42
1

R497
47KR/4
VDD

2 10 R501 X_R/4
[10] CPU_IN# INPUT0 OUTPUT0 SLP_S5# [6,24,33,34,43,44,45]
R502 X_R/4 3 6 R506 X_R/4
[6,24] PWRBTN# INPUT1 OUTPUT1 APU_SLP_S3# [6]

CPU TEST

CASEOPEN#
4 9
INPUT2 OUTPUT2
8
INPUT3
NC_1
NC_2
NC_3
GND

SLG4R41485V
7

5
11
12

A T70-414850C-SF9 A

MICRO-START INT'L CO.,LTD.


Title
RTC/Clear CMOS/RTC Power
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 9 of 68
5 4 3 2 1
A
B
C
D

F34
F31
F28
F25
F22
F19
F17
F4
F1
E38
E35
E32
E29
E27
E26
E23
E21
E20
E17
E14
E11
E8
E5
E4
B35
B32
B29
B26
B23
B19
A36
A33
A30
A27
A24
A21
A18
A15
A12
A9
A6
A3
L29

D39
D36
D35
D34
D33
D32
D31
D30
D29
D27
D25
D24
D23
D22
D21
D19
D18
D15
D12
D9
D6
C37
C34
C31
C28
C25
C22
C1
AJ11
J15

5
5

CPU1I

VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1
VSS_0

VSS_66
VSS_65
VSS_30
VSS_29
VSS_22

VSS_72
VSS_71
VSS_70
VSS_69
VSS_68
VSS_67
VSS_64
VSS_63
VSS_62
VSS_61
VSS_60
VSS_59
VSS_58
VSS_57
VSS_56
VSS_55
VSS_54
VSS_53
VSS_52
VSS_51
VSS_50
VSS_49
VSS_48
VSS_47
VSS_46
VSS_45
VSS_44
VSS_43
VSS_42
VSS_41
VSS_40
VSS_39
VSS_38
VSS_37
VSS_36
VSS_35
VSS_34
VSS_33
VSS_32
VSS_31
VSS_28
VSS_27
VSS_26
VSS_25
VSS_24
VSS_23
VSS_21
VSS_20
VSS_19
VSS_18
VSS_17
VSS_16
VSS_15
VSS_14
VSS_13
VSS_12
VSS_11
VSS_10
F35 MEC6
F37 VSS_73 MEC6 MEC5
G7 VSS_74 MEC5 MEC4
G21 VSS_75 MEC4 MEC3
G24 VSS_76 MEC3 MEC2
G27 VSS_77 MEC2 MEC1
G30 VSS_78 MEC1
G33 VSS_79 AN1
G35 VSS_80 VSS_398 AN4
G36 VSS_81 VSS_397 AN22
G39 VSS_82 VSS_396 AN25
H4 VSS_83 VSS_395 AN28
H5 VSS_84 VSS_394 AN31
H8 VSS_85 VSS_393 AN34
H11 VSS_86 VSS_392 AN35
H14 VSS_87 VSS_391 AN37
H17 VSS_88 VSS_390 AP6
VSS_89 VSS_389

s
H20 AP24
H23 VSS_90 VSS_388 AP27
H26 VSS_91 VSS_387 AP30
H29 VSS_92 VSS_386 AP33
[9]

H32 VSS_93 VSS_385 AP35


H35 VSS_94 VSS_384 AP36
H38 VSS_95 VSS_383 AP39
J1 VSS_96 VSS_382 AR5
J4 VSS_97 VSS_381 AR8
CPU_IN#

J8 VSS_98 VSS_380 AR11


J9 VSS_99 VSS_379 AR14
J11 VSS_100 VSS_378 AR17
J13 VSS_101 VSS_377 AR23
J17 VSS_102 VSS_376 AR26
R190
R200

J19 VSS_103 VSS_375 AR27


J22 VSS_104 VSS_374 AR29
J25 VSS_105 VSS_373 AR30
VSS_106 VSS_372

4
4

J28 AR32
J31 VSS_107 VSS_371 AR34

m
VSS_108 VSS_370
0R/4

J34 AR35
J35 VSS_109 VSS_369 AR38
X_0R/4

J37 VSS_110 VSS_368 AT1


K10 VSS_111 VSS_367 AT7
K12 VSS_112 VSS_366 AT10
K18 VSS_113 VSS_365 AT13
K20 VSS_114 VSS_364 AT16
K21 VSS_115 VSS_363 AT22
K22 VSS_116 VSS_362 AT26
K23 VSS_117 VSS_361 AT27
K26 VSS_118 VSS_360 AT28
K27 VSS_119 VSS_359 AT29
VSS_120 VSS_358

d
K28 AT31
K29 VSS_121 VSS_357 AT32
K30 VSS_122 VSS_356 AT33
K33 VSS_123 VSS_355 AT34
L4 VSS_124 VSS_354 AT37
L5 VSS_125 VSS_353 AU18
VSS_126 VSS_352

. d L8
L9
L11
L13
L15
L17
L19
L21
L25
L27
L28
L30
L31
M1
M4
M8
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
PART 9 OF 9
AM4

VSS_351
VSS_350
VSS_349
VSS_348
VSS_347
VSS_346
VSS_345
VSS_344
VSS_343
VSS_342
VSS_341
VSS_340
VSS_339
VSS_338
VSS_337
AU21
AU24
AU26
AU27
AU30
AU33
AU36
AU39
AV2
AV17
AV20
AV23
AV26
AV29
AV32
AV35

3
3

M10 VSS_142 VSS_336 AV38


M12 VSS_143 VSS_335 AW4
M14 VSS_144 VSS_334 AW7
M16 VSS_145 VSS_333 AW10
M18 VSS_146 VSS_332 AW13
M20 VSS_147 VSS_331 AW16
M24 VSS_148 VSS_330 AW19
M26 VSS_149 VSS_329 AW22
M27 VSS_150 VSS_328 AW25
M28 VSS_151 VSS_327 AW28
N9 VSS_152 VSS_326 AW31
N11 VSS_153 VSS_325 AW34
N13 VSS_154 VSS_324 AW37
N15 VSS_155 VSS_323 AF28
N17 VSS_156 VSS_322 AF30
N19 VSS_157 VSS_321 AG1
N21 VSS_158 VSS_320 AG4
N23 VSS_159 VSS_319 AG8
N25 VSS_160 VSS_318 AG9
N27 VSS_161 VSS_317 AG11
N29 VSS_162 VSS_316 AG13
P4 VSS_163 VSS_315 AG15
P5 VSS_164 VSS_314 AG17
P8 VSS_165 VSS_313 AG19
P10 VSS_166 VSS_312 AG21
P12 VSS_167 VSS_311 AG23
R1 VSS_168 VSS_310 AG25
R4 VSS_169 VSS_309 AG27
-b x
R8 VSS_170 VSS_308 AG28
R9 VSS_171 VSS_307 AG29
R11 VSS_172 VSS_306 AG30
R13 VSS_173 VSS_305 AG31
R27 VSS_174 VSS_304 AG32
R29 VSS_175 VSS_303 AH10
T10 VSS_176 VSS_302 AH12
T12 VSS_177 VSS_301 AH14
2
2

T28 VSS_178 VSS_300 AH16


T30 VSS_179 VSS_299 AH18
U4 VSS_180 VSS_298 AH20
VSS_181 VSS_297
7
U5 AH22
U8 VSS_182 VSS_296 AH24
U9 VSS_183 VSS_295 AH26
U11 VSS_184 VSS_294 AH28
U13 VSS_185 VSS_293 AH29
U27 VSS_186 VSS_292 AH30
.
U29 VSS_187 VSS_291 AH33
U31 VSS_188 VSS_290 AJ5
V1 VSS_189 VSS_289 AJ8
V4 VSS_190 VSS_288 AJ9
V7 VSS_191 VSS_287 AJ13
V10 VSS_192 VSS_286 AJ23
V12 VSS_193 VSS_285 AJ25
V28 VSS_194 VSS_284 AJ26
r
V30 VSS_195 VSS_283 AJ27
VSS_196 VSS_282
Title

Size

W9 AJ28
Date:

W11 VSS_197 VSS_281 AJ29


W13 VSS_198 VSS_280 AJ32
Custom

W27 VSS_199 VSS_279 AJ35


W29 VSS_200 VSS_278 AJ36
W31 VSS_201 VSS_277 AJ38
VSS_202 VSS_276
AM4 GND
Document Number
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_230
VSS_231
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269

VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_232
VSS_233
VSS_234
VSS_235
VSS_245
VSS_246
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275

MS-7B86
u
Y5
Y8
Y10
Y12
Y28
Y30
AL9

AF5
AF8

AA1
AA4
AA6
AA9
AB7
AE7
AE9
AK4
AK1

AC5
AC8
AC9
AD1
AD4
AM5
AL39
AL36
AL35
AL33
AL30
AL27
AL24
AL11

Wednesday, April 17, 2019


AF10
AF12

AA11
AA13
AA27
AA29
AA31
AB10
AB12
AB28
AB30
AE11
AE13
AE27
AE29
AE31
AK37
AK35
AK31
AK28
AK25
AK22
AK14
AK12
AK10

AC11
AC13
AC27
AC29
AC31
AD10
AD12
AD28
AD30
AM38
AM35
AM32
AM29
AM26
AM14
AM11

ZIF-SOCKET1331-HF
N12-331A040-F02

1
1

Sheet
10
of
68
30
Rev
MICRO-START INT'L CO.,LTD.
A
B
C
D
5 4 3 2 1

DIMMA1A DIMMA2A
MA_DATA[63..0] [3,11] MA_DATA[63..0] [3,11]
A1 A2 B1 B2
51 280 MA_DATA63 51 280 MA_DATA63
52 DQS17P DQ-63 135 MA_DATA62 52 DQS17P DQ-63 135 MA_DATA62
DQS17N DQ-62 273 MA_DATA61 DQS17N DQ-62 273 MA_DATA61
MA_DM7 132 DQ-61 128 MA_DATA60 MA_DM7 132 DQ-61 128 MA_DATA60
[3] MA_DM7 DQS16P DQ-60 MA_DATA59 DQS16P DQ-60 MA_DATA59
133 282 56~63 133 282 56~63
DQS16N DQ-59 137 MA_DATA58 DQS16N DQ-59 137 MA_DATA58
MA_DM6 121 DQ-58 275 MA_DATA57 MA_DM6 121 DQ-58 275 MA_DATA57
[3] MA_DM6 DQS15P DQ-57 MA_DATA56 DQS15P DQ-57 MA_DATA56
122 130 122 130

u
DQS15N DQ-56 269 MA_DATA55 DQS15N DQ-56 269 MA_DATA55
MA_DM5 110 DQ-55 124 MA_DATA54 MA_DM5 110 DQ-55 124 MA_DATA54
[3] MA_DM5 DQS14P DQ-54 MA_DATA53 DQS14P DQ-54 MA_DATA53
111 262 111 262
DQS14N DQ-53 DQS14N DQ-53

r
D 117 MA_DATA52 117 MA_DATA52 D
MA_DM4 99 DQ-52 271 MA_DATA51 48~55 MA_DM4 99 DQ-52 271 MA_DATA51 48~55
[3] MA_DM4 DQS13P DQ-51 MA_DATA50 DQS13P DQ-51 MA_DATA50
100 126 100 126

.
DQS13N DQ-50 264 MA_DATA49 DQS13N DQ-50 264 MA_DATA49
MA_DM3 40 DQ-49 119 MA_DATA48 MA_DM3 40 DQ-49 119 MA_DATA48
[3] MA_DM3 DQS12P DQ-48 MA_DATA47 DQS12P DQ-48 MA_DATA47
41 258 41 258
DQS12N DQ-47 113 MA_DATA46 DQS12N DQ-47 113 MA_DATA46
MA_DM2 29 DQ-46 251 MA_DATA45 MA_DM2 29 DQ-46 251 MA_DATA45

7
[3] MA_DM2 DQS11P DQ-45 MA_DATA44 DQS11P DQ-45 MA_DATA44
30 106 40~47 30 106 40~47
DQS11N DQ-44 260 MA_DATA43 DQS11N DQ-44 260 MA_DATA43
MA_DM1 18 DQ-43 115 MA_DATA42 MA_DM1 18 DQ-43 115 MA_DATA42
[3] MA_DM1 DQS10P DQ-42 MA_DATA41 DQS10P DQ-42 MA_DATA41
19 253 19 253
DQS10N DQ-41 108 MA_DATA40 DQS10N DQ-41 108 MA_DATA40

-b x
MA_DM0 7 DQ-40 247 MA_DATA39 MA_DM0 7 DQ-40 247 MA_DATA39
[3] MA_DM0 DQS9P DQ-39 MA_DATA38 DQS9P DQ-39 MA_DATA38
8 102 8 102
DQS9N DQ-38 240 MA_DATA37 DQS9N DQ-38 240 MA_DATA37
197 DQ-37 95 MA_DATA36 32~39 197 DQ-37 95 MA_DATA36 32~39
196 DQS8P DQ-36 249 MA_DATA35 196 DQS8P DQ-36 249 MA_DATA35
DQS8N DQ-35 104 MA_DATA34 DQS8N DQ-35 104 MA_DATA34
MA_DQS_H7 278 DQ-34 242 MA_DATA33 MA_DQS_H7 278 DQ-34 242 MA_DATA33
[3] MA_DQS_H7 MA_DQS_L7 DQS7P DQ-33 MA_DATA32 MA_DQS_L7 DQS7P DQ-33 MA_DATA32
277 97 277 97
[3] MA_DQS_L7 DQS7N DQ-32 MA_DATA31 DQS7N DQ-32 MA_DATA31
188 188
MA_DQS_H6 267 DQ-31 43 MA_DATA30 MA_DQS_H6 267 DQ-31 43 MA_DATA30
[3] MA_DQS_H6 MA_DQS_L6 DQS6P DQ-30 MA_DATA29 MA_DQS_L6 DQS6P DQ-30 MA_DATA29
266 181 266 181
[3] MA_DQS_L6 DQS6N DQ-29 MA_DATA28 DQS6N DQ-29 MA_DATA28
36 36
MA_DQS_H5 256 DQ-28 190 MA_DATA27 24~31 MA_DQS_H5 256 DQ-28 190 MA_DATA27 24~31
[3] MA_DQS_H5 MA_DQS_L5 DQS5P DQ-27 MA_DATA26 MA_DQS_L5 DQS5P DQ-27 MA_DATA26
255 45 255 45

d
[3] MA_DQS_L5 DQS5N DQ-26 MA_DATA25 DQS5N DQ-26 MA_DATA25
183 183
MA_DQS_H4 245 DQ-25 38 MA_DATA24 MA_DQS_H4 245 DQ-25 38 MA_DATA24

.
[3] MA_DQS_H4 MA_DQS_L4 DQS4P DQ-24 MA_DATA23 MA_DQS_L4 DQS4P DQ-24 MA_DATA23
244 177 244 177
[3] MA_DQS_L4 DQS4N DQ-23 MA_DATA22 DQS4N DQ-23 MA_DATA22
32 32
C MA_DQS_H3 186 DQ-22 170 MA_DATA21 MA_DQS_H3 186 DQ-22 170 MA_DATA21 C
[3] MA_DQS_H3 MA_DQS_L3 DQS3P DQ-21 MA_DATA20 MA_DQS_L3 DQS3P DQ-21 MA_DATA20
185 25 185 25
[3] MA_DQS_L3 DQS3N DQ-20 MA_DATA19 DQS3N DQ-20 MA_DATA19
179 16~23 179 16~23
DQ-19 DQ-19

d
MA_DQS_H2 175 34 MA_DATA18 MA_DQS_H2 175 34 MA_DATA18
[3] MA_DQS_H2 MA_DQS_L2 DQS2P DQ-18 MA_DATA17 MA_DQS_L2 DQS2P DQ-18 MA_DATA17
174 172 174 172
[3] MA_DQS_L2 DQS2N DQ-17 MA_DATA16 DQS2N DQ-17 MA_DATA16
27 27
MA_DQS_H1 164 DQ-16 166 MA_DATA15 MA_DQS_H1 164 DQ-16 166 MA_DATA15
[3] MA_DQS_H1 MA_DQS_L1 DQS1P DQ-15 MA_DATA14 MA_DQS_L1 DQS1P DQ-15 MA_DATA14
163 21 163 21
[3] MA_DQS_L1 DQS1N DQ-14 MA_DATA13 DQS1N DQ-14 MA_DATA13
159 159
MA_DQS_H0 153 DQ-13 14 MA_DATA12 MA_DQS_H0 153 DQ-13 14 MA_DATA12
[3] MA_DQS_H0 MA_DQS_L0 DQS0P DQ-12 MA_DATA11 MA_DQS_L0 DQS0P DQ-12 MA_DATA11
152 168 8~15 152 168 8~15
[3] MA_DQS_L0 DQS0N DQ-11 DQS0N DQ-11

m
23 MA_DATA10 23 MA_DATA10
DQ-10 161 MA_DATA9 DQ-10 161 MA_DATA9
MA_CLK_H1 218 DQ-9 16 MA_DATA8 MA_CLK_H3 218 DQ-9 16 MA_DATA8
[3] MA_CLK_H1 MA_CLK_L1 CK1P DQ-8 MA_DATA7 [3] MA_CLK_H3 MA_CLK_L3 CK1P DQ-8 MA_DATA7
219 155 219 155
[3] MA_CLK_L1 CK1N DQ-7 MA_DATA6 [3] MA_CLK_L3 CK1N DQ-7 MA_DATA6
10 10
DQ-6 DQ-6

s
MA_CLK_H0 74 148 MA_DATA5 MA_CLK_H2 74 148 MA_DATA5
[3] MA_CLK_H0 MA_CLK_L0 CK0P DQ-5 MA_DATA4 [3] MA_CLK_H2 MA_CLK_L2 CK0P DQ-5 MA_DATA4
75 3 75 3
[3] MA_CLK_L0 CK0N DQ-4 MA_DATA3 [3] MA_CLK_L2 CK0N DQ-4 MA_DATA3
157 0~7 157 0~7
DQ-3 12 MA_DATA2 DQ-3 12 MA_DATA2
DQ-2 150 MA_DATA1 DQ-2 150 MA_DATA1
DQ-1 5 MA_DATA0 DQ-1 5 MA_DATA0
DQ-0 DQ-0
235 235
237 C2 207 MA_BG1 237 C2 207 MA_BG1
S3_N_C1 BG-1 MA_BG0 MA_BG1 [3] S3_N_C1 BG-1 MA_BG0
93 63 93 63
S2_N_C0 BG-0 MA_BG0 [3] S2_N_C0 BG-0
MA0_CS_L1 89 224 MA_BANK1 MA1_CS_L1 89 224 MA_BANK1
[3] MA0_CS_L1 MA0_CS_L0 S1_N BA-1 MA_BANK0 MA_BANK1 [3] [3] MA1_CS_L1 MA1_CS_L0 S1_N BA-1 MA_BANK0
84 81 84 81
[3] MA0_CS_L0 S0_N BA-0 MA_BANK0 [3] [3] MA1_CS_L0 S0_N BA-0
MA0_CKE1 203 MA1_CKE1 203
B [3] MA0_CKE1 MA0_CKE0 CKE1 MA_ADD_17 [3] MA1_CKE1 MA1_CKE0 CKE1 MA_ADD_17 B
60 234 60 234
[3] MA0_CKE0 CKE0 A17 MA_RAS_L MA_ADD_17 [3] [3] MA1_CKE0 CKE0 A17 MA_RAS_L
82 82
MA0_ODT1 A16_RAS_N MA_CAS_L MA_RAS_L [3] MA1_ODT1 A16_RAS_N MA_CAS_L
91 86 91 86
[3] MA0_ODT1 MA0_ODT0 ODT-1 A15_CAS_N MA_WE_L MA_CAS_L [3] MA_ADD[13..0] [3] [3] MA1_ODT1 MA1_ODT0 ODT-1 A15_CAS_N MA_WE_L
87 228 87 228
[3] MA0_ODT0 ODT-0 A14_WE_N MA_ADD13 MA_WE_L [3] [3] MA1_ODT0 ODT-0 A14_WE_N MA_ADD13
232 232
199 A13 65 MA_ADD12 199 A13 65 MA_ADD12
54 CB-7 A12 210 MA_ADD11 54 CB-7 A12 210 MA_ADD11
192 CB-6 A11 225 MA_ADD10 192 CB-6 A11 225 MA_ADD10
47 CB-5 A10 66 MA_ADD9 47 CB-5 A10 66 MA_ADD9
201 CB-4 A9 68 MA_ADD8 201 CB-4 A9 68 MA_ADD8
56 CB-3 A8 211 MA_ADD7 56 CB-3 A8 211 MA_ADD7
194 CB-2 A7 69 MA_ADD6 194 CB-2 A7 69 MA_ADD6
49 CB-1 A6 213 MA_ADD5 49 CB-1 A6 213 MA_ADD5
CB-0 A5 214 MA_ADD4 CB-0 A5 214 MA_ADD4
A4 71 MA_ADD3 VCC_DDR A4 71 MA_ADD3
MA_RESET_L 58 A3 216 MA_ADD2 MA_RESET_L 58 A3 216 MA_ADD2
[3] MA_RESET_L RESET_N A2 MA_ADD1 RESET_N A2 MA_ADD1
72 72
MA_EVENT_L 78 A1 79 MA_ADD0 R178 1KR/4 MA_EVENT_L 78 A1 79 MA_ADD0
[3] MA_EVENT_L EVENT_N A0 EVENT_N A0
MA_ALERT_L 208 MA_ALERT_L 208
[3] MA_ALERT_L ALERT_N ALERT_N
MA_ACT_L 62 MA_ACT_L 62
[3] MA_ACT_L ACT_N SMB_CLK_DIMM ACT_N SMB_CLK_DIMM
141 141
MA_PAROUT 222 SCL 285 SMB_DATA_DIMM MA_PAROUT 222 SCL 285 SMB_DATA_DIMM
[3] MA_PAROUT PAR SDA PAR SDA

230 230 VCC3_SPD


SAVE_N_NC 238 SAVE_N_NC 238
SA-2 140 SA-2 140 VCC3_SPD_A2A R272 1KR/4
144 SA-1 139 144 SA-1 139
205 RFU-0 SA-0 205 RFU-0 SA-0
A RFU-1 DIMM1(CHANNEL-A)-A0 RFU-1 DIMM2(CHANNEL-A)-A4 A
227 227
RFU-2 ADDRESS = 0:0 [SA1:SA0] RFU-2 ADDRESS = 1:0 [SA1:SA0]
DDRIV-288P_BLACK-RH-21 DDRIV-288P_BLACK-RH-21
N13-2880581-L06 N13-2880701-L06
Schematic Cfg Project
MICRO-START INT'L CO.,LTD.
MS-7B86/B450 GAMING PLUS V A Title
DDR4 DIMM CH-A
SCLK0 R297 0R/4 SMB_CLK_DIMM
MS-7B86/B450-A PRO Size Document Number Rev
[6,9,29,34,46,56] SCLK0 SMB_DATA_DIMM SMB_CLK_DIMM [12]
SDATA0 R298 0R/4 Custom MS-7B86 30
[6,9,29,34,46,56] SDATA0 SMB_DATA_DIMM [12]
Date: Wednesday, April 17, 2019 Sheet 11 of 68
5 4 3 2 1
5 4 3 2 1

A1 A2 B1 B2 DIMMB1A DIMMB2A
MB_DATA[63..0] [3,12] MB_DATA[63..0] [3,12]
51 280 MB_DATA63 51 280 MB_DATA63
52 DQS17P DQ-63 135 MB_DATA62 52 DQS17P DQ-63 135 MB_DATA62
DQS17N DQ-62 273 MB_DATA61 DQS17N DQ-62 273 MB_DATA61
MB_DM7 132 DQ-61 128 MB_DATA60 MB_DM7 132 DQ-61 128 MB_DATA60
[3] MB_DM7 DQS16P DQ-60 MB_DATA59 DQS16P DQ-60 MB_DATA59
133 282 56~63 133 282 56~63
DQS16N DQ-59 137 MB_DATA58 DQS16N DQ-59 137 MB_DATA58
MB_DM6 121 DQ-58 275 MB_DATA57 MB_DM6 121 DQ-58 275 MB_DATA57
[3] MB_DM6 DQS15P DQ-57 MB_DATA56 DQS15P DQ-57 MB_DATA56
122 130 122 130
DQS15N DQ-56 269 MB_DATA55 DQS15N DQ-56 269 MB_DATA55
MB_DM5 110 DQ-55 124 MB_DATA54 MB_DM5 110 DQ-55 124 MB_DATA54

u
[3] MB_DM5 DQS14P DQ-54 MB_DATA53 DQS14P DQ-54 MB_DATA53
111 262 111 262
DQS14N DQ-53 117 MB_DATA52 DQS14N DQ-53 117 MB_DATA52
MB_DM4 99 DQ-52 271 MB_DATA51 48~55 MB_DM4 99 DQ-52 271 MB_DATA51 48~55
D [3] MB_DM4 D
DQS13P DQ-51 DQS13P DQ-51

r
100 126 MB_DATA50 100 126 MB_DATA50
DQS13N DQ-50 264 MB_DATA49 DQS13N DQ-50 264 MB_DATA49
MB_DM3 40 DQ-49 119 MB_DATA48 MB_DM3 40 DQ-49 119 MB_DATA48

.
[3] MB_DM3 DQS12P DQ-48 MB_DATA47 DQS12P DQ-48 MB_DATA47
41 258 41 258
DQS12N DQ-47 113 MB_DATA46 DQS12N DQ-47 113 MB_DATA46
MB_DM2 29 DQ-46 251 MB_DATA45 MB_DM2 29 DQ-46 251 MB_DATA45
[3] MB_DM2 DQS11P DQ-45 MB_DATA44 40~47 DQS11P DQ-45 MB_DATA44 40~47
30 106 30 106
DQS11N DQ-44 260 MB_DATA43 DQS11N DQ-44 260 MB_DATA43
DQ-43 DQ-43

7
MB_DM1 18 115 MB_DATA42 MB_DM1 18 115 MB_DATA42
[3] MB_DM1 DQS10P DQ-42 MB_DATA41 DQS10P DQ-42 MB_DATA41
19 253 19 253
DQS10N DQ-41 108 MB_DATA40 DQS10N DQ-41 108 MB_DATA40
MB_DM0 7 DQ-40 247 MB_DATA39 MB_DM0 7 DQ-40 247 MB_DATA39
[3] MB_DM0 DQS9P DQ-39 MB_DATA38 DQS9P DQ-39 MB_DATA38
8 102 8 102
DQS9N DQ-38 240 MB_DATA37 DQS9N DQ-38 240 MB_DATA37

-b x
197 DQ-37 95 MB_DATA36 32~39 197 DQ-37 95 MB_DATA36 32~39
196 DQS8P DQ-36 249 MB_DATA35 196 DQS8P DQ-36 249 MB_DATA35
DQS8N DQ-35 104 MB_DATA34 DQS8N DQ-35 104 MB_DATA34
MB_DQS_H7 278 DQ-34 242 MB_DATA33 MB_DQS_H7 278 DQ-34 242 MB_DATA33
[3] MB_DQS_H7 MB_DQS_L7 DQS7P DQ-33 MB_DATA32 MB_DQS_L7 DQS7P DQ-33 MB_DATA32
277 97 277 97
[3] MB_DQS_L7 DQS7N DQ-32 MB_DATA31 DQS7N DQ-32 MB_DATA31
188 188
MB_DQS_H6 267 DQ-31 43 MB_DATA30 MB_DQS_H6 267 DQ-31 43 MB_DATA30
[3] MB_DQS_H6 MB_DQS_L6 DQS6P DQ-30 MB_DATA29 MB_DQS_L6 DQS6P DQ-30 MB_DATA29
266 181 266 181
[3] MB_DQS_L6 DQS6N DQ-29 MB_DATA28 DQS6N DQ-29 MB_DATA28
36 36
MB_DQS_H5 256 DQ-28 190 MB_DATA27 24~31 MB_DQS_H5 256 DQ-28 190 MB_DATA27 24~31
[3] MB_DQS_H5 MB_DQS_L5 DQS5P DQ-27 MB_DATA26 MB_DQS_L5 DQS5P DQ-27 MB_DATA26
255 45 255 45
[3] MB_DQS_L5 DQS5N DQ-26 MB_DATA25 DQS5N DQ-26 MB_DATA25
183 183
MB_DQS_H4 245 DQ-25 38 MB_DATA24 MB_DQS_H4 245 DQ-25 38 MB_DATA24
[3] MB_DQS_H4 MB_DQS_L4 DQS4P DQ-24 MB_DATA23 MB_DQS_L4 DQS4P DQ-24 MB_DATA23
244 177 244 177
[3] MB_DQS_L4 DQS4N DQ-23 DQS4N DQ-23

d
32 MB_DATA22 32 MB_DATA22
MB_DQS_H3 186 DQ-22 170 MB_DATA21 MB_DQS_H3 186 DQ-22 170 MB_DATA21
[3] MB_DQS_H3 MB_DQS_L3 DQS3P DQ-21 MB_DATA20 MB_DQS_L3 DQS3P DQ-21 MB_DATA20
C 185 25 185 25 C
[3] MB_DQS_L3

.
DQS3N DQ-20 179 MB_DATA19 16~23 DQS3N DQ-20 179 MB_DATA19 16~23
MB_DQS_H2 175 DQ-19 34 MB_DATA18 MB_DQS_H2 175 DQ-19 34 MB_DATA18
[3] MB_DQS_H2 MB_DQS_L2 DQS2P DQ-18 MB_DATA17 MB_DQS_L2 DQS2P DQ-18 MB_DATA17
174 172 174 172
[3] MB_DQS_L2 DQS2N DQ-17 MB_DATA16 DQS2N DQ-17 MB_DATA16
27 27
MB_DQS_H1 164 DQ-16 166 MB_DATA15 MB_DQS_H1 164 DQ-16 166 MB_DATA15
[3] MB_DQS_H1 MB_DQS_L1 DQS1P DQ-15 MB_DATA14 MB_DQS_L1 DQS1P DQ-15 MB_DATA14
163 21 163 21

d
[3] MB_DQS_L1 DQS1N DQ-14 MB_DATA13 DQS1N DQ-14 MB_DATA13
159 159
MB_DQS_H0 153 DQ-13 14 MB_DATA12 MB_DQS_H0 153 DQ-13 14 MB_DATA12
[3] MB_DQS_H0 MB_DQS_L0 DQS0P DQ-12 MB_DATA11 MB_DQS_L0 DQS0P DQ-12 MB_DATA11
152 168 8~15 152 168 8~15
[3] MB_DQS_L0 DQS0N DQ-11 MB_DATA10 DQS0N DQ-11 MB_DATA10
23 23
DQ-10 161 MB_DATA9 DQ-10 161 MB_DATA9
MB_CLK_H1 218 DQ-9 16 MB_DATA8 MB_CLK_H3 218 DQ-9 16 MB_DATA8
[3] MB_CLK_H1 MB_CLK_L1 CK1P DQ-8 MB_DATA7 [3] MB_CLK_H3 MB_CLK_L3 CK1P DQ-8 MB_DATA7
219 155 219 155
[3] MB_CLK_L1 CK1N DQ-7 MB_DATA6 [3] MB_CLK_L3 CK1N DQ-7 MB_DATA6
10 10
DQ-6 DQ-6

m
MB_CLK_H0 74 148 MB_DATA5 MB_CLK_H2 74 148 MB_DATA5
[3] MB_CLK_H0 MB_CLK_L0 CK0P DQ-5 MB_DATA4 [3] MB_CLK_H2 MB_CLK_L2 CK0P DQ-5 MB_DATA4
75 3 75 3
[3] MB_CLK_L0 CK0N DQ-4 MB_DATA3 [3] MB_CLK_L2 CK0N DQ-4 MB_DATA3
157 0~7 157 0~7
DQ-3 12 MB_DATA2 DQ-3 12 MB_DATA2
DQ-2 150 MB_DATA1 DQ-2 150 MB_DATA1
DQ-1 5 MB_DATA0 DQ-1 5 MB_DATA0

s
DQ-0 DQ-0
235 235
237 C2 207 MB_BG1 237 C2 207 MB_BG1
S3_N_C1 BG-1 MB_BG0 MB_BG1 [3] S3_N_C1 BG-1 MB_BG0
93 63 93 63
S2_N_C0 BG-0 MB_BG0 [3] S2_N_C0 BG-0
MB0_CS_L1 89 224 MB_BANK1 MB1_CS_L1 89 224 MB_BANK1
[3] MB0_CS_L1 MB0_CS_L0 S1_N BA-1 MB_BANK0 MB_BANK1 [3] [3] MB1_CS_L1 MB1_CS_L0 S1_N BA-1 MB_BANK0
84 81 84 81
[3] MB0_CS_L0 S0_N BA-0 MB_BANK0 [3] [3] MB1_CS_L0 S0_N BA-0
MB0_CKE1 203 MB1_CKE1 203
[3] MB0_CKE1 MB0_CKE0 CKE1 MB_ADD_17 [3] MB1_CKE1 MB1_CKE0 CKE1 MB_ADD_17
60 234 60 234
B [3] MB0_CKE0 CKE0 A17 MB_RAS_L MB_ADD_17 [3] [3] MB1_CKE0 CKE0 A17 MB_RAS_L B
82 82
MB0_ODT1 A16_RAS_N MB_CAS_L MB_RAS_L [3] MB1_ODT1 A16_RAS_N MB_CAS_L
91 86 91 86
[3] MB0_ODT1 MB0_ODT0 ODT-1 A15_CAS_N MB_WE_L MB_CAS_L [3] MB_ADD[13..0] [3] [3] MB1_ODT1 MB1_ODT0 ODT-1 A15_CAS_N MB_WE_L
87 228 87 228
[3] MB0_ODT0 ODT-0 A14_WE_N MB_ADD13 MB_WE_L [3] [3] MB1_ODT0 ODT-0 A14_WE_N MB_ADD13
232 232
199 A13 65 MB_ADD12 199 A13 65 MB_ADD12
54 CB-7 A12 210 MB_ADD11 54 CB-7 A12 210 MB_ADD11
192 CB-6 A11 225 MB_ADD10 192 CB-6 A11 225 MB_ADD10
47 CB-5 A10 66 MB_ADD9 47 CB-5 A10 66 MB_ADD9
201 CB-4 A9 68 MB_ADD8 201 CB-4 A9 68 MB_ADD8
56 CB-3 A8 211 MB_ADD7 56 CB-3 A8 211 MB_ADD7
194 CB-2 A7 69 MB_ADD6 194 CB-2 A7 69 MB_ADD6
49 CB-1 A6 213 MB_ADD5 49 CB-1 A6 213 MB_ADD5
CB-0 A5 214 MB_ADD4 CB-0 A5 214 MB_ADD4
A4 71 MB_ADD3 VCC_DDR A4 71 MB_ADD3
MB_RESET_L 58 A3 216 MB_ADD2 MB_RESET_L 58 A3 216 MB_ADD2
[3] MB_RESET_L RESET_N A2 MB_ADD1 RESET_N A2 MB_ADD1
72 72
MB_EVENT_L 78 A1 79 MB_ADD0 R180 1KR/4 MB_EVENT_L 78 A1 79 MB_ADD0
[3] MB_EVENT_L EVENT_N A0 EVENT_N A0
MB_ALERT_L 208 MB_ALERT_L 208
[3] MB_ALERT_L ALERT_N ALERT_N
MB_ACT_L 62 MB_ACT_L 62
[3] MB_ACT_L ACT_N SMB_CLK_DIMM ACT_N SMB_CLK_DIMM
141 141
MB_PAROUT SCL SMB_DATA_DIMM SMB_CLK_DIMM [11] MB_PAROUT SCL SMB_DATA_DIMM
222 285 222 285
[3] MB_PAROUT PAR SDA SMB_DATA_DIMM [11] PAR SDA

230 230 VCC3_SPD


SAVE_N_NC 238 VCC3_SPD SAVE_N_NC 238
SA-2 140 SA-2 140 VCC3_SPDSAB2_1 R289 1KR/4
144 SA-1 139 VCC3_SPD_B1A R277 1KR/4 144 SA-1 139 VCC3_SPDSAB2_0 R281 1KR/4
205 RFU-0 SA-0 205 RFU-0 SA-0
RFU-1 RFU-1 DIMM4(CHANNEL-B)-A6
227 DIMM3(CHANNEL-B)-A2 227
A RFU-2 RFU-2 ADDRESS = 1:1 [SA1:SA0] A
ADDRESS = 0:1 [SA1:SA0]
DDRIV-288P_BLACK-RH-21 DDRIV-288P_BLACK-RH-21
N13-2880581-L06 N13-2880701-L06

Schematic Cfg Project


MICRO-START INT'L CO.,LTD.
MS-7B86/B450 GAMING PLUS V A Title
DDR4 DIMM CH-B
MS-7B86/B450-A PRO Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 12 of 68
5 4 3 2 1
5 4 3 2 1

avl:D08-0301100-B07 DDR VREF


(place resistors close to DIMMs)
F10
VCC3 1 2 VCC3_SPD VCC_DDR VCC_DDR

F-SPR-P260T DIMMA1C DIMMA2C DIMM_CA_VREF_A VCC_DDR


236
DIMM SLOT PN BY SPEC 236
D08-0301000-P16 1 VDD-0 233 1 VDD-0 233
145 12V3_NC_1 VDD-1 231 145 12V3_NC_1 VDD-1 231

u
12V3_NC_145 VDD-2 229 12V3_NC_145 VDD-2 229
284 VDD-3 226 284 VDD-3 226
VCC3_SPD VDDSPD VDD-4 VCC3_SPD VDDSPD VDD-4 DIMM_CA_VREF_A
223 223
VDD-5 VDD-5

r
D 220 220 R24 D
142 VDD-6 217 142 VDD-6 217 1KR1%/4 C10
VPP25 VPP-1 VDD-7 VPP25 VPP-1 VDD-7
143 215 143 215

.
VPP-2 VDD-8 VPP-2 VDD-8 C0.1u16X7/4
286 212 286 212
287 VPP-3 VDD-9 209 287 VPP-3 VDD-9 209 C12
288 VPP-4 VDD-10 206 288 VPP-4 VDD-10 206 C0.1u16X7/4
VPP-5 VDD-11 204 VPP-5 VDD-11 204
VDD-12 VDD-12

1
92 92

7
77 VDD-13 90 77 VDD-13 90 D83 C16 C23 R29
VTT_DDR VTT-1 VDD-14 VTT_DDR VTT-1 VDD-14
221 88 221 88 C1000p50X/4 C0.1u16X7/4 1KR1%/4
VTT-2 VDD-15 85 VTT-2 VDD-15 85
VDD-16 83 VDD-16 83 VCC_DDR ESD-AOZ8231ADI

2
146 VDD-17 80 146 VDD-17 80

-b x
DIMM_CA_VREF_A VREFCA VDD-18 DIMM_CA_VREF_A VREFCA VDD-18
76 76
VDD-19 73 VDD-19 73
VDD-20 70 VDD-20 70
MEC3 VDD-21 67 MEC3 VDD-21 67
MEC2 MEC3 VDD-22 64 MEC2 MEC3 VDD-22 64
MEC1 MEC2 VDD-23 61 MEC1 MEC2 VDD-23 61
MEC1 VDD-24 59 MEC1 VDD-24 59
VDD-25 VDD-25

DDRIV-288P_BLACK-RH-21 DDRIV-288P_BLACK-RH-21
N13-2880581-L06 N13-2880701-L06

. d
VCC3_SPD C299 C0.1u16X7/4 VCC_DDR C204 C1u6.3X/6 VCC3_SPD C296 C0.1u16X7/4 VCC_DDR C202 C1u6.3X/6
C175 C1u6.3X/6
C C
C126 C0.1u16X7/4
C192 C0.1u16X7/4

d
DIMM_CA_VREF_A C34 C2.2u6.3X/4 DIMM_CA_VREF_A C41 C2.2u6.3X/4 C199 C0.1u16X7/4
C42 C0.1u16X7/4 C33 C0.1u16X7/4

VTT_DDR C157 C0.1u16X7/4


VTT_DDR C179 C0.1u16X7/4

VPP25 C323 X_C0.1u16X7/4


VPP25 C314 C0.1u16X7/4 C325 X_C0.1u16X7/4

m
C310 C0.1u16X7/4

s
DIMMA1B DIMMA2B
2 147 2 147
4 VSS-93 VSS-46 149 4 VSS-93 VSS-46 149
6 VSS-92 VSS-45 151 6 VSS-92 VSS-45 151
9 VSS-91 VSS-44 154 9 VSS-91 VSS-44 154
11 VSS-90 VSS-43 156 11 VSS-90 VSS-43 156
13 VSS-89 VSS-42 158 13 VSS-89 VSS-42 158
15 VSS-88 VSS-41 160 15 VSS-88 VSS-41 160
17 VSS-87 VSS-40 162 17 VSS-87 VSS-40 162
20 VSS-86 VSS-39 165 20 VSS-86 VSS-39 165
22 VSS-85 VSS-38 167 22 VSS-85 VSS-38 167
B 24 VSS-84 VSS-37 169 24 VSS-84 VSS-37 169 B
26 VSS-83 VSS-36 171 26 VSS-83 VSS-36 171
28 VSS-82 VSS-35 173 28 VSS-82 VSS-35 173
31 VSS-81 VSS-34 176 31 VSS-81 VSS-34 176
33 VSS-80 VSS-33 178 33 VSS-80 VSS-33 178
35 VSS-79 VSS-32 180 35 VSS-79 VSS-32 180
37 VSS-78 VSS-31 182 37 VSS-78 VSS-31 182
39 VSS-77 VSS-30 184 39 VSS-77 VSS-30 184
42 VSS-76 VSS-29 187 42 VSS-76 VSS-29 187
44 VSS-75 VSS-28 189 44 VSS-75 VSS-28 189
46 VSS-74 VSS-27 191 46 VSS-74 VSS-27 191
48 VSS-73 VSS-26 193 48 VSS-73 VSS-26 193
50 VSS-72 VSS-25 195 50 VSS-72 VSS-25 195
53 VSS-71 VSS-24 198 53 VSS-71 VSS-24 198
55 VSS-70 VSS-23 200 55 VSS-70 VSS-23 200
57 VSS-69 VSS-22 202 57 VSS-69 VSS-22 202
94 VSS-68 VSS-21 239 94 VSS-68 VSS-21 239
96 VSS-67 VSS-20 241 96 VSS-67 VSS-20 241
98 VSS-66 VSS-19 243 98 VSS-66 VSS-19 243
101 VSS-65 VSS-18 246 101 VSS-65 VSS-18 246
103 VSS-64 VSS-17 248 103 VSS-64 VSS-17 248
105 VSS-63 VSS-16 250 105 VSS-63 VSS-16 250
107 VSS-62 VSS-15 252 107 VSS-62 VSS-15 252
109 VSS-61 VSS-14 254 109 VSS-61 VSS-14 254
112 VSS-60 VSS-13 257 112 VSS-60 VSS-13 257
114 VSS-59 VSS-12 259 114 VSS-59 VSS-12 259
116 VSS-58 VSS-11 261 116 VSS-58 VSS-11 261
118 VSS-57 VSS-10 263 118 VSS-57 VSS-10 263
120 VSS-56 VSS-9 265 120 VSS-56 VSS-9 265
123 VSS-55 VSS-8 268 123 VSS-55 VSS-8 268
125 VSS-54 VSS-7 270 125 VSS-54 VSS-7 270
A VSS-53 VSS-6 VSS-53 VSS-6 A
127 272 127 272
129 VSS-52 VSS-5 274 129 VSS-52 VSS-5 274
131 VSS-51 VSS-4 276 131 VSS-51 VSS-4 276
134 VSS-50 VSS-3 279 134 VSS-50 VSS-3 279
136 VSS-49 VSS-2 281 136 VSS-49 VSS-2 281
138 VSS-48 VSS-1 283 138 VSS-48 VSS-1 283
VSS-47 VSS-0 VSS-47 VSS-0
MICRO-START INT'L CO.,LTD.
DDRIV-288P_BLACK-RH-21 DDRIV-288P_BLACK-RH-21 Title
N13-2880581-L06 N13-2880701-L06 DDR4-POWER/GND-1
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 13 of 68
5 4 3 2 1
5 4 3 2 1

DDR VREF
(place resistors close to DIMMs)
VCC_DDR VCC_DDR

DIMMB1C DIMMB2C
236 236 DIMM_CA_VREF_B VCC_DDR
1 VDD-0 233 1 VDD-0 233

u
145 12V3_NC_1 VDD-1 231 145 12V3_NC_1 VDD-1 231
12V3_NC_145 VDD-2 229 12V3_NC_145 VDD-2 229 DIMM_CA_VREF_B
284 VDD-3 226 284 VDD-3 226
VCC3_SPD VDDSPD VDD-4 VCC3_SPD VDDSPD VDD-4

r
D 223 223 D
VDD-5 220 VDD-5 220 R15 C11
142 VDD-6 217 142 VDD-6 217 1KR1%/4

.
VPP25 VPP-1 VDD-7 VPP25 VPP-1 VDD-7 C0.1u16X7/4
143 215 143 215 C18
286 VPP-2 VDD-8 212 286 VPP-2 VDD-8 212 C0.1u16X7/4
287 VPP-3 VDD-9 209 287 VPP-3 VDD-9 209
VPP-4 VDD-10 VPP-4 VDD-10

1
288 206 288 206
VPP-5 VDD-11 204 VPP-5 VDD-11 204 D84

7
VDD-12 92 VDD-12 92 C9 C8 R7
77 VDD-13 90 77 VDD-13 90 C1000p50X/4 C0.1u16X7/4
VTT_DDR VTT-1 VDD-14 VTT_DDR VTT-1 VDD-14 1KR1%/4
221 88 221 88 VCC_DDR ESD-AOZ8231ADI

2
VTT-2 VDD-15 85 VTT-2 VDD-15 85
VDD-16 83 VDD-16 83

-b x
146 VDD-17 80 146 VDD-17 80
DIMM_CA_VREF_B VREFCA VDD-18 DIMM_CA_VREF_B VREFCA VDD-18
76 76
VDD-19 73 VDD-19 73
VDD-20 70 VDD-20 70
MEC3 VDD-21 67 MEC3 VDD-21 67
MEC2 MEC3 VDD-22 64 MEC2 MEC3 VDD-22 64
MEC1 MEC2 VDD-23 61 MEC1 MEC2 VDD-23 61
MEC1 VDD-24 59 MEC1 VDD-24 59
VDD-25 VDD-25

DDRIV-288P_BLACK-RH-21 DDRIV-288P_BLACK-RH-21
N13-2880581-L06 N13-2880701-L06

. d
VCC3_SPD C297 C0.1u16X7/4 VCC_DDR C109 C1u6.3X/6
VCC3_SPD C298 C0.1u16X7/4 VCC_DDR C207 C1u6.3X/6 C201 C1u6.3X/6
C C111 C1u6.3X/6 C143 C1u6.3X/6 C
C164 C1u6.3X/6 C205 C1u6.3X/6
C198 C1u6.3X/6

d
C103 C2.2u6.3X/4
DIMM_CA_VREF_B C38 C2.2u6.3X/4 C142 C0.1u16X7/4 DIMM_CA_VREF_B C25 C2.2u6.3X/4 C94 C2.2u6.3X/4
C35 C0.1u16X7/4 C193 C0.1u16X7/4 C27 C0.1u16X7/4
C120 C0.1u16X7/4
VTT_DDR C183 C0.1u16X7/4 VTT_DDR C197 C0.1u16X7/4 C123 C0.1u16X7/4
C128 C0.1u16X7/4

VPP25 C327 X_C0.1u16X7/4 VPP25 C326 X_C0.1u16X7/4

m
C309 C0.1u16X7/4 C311 C0.1u16X7/4

s
DIMMB1B DIMMB2B
2 147 2 147
4 VSS-93 VSS-46 149 4 VSS-93 VSS-46 149
6 VSS-92 VSS-45 151 6 VSS-92 VSS-45 151
9 VSS-91 VSS-44 154 9 VSS-91 VSS-44 154
11 VSS-90 VSS-43 156 11 VSS-90 VSS-43 156
13 VSS-89 VSS-42 158 13 VSS-89 VSS-42 158
15 VSS-88 VSS-41 160 15 VSS-88 VSS-41 160
17 VSS-87 VSS-40 162 17 VSS-87 VSS-40 162
20 VSS-86 VSS-39 165 20 VSS-86 VSS-39 165
B 22 VSS-85 VSS-38 167 22 VSS-85 VSS-38 167 B
24 VSS-84 VSS-37 169 24 VSS-84 VSS-37 169
26 VSS-83 VSS-36 171 26 VSS-83 VSS-36 171
28 VSS-82 VSS-35 173 28 VSS-82 VSS-35 173
31 VSS-81 VSS-34 176 31 VSS-81 VSS-34 176
33 VSS-80 VSS-33 178 33 VSS-80 VSS-33 178
35 VSS-79 VSS-32 180 35 VSS-79 VSS-32 180
37 VSS-78 VSS-31 182 37 VSS-78 VSS-31 182
39 VSS-77 VSS-30 184 39 VSS-77 VSS-30 184
42 VSS-76 VSS-29 187 42 VSS-76 VSS-29 187
44 VSS-75 VSS-28 189 44 VSS-75 VSS-28 189
46 VSS-74 VSS-27 191 46 VSS-74 VSS-27 191
48 VSS-73 VSS-26 193 48 VSS-73 VSS-26 193
50 VSS-72 VSS-25 195 50 VSS-72 VSS-25 195
53 VSS-71 VSS-24 198 53 VSS-71 VSS-24 198
55 VSS-70 VSS-23 200 55 VSS-70 VSS-23 200
57 VSS-69 VSS-22 202 57 VSS-69 VSS-22 202
94 VSS-68 VSS-21 239 94 VSS-68 VSS-21 239
96 VSS-67 VSS-20 241 96 VSS-67 VSS-20 241
98 VSS-66 VSS-19 243 98 VSS-66 VSS-19 243
101 VSS-65 VSS-18 246 101 VSS-65 VSS-18 246
103 VSS-64 VSS-17 248 103 VSS-64 VSS-17 248
105 VSS-63 VSS-16 250 105 VSS-63 VSS-16 250
107 VSS-62 VSS-15 252 107 VSS-62 VSS-15 252
109 VSS-61 VSS-14 254 109 VSS-61 VSS-14 254
112 VSS-60 VSS-13 257 112 VSS-60 VSS-13 257
114 VSS-59 VSS-12 259 114 VSS-59 VSS-12 259
116 VSS-58 VSS-11 261 116 VSS-58 VSS-11 261
118 VSS-57 VSS-10 263 118 VSS-57 VSS-10 263
120 VSS-56 VSS-9 265 120 VSS-56 VSS-9 265
123 VSS-55 VSS-8 268 123 VSS-55 VSS-8 268
A VSS-54 VSS-7 VSS-54 VSS-7 A
125 270 125 270
127 VSS-53 VSS-6 272 127 VSS-53 VSS-6 272
129 VSS-52 VSS-5 274 129 VSS-52 VSS-5 274
131 VSS-51 VSS-4 276 131 VSS-51 VSS-4 276
134 VSS-50 VSS-3 279 134 VSS-50 VSS-3 279
136 VSS-49 VSS-2 281 136 VSS-49 VSS-2 281
VSS-48 VSS-1 VSS-48 VSS-1
138
VSS-47 VSS-0
283 138
VSS-47 VSS-0
283
MICRO-START INT'L CO.,LTD.
Title
DDRIV-288P_BLACK-RH-21 DDRIV-288P_BLACK-RH-21 DDR4-POWER/GND-2
N13-2880581-L06 N13-2880701-L06 Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 14 of 68
5 4 3 2 1
5 4 3 2 1

FCH1A

APU_TXP0 G5 G1 APURXP0 C505 C0.22u6.3X/4


[4] APU_TXP0 APU_RXP0 APU_TXP0 APU_RXP0 [4]
APU_TXN0 G4 G2 APURXN0 C504 C0.22u6.3X/4
[4] APU_TXN0 APU_RXN0 APU_TXN0 APU_RXN0 [4]
APU_TXP1 J5 J1 APURXP1 C515 C0.22u6.3X/4
[4] APU_TXP1 APU_RXP1 APU_TXP1 APU_RXP1 [4]
APU_TXN1 J4 J2 APURXN1 C514 C0.22u6.3X/4

u
[4] APU_TXN1 APU_RXN1 APU_TXN1 APU_RXN1 [4]
APU_TXP2 L5 L1 APURXP2 C503 C0.22u6.3X/4
[4] APU_TXP2 APU_RXP2 APU_TXP2 APU_RXP2 [4]
APU_TXN2 L4 L2 APURXN2 C502 C0.22u6.3X/4
[4] APU_TXN2 APU_RXN2 APU_TXN2 APU_RXN2 [4]

r
D D
APU_TXP3 N5 N1 APURXP3 C513 C0.22u6.3X/4
[4] APU_TXP3 APU_RXP3 APU_TXP3 APU_RXP3 [4]
APU_TXN3 N4 N2 APURXN3 C512 C0.22u6.3X/4

.
[4] APU_TXN3 APU_RXN3 APU_TXN3 APU_RXN3 [4]

R23 M25
PCI_E6 [21]
[21]
PE6_GPP_RX0P
PE6_GPP_RX0N R24 GPP_RXP0
GPP_RXN0
GPP_TXP0
GPP_TXN0
M26
PE6_GPP_TX0P [21]
PE6_GPP_TX0N [21] PCI_E6

7
P23 N24
LAN [30]
[30]
PE_LAN_RXP
PE_LAN_RXN R22 GPP_RXP1 GPP_TXP1 N25
PE_LAN_TXP [30]
PE_LAN_TXN [30] LAN
T21
T22
GPP_RXN1

GPP_RXP2
PCIE GPP_TXN1

GPP_TXP2
P25
P26

-b x
GPP_RXN2 GPP_TXN2
NO SUPPORT FOR PROM2 T23
T24 GPP_RXP3 GPP_TXP3
R26
R25
NO SUPPORT FOR PROM2
GPP_RXN3 GPP_TXN3

[21] GPP_RX4P K22 H25 GPP_TX4P [21]


L22 GPP_RXP4 GPP_TXP4 H26
[21] GPP_RX4N GPP_RXN4 GPP_TXN4 GPP_TX4N [21]

[22] GPP_RX5P L24 H24 GPP_TX5P [22]


L23 GPP_RXP5 GPP_TXP5 J24
PCI_E4 [22] GPP_RX5N
M23
GPP_RXN5 GPP_TXN5
K25
GPP_TX5N [22]
PCI_E4
[22] GPP_RX6P GPP_RXP6 GPP_TXP6 GPP_TX6P [22]
M22 K26
PCIE_2/3/5 SWITCH [22] GPP_RX6N
P22
GPP_RXN6 GPP_TXN6
L26
GPP_TX6N [22]
PCIE_2/3/5 SWITCH

d
[22] GPP_RX7P GPP_RXP7 GPP_TXP7 GPP_TX7P [22]
[22] GPP_RX7N N22 L25 GPP_TX7N [22]
GPP_RXN7 GPP_TXN7

.
[39] SATA_RX0+ E15 A15 SATA_TX0+ [39]
C D15 SATA_RXP0 SATA_TXP0 B15 C

SATA 1-2
[39] SATA_RX0-
E16
SATA_RXN0 SATA_TXN0
A16
SATA_TX0- [39]
SATA 1-2
[39] SATA_RX1+ SATA_RXP1 SATA_TXP1 SATA_TX1+ [39]

d
[39] SATA_RX1- D16 B16 SATA_TX1- [39]
SATA_RXN1 SATA_TXN1
E17
D17 SATA_RXP2
SATA SATA_TXP2
A17
B17

NO SUPPORT FOR PROM2 E18


SATA_RXN2 SATA_TXN2
A18
NO SUPPORT FOR PROM2
D18 SATA_RXP3 SATA_TXP3 B18
SATA_RXN3 SATA_TXN3

m
[39] SATA_RX2+ D11 B11 SATA_TX2+ [39]
E11 SATAE_RXP0 SATAE_TXP0 A11
[39] SATA_RX2- SATAE_RXN0 SATAE_TXN0 SATA_TX2- [39]
SATA 3-4 [39] SATA_RX3+ D12
E12 SATAE_RXP1 SATAE_TXP1
B12
A12
SATA_TX3+ [39] SATA 3-4
[39] SATA_RX3- SATAE_RXN1 SATA SATAE_TXN1 SATA_TX3- [39]

s
D13 B13
E13 SATAE_RXP2 Express SATAE_TXP2 A13

NO SUPPORT FOR PROM2 D14


SATAE_RXN2 SATAE_TXN2
B14
NO SUPPORT FOR PROM2
E14 SATAE_RXP3 SATAE_TXP3 A14
SATAE_RXN3 SATAE_TXN3
DEVSLP

B22 E20 PM_SATA_LED R505 X_R/4


DEVSLP0/DEBUG0 SATALED0/DEBUG8 SATA_LED# [6,57]
C23 E19 PM_SATA_LED
A22 DEVSLP1/DEBUG1 SATALED1/DEBUG9 A20
D21 DEVSLP2/DEBUG2 SATALED2/DEBUG10 B20
DEVSLP3/DEBUG3 SATALED3/DEBUG11
LED

C22 C20 PM_SATA_LED


C21 DEVSLP4/DEBUG4 SATALED4/DEBUG12 A19 PM_SATA_LED
B DEVSLP5/DEBUG5 SATALED5/DEBUG13 B19 B
SATALED6/DEBUG14 C19
SATALED7/DEBUG15
R489 20KR1%/4 IFDET0 C8
R488 20KR1%/4 IFDET1 A7 IFDET0 C9 PREXT R490 12.1K1%/4
IFDET1 PREXT
PROMONTORY
PROM-B450
B01-21808L5-A08
SATA Express port0 (IFDET0)
SATA Express port1 (IFDET1)
0:SATA Mode
1:PCIE Mode

A A

MICRO-START INT'L CO.,LTD.


Title
Promontory-PCIE/SATA/SATAE
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 15 of 68
5 4 3 2 1
5 4 3 2 1

u
FCH1B
USB

r
D AF16 AE1 D
[38] PM_USB_SSTX0+ USB_SS_TXP0 USB_HSDP0 PM_USB0+ [36]
AE16 AE2 LAN_USB1 TYPE-A GEN2 OC1#
[38] PM_USB_SSTX0- USB_SS_TXN0 USB_HSDN0 PM_USB0- [36]
USB3.0 180° JUSB3 AF17 AC6

.
[38] PM_USB_SSTX1+ USB_SS_TXP1 USB_HSDP1 PM_USB1+ [37]
AE17 AC5
[38] PM_USB_SSTX1- USB_SS_TXN1 USB_HSDN1 PM_USB1- [37]
AF18 JUSB1 USB2.0 OC7#
AE18 USB_SS_TXP2 Y3
USB_SS_TXN2 USB_HSDP2 PM_USB2+ [37]
AF20 Y4
USB_SS_TXP3 USB_HSDN2 PM_USB2- [37]
AE20 AB1

7
USB_SS_TXN3 USB_HSDP3 USB_FLASH_DP0 [34]
Not supported USB3.0 on PROM2 AF21 AB2
USB_SS_TXP4 USB_HSDN3 USB_FLASH_DN0 [34]
AE21 PS2+USB2.0
AF22 USB_SS_TXN4 AD1
USB_SS_TXP5 USB_HSDP4 PS2_USB1+ [34]
AE22 AD2
USB_SS_TXN5 USB_HSDN4 PS2_USB1- [34]
AD4

-b x
USB_HSDP5 PM_USB5+ [36]
AD3 LAN_USB1 TYPE-A GEN2 OC1#
USB_HSDN5 PM_USB5- [36]
AB15
[38] PM_USB_SSRX0+ USB_SS_RXP0
AC15 AA1
[38] PM_USB_SSRX0- USB_SS_RXN0 USB_HSDP6

USB3.0
USB3.0 180° JUSB3 AC16 AA2

USB2.0
[38] PM_USB_SSRX1+ USB_SS_RXP1 USB_HSDN6
AB16 Y5
[38] PM_USB_SSRX1- USB_SS_RXN1 USB_HSDP7
AB18 Y6
AC18 USB_SS_RXP2 USB_HSDN7
USB_SS_RXN2 Not supported USB3.0 on PROM2
AC19 AB5
AB19 USB_SS_RXP3 USB_HSDP8 AB6
AC21 USB_SS_RXN3 USB_HSDN8 AB4
Not supported USB3.0 on PROM2 USB_SS_RXP4 USB_HSDP9
AB21 AB3
AF24 USB_SS_RXN4 USB_HSDN9
AE24 USB_SS_RXP5 W5
USB_SS_RXN5 USB_HSDP10 PM_USB10+ [38]
W6

d
USB_HSDN10 PM_USB10- [38]
V3 JUSB3 USB3.0 180° OC2#
USB_HSDP11 PM_USB11+ [38]
V4

.
USB_HSDN11 PM_USB11- [38]
AE12
[36] PM_USB_SSPTX0+ USB_SSP_TXP0
AF12 V1
[36] PM_USB_SSPTX0- USB_SSP_TXN0 USB_HSDP12 PM_USB12+ [37]
C AE14 V2 C
[36] PM_USB_SSPTX1+ USB_SSP_TXP1 USB_HSDN12 PM_USB12- [37]
TYPE-A GEN2 LAN_USB1 AF14 W1 PM_USB13+ [37] JUSB2 USB2.0 OC7#
[36] PM_USB_SSPTX1- USB_SSP_TXN1 USB_HSDP13 W2 PM_USB13- [37]
USB_HSDN13

d
AB11
[36] PM_USB_SSPRX0+ USB_SSP_RXP0
AA11
[36] PM_USB_SSPRX0- USB_SSP_RXN0
AC13
[36] PM_USB_SSPRX1+ USB_SSP_RXP1
AB13 AF6
[36] PM_USB_SSPRX1- USB_SSP_RXN1 PPON_0 AE6
PPON_1 AF7
PPON_2 AE7
AF1 PPON_3 AD7
USB_OC0N PPON_4

m
USBTYPEA LAN_USB1 PM_OC1# AF2 AC7

PPON
[36] PM_OC1# USB_OC1N PPON_5
JUSB3 PM_OC2# AE3 AB7
[38] PM_OC2# USB_OC2N PPON_6
AF3 AA7
USB_OC3N PPON_7

OC
PM_OC4# AF4 AC9
PM_OC5# AE4 USB_OC4N PPON_8 AB9
USB_OC5N PPON_9

s
PM_OC6# AE5 AA9
PM_OC7# AF5 USB_OC6N PPON_10 AF9
JUSB1/JUSB2/PS2+USB2.0 [34,37] PM_OC7# USB_OC7N PPON_11 AE9
PPON_12 AD9
R496 12.1K1%/4 UREXT AF10 PPON_13
UREXT
PROMONTORY
B01-21808L5-A08 PROM-B450

B B
3VSB

R2485 4.7K/4 PM_OC1#


R441 4.7K/4 PM_OC2#

R456 4.7K/4 PM_OC4#


R467 4.7K/4 PM_OC5#
R466 4.7K/4 PM_OC6#
R455 4.7K/4 PM_OC7#

A A

MICRO-START INT'L CO.,LTD.


Title
Promontory-USB/OC
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 16 of 68
5 4 3 2 1
5 4 3 2 1

VCC3

FCH1C
R2540 10KR/4 CLKREQ1 CLOCKS
[7] APU_CLKP A8 AC26 GPP_CLK0P [21]
A9 APU_CLKP GPP_CLKP0 AC25
[7] APU_CLKN APU_CLKN GPP_CLKN0 GPP_CLK0N [21] PCIE_E6
AA26 PE_LAN_CLKP [30]
GPP_CLKP1 AA25
GPP_CLKN1 PE_LAN_CLKN [30] LAN
PCIE6 CLKREQ0 AD26
AD25 GPP_CLKREQ0N Y26
LAN

u
[30] CLKREQ1 GPP_CLKREQ1N GPP_CLKP2
R540 10KR/4 CLKREQ0 AD23 Y25
R538 X_10KR/4 CLKREQ1 W22 GPP_CLKREQ2N GPP_CLKN2
CLKREQ4 AA23 GPP_CLKREQ3N V26
PCIE4 GPP_CLKREQ4N/DEBUG16 GPP_CLKP3

r
D R533 10KR/4 CLKREQ4 PCIE5 CLKREQ5 Y22 V25 D
R2521 10KR/4 CLKREQ5 CLKREQ6 AA22 GPP_CLKREQ5N/DEBUG17 GPP_CLKN3
PCIE2 GPP_CLKREQ6N/DEBUG18
R515 10KR/4 CLKREQ6 PCIE3 CLKREQ7 AC23 AB26

.
GPP_CLKREQ7N/DEBUG19 GPP_CLKP4 GPP_CLK4P [21]
R530 10KR/4 CLKREQ7 AB25 GPP_CLK4N [21] PCIE_E4
TP8 A10 GPP_CLKN4
TP24 B10 SATAE_CLKREQ0N Y24
SATAE_CLKREQ1N GPP_CLKP5 GPP_CLK5P [21]
Y23 GPP_CLK5N [21] PCIE_E5
GPP_CLKN5

7
CL27 X_C22p50N/4 PM_X1_25_R R494 0R/4 PM_X1_25 AE10 W26
XI GPP_CLKP6 GPP_CLK6P [21]
W25 GPP_CLK6N [21] PCIE_E2
GPP_CLKN6

2
3
W24 GPP_CLK7P [21]
Y8 GPP_CLKP7 W23 PCIE_E3

-b x
GPP_CLKN7 GPP_CLK7N [21]
25MHZ18p R493 C537 PM_X2_25 AD10
C10p50N/4 XO
X_1MR/4
PROMONTORY

1
4
B01-21808L5-A08 PROM-B450

CL26 X_C22p50N/4 PM_X2_25_R R491 0R/4


D04-1006700-F07

D85 X_S-LRB520S-40T1G Follow CRB


VCC3 3VSB

d
R2593 0R/4 LAN_WAKE# [24,30]
FCH1D

.
R547 X_R/4 PWR_GD C25 V5 R503
[53,55] PM_PWRGD PWR_GD PEWAKEN APU_WAKE# [6,17,20,21,26]
4.7K/4
C PCIERST#_PROM V6 AC10 C

VCC33
[25] PCIERST#_PROM
PGG_INIT AE26
PERSTN ACPI GPP_RSTN PM_GPP_RST [25,30]
PM_SMI
[6,17,20,21,26] APU_WAKE# R523 X_0R/4 C533 X_C100p50N/4 R495 X_R/4
GPP_INTN

G
d
B7 PM_SMI PM_INI R504 X_0R/4 APU_LPC_PME# [6,24]

D
SMI Q73
C26 A21 PM_INI N-2N7002
R525 4.7K/4 PGG_INIT D25 FAN_CTRL/DEBUG21 INT_GPIO/DEBUG6
TACH_IN/DEBUG20 FAN VCC33
R485 4.7K/4 PM_SCLK Can't programming by BIOS is AMD bug
R487 4.7K/4 PM_SDATA PM_SCLK E8 A1 PM_GPIO_R0 PM_GPIO_R0 R447 200KR/4 GPIO_R4:
PM_SDATA F8 SMCL GPIO_R0 B3 PM_GPIO_R1 PM_GPIO_R1 R448 200KR/4 0:GPP clock source from Crystal, also enables GPIO_R8
SMDA SMBus GPIO_R1 1:GPP clock source from APU_CLKP/N

m
R480 10KR/4 UART_RX C4 PM_GPIO_R2 PM_GPIO_R2 R450 200KR/4

UART_RX E7
GPIO GPIO_R2
GPIO_R3
A3
A24
PM_GPIO_R3
PM_GPIO_R4
PM_GPIO_R3
PM_GPIO_R4
R449 200KR/4
R532 200KR/4 GPIO_R5:
UART_TX D7 UART_RX GPIO_R4/DEBUG22 A26 PM_GPIO_R5 PM_GPIO_R5 R537 X_200KR/4 0:USBC SSC Enable
R522 200KR/4 PM_TCK TCK/TDO: UART_TX GPIO_R5/DEBUG23 E25 PM_GPIO_R6 PM_GPIO_R6 R544 200KR/4 1:USBC SSC Disable
GPIO_R6/DEBUG24

s
R528 200KR/4 PM_TDO 00:Debug signal group 0 output B26 PM_GPIO_R7 PM_GPIO_R7 R548 200KR/4 PM_GPIO_R9
01:Debug signal group 1 output PM_SPI_CLK_R C5 GPIO_R7/DEBUG25 F24 PM_GPIO_R8 PM_GPIO_R8 R541 200KR/4 GPIO_R6:
R521 X_1KR/4 PM_TCK 10:Debug signal group 2 output A5 SPI_SCK GPIO_R8/DEBUG26 E22 PM_GPIO_R9 PM_GPIO_R9 R517 200KR/4 0:SATA SSC Enable Page 17 pull high
11:Debug signal group 3 output SPI_CS GPIO_R9/DEBUG27 1:SATA SSC Disable 1:Type 0/1 1.05V
R527 X_1KR/4 PM_TDO PM_SPI_DATAIN B5 E26 PM_GPIO_R11 R546 200KR/4
PM_SPI_DATAOUT A4 SPI_SDI
SPI_SDO
SPI GPIO_R10/DEBUG28
GPIO_R11/DEBUG29
F23 PM_GPIO_R11 0:Type 2/3 0.9V
F26 R531 X_1KR/4 PM_GPIO_R4 GPIO_R7:
PM_TCK B23 GPIO_R12/DEBUG30 E23 Can't programming by BIOS is AMD bug R536 1KR/4 PM_GPIO_R5 0:SATA Express SSC Enable
R535 X_200KR/4 PM_DBUGEN Debug Enable: PM_TDI C24 TCK GPIO_R13/DEBUG31 B21 R543 X_1KR/4 PM_GPIO_R6 1:SATA Express SSC Disable
TP25 TDI GPIO_R14/DEBUG7
R534 1KR/4 PM_DBUGEN 0:Function mode PM_TDO A23 R539 X_1KR/4 PM_GPIO_R7
1:Debug mode PM_TMS D24 TDO R542 X_1KR/4 PM_GPIO_R8 GPIO_R8:(Enabled from GPIO_R4)
TP26 TMS 0:GPP SSC Enable
PM_RTCK F25 B1 LAN_BIOS_OFF# R516 X_1KR/4 PM_GPIO_R9
TP27 RTCK GPIO0 LAN_BIOS_OFF# [30] 1:GPP SSC Disable
B4 R545 X_1KR/4 PM_GPIO_R11
R2562 200KR/4 PM_PKG0 MISC GPIO1
GPIO2
C6 MBID1
R484 200KR/4 PM_PKG1 PM_TESTEN AF26 B6 MBID2 For BOM Option GPIO_R11:

B R748 X_0R/4
PM_DBUGEN B25
EFUSE_PWR Y21
TESTEN
DEBUG_ENABLE
GPIO3
GPIO4
A6
B2
MBID3
GPIO5
BOARD ID VCC33 0:GPP clock output Disabled
1:GPP clock output Enabled B
R518 X_200KR/4 PM_TESTEN EFUSE_PWR GPIO5 C7 GPIO6 1KR/4 R459 GPIO5 R460 X_200KR/4
GPIO6 Board ID
R519 1KR/4 PM_TESTEN [6] CLK_REQ1 R2552 X_0R/4 PM_PKG0 D9 A2 GPIO7 X_1KR/4 R473 GPIO6 R463 200KR/4
PM_PKG1 D8 PKG0 GPIO7 X_1KR/4 R464 GPIO7 R465 200KR/4
TESTEN: PKG1
0:Function mode PROMONTORY LAN_BIOS_OFF# R446 200KR/4
1:Test mode PROM-B450
B01-21808L5-A08

VCC33
BOM OPTION
VCC3
3VSB
D03-PA00209-N03
S

VCC33 R479 X_10KR/4 MBID1 R478 10KR/4


G P-PA002FMG R482 X_10KR/4 MBID2 R477 10KR/4
SPI_SDO/SPI_SCK: Q387 R483 X_10KR/4 MBID3 R481 10KR/4
GPP_Group0
D

R461 200KR/4 PM_SPI_CLK_R


R471 X_200KR/4 PM_SPI_DATAOUT 00:Reserved R2561 From Slot
01:By1X4 4.7K/4
R472 X_1KR/4 PM_SPI_CLK_R 10:By2X1+By1X2 R462 MBID1 MBID2 MBID3
R470 1KR/4 PM_SPI_DATAOUT 200KR/4
11:By4X1 B450-GAMING Pro
601-7B86 1 0 0
UART_TX
B450-GAMING PLUS
N-2N7002
601-7B86 0 0 0
[21,22] X1_ENABLE# G
D
A Q388 A
VCC33
UART_TX/SPI_SDI: S
R476 1 1 0
GPP_Group1
1KR/4
R475 200KR/4 PM_SPI_DATAIN 00:Reserved
01:By1X4
Schematic Cfg Project
N-2N7002
MICRO-START INT'L CO.,LTD.
D
R474 X_1KR/4 PM_SPI_DATAIN
10:By2X1+By1X2 G
Q381
11:By4X1
S MS-7B86/B450 GAMING PLUS V A
Title
MS-7B86/B450-A PRO Promontory-CLK/ACPI/GPIO
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 17 of 68
5 4 3 2 1
5 4 3 2 1

u
VCC25
5.5A 900mA

r
D
PM_2P5V VCC25 D
VDD105 VCC25
PM_1P05 VDD105 FCH1E

.
H15 POWER
H17 VDD105_0 C1
L26 30L5A C508 C22u6.3X/6 J11 VDD105_1 VCC25_0 C2 L27 30L5A C506 C22u6.3X/6 C479 X_C22u6.3X/6
C497 C22u6.3X/6 K8 VDD105_2 VCC25_1 C3 C480 C22u6.3X/6 C482 X_C22u6.3X/6
L25 30L5A K9 VDD105_3 VCC25_2 D1 C481 X_C22u6.3X/6

7
C517 C0.1u16X7/4 K13 VDD105_4 VCC25_3 D2
L02-3008043-M26 C516 C1u6.3X/4
C860 C0.1u16X7/4 K14 VDD105_5 VCC25_4 D3 C859 C1u6.3X/4 C890 X_C1u6.3X/4
L02-3008043-M26 C864 C0.1u16X7/4 K17 VDD105_6 VCC25_5 D4 C863 C1u6.3X/4 C509 X_C1u6.3X/4
C861 C0.1u16X7/4 L8 VDD105_7 VCC25_6 D5 C886 C1u6.3X/4 C488 X_C1u6.3X/4
C866 C0.1u16X7/4 L17 VDD105_8 VCC25_7 D6 C870 C1u6.3X/4 C499 X_C1u6.3X/4

-b x
C875 C0.1u16X7/4 M17 VDD105_9 VCC25_8 E1 C891 C1u6.3X/4 C519 X_C1u6.3X/4
C878 C0.1u16X7/4 N17 VDD105_10 VCC25_9 E2 C883 C1u6.3X/4 C496 X_C1u6.3X/4
C879 C0.1u16X7/4 P7 VDD105_11 VCC25_10 E3 C862 C1u6.3X/4 C510 X_C1u6.3X/4
C877 C0.1u16X7/4 P8 VDD105_12 VCC25_11 E4 C881 X_C1u6.3X/4
C880 C0.1u16X7/4 P17 VDD105_13 VCC25_12 E5 C518 X_C1u6.3X/4
C888 C0.1u16X7/4 R1 VDD105_14 VCC25_13 E6 C872 X_C1u6.3X/4
C867 C0.1u16X7/4 R2 VDD105_15 VCC25_14 F6 C885 X_C1u6.3X/4
C871 C0.1u16X7/4 R3 VDD105_16 VCC25_15 K11 C493 X_C1u6.3X/4
R4 VDD105_17 VCC25_16 K12
R5 VDD105_18 VCC25_17 K15 C492 X_C180P50N/4
R6 VDD105_19 VCC25_18 K16
R7 VDD105_20 VCC25_19 M8
R8 VDD105_21 VCC25_20 M19
VDD105 R17 VDD105_22 VCC25_21 N8

d
T1 VDD105_23 VCC25_22 N19
T2 VDD105_24 VCC25_23 P19

.
T3 VDD105_25 VCC25_24 R19
C469 X_C22u6.3X/6 T4 VDD105_26 VCC25_25 V12
C C461 X_C22u6.3X/6 T5 VDD105_27 VCC25_26 V13 C
C472 X_C22u6.3X/6 T6 VDD105_28 VCC25_27 V17
C478 X_C22u6.3X/6 T7 VDD105_29 VCC25_28 VCC33
VDD105_30 200mA VCC3 VCC33

d
C484 X_C22u6.3X/6 T8
C468 X_C22u6.3X/6 T17 VDD105_31 VCC33
C458 X_C22u6.3X/6 U1 VDD105_32 C892 C0.1u16X7/4
U2 VDD105_33 G9 C889 C0.1u16X7/4
C887 X_C0.1u16X7/4 U3 VDD105_34 VCC33_0 L18 L29 30L5A C587 C22u6.3X/6 C868 C0.1u16X7/4
C511 X_C0.1u16X7/4 U4 VDD105_35 VCC33_1 Y20
C869 X_C0.1u16X7/4 U5 VDD105_36 VCC33_2 70mA
C873 X_C0.1u16X7/4 U6 VDD105_37 VSUS33 L02-3008043-M26
VDD105_38 VSUS33

m
C884 X_C0.1u16X7/4 U7
C865 X_C0.1u16X7/4 U8 VDD105_39 V8
C874 X_C0.1u16X7/4 U17 VDD105_40 VSUS33_0 AA8 3VSB
C882 X_C0.1u16X7/4 V9 VDD105_41 VSUS33_1 AB8 VSUS33
C858 X_C0.1u16X7/4 V10 VDD105_42 VSUS33_2 AC8 C522 X_C22u6.3X/6
VDD105_43 VSUS33_3

s
C476 X_C0.1u16X7/4 V11 AD8
C498 X_C0.1u16X7/4 V14 VDD105_44 VSUS33_4 AE8 L28 220L2A-50 C524 C22u6.3X/6 C529 X_C0.1u16X7/4
C462 X_C0.1u16X7/4 V15 VDD105_45 VSUS33_5 AF8 C528 X_C0.1u16X7/4
C857 X_C0.1u16X7/4 V16 VDD105_46 VSUS33_6 50mA C531 C0.1u16X7/4 C520 X_C0.1u16X7/4
C876 X_C0.1u16X7/4 V20 VDD105_47 VSUS105 L02-2218023-M26 C523 X_C0.1u16X7/4
V21 VDD105_48 C530 X_C0.1u16X7/4
W11 VDD105_49 V7
W13 VDD105_50 VSUS105_0 W15
W16 VDD105_51 VSUS105_1
VDD105_52 PM_1P05_S5 VSUS105 VSUS105
PROMONTORY
B01-21808L5-A08 PROM-B450
C553 X_C0.1u16X7/4
L30 220L2A-50 C556 C22u6.3X/6
B C554 C0.1u16X7/4 B
L02-2218023-M26

A A

MICRO-START INT'L CO.,LTD.


Title
Promontory-Power
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 18 of 68
5 4 3 2 1
A
B
C
D

5
5

s
M15
M14
M13
M12
M11
M10
M7

V24
V23
V22
L16
L11
L10
W21
K10

U16
U12
U10
T16
T15
T14
T13
T12
T11
T10
P15
P14
P13
P12
P11
P10

R15
R14
R13
R12
R11
R10
N15
N14
N13
N12
N11
N10
FCH1F

GND_1

GND_9
GND_8
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
GND_0

AF25

GND_42
GND_41
GND_40
GND_39
GND_38
GND_37
GND_36
GND_35
GND_34
GND_33
GND_32
GND_31
GND_30
GND_29
GND_28
GND_27
GND_26
GND_25
GND_24
GND_23
GND_22
GND_21
GND_20
GND_19
GND_18
GND_17
GND_16
GND_15
GND_14
GND_13
GND_12
GND_11
GND_10

AF23 GNDA_0 A25


AF19 GNDA_185 GNDA_1 B8
AF15 GNDA_184 GNDA_2 B9
AF13 GNDA_183 GNDA_3 B24
AF11 GNDA_182 GNDA_4 C10
AE25 GNDA_181 GNDA_5 C11
AE23 GNDA_180 GNDA_6 C12
AE19 GNDA_179 GNDA_7 C13
AE15 GNDA_178 GNDA_8 C14
GNDA_177 GNDA_9

4
4

AE13 C15
AE11 GNDA_176 GNDA_10 C16

m
AD24 GNDA_175 GNDA_11 C17
AD22 GNDA_174 GNDA_12 C18
AD21 GNDA_173 GNDA_13 D10
AD20 GNDA_172 GNDA_14 D19
AD19 GNDA_171 GNDA_15 D20
AD18 GNDA_170 GNDA_16 D22
AD17 GNDA_169 GNDA_17 D23
AD16 GNDA_168 GNDA_18 D26
AD15 GNDA_167 GNDA_19 E9
AD14 GNDA_166 GNDA_20 E10
AD13 GNDA_165 GNDA_21 E24
AD12 GNDA_164 GNDA_22 F1
GNDA_163 GNDA_23

d
AD11 F2
AD6 GNDA_162 GNDA_24 F3
AD5 GNDA_161 GNDA_25 F4
AC24 GNDA_160 GNDA_26 F5
AC22 GNDA_159 GNDA_27 F9
AC20 GNDA_158 GNDA_28 F10
GNDA_157 GNDA_29

. d AC17
AC14
AC12
AC11
AC4
AC3
AC2
AC1
AB24
AB23
AB22
AB20
AB17
GNDA_156
GNDA_155
GNDA_154
GNDA_153
GNDA_152
GNDA_151
GNDA_150
GNDA_149
GNDA_148
GNDA_147
GNDA_146
GNDA_145
GNDA_144
GNDA_30
GNDA_31
GNDA_32
GNDA_33
GNDA_34
GNDA_35
GNDA_36
GNDA_37
GNDA_38
GNDA_39
GNDA_40
GNDA_41
F11
F12
F13
F14
F15
F16
F17
F18
F19
F22
G3
G6
G22
PROMONTORY

AB14 GNDA_42 G23


GND

AB12 GNDA_143 GNDA_43 G24


AB10 GNDA_142 GNDA_44 G25

3
3

AA24 GNDA_141 GNDA_45 G26


AA21 GNDA_140 GNDA_46 H1
AA20 GNDA_139 GNDA_47 H2
AA19 GNDA_138 GNDA_48 H3
AA18 GNDA_137 GNDA_49 H4
AA17 GNDA_136 GNDA_50 H5
AA16 GNDA_135 GNDA_51 H6
AA15 GNDA_134 GNDA_52 H22
AA14 GNDA_133 GNDA_53 H23
AA13 GNDA_132 GNDA_54 J3
AA12 GNDA_131 GNDA_55 J6
AA10 GNDA_130 GNDA_56 J22
AA6 GNDA_129 GNDA_57 J23
AA5 GNDA_128 GNDA_58 J25
AA4 GNDA_127 GNDA_59 J26
AA3 GNDA_126 GNDA_60 K1
Y2 GNDA_125 GNDA_61 K2
Y1 GNDA_124 GNDA_62 K3
W4 GNDA_123 GNDA_63 K4
W3 GNDA_122 GNDA_64 K5
U26 GNDA_121 GNDA_65 K6
U25 GNDA_120 GNDA_66 K23
U24 GNDA_119 GNDA_67 K24
U23 GNDA_118 GNDA_68 L3
U22 GNDA_117 GNDA_69 L6
GNDA_116 GNDA_70 L9
GNDA_71
-b x GNDA_111
GNDA_108
GNDA_105
GNDA_104

GNDA_115
GNDA_114
GNDA_113
GNDA_112
GNDA_110
GNDA_109
GNDA_107
GNDA_106
GNDA_103
GNDA_102
GNDA_101
GNDA_100
GNDA_99
GNDA_98
GNDA_97
GNDA_96
GNDA_95
GNDA_90
GNDA_89
GNDA_88

GNDA_94
GNDA_93
GNDA_92
GNDA_91
GNDA_87
GNDA_86
GNDA_85
GNDA_84
GNDA_83
GNDA_82
GNDA_81
GNDA_80
GNDA_79
GNDA_78
GNDA_77
GNDA_76
GNDA_75
GNDA_74
GNDA_73
GNDA_72

T9
P9
P6
P5
P4
P3
P2
P1

U9
R9
N9
N6
N3
M9
M6
M5
M4
M3
M2
M1
L21
L15
L14
L13
L12

T26
T25
P24
P21
P16

U21
U15
U14
U13
U11
R21
R16
N26
N23
N21
N16
M24
M21
M16

PROM-B450
B01-21808L5-A08

2
2

7 . r
Title

Size

Date:
Custom
Document Number
MS-7B86
u
Promontory-GND

Wednesday, April 17, 2019


1
1

Sheet
19
of
68
30
Rev
MICRO-START INT'L CO.,LTD.
A
B
C
D
8 7 6 5 4 3 2 1

PCI EXPRESS x16 Slot


R395 X_0R/4 SCLK_PCIE
[6] SCLK1 SCLK_PCIE [21]

PCI_E1
R397 X_0R/4 SDATA_PCIE
[6] SDATA1 SDATA_PCIE [21]

X6

u
+12V PCI_E1 +12V
Trace width > 200 mils

X6

r
D B1 A1 3VSB D
B2 12V-3 PRSNT1# A2
B3 12V-4 12V-1 A3 SCLK_PCIE R2505 2.2KR/4

.
B4 RSVD5 12V-2 A4 SDATA_PCIE R2506 2.2KR/4
SCLK_PCIE B5 GND-35 GND-1 A5
SDATA_PCIE B6 SMCLK JTAG2 A6
B7 SMDAT JTAG3 A7
B8 GND-36 JTAG4 A8

7
VCC3 3.3V-3 JTAG5
B9 A9
JTAG1 3.3V-1 VCC3
3VSB B10 A10
B11 3.3VAUX 3.3V-2 A11
[6,17,21,26] APU_WAKE# WAKE# PWRGD PCIERST#_PCIE1 [25]
X2 X3
X2 X3

-b x
B12 A12
B13 RSVD6 GND-2 A13 PE16_GFX_CLKP
GFX_TXP0_C GND REFCLK+ PE16_GFX_CLKN PE16_GFX_CLKP [7]
C398 C0.22u6.3X/4 B14 A14
[4] GFX_TXP0 GFX_TXN0_C HSOP0 REFCLK- PE16_GFX_CLKN [7]
C397 C0.22u6.3X/4 B15 A15
[4] GFX_TXN0 HSON0 GND-3 GFX_RXP0
B16 A16
GND-37 HSIP0 GFX_RXN0 GFX_RXP0 [4]
B17 A17
PRSNT2#1 HSIN0 GFX_RXN0 [4]
B18 A18
GND-38 GND-4

C399 C0.22u6.3X/4 GFX_TXP1_C B19 A19


[4] GFX_TXP1 GFX_TXN1_C HSOP1 RSVD1
C400 C0.22u6.3X/4 B20 A20
[4] GFX_TXN1 HSON1 GND-5 GFX_RXP1
B21 A21
GND-39 HSIP1 GFX_RXN1 GFX_RXP1 [4]
B22 A22
GFX_TXP2_C GND-40 HSIN1 GFX_RXN1 [4]
C401 C0.22u6.3X/4 B23 A23

d
[4] GFX_TXP2 GFX_TXN2_C HSOP2 GND-6
C402 C0.22u6.3X/4 B24 A24
[4] GFX_TXN2 HSON2 GND-7 GFX_RXP2
B25 A25

.
GND-41 HSIP2 GFX_RXN2 GFX_RXP2 [4]
B26 A26
GFX_TXP3_C GND-42 HSIN2 GFX_RXN2 [4]
C403 C0.22u6.3X/4 B27 A27
[4] GFX_TXP3 GFX_TXN3_C HSOP3 GND-8
C C404 C0.22u6.3X/4 B28 A28 C
[4] GFX_TXN3 HSON3 GND-9 GFX_RXP3
B29 A29
GND-43 HSIP3 GFX_RXN3 GFX_RXP3 [4]
B30 A30
RSVD7 HSIN3 GFX_RXN3 [4]

d
B31 A31
B32 PRSNT2#2 GND-10 A32
GND-44 RSVD2

C405 C0.22u6.3X/4 GFX_TXP4_C B33 A33


[4] GFX_TXP4 GFX_TXN4_C HSOP4 RSVD3
C406 C0.22u6.3X/4 B34 A34
[4] GFX_TXN4 HSON4 GND-11 GFX_RXP4
B35 A35
GND-45 HSIP4 GFX_RXN4 GFX_RXP4 [4]
B36 A36
GND-46 HSIN4 GFX_RXN4 [4]

m
C407 C0.22u6.3X/4 GFX_TXP5_C B37 A37
[4] GFX_TXP5 GFX_TXN5_C HSOP5 GND-12
C408 C0.22u6.3X/4 B38 A38
[4] GFX_TXN5 HSON5 GND-13 GFX_RXP5
B39 A39
GND-47 HSIP5 GFX_RXN5 GFX_RXP5 [4]
B40 A40
GFX_TXP6_C GND-48 HSIN5 GFX_RXN5 [4]
C409 C0.22u6.3X/4 B41 A41
[4] GFX_TXP6 HSOP6 GND-14

s
C410 C0.22u6.3X/4 GFX_TXN6_C B42 A42
[4] GFX_TXN6 HSON6 GND-15 GFX_RXP6
B43 A43
GND-49 HSIP6 GFX_RXN6 GFX_RXP6 [4]
B44 A44
GFX_TXP7_C GND-50 HSIN6 GFX_RXN6 [4]
C411 C0.22u6.3X/4 B45 A45
[4] GFX_TXP7 GFX_TXN7_C HSOP7 GND-16
C412 C0.22u6.3X/4 B46 A46
[4] GFX_TXN7 HSON7 GND-17 GFX_RXP7
B47 A47
GND-51 HSIP7 GFX_RXN7 GFX_RXP7 [4]
B48 A48
PRSNT2#3 HSIN7 GFX_RXN7 [4]
B49 A49
GND-52 GND-18

C430 C0.22u6.3X/4 GFX_TXP8_C B50 A50


[4] GFX_TXP8 GFX_TXN8_C HSOP8 RSVD4
C429 C0.22u6.3X/4 B51 A51
[4] GFX_TXN8 HSON8 GND-19
B52 A52 GFX_RXP8 [4]
B53 GND-53 HSIP8 A53
GND-54 HSIN8 GFX_RXN8 [4]
C431 C0.22u6.3X/4 GFX_TXP9_C B54 A54
B [4] GFX_TXP9 GFX_TXN9_C HSOP9 GND-20 B
C432 C0.22u6.3X/4 B55 A55
[4] GFX_TXN9 HSON9 GND-21
B56 A56 GFX_RXP9 [4]
B57 GND-55 HSIP9 A57
GND-56 HSIN9 GFX_RXN9 [4]
C433 C0.22u6.3X/4 GFX_TXP10_C B58 A58
[4] GFX_TXP10 GFX_TXN10_C HSOP10 GND-22
C434 C0.22u6.3X/4 B59 A59
[4] GFX_TXN10 HSON10 GND-23
B60 A60 GFX_RXP10 [4]
B61 GND-57 HSIP10 A61
GND-58 HSIN10 GFX_RXN10 [4]
C435 C0.22u6.3X/4 GFX_TXP11_C B62 A62
[4] GFX_TXP11 GFX_TXN11_C HSOP11 GND-24
C436 C0.22u6.3X/4 B63 A63
[4] GFX_TXN11 HSON11 GND-25
B64 A64 GFX_RXP11 [4]
B65 GND-59 HSIP11 A65
GND-60 HSIN11 GFX_RXN11 [4]
C437 C0.22u6.3X/4 GFX_TXP12_C B66 A66
[4] GFX_TXP12 GFX_TXN12_C HSOP12 GND-26
C438 C0.22u6.3X/4 B67 A67
[4] GFX_TXN12 HSON12 GND-27
B68 A68 GFX_RXP12 [4]
B69 GND-61 HSIP12 A69
GND-62 HSIN12 GFX_RXN12 [4]
C439 C0.22u6.3X/4 GFX_TXP13_C B70 A70
[4] GFX_TXP13 GFX_TXN13_C HSOP13 GND-28
C440 C0.22u6.3X/4 B71 A71
[4] GFX_TXN13 HSON13 GND-29 +12V +12V +12V VCC3
B72 A72
B73 GND-63
GND-64
HSIP13
HSIN13
A73
GFX_RXP13 [4]
GFX_RXN13 [4]
PCI Express x8 Slot
C71-27118C1-N07

C71-27118C1-N07
C441 C0.22u6.3X/4 GFX_TXP14_C B74 A74
[4] GFX_TXP14 GFX_TXN14_C HSOP14 GND-30
C442 C0.22u6.3X/4 B75 A75
[4] GFX_TXN14 HSON14 GND-31
1

1
B76 A76 C576 C427
+

+
B77 GND-65
GND-66
HSIP14
HSIN14
A77
GFX_RXP14 [4]
GFX_RXN14 [4] EC34 EC38 C559 C521 +12V - 5.5A
GFX_TXP15_C

C0.1u16X7/4

C0.1u16X7/4
C443 C0.22u6.3X/4 B78 A78 C0.1u16X7/4 C0.1u16X7/4
[4] GFX_TXP15
2

HSOP15 GND-32
CD270u16SO

CD270u16SO

C444 C0.22u6.3X/4 GFX_TXN15_C B79 A79


[4] GFX_TXN15 HSON15 GND-33
B80 A80
B81 GND-67
PRSNT2#4
HSIP15
HSIN15
A81
GFX_RXP15 [4]
GFX_RXN15 [4]
+VCC3 - 3A
B82 A82
PCI Express x16 Slot X5 RSVD8 GND-34 X4
X1

X5 X4
+3V3_S5 (wake) - 375mA
X1

A 3VSB A
+12V - 5.5A SLOT-PCI164P_BLACK-2PITCH-RH-51
N11-1641821-L06 +3V3_S5 (no wake) - 20mA
+VCC3 - 3A C428 C491 C593 C546 C445 C545 C1518

C0.1u16X7/4 X_C10u6.3X5/6 C10u6.3X5/6 C10u6.3X5/6 MICRO-START INT'L CO.,LTD.


C0.1u16X7/4 C10u6.3X5/6 C10u6.3X5/6 Title
+3V3_S5 (wake) - 375mA PCI_E1/E4 X16/X8
Size Document Number Rev
+3V3_S5 (no wake) - 20mA Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 20 of 68
8 7 6 5 4 3 2 1
5 4 3 2 1

PCIe x1:
12V - 0.5A +12V PCI_E4
PCI_E2 +12V +12V
VCC3 - 3A +12V
Trace width > 200 mils

PCI_E2
B1 A1
12V-1 PRSNT1#
3VSB weak - 375mA B1 A1
B2
B3 12V-2 12V-3
A2
A3
B2 12V PRSNT1_# A2 B4 RSVD5 12V-4 A4
B3 12V#B2 12V#A2 A3 SCLK_PCIE B5 GND-1 GND-20 A5
B4 RSVD 12V#A3 A4 SDATA_PCIE B6 SMCLK JTAG2 A6

u
SCLK_PCIE B5 GND GND#A4 A5 B7 SMDAT JTAG3 A7
[20] SCLK_PCIE SDATA_PCIE SMCLK JTAG2 VCC3 GND-2 JTAG4
B6 A6 B8 A8
[20] SDATA_PCIE SMDATA JTAG3 3.3V-1 JTAG5
B7 A7 B9 A9
GND#B7 JTAG4 JTAG1 3.3V-2 VCC3

r
D VCC3 B8 A8 3VSB B10 A10 D
B9 3.3V JTAG5 A9 B11 3.3VAUX 3.3V-3 A11
JTAG1 3.3V#A9 VCC3 [6,17,20,21,26] APU_WAKE# WAKE# PWRGD PLTRST_BU2#_PCIE4 [25]
B10 A10

.
3VSB 3.3VAUX 3.3V#A10
[6,17,20,21,26] APU_WAKE# B11 A11 PLTRST_BU2#_PCIE2 [25]
WAKE_# PWRGD X1 B12 A12
X1 B13 RSVD6 GND-21 A13
GND-3 REFCLK+ GPP_CLK4P [17]
B12 A12 C663 C0.1u16X7/4 GPP_TX_4P B14 A14
RSVD#B12 GND#A12 [15] GPP_TX4P HSOP0 REFCLK- GPP_CLK4N [17]
B13 A13 C662 C0.1u16X7/4 GPP_TX_4N B15 A15

7
GND#B13 REFCLK+ GPP_CLK6P [17] [15] GPP_TX4N HSON0 GND-22
[22] PE2_GPP_TX6P C490 C0.1u16X7/4PE2_GPP_TX6P_C B14 A14 B16 A16 GPP_RX4P [15]
HSOP0+ REFCLK- GPP_CLK6N [17] GND-4 HSIP0
[22] PE2_GPP_TX6N C489 C0.1u16X7/4PE2_GPP_TX6N_C B15 A15 B17 A17 GPP_RX4N [15]
B16 HSOP0- GND#A15 A16 B18 PRSNT2#1 HSIN0 A18
GND#B16 HSIP0+ PE2_GPP_RX6P [22] GND-5 GND-23
X1_ENABLE# B17 A17 PE2_GPP_RX6N [22]
[17,22] X1_ENABLE# PRSNT2_# HSIP0-
B18 A18

-b x
GND#B18 GND#A18 X2 C664 C0.1u16X7/4 PE4_GPP_TX_5P B19 A19
X2 [22] PE4_GPP_TX5P HSOP1 RSVD1
C665 C0.1u16X7/4 PE4_GPP_TX_5N B20 A20
[22] PE4_GPP_TX5N HSON1 GND-24
VCC3 R2453 4.7K/4 B21 A21 PE4_GPP_RX5P [22]
B22 GND-6 HSIP1 A22
GND-7 HSIN1 PE4_GPP_RX5N [22]
1

C666 C0.1u16X7/4 PE4_GPP_TX_6P B23 A23


[22] PE4_GPP_TX6P HSOP2 GND-25
SLOT-PCI36P_BLACK-2PITCH-RH-8 C667 C0.1u16X7/4 PE4_GPP_TX_6N B24 A24
[22] PE4_GPP_TX6N HSON2 GND-26
D71 N11-0360211-F02 B25 A25 PE4_GPP_RX6P [22]
C0.1u16X7/4 B26 GND-8 HSIP2 A26
GND-9 HSIN2 PE4_GPP_RX6N [22]
C669 C0.1u16X7/4 PE4_GPP_TX_7P B27 A27
[22] PE4_GPP_TX7P
2

C670 C0.1u16X7/4 PE4_GPP_TX_7N B28 HSOP3 GND-27 A28


[22] PE4_GPP_TX7N HSON3 GND-28
B29 A29 PE4_GPP_RX7P [22]
B30 GND-10 HSIP3 A30
RSVD7 HSIN3 PE4_GPP_RX7N [22]
B31 A31
B32 PRSNT2#2 GND-29 A32

d
GND-11 RSVD2

.
B33 A33
PCI_E3 +12V B34 HSOP4 RSVD3 A34
+12V HSON4 GND-30

PCI_E3
C B35 A35 C
B36 GND-12 HSIP4 A36
B1 A1 B37 GND-13 HSIN4 A37
12V PRSNT1_# HSOP5 GND-31 VCC3 3VSB

d
B2 A2 B38 A38
B3 12V#B2 12V#A2 A3 B39 HSON5 GND-32 A39
B4 RSVD 12V#A3 A4 B40 GND-14 HSIP5 A40
SCLK_PCIE B5 GND GND#A4 A5 B41 GND-15 HSIN5 A41
SMCLK JTAG2 HSOP6 GND-33

1
SDATA_PCIE B6 A6 B42 A42

+
B7 SMDATA JTAG3 A7 B43 HSON6 GND-34 A43 EC39 C668 C627
B8 GND#B7 JTAG4 A8 B44 GND-16 HSIP6 A44 C0.1u16X7/4 C0.1u16X7/4
VCC3 CD560u6.3SO

2
B9 3.3V JTAG5 A9 B45 GND-17 HSIN6 A45
JTAG1 3.3V#A9 VCC3 HSOP7 GND-35

m
3VSB B10 A10 B46 A46
B11 3.3VAUX 3.3V#A10 A11 B47 HSON7 GND-36 A47
[6,17,20,21,26] APU_WAKE# WAKE_# PWRGD PLTRST_BU2#_PCIE3 [25] GND-18 HSIP7
X1 B48 A48
X1 B49 PRSNT2#3 HSIN7 A49
B12 A12 GND-19 GND-37 VCC3
RSVD#B12 GND#A12

s
B13 A13
GND#B13 REFCLK+ GPP_CLK7P [17]
[22] PE3_GPP_TX7P C547 C0.1u16X7/4PE3_GPP_TX7P_C B14 A14 B81 A81
HSOP0+ REFCLK- GPP_CLK7N [17] PRSNT2#4 HSIN15
[22] PE3_GPP_TX7N C548 C0.1u16X7/4PE3_GPP_TX7N_C B15 A15
B16 HSOP0- GND#A15 A16 X1 X2
GND#B16 HSIP0+ PE3_GPP_RX7P [22] X1 X2
X1_ENABLE# B17 A17 PE3_GPP_RX7N [22] X3 X4 C671 C591 C628
B18 PRSNT2_# HSIP0- A18 X5 X3 X4 X6 C0.1u16X7/4 C0.1u16X7/4 C0.1u16X7/4
GND#B18 GND#A18 X2 X5 X6
X2 SLOT-PCI100P_BLACK-2PITCH-RH-9
N11-1000321-L06
SLOT-PCI36P_BLACK-2PITCH-RH-8
N11-0360211-F02
B PCI Express x4 Slot *1 B

+12V - 2.1A

+VCC3 - 3A
PCI_E5 +12V
PCI_E5 +12V PCI_E6 +12V
PCI_E6 +12V

+3V3_S5 (wake) - 375mA


B1 A1 B1 A1
B2 12V PRSNT1_# A2 B2 12V PRSNT1_# A2
B3 12V#B2
RSVD
12V#A2
12V#A3
A3 B3 12V#B2
RSVD
12V#A2
12V#A3
A3 +3V3_S5 (no wake) - 20mA
B4 A4 B4 A4
SCLK_PCIE B5 GND GND#A4 A5 SCLK_PCIE B5 GND GND#A4 A5
SDATA_PCIE B6 SMCLK
SMDATA
JTAG2
JTAG3
A6 SDATA_PCIE B6 SMCLK
SMDATA
JTAG2
JTAG3
A6 PCI Express x1 Slot *4
B7 A7 B7 A7
B8 GND#B7 JTAG4 A8 B8 GND#B7 JTAG4 A8
VCC3 3.3V JTAG5 VCC3 3.3V JTAG5
B9 A9 B9 A9
3VSB B10 JTAG1
3.3VAUX
3.3V#A9
3.3V#A10
A10
VCC3
3VSB B10 JTAG1
3.3VAUX
3.3V#A9
3.3V#A10
A10
VCC3 +12V - 2A
[6,17,20,21,26] APU_WAKE# B11 A11 PLTRST_BU2#_PCIE5 [25] [6,17,20,21,26] APU_WAKE# B11 A11 PLTRST_BU2#_PCIE6 [25]
WAKE_# PWRGD X1 WAKE_# PWRGD X1
X1 X1
B12
RSVD#B12 GND#A12
A12 B12
RSVD#B12 GND#A12
A12 +VCC3 - 12A
B13 A13 GPP_CLK5P [17] B13 A13
PE5_GPP_TX5P_C GND#B13 REFCLK+ PE6_GPP_TX0P_C GND#B13 REFCLK+ GPP_CLK0P [17]
[22] PE5_GPP_TX5P C653 B14 A14 GPP_CLK5N [17] [15] PE6_GPP_TX0P C1504 B14 A14
PE5_GPP_TX5N_C HSOP0+ REFCLK- PE6_GPP_TX0N_C HSOP0+ REFCLK- GPP_CLK0N [17]
B15 A15 B15 A15
A
[22] PE5_GPP_TX5N
C654 B16 HSOP0-
GND#B16
GND#A15
HSIP0+
A16 PE5_GPP_RX5P [22]
[15] PE6_GPP_TX0N
C1505 B16 HSOP0-
GND#B16
GND#A15
HSIP0+
A16 PE6_GPP_RX0P [15] +3V3_S5 (wake) - 1500mA A
C0.1u16X7/4 X1_ENABLE# B17 A17 PE5_GPP_RX5N [22] C0.1u16X7/4 B17 A17 PE6_GPP_RX0N [15]
C0.1u16X7/4 B18 PRSNT2_# HSIP0- A18 C0.1u16X7/4 B18 PRSNT2_# HSIP0- A18
GND#B18 GND#A18
X2
X2 GND#B18 GND#A18
X2
X2 +3V3_S5 (no wake) - 80mA

SLOT-PCI36P_BLACK-2PITCH-RH-8 SLOT-PCI36P_BLACK-2PITCH-RH-8 MICRO-START INT'L CO.,LTD.


N11-0360211-F02 N11-0360211-F02 Title
PCI_E2_E3_E5/E4 X1/X4
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 21 of 68
5 4 3 2 1
5 4 3 2 1

PCI_E4 and PCIE_2 / 3 / 5 Switch PCIE Lanes control circuit

u
From BIOS EN#
C1413 C0.1u16X7/4 HW_BIOS_MODE
VCC3 [6,23] HW_BIOS_MODE

r
D From Slot D

G
R2338 1KR/4

.
VCC3 X1_ENABLE# [17,21]

S
D
Q339

19
21
26
31
34
39
41
9
U49 From GPIO N-2N7002
To SW

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
37 X4_X1_EN#

7
A_outa+ PE2_GPP_TX6P [21] [24] X4_X1_EN#
36 PE2_GPP_TX6N [21]
A_outa-
PCIE_2
[15] GPP_TX6P 1 33 PE2_GPP_RX6P [21]
2 A_in+ B_outa+ 32
[15] GPP_TX6N A_in- B_outa- PE2_GPP_RX6N [21]

-b x
[15] GPP_RX6P 5 3 PE4_GPP_TX6P [21] UART_TX/SPI_SDI:
6 B_in+ A_outb+ 4
[15] GPP_RX6N B_in- A_outb- PE4_GPP_TX6N [21] GPP_Group1
PE4 00:Reserved
7 PE4_GPP_RX6P [21]
B_outb+
PE4_PE2:3_DET: B_outb-
8 PE4_GPP_RX6N [21] 01:By1X4
1:PCIEx4 X4_X1_EN# 30
SEL 28
0:PCIEx1:x1 GND C_outa+ 27
PE3_GPP_TX7P [21] 10:By2X1+By1X2
C_outa- PE3_GPP_TX7N [21]
PCIE_3 11:By4X1 (def)
[15] GPP_TX7P 10 24 PE3_GPP_RX7P [21]
11 C_in+ D_outa+ 23
[15] GPP_TX7N C_in- D_outa- PE3_GPP_RX7N [21]

[15] GPP_RX7P 14 12 PE4_GPP_TX7P [21]


15 D_in+ C_outb+ 13

d
[15] GPP_RX7N D_in- C_outb- PE4_GPP_TX7N [21] PE4
16 PE4_GPP_RX7P [21]

.
D_outb+ 17
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

D_outb- PE4_GPP_RX7N [21]


HW_BIOS_MODE Q339 Q381 X1_ENABLE# PM_SPI_DATAIN
C C
SEL Function ASM1480_TQFN42-HF Manual
18
20
22
25
29
35
38
40
42
43

I98-M14800C-AD0 x4 L OFF OFF X 11:By4x1 (def)

d
L N_in +/1 to N_outa+/- Manual
x1, x1, x1, x1 L OFF OFF L 10:By1x4
H N_in +/1 to N_outb+/- HW
x4 H ON ON H 11:By4X1 (def)
H/W

m
x1, x1, x1, x1 H ON ON L (Stuff PCIE_1) 10:By1X4

s
VCC3 C1506 C0.1u16X7/4
19
21
26
31
34
39
41
9

U75
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

37 PE5_GPP_TX5P [21]
A_outa+ 36
A_outa- PE5_GPP_TX5N [21]
B
PCIE_5 B
[15] GPP_TX5P 1 33 PE5_GPP_RX5P [21]
2 A_in+ B_outa+ 32
[15] GPP_TX5N A_in- B_outa- PE5_GPP_RX5N [21]

[15] GPP_RX5P 5 3 PE4_GPP_TX5P [21]


6 B_in+ A_outb+ 4
[15] GPP_RX5N B_in- A_outb- PE4_GPP_TX5N [21]
PE4
7 PE4_GPP_RX5P [21]
B_outb+ 8
PE4_PE5_DET: B_outb- PE4_GPP_RX5N [21]
1:PCIEx4 X4_X1_EN# 30
SEL 28
0:PCIEx1:x1 GND C_outa+ 27
C_outa-
10 24
11 C_in+ D_outa+ 23
C_in- D_outa-
14 12
15 D_in+ C_outb+ 13
D_in- C_outb-
16
D_outb+ 17
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

D_outb-
SEL Function
ASM1480_TQFN42-HF
18
20
22
25
29
35
38
40
42
43

L N_in +/1 to N_outa+/- I98-M14800C-AD0

H N_in +/1 to N_outb+/-

A A

MICRO-START INT'L CO.,LTD.


Title
PCIE Switch X4 / M2_2
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 22 of 68
5 4 3 2 1
5 4 3 2 1

AUTO Mode SATA CON M.2(PCIE) M.2(SATA)


M2_1 and SATA5 6 Switch HW_BIOS_MODE 1 0 0

M.2_PCIE_CTRL 1 0 0

M.2_1_CARD_DET 1 0 0

u
M.2_DET X 1 0

r
D D

C644 C0.1u16X7/4

.
VCC3
VCC3 C625 C0.1u16X7/4

3VSB

VCC3 AUTO Mode :

19
21
26
31
34
39
41
79
U50 M.2_CARD_DET:

19
21
26
31
34
39
41
0:manual
9
U47 R641 0:Have M.2

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
37 M.2_1_SW_RXN2 1:auto 8.2K/4
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
37 M.2_1_S_RXN2 A_outa+ 36 M.2_1_SW_RXP2 R640 1:No M.2
A_outa+ 36 M.2_1_S_RXP2 A_outa-

-b x
A_outa- 10KR/4 [6,22] HW_BIOS_MODE
M.2 PCIE M.2_1_S_RXN2 1 33 M.2_1_SW_TXN2
1 33 M.2_1_S_TXN2 M.2_1_S_RXP2 2 A_in+ B_outa+ 32 M.2_1_SW_TXP2
[4] APU_GPP_RXN2 A_in+ B_outa+ A_in- B_outa-

G
2 32 M.2_1_S_TXP2 M.2_1_M_CARD
[4] APU_GPP_RXP2 M.2_1_CARD_DET [7,26]

S
A_in- B_outa-

D
CPU M.2_1_S_TXN2 5 3
B_in+ A_outb+ M.2_1_RXN2 [26]
5 3 M.2_1_S_TXP2 6 4 Q84
[4] APU_GPP_TXN2 B_in+ A_outb+ SATA_RX5- [39] B_in- A_outb- M.2_1_RXP2 [26]
[4] APU_GPP_TXP2 6 4 SATA_RX5+ [39] PCIE M.2 N-2N7002
B_in- A_outb- 7
SATA5 B_outb+ M.2_1_TXN2 [26]
7 SATA_TX5- [39] 8 M.2_1_TXP2 [26]
B_outb+ 8 M.2_1_DET 30 B_outb-
B_outb- SATA_TX5+ [39] [6,26] M.2_1_DET SEL
M.2_SATA_DET 30 28
SEL 28
GND C_outa+ 27
GND C_outa+ 27
M.2_1_RXN3 [26] C_outa-
M.2 SATA ATX_5VSB
C_outa- M.2_1_RXP3 [26]
M.2 PCIE [26] M.2_1_TXP0 10 24
10 24 11 C_in+ D_outa+ 23

d
[4] APU_GPP_RXN3 M.2_1_TXN3 [26] [26] M.2_1_TXN0 VCC3
11 C_in+ D_outa+ 23 C_in- D_outa-
[4] APU_GPP_RXP3 C_in- D_outa- M.2_1_TXP3 [26] M.2 PCIE
CPU [26] M.2_1_RXP0 14 12 APU_GPP_TXP0 [4] R631

.
14 12 15 D_in+ C_outb+ 13
[4] APU_GPP_TXN3 D_in+ C_outb+ SATA_RX6- [39] [26] M.2_1_RXN0 D_in- C_outb- APU_GPP_TXN0 [4] M.2_PCIE_CTRL: 47KR/4
[4] APU_GPP_TXP3 15 13 SATA_RX6+ [39] CPU PCIE 0:M.2 Q83
D_in- C_outb- 16 R610 G2 D2 M.2_1_M_CARD
C SATA6 D_outb+ APU_GPP_RXP0 [4] 1:SATA C
16 17 10KR/4

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D_outb+ SATA_TX6- [39] D_outb- APU_GPP_RXN0 [4]
17 D1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

D_outb- SATA_TX6+ [39]

d
S2
ASM1480_TQFN42-HF [24] M.2_PCIE_CTRL G1

18
20
22
25
29
35
38
40
42
43
ASM1480_TQFN42-HF I98-M14800C-AD0
18
20
22
25
29
35
38
40
42
43

I98-M14800C-AD0 M.2_1_DET: 2N7002D

S1
0:M.2_SATA
M.2_SATA_DET: 1:PCIE
1:SATA
0:M.2 Select

m
COTYPE1
(Default for SATA) M2 : PCIE or SATA Low : BR
(Default for PCIE) HI : SRT RV VCC3

s
SEL Function [6,35] CORETYPE1 CORETYPE1

L N_in +/1 to N_outa+/- VCC3 R2507


R2508 10KR/4
X_0R/4
H N_in +/1 to N_outb+/-
R609
1KR/4

G
M.2_SATA_DET M.2_1_M_CARD

S
D
M.2_SATA_DET: Q79
1: SATA N-2N7002
B B
0: M.2
M.2_1_M_CARD:
0:Have M.2
1:No M.2

CORETYPE
CPU TYPE 1 0

BR 0 0 0

NA 0 1

SR 2 1 0

RV/ZP 3 1 1

A A

MICRO-START INT'L CO.,LTD.


Title
23 PCIE Switch M2_1/SATA
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 23 of 68
5 4 3 2 1
5 4 3 2 1

U51
SIO_3VA R582 47KR/4 SIO_MLED DSW_EN R630 X_0R/4
USB_MODE [33,34]
26 69 DSW_EN AMD_DDR4_EN R587 X_R/4
[7,57] LPC_RST# LRESET# (DSW_EN)GP70
[7] SIO_LPCCLK1 17 68
PCICLK/ESPI_CLK AUXFANOUT4/GP71 67
IOCLK Internal CLK. AUXFANIN4/GP72
18 GPIO 66
[7] LPC_LDRQ0#
[7,57] LPC_SERIRQ
19
25
GP95 / LDRQ# / ESPI_RST
SERIRQ/ESPI_ALERT#
GPO/GP73/CUT_VBAT
(DDR4_EN)SOUTB_P80/GP37
15
98
DDR4_EN
SIO_MLED
CUT_VBAT [9]
POWER ON STRAPPING PIN FOR NCT6797/6795
[7,57] LPC_LFRAME# LFRAME#/ESPI_CS# MLED/GP27 SIO_MLED [58,60]
23 LPC/ESPI Interface 96 AMD_DDR4_EN
Strap

u
[7,57] LPC_AD0 LAD0/ESPI_IO0 (AMD_DDR4_EN)/IRTX1/GP25 Pin98 Fading/On/Off
22 95
[7,57] LPC_AD1
21 LAD1/ESPI_IO1 IRRX1/GP24/CIRRX PIN 6797/6795 NAME Circuit NAME 0 1 Point
[7,57] LPC_AD2 LAD2/ESPI_IO2
20
[7,57] LPC_AD3 LAD3/ESPI_IO3

r
38 20180409:
D
SLCT/GP46 41
RSLCT [25]
Add JLPT1
DISABLE ENABLE D
ACK#/GP43/DGL0# 53
RACK# [25] 9 UARTA_P80_EN RTSB# UARTA80 UARTA80 LRESET

.
GP92/ERR#/GP36 RERR# [25] function.
93 DSW Interface Printer mode 54 AFD# [25]
[57] LED_VCC GP50/SUSWARN#/RSTOUT3# GP93/AFD#/GP35
90 55
[29] SIO_SYS4_FAN
92 GP53/AUXFANOUT3/FDLED2 GP94/STB#/GP34 52
STB# [25] DISABLE ENABLE
[29] SYS4_FANTAC
91 GP51/AUXFANIN3 INIT#/GP41/SCL/MSCL 51
INIT# [25] 10 UARTB_P80_EN DTRB# UARTB80 UARTB80 LRESET
GP52/SUSACK#/RSTOUT4#/FDLED3 SLIN#/GP42/BEEP/SDA/MSDA SLIN# [25]
R590 X_R/4 5VDIMM_MODE#R 89 50

7
[43] 5VDIMM_MODE# GP54/SLP_SUS# PD0/GP60/LED_A PPRND0 [25]
88 49
73 GP55/SLP_SUS_FET/PWR_FAULT#
Port80 PD1/GP61/LED_B 48
PPRND1 [25] DISABLE ENABLE
PAD_CAP 62 DPWROK PD2/GP62/LED_C 47
PPRND2 [25] 12 TESTMODE1_EN TESTMODE1_EN TEST1MODE TEST1MODE LRESET
70 PAD_CAP LED PD3/GP63/LED_D 45
PPRND3 [25]
USBEN/3VSBSW/PWROK/ATXPGDO Control PD4/GP64/LED_E PPRND4 [25]
DEEP_S5 72 44

-b x
[6,43,54] DEEP_S5 DEEP_S5_1/CASEOPEN1# PD5/GP65/LED_F PPRND5 [25]
43 Disable Enable
PD6/GP66/LED_G PPRND6 [25] 15 DDR4_EN DDR4_EN
42 PPRND7 [25]
USB_FLASH_EN 75 PD7/GP67/DGH0# 40
[34] USB_FLASH_EN GP32/SCL/MSCL GPIO BUSY/GP44/GRN_LED RBUSY [25]
LAN_WAKE# 76 39 ESPI_EN LPC ESPI
[17,30] LAN_WAKE#
R563 X_R/4 TSIC 118 GP31/SDA/MSDA PE/GP45/YLW_LED RPE [25] 27 ESPI_EN
[6] APU_SIC TSIC/GP26/PWR_FAULT#
[6] APU_SID R578 X_R/4 TSID 120
SIO_OVT# 2 TSID/PECI
R580 X_R/4 SIO_TRIP# 128 OVT#/SMI#/GP03 36 I/O ADDRESS I/O ADDRESS
[6,46] PROCHOT#
SIO_SKTOCC# 102 SMI#/OVT# RIA#/GP87 35
RIA# [25] 31 2E_4E_SEL RTSA# 2E 4E LRESET
SKTOCC# DCDA#/GP86 DCDA# [25]
R629 X_R/4 SIO_PME 65 34 SOUTA
[6,17] APU_LPC_PME# PME# (P80_EN)SOUTA_P80/GP85/SOUTA_P80 SOUTA [25]
33
SINA/GP84 32 DTRA#
SINA [25]
FANOUT_DEF_EN default 50% default 100%
INTERNAL
ATX_5VSB (FANOUT_DEF_EN)/DTRA#/GP83 31
DTRA# [25] 32 DTRA# PWROK

d
(2E_4E_SEL)RTSA#/GP82 RTSA# [25]
TESTMODE0 103 30 DSRA# [25]
R554 7.68K1%/4 VIN7 116 GP40 DSRA#/GP81 29 CTSA# [25] ENABLE ENABLE

.
R564 3.3KR1%/4 [25] 115 ATX_5VSB/AUXTIN3/VIN7 CTSA#/GP80 14
PROMTIN AUXTIN2/VIN6 UART SIR GP91/RIB#/GP10 M.2_PCIE_CTRL [23] 34 P80_EN SOUTA LRESET
[25] VIN5 114
AUXTIN1/VIN5 PWM_B/DCDB#/GP11
13 SIO_LED_B [60] Non_PORT80 PORT80
C C621 C1u6.3X/4 [25] CPUMOSTIN 111 12 TESTMODE1 C
107 AUXTIN0/VIN4 (TESTMODE1_EN)IRTX0/SOUTB/GP12 11
VCCP_NB
[25] VDIMM
106 VIN3 GP90/IRRX0/SINB/GP13 10 DTRB#
X4_X1_EN# [22] DISABLE ENABLE INTERNAL
[25] CPU_NB VIN2 (UARTB_P80_EN)DTRB#/GP14 69 DSW_EN DSW_EN INTEL DSW INTEL DSW RSMRST

d
[25] VIN1 105 Harddware Monitor 9 RTSB#
104 VIN1 (UARTA_P80_EN)RTSB#/GP15 8
11-16 [25] VIN0 VIN0 PWM_G/DSRB#/GP16 SIO_LED_G [60]
109 7
[25] CPUVCORE CPUVCORE PWM_R/CTSB#/GP17 SIO_LED_R [60] DISABLE ENABLE INTERNAL
113
96 AMDPWR_EN AMDPWR_EN AMD PWR SEQ AMD PWR SEQ RSMRST
[25] SYSTIN 112 SYSTIN
[25] CPUTIN CPUTIN 27 ESPI_EN
3 (ESPI_EN)GP96/GA20M 28 6795 6795
INTERNAL
[28] SYS1_FANTAC AUXFANIN0/GP04 KBRST# KBRST# [6] 103 6795 TESTMODE_EN 6795 WDT#
RSMRST

m
[28] SYS2_FANTAC 4 56 MSCLK [35] DISABLE TESTMODE ENABLE TESTMODE
5 AUXFANIN1/GP05
KBC Function AUXFANOUT3/GP23/MCLK 57 6797 GP40 6797 WDT#
[28] SYS3_FANTAC AUXFANIN2/GP06 AUXFANIN3/GP22/MDAT MSDAT [35]
121 58
[28] SIO_SYS1_FAN
122 AUXFANOUT0/GP00
FAN Control CIRRX/AUXFANOUT2/GP21/KCLK 59
KBCLK [35] Note:
[28] SIO_SYS2_FAN AUXFANOUT1/GP01 AUXFANIN2/GP20/KDAT KBDAT [35]
[28] SIO_SYS3_FAN 123
AUXFANOUT2/GP02
If PIN34 strapping low,BIOS must programming LPT or GPIO

s
[27] CPU_FAN1TAC 124
125 CPUFANIN
[27] SIO_CPU_FAN1 CPUFANOUT DTRA# high FAN 100% LOW FAN 50%
[27] CPU_FAN2TAC 126
127 SYSFANIN
[27] SIO_CPU_FAN2 SYSFANOUT
GP33/3VSBSW#/5VCCDRV#
71 VCC3 3V Analog Power
11-21 D44 S-LRB520S-40T1G 74 R583
[9] CLRCMOS_EN GP77/5VSBDRV# PCHVSB 1KR1%/4 3VSB Closed PIN108
101 97 C620 C0.1u16X7/4 Pin119 Power source same with TSI.
[6,55] RSMRST# RSMRST# SYS3VSB
61 119 CPU_1P8 R657 1KR/4 SOUTA R644 X_680R/4
[34,57] PWRBTIN PSIN# VTT SIO_3VA
60 99 VBAT R636 X_1KR/4 DTRA# R642 680R/4
[6,9] PWRBTN# PSOUT# VBAT
[6,33,34,43,51,54,55] SLP_S3# 64 100 CASEOPEN# R577 1MR/4 VBAT R632 1KR/4 RTSA# R628 X_680R/4
84 SLP_S3# CASEOPEN0# C619 C100p50N/4 R598 X_1KR/4 DTRB# R596 680R/4
[6,9,33,34,43,44,45] SLP_S5# SLP_S5# ACPI Function
63 46 SIO_VCC3 R595 X_1KR/4 RTSB# R592 680R/4
[57] SIO_PSON# PSON# 3VA-1 SIO_3VA Closed PIN99
[33,43,57] ATX_PWR_OK 80 85
82 ATXPGD 3VA-2 1 R2472 0R/4 VBAT
B PWROK/FDLED1 Power Pin 3VCC VCC3 B
WDT# 83 24
[57] WDT# 37 RESETCONI#/GP30/OVT#/SMI#/CIRRX PAD_VDD 108
[57] LED_VSB RESETCONO#/GP47/FDLED4 A3VA SIO_3VA SIO_3VA
PLTRST_BU1#_R 79 110 C602 C614
RSTOUT0#/GP74 VREF HM_VREF [25]
[25] PLTRST_BU2#_R 78 C655 C634 C0.1u16X7/4 C10u6.3X5/6
77 RSTOUT1#/GP75 16 C1u6.3X/4
RSTOUT2#/GP76 VSS-1 C0.1u16X7/4
94 C612
R603 X_R/4 SIO_PWROK 81 VSS-2 117 C4.7u10X/6 R601 X_1KR/4DDR4_EN R602 680R/4
[55] CHIP_PWGD PWROK CPUD-/AGND
86 (O,2.048V) R625 X_1KR/4DSW_EN R626 680R/4
GNDHM
20190329 6 VPP_EN/GP57/AUXFANIN2 R584 X_1KR/4AMD_DDR4_EN R586 680R/4
Remove SIO control VPP/VDD Circuit. 87 VPP_PG / GP07
VDDQ_EN/GP56/AUXFANOUT2 TESTMODE0 R562 680R/4
6797D-M TESTMODE1 R599 680R/4 Closed PIN1,24
VCC3 GNDHM [25] VCC3
SP5 R619 X_1KR/4 ESPI_EN R620 1KR/4
X_COPPER
LPC_LDRQ0# R606 X_4.7K/4 VCC3
LPC pull down/ESPI pull high
PLTRST_BU1#_R R607 820R/4 C652 C638
SIO_OVT# R588 4.7K/4 R615 10KR/4 LPC_SERIRQ C0.1u16X7/4 X_C10u6.3X5/6
SIO_TRIP# R581 4.7K/4

CHIP_PWGD R608 1KR/4


R604 X_100KR/4

VCC5 I31-7116S09-N03 SIO_VCC3


Closed PIN46,85
SIO_3VA JCI1 PAD_CAP SIO_3VA
U71 R649 X_680R/4
SIO_3VA 2 CASEOPEN# X_GS7116S5
1 1 5 R2473 C674 C4.7u10X/6
USB_MODE R591 X_1KR/4 VDD VOUT
R648 H1X2M_BLACK-RH X_0R/4 C672 C650
GND

ADJ

10KR/4 N31-1020151-H06 C1482 3 C0.1u16X7/4 C10u6.3X5/6


A
DEEP_S5 R621 47KR/4 X_C1u6.3X/4 EN C1483
R1 A

PWRBTIN C673 C0.1u16X7/4 EN:VIH1.6V X_C0.1u16X7/4 R2474


2

X_10KR1%/4

3VSB SIO_VCC3_FB
R567 X_10KR/4 SIO_3VA R2
R568 X_1MR/4 VBAT R2595 R2475 C1484 MICRO-START INT'L CO.,LTD.
X_10KR/4 Title
SIO_SKTOCC# R576 1KR/4 LAN_WAKE# X_C10u6.3X5/6 SIO NCT6797D
X_3.16K1%/4 Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 24 of 68
5 4 3 2 1
5 4 3 2 1

HW Monitor - Voltage TEMP SENSOR COM PORT


C676 C0.1u16X7/4
SIO HM Voltage over 2.048V will not detect VCC3
For CPU
HM_VREF [24,25] D49
10KR1%/4 VCORE R550 10KR1%/4 CPUVCORE [24] C651 C A
+12V
VCC_DDR R551 VDIMM [24] X_C0.1u16X7/4
R555 R643 X_2.7K/4 SINA U52 1N4148W

u
R557 R623 X_2.7K/4 CTSA# 20 1 +12V_COM
R558
CPU_DRAM X_10KR1%/4 C613
CPU_CORE 10KR1%/4
R646 X_2.7K/4 RIA#
VCC5
NRIA 2 VCC VDD 19 RIA#
RA1 RY1 RIA# [24]
10KR1%/4 C615 C10u6.3X5/6 CPUTIN [24] R645 X_2.7K/4 DCDA# NCTSA# 3 18 CTSA# CTSA# [24]
RA2 RY2

r
D C10u6.3X5/6 R624 X_2.7K/4 DSRA# NDSRA# 4 17 DSRA# DSRA# [24] D
NSINA 7 RA3 RY3 14 SINA
RA4 RY4 SINA [24]
RT6 C599 NO USE UART PORT1 NDCDA# 9 12 DCDA#

.
RA5 RY5 DCDA# [24]
10KRT1%0402 C2200p50X/4
RTSA# 16 5 NRTSA
[24] RTSA# DTRA# 15 DA1 DY1 6 NDTRA
R575 220KR1%/4 R553 12K1%/4 [24] DTRA# SOUTA 13 DA2 DY2 8 NSOUTA
+12V VIN0 [24] VCC5 VIN1 [24] [24] SOUTA DA3 DY3
11 10 -12V_COM

7
GNDHM [24,25] GND VSS
R561 C618 R560 C617 GD75232DBR_SSOP20-RH D48
20KR1%/4 C0.1u16X7/4 3KR1%/4 C0.1u16X7/4 Under Socket I95-7523212-T07 A C
-12V
For System 1N4148W

-b x
C675 C0.1u16X7/4
SYSTIN [24]
Power Fault detect through VIN0,VIN1,VIN2

E
C598
Q76 B C2200p50X/4
P-MMBT3906 CN5
NRIA 1 2

C
CPU_VDDP R566 10KR1%/4 VIN5 [24] GNDHM JCOM1 NCTSA# 3 4
NDCDA# 1 2 NSINA NDSRA# 5 6
NSOUTA 3 4 NDTRA NRTSA 7 8
C611
CPU_VDDP 5 6 NDSRA#
HM_VREF [24,25]
C10u6.3X5/6 NRTSA 7 8 NCTSA# X_8P4C-470p50X4
NRIA 9

d
R556 CN6
10KR1%/4 H2X5[10]M_BLACK-RH NDTRA 1 2
N31-2051331-H06 NSINA 3 4

.
CPUMOSTIN [24] NSOUTA 5 6
NDCDA# 7 8
C C
RT5 C600 X_8P4C-470p50X4
10KRT1%0402 C2200p50X/4

d
Inform BIOS disable VIN2 with Power Fault

GNDHM [24,25]
PROM RESET R2520
R436
100R1%/4
100R1%/4
PLTRST_BU2#_PCIE6
PLTRST_BU2#_PCIE2
[21]
[21]
VCCP_NB R552 10KR1%/4 CPU_NB [24] R469 100R1%/4 PLTRST_BU2#_PCIE3 [21]
FROM SIO R614 100R1%/4
Close to CPU MOS [24] PLTRST_BU2#_R R617 PLTRST_BU2# R647 100R1%/4
PLTRST_BU2#_PCIE5
PLTRST_BU2#_PCIE4
[21]
[21]
R559 C616 HM_VREF [24,25]

m
C10u6.3X5/611-16 X_22R1%/4
X_10KR1%/4
R565
10KR1%/4 R524 X_R/4 PLTRST_BU2#
[17,30] PM_GPP_RST

s
CPU_SOC PROMTIN [24] FROM PROM

RT7 C622
Co-lay FCH Reset for meet FCH sequence. See 55553.
10KRT1%0402 C2200p50X/4

GNDHM [24,25] CPU RESET


3VSB
RT3 under FCH1 BOTTOM
X_C0.1u16X7/4 C558
FROM CPU

5
U45 R415 100R1%/4 PCIERST#_PCIE1 [20]
B PCIE_REST# 1 VCC B
[6] PCIE_REST# A
PCIE_RST_BUF
Y
4 R373 100R1%/4 PCIERST#_M2_1 [26]
VCC3 R520 X_4.7K/4 2 B R451 100R1%/4 PCIERST#_PROM [17]
GND
X_SN74LVC1G08DBVR_SOT23-5

3
PARALLAL PORT
20180409:
Add JLPT1 D60 1N4148W
function. VCC5 A C LPT_VC
PCIE_REST# R511 X_R/4 PCIE_RST_BUF

C729 C0.1u16X7/4

[24]
[24]
PPRND3
PPRND2
R705
R704
33R/4
33R/4
PRND3
PRND2
R720
R719
2.7K/4
2.7K/4
PRND0
PRND1
C705
C707
X_470p50X/4
X_470p50X/4
SIO_3VA ATX_5VSB I31-7116S09-N03 SIO_3VA
[24] PPRND1 R701 33R/4 PRND1 R716 2.7K/4 PRND2 C710 X_470p50X/4 U54
[24] PPRND0 R700 33R/4 PRND0 R714 2.7K/4 PRND3 C711 X_470p50X/4 GS7116S5
JLPT1 1 5
RSTB# 1 2 RAFD# VDD VOUT
PRND0 3 4 RERR# R706 33R/4 PRND4 R721 2.7K/4 PRND7 C715 X_470p50X/4

GND
[24] PPRND4

ADJ
PRND1 5 6 RINIT# R707 33R/4 PRND5 R722 2.7K/4 PRND6 C714 X_470p50X/4 C590 3
PRND2 7 8 RSLIN#
[24] PPRND5
R708 33R/4 PRND6 R723 2.7K/4 PRND5 C713 X_470p50X/4 C1u6.3X/4 EN C681
R1
[24] PPRND6
PRND3 9 10 [24] PPRND7 R709 33R/4 PRND7 R724 2.7K/4 PRND4 C712 X_470p50X/4 EN:VIH1.6V X_C0.1u16X7/4 R670

4
PRND4 11 12 10KR1%/4 C680
PRND5 13 14 C10u6.3X5/6
PRND6 15 16 R698 33R/4 RSTB# R712 2.7K/4 RSTB# C703 X_470p50X/4 3VA_FB
[24] STB#
PRND7 17 18 R703 33R/4 RSLIN# R718 2.7K/4 RSLIN# C709 X_470p50X/4
RACK# 19 20
[24] SLIN#
R702 33R/4 RINIT# R717 2.7K/4 RINIT# C708 X_470p50X/4
R2
[24] INIT#
RBUSY 21 22 [24] AFD# R699 33R/4 RAFD# R713 2.7K/4 RAFD# C704 X_470p50X/4 R676
A A
RPE 23 24 3.16K1%/4
RSLCT 25
[24] RACK# RACK# R725 2.7K/4 RACK# C716 X_470p50X/4
H2X13[26]M [24] RBUSY RBUSY R726 2.7K/4 RBUSY C717 X_470p50X/4
N31-2131131-H06 [24] RPE RPE R727 2.7K/4 RPE C718 X_470p50X/4
[24] RSLCT RSLCT R728 2.7K/4 RSLCT C719 X_470p50X/4

[24] RERR# RERR# R715 2.7K/4 RERR# C706 X_470p50X/4


Vout = Vref * (1 +(R1/R2)) MICRO-START INT'L CO.,LTD.
= 0.8 * (1 +(10K/3.16K)) Title
= 3.33V SIO HWM/COM
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 25 of 68
5 4 3 2 1
8 7 6 5 4 3 2 1

M.2_1 Connector 3.3V@2.5A

MEC1
VCC3 VCC3

76
M2_1
3.3V@2.5A

MEC1
76
1 2
3 GND-1 3.3Vaux-1 4
5 GND-2 3.3Vaux-2 6
[23] M.2_1_RXN3 PERn3 NC-2
7 8

u
[23] M.2_1_RXP3 PERp3 NC-3
9 10 M.2_1_DAS R319 10KR/4 C361 C334 C340 C387 C346 C324 C390
C337 C0.22u6.3X/4 M.2_TXN3_C 11 GND-3 DAS/DSS# (IO) 12 C362
[23] M.2_1_TXN3 PETn3 3.3Vaux-3
[23] M.2_1_TXP3 C341 C0.22u6.3X/4 M.2_TXP3_C 13 14 C22u6.3X/6 C0.1u16X7/4 C0.1u16X7/4 X_C0.1u16X7/4
PETp3 3.3Vaux-4

r
D 15 16 C22u6.3X/6 C0.1u16X7/4 X_C0.1u16X7/4 X_C0.1u16X7/4D
17 GND-4 3.3Vaux-5 18
[23] M.2_1_RXN2 PERn2 3.3Vaux-6
19 20 M.2_1_DAS

.
[23] M.2_1_RXP2 PERp2 NC-4 M.2_1_DAS [57]
21 22
C349 C0.22u6.3X/4 M.2_TXN2_C 23 GND-5 NC-5 24
[23] M.2_1_TXN2 PETn2 NC-6
[23] M.2_1_TXP2 C354 C0.22u6.3X/4 M.2_TXP2_C 25 26
27 PETp2 NC-7 28
29 GND-6 NC-8 30

7
[4] APU_GPP_RXN1 PERn1 NC-9
[4] APU_GPP_RXP1 31 32
33 PERp1 NC-10 34 R2509 X_0R/4
GND-7 NC-11 AGPIO5_DEVSLP0 [6]
[4] APU_GPP_TXN1 C360 C0.22u6.3X/4 M.2_TXN1_C 35 36
C365 C0.22u6.3X/4 M.2_TXP1_C 37 PETn1 NC-12 38 DEVSLP_R R340 X_0R/4
[4] APU_GPP_TXP1 PETp1 DEVSLP
39 40 SCREW1 SCREW2

-b x
41 GND-8 NC-13 42
[23] M.2_1_RXP0 PERn0/SATA-B+ NC-14
[23] M.2_1_RXN0 43 44
45 PERp0/SATA-B- NC-15 46
GND-9 NC-16 SCREW SCREW
[23] M.2_1_TXN0 C371 C0.22u6.3X/4 M.2_TXN0_C 47 48
C374 C0.22u6.3X/4 M.2_TXP0_C 49 PETn0/SATA-A- NC-17 50
[23] M.2_1_TXP0 PETp0/SATA-A+ PERST# (O)(0/3.3V) or N/C PCIERST#_M2_1 [25]
51 52
GND-10 CLKREQ# (IO)(0/3.3V) or N/C APU_WAKER CLK_REQ2_M.2 [6]
[7] CLK_M2_DN 53 54 R379 X_0R/4 STANDOFF X_SCREW
REFCLKN PEWake# (IO)(0/3.3V) or N/C APU_WAKE# [6,17,20,21]
[7] CLK_M2_DP 55 56 E2B-7984020-A89 E43-1203514-A89
57 REFCLKP NC-18 58
GND-11 NC-19
VCC3 PIN 69
H5 H6 H7 H8
Low SATA
NC PCIE
D46
2
ESD-MLVS0402L04/4
1
KEY M VCC3 <HP-BOM> <HP-BOM> <HP-BOM> <HP-BOM>

d
R627 67 68 M2TEST
NC-1 SUSCLK(32kHz) (O)(0/3.3V) TP7

Screw

Screw

Screw

Screw
10KR/4 M.2_1_DET 69 70
VCC3 R616 10KR/4

.
71 PEDET (NC-PCIe/GND-SATA) 3.3Vaux-7 72
[6,23] M.2_1_DET GND-12 3.3Vaux-8
73 74
C M.2_1_CARD_DET 75 GND-13 3.3Vaux-9 E2B-7B05010 E2B-7B05010 E2B-7B05010 E2B-7B05010 C
[7,23] M.2_1_CARD_DET

1
GND-14
D47 ESD-MLVS0402L04/4

d
M.2_CARD_DET: 2 1

MEC2
0:Have M.2 Footprint: H_R240D173_BR189_PT

77
1:No M.2
SLOT-NGFFCARD67P_BLACK-HF-24
E2B-7B05010-A89 E2B-7B05010-A89

MEC2
77
N15-0670330-L06 E2B-7B05010-A89 E2B-7B05010-A89

s m
B B

A A

Schematic Cfg Project

MS-7B86/B450 GAMING PLUS V A MICRO-START INT'L CO.,LTD.


Title
MS-7B86/B450-A PRO M.2_1
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 26 of 68
8 7 6 5 4 3 2 1
5 4 3 2 1

TYPE L : 4 PIN CPU FAN USE NCT3947S USE PCH GPIO CONTROL FAN MODE
20180420 1.Mode GPIO BIOS can swtich PWM/DC MODE
CPU FAN - Type-L
Pump FAN - Type-K 2.FM:BIOS can read FAN PWM/DC MODE

r u
D D

7 .
CPU_FAN1_PWM R32 100R/4 +12V
>40mil
CPU_FAN1
If C19 place high thermal area,You can change X7R cap.
+12V C29 X_C0.1u16X7/4

-b x
PWM Mode : VOUT voltage follows VIN voltage
DC Mode : VOUT voltage is regulated to 3.8*DCIN voltage. Close to FAN Connector
C7 Close to U2 PIN5
U5
VCC3 5 2 CPU_FAN1_PWM R27
C7 C10u25X5/8 VIN PWMOUT 4.7K/4
CPU_FAN1
Avoid NCT3947S MODE PIN Leakage 1
PWMIN VOUT
4
MEC1
4
3
TO SIO
R5 R21 27K/4
CPU_FAN1TAC [24]
2K/4 2
VCC3 From SIO 8
1
[24] SIO_CPU_FAN1 R8 100KR1%/4
DCIN Fault(OD) 3 BH1X4B_BLACK C21 R22
C5 C0.1u16X7/4 Reserved-1

d
N32-1040CF1-H06 X_C0.1u16X7/4 10KR/4
R10 7 CPUFAN1_FM
Reserved-2 CPUFAN1_FM [29]
X_10KR/4 FM(PP)

.
CPU_FAN1_MODE 6
[29] CPU_FAN1_MODE MODE
CPU_FAN1_MODE 9
C GND CPU_FAN1_PWR C
NCT3947S-A_SOP8-HF-1
CPUFAN_PWR
GPIO Control I22-3947S12-N62
>40mil

d
R9 C26 C40
X_10KR/4 C10u25X5/8 C0.1u16X7/4

MODE(PIN7)
Resever For FIX DC or PWM MODE USE By PM SPEC Close to FAN Connector
PWM MODE HIGH

m
DC MODE LOW
Default AUTO MODE GPI(Floating)

s
Internall pull up 1.65V

PUMP_FAN1
B B

+12V
CPU_FAN2_PWM R70 100R/4
>80mil
If C61 place high thermal area,You can change X7R cap.
C59 X_C0.1u16X7/4

+12V Close to FAN Connector


PWM Mode : VOUT voltage follows VIN voltage
VCC3
DC Mode : VOUT voltage is regulated to 3.8*DCIN voltage. (支援 2A)
C64 Close to U6 PIN5 R31
U10 4.7K/4
VCC3 5 2 CPU_FAN2_PWM PUMP_FAN1
C64 C10u25X5/8 VIN PWMOUT
MEC1
4
3
TO SIO
R73 R34 27K/4
CPU_FAN2TAC [24]
X_10KR/4 1 4 2
R72 PWMIN VOUT 1
CPU_FAN2_MODE 2K/4
From SIO 8
BH1X4B_BLACK C32 R30
[24] SIO_CPU_FAN2 R74 100KR1%/4 20180403 N32-1040CF1-H06 X_C0.1u16X7/4 10KR/4
DCIN Fault(OD) 3
Reserved-1 Removed,type-L->type-K。
R75 C65 C0.1u16X7/4
X_10KR/4 7
Reserved-2
CPU_FAN2_MODE 6
FM(PP) CPU_FAN2_PWR
[29] CPU_FAN2_MODE MODE 9
GND CPUFAN_PWR
NCT3947S-A_SOP8-HF-1 >40mil C62 C60
I22-3947S12-N62 C0.1u16X7/4
GPIO Control C10u25X5/8

A A

MODE(PIN7) Close to FAN Connector

PWM MODE HIGH


DC MODE MICRO-START INT'L CO.,LTD.
LOW Title
CPU FAN1/PUMP FAN1
Default AUTO MODE GPI(Floating) Size Document Number Rev
Internall pull up 1.65V Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 27 of 68
5 4 3 2 1
5 4 3 2 1

TYPE K : 4 PIN CPU FAN USE NCT3947S USE PCH GPIO CONTROL FAN MODE
SYSFAN 1.Mode GPIO BIOS can swtich PWM/DC MODE +12V
PWM Mode : VOUT voltage follows VIN voltage
If C291 place high thermal area,You can change X7R cap. DC Mode : VOUT voltage is regulated to 3.8*DCIN voltage. SYS1_FAN_PWM R291 100R/4 +12V
C333 Close to U24 PIN5
>40mil
U23
VCC3 5 2 SYS1_FAN_PWM C293 X_C0.1u16X7/4

u
C333 C10u25X5/8 VIN PWMOUT
Close to FAN Connector
1 4
PWMIN VOUT

r
D R285 D
2K/4 R283
VCC3 From SIO 4.7K/4

.
R286 100KR1%/4 8 SYS_FAN1
[24] SIO_SYS1_FAN DCIN Fault(OD) 3
Reserved-1 MEC1
4
3
TO SIO
C300 C0.1u16X7/4 R270 27K/4
SYS1_FANTAC [24]
R305 7 2
Reserved-2 1

7
X_10KR/4 FM(PP)
SYS1_FAN_MODE 6
[29] SYS1_FAN_MODE MODE
SYS1_FAN_MODE 9 BH1X4B_BLACK C286 R271
GND X_C0.1u16X7/4 10KR/4
NCT3947S-A_SOP8-HF-1
N32-1040CF1-H06
I22-3947S12-N62

-b x
R299
GPIO Control
X_10KR/4
SYS1_FAN_PWR
MODE(PIN7)
CPUFAN_PWR
PWM MODE HIGH >40mil C308 C322
C10u25X5/8 C0.1u16X7/4

DC MODE LOW
Close to FAN Connector
Default AUTO MODE GPI(Floating)

d
Internall pull up 1.65V

.
If C651 place high thermal area,You can change X7R cap.
C +12V C
PWM Mode : VOUT voltage follows VIN voltage
DC Mode : VOUT voltage is regulated to 3.8*DCIN voltage. SYS2_FAN_PWM R741 100R/4 +12V
>40mil

d
C723 Close to U58 PIN5
U58
VCC3 5 2 SYS2_FAN_PWM C726 X_C0.1u16X7/4
C723 C10u25X5/8 VIN PWMOUT
Close to FAN Connector
1 4
R743 PWMIN VOUT
2K/4 R732
VCC3 From SIO

m
4.7K/4
R744 100KR1%/4 8 SYS_FAN2
[24] SIO_SYS2_FAN DCIN Fault(OD) 3
Reserved-1 MEC1
4
3
TO SIO
C728 C0.1u16X7/4 R695 27K/4
SYS2_FANTAC [24]
R710 7 2
Reserved-2

s
X_10KR/4 1
SYS2_FAN_MODE 6
FM(PP)
[29] SYS2_FAN_MODE MODE
SYS2_FAN_MODE 9 BH1X4B_BLACK C700 R696
GND X_C0.1u16X7/4 10KR/4
NCT3947S-A_SOP8-HF-1 N32-1040CF1-H06
R697
I22-3947S12-N62
X_10KR/4
SYS2_FAN_PWR
CPUFAN_PWR
>40mil C730 C731
C10u25X5/8 C0.1u16X7/4

B B

Close to FAN Connector

If C92 place high thermal area,You can change X7R cap.


+12V
PWM Mode : VOUT voltage follows VIN voltage
DC Mode : VOUT voltage is regulated to 3.8*DCIN voltage. SYS3_FAN_PWM R80 100R/4 +12V
C98 Close to U1 PIN5
>40mil
U11
VCC3 5 2 SYS3_FAN_PWM C70 X_C0.1u16X7/4
C98 C10u25X5/8 VIN PWMOUT
Close to FAN Connector
1 4
R739 PWMIN VOUT
2K/4 R78
VCC3 From SIO 8
4.7K/4
R129 100KR1%/4 SYS_FAN3
[24] SIO_SYS3_FAN DCIN Fault(OD) 3
Reserved-1 MEC1
4
3
TO SIO
C100 C0.1u16X7/4 R79 27K/4
SYS3_FANTAC [24]
R137 7 2
Reserved-2 1
X_10KR/4 FM(PP)
[29] SYS3_FAN_MODE 6
SYS3_FAN_MODE MODE 9 BH1X4B_BLACK C71 R77
GND X_C0.1u16X7/4 10KR/4
NCT3947S-A_SOP8-HF-1

R128
I22-3947S12-N62 N32-1040CF1-H06
A X_10KR/4 A
SYS3_FAN_PWR
CPUFAN_PWR
>40mil C88 C85
C10u25X5/8 C0.1u16X7/4

MICRO-START INT'L CO.,LTD.


Close to FAN Connector Title
SYS_FAN1-3
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 28 of 68
5 4 3 2 1
5 4 3 2 1

SYSFAN 4 TYPE K : 4 PIN CPU FAN USE NCT3947S USE PCH GPIO CONTROL FAN MODE
If C598 place high thermal area,You can change X7R cap.
+12V
PWM Mode : VOUT voltage follows VIN voltage
DC Mode : VOUT voltage is regulated to 3.8*DCIN voltage.

u
C382 Close to U1 PIN5 SYS4_FAN_PWM R278 100R/4 +12V
U32
>40mil
VCC3 5 2 SYS4_FAN_PWM C294 X_C0.1u16X7/4
VIN PWMOUT

r
D C382 C10u25X5/8 D
Close to FAN Connector
1 4

.
R382 PWMIN VOUT
2K/4 R307
VCC3 From SIO 8
4.7K/4
R381 100KR1%/4 SYS_FAN4
[24] SIO_SYS4_FAN DCIN Fault(OD) 3 4 TO SIO

7
C396 C0.1u16X7/4 Reserved-1 MEC1 3 R287 27K/4
SYS4_FANTAC [24]
R386 7 2
Reserved-2 1
X_10KR/4 FM(PP)
SYS4_FAN_MODE 6
SYS4_FAN_MODE MODE 9 BH1X4B_BLACK C305 R279

-b x
GND X_C0.1u16X7/4 10KR/4
NCT3947S-A_SOP8-HF-1 N32-1040CF1-H06
R380
GPIO Control I22-3947S12-N62 SYS4_FAN_PWR
X_10KR/4 CPUFAN_PWR
MODE(PIN7) >40mil C383 C347
C10u25X5/8 C0.1u16X7/4

PWM MODE HIGH


Close to FAN Connector
DC MODE LOW

d
Default AUTO MODE GPI(Floating)

.
Internall pull up 1.65V
C C

NCT5605Y

d
VCC3 C414 C1u6.3X/4
C415 C0.1u16X7/4 VCC3

U33
I2C/SMB clock:93.75KHz
20 15 5605_2_A2 R393 10KR1%/4
3VDD A2/GP15 16 5605_2_A1 R399 10KR1%/4
A1/GP16

m
SCLK0 1 17 5605_2_A0 R400 10KR1%/4
[6,9,11,34,46,56] SCLK0 SCL A0/GP17
[6,9,11,34,46,56] SDATA0 SDATA0 2
SDA

VCC3 R401 47KR1%/4 5605_RST#_FAN 19


14 RST# 8
BEEP/GP14 GP20 CPU_FAN1_MODE [27]

s
18 9
INT# GP21 CPU_FAN2_MODE [27]
C413 10
GP22 SYS1_FAN_MODE [28]
C1u6.3X/4 3 11
LED0/GP10 GP23 SYS2_FAN_MODE [28]
4 12
LED1/GP11 GP24 SYS4_FAN_MODE SYS3_FAN_MODE [28]
5 13
[27] CPUFAN1_FM LED2/GP12 GP25
6
LED3/GP13
By PM Define FAN name

VSS

EP
BIOS SHOW FAN MODE Information USE slave address : Write 39H
Default GPI Read 38H FAN MODE
NCT5605Y-RH FAN
USE

21
B02-5605Y0C-N62
GP20 CPUFAN1
B
CPUFAN2 B
GP21 PUMPFAN
CPUFAN1_FM R2563 1KR/4
GP22 SYSFAN1

By PM Define FAN name GP23 SYSFAN2


SHOW FAN
MODE USE FAN GP24 SYSFAN3

GP12 CPUFAN1 GP25 SYSFAN4

A A

MICRO-START INT'L CO.,LTD.


Title
SYS_FAN4/NCT5605Y
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 29 of 68
5 4 3 2 1
5 4 3 2 1

RTL8111H Giga LAN PIN19:


AMD platform connect to PCIE_RST#,
don't connect to A-RST#.
INTEL platform connect to PLT_RST#,

LAN Connector

u
UL7

r
D
VDD33 20180409 D
CL19 C0.1u16X7/4PE_LAN_TXP_C 13 PCIE interface 17 PE_LAN_RXP_C C0.1u16X7/4 CL21 For EMI Change to N58-32F0721-F02.
[15] PE_LAN_TXP HSIP HSOP PE_LAN_RXP [15]
CL20 C0.1u16X7/4PE_LAN_TXN_C 14 18 PE_LAN_RXN_C C0.1u16X7/4 CL22

.
[15] PE_LAN_TXN HSIN HSON PE_LAN_RXN [15]
RL6 100R/4 CL5 C0.1u16X7/4
PE_LAN_CLKP 15 19 PLTRST_BU3#_LAN_C
[17] PE_LAN_CLKP REFCLK_P PERSTB
PE_LAN_CLKN 16 12
[17] PE_LAN_CLKN REFCLK_N CLKREQB CLKREQ1 [17] LAN_USB1B
LVDD33 29 YELLOW+

7
RL16 1KR1%/4 LED2 RL5 220R/4 LED2_ACT 30 YELLOW-
VCC3
ISOLATEB 20 PM 1 TR_D0+ VCT 19 POWER
RL13 15K1%/4 ISOLATEB LAN_WAKE# 21 ISOLATEB MDIP0 2 TR_D0- TR_D0+ 20 TD1+
[17,24] LAN_WAKE# LANWACKEB MDIN0

2
TR_D0- 21 TD1-
4 TR_D1+ Main:D0G-1020530-I05 DL5 CL8 TR_D1+ 22 TD2+

-b x
Transceiver MDIP1 5 TR_D1- AVL:D0G-8010510-SI0 C0.1u16X7/4 TR_D1- 23 TD2-
RL9 2.49KR1%/4 RSET 31 Interface MDIN1 TR_D2+ 24 TD3+
RSET 6 TR_D2+ TR_D2- 25 TD3-

1
MDIP2
VDD33@65mA
7 TR_D2- TR_D3+ 26 TD4+
VDD33 23 MDIN2 D0G-1020530-I05 For EMI TR_D3- 27 TD4-
VDDREG

Regulator & Power


9 TR_D3+ ESD-VPORT0603L102KV05 28 GND
VDD33 11 MDIP3 10 TR_D3- LED1 RL7 220R/4 LINK1000# 31
AVDD33-1 MDIN3
GREEN+/ORANGE-
CPL5 32 32 GREEN-/ORANGE+
11 32 11 32 VDD33 width>40mil
AVDD33-2
3VSB
20mil=1A CL15 CL13 CL14 CL12 VDD10 width>60mil 24 EEPROM 27 LED0 LED0 RL8 100R/4 LED0_LINK100# RJ45_USBX2_LEDX2-RH-31
VDD10 REGOUT LED0
C0.1u16X7/4

C0.1u16X7/4

C4.7u10X/6
22 26 LED1 For EMI

C4.7u10X/6
DVDD10 LED1/GPO

d
3 25 LED2
8 AVDD10-1 LED2

.
30 AVDD10-2
AVDD10-3
C For surge improvement 28 CLK_LANI CL18 C27p50N/4 C
CLOCK CKXTAL1

2
YL5 For EMI
VDD10@150mA

d
25MHZ18P
33 29 CLK_LAN0 D04-1000201-F07

1
GND CKXTAL2 CL17 C27p50N/4
VDD10 LED2_ACT CL6 C100p50N/4
RTL8111H-CG-RH
3 22 22 24 8 30 B06-08111CC-R09
LINK1000# CL7 C100p50N/4
Pin33: 4 via from top layer to GND layer

m
CL11 CL23 CL24 CL25 CL10 CL16
and make the via at the center of IC. LED0_LINK100# CL9 C100p50N/4
C0.1u16X7/4

C0.1u16X7/4

C0.1u16X7/4

C0.1u16X7/4

C0.1u16X7/4

X_C1u6.3X/4

s
3VSB

C452 C0.1u16X7/4
FROM PROM

5
U36
B VCC
1 PLTRST_BU3#_LAN R418 X_R/4 B
A PM_GPP_RST [17,25]
PLTRST_BU3#_LAN_C R417 22R/4 PLTRST_BU3#_LAN_R 4 Y
2
B
LAN_BIOS_OFF# [17]
GND
SN74LVC1G08DBVR_SOT23-5 FROM PROM GPIO

3
20180424
Layout swap ESD Protect
close to connector

U76 U77
TR_D1- 1 NC 10 TR_D1- TR_D3- 1 NC 10 TR_D3-
TR_D1+ 2 NC 9 TR_D1+ TR_D3+ 2 NC 9 TR_D3+

TR_D0- 4 7 TR_D0- TR_D2- 4 7 TR_D2-


TR_D0+ NC TR_D0+ TR_D2+ NC TR_D2+
5 NC 6 5 NC 6
ESD-AOZ8829DI-03 ESD-AOZ8829DI-03

8
D0G-06A030C-A68 D0G-06A030C-A68

A 8111H POWER Consumption A

3.3V @ mA mW
10 M Idle/TxRx 9.9/84.69 32.67/279.48
100 M Idle/TxRx 48.11/92.44 158.76/305.05
Giga Idle/TxRx 124.5/177.57 410.85/585.98 MICRO-START INT'L CO.,LTD.
Title
ALDPS 5.50 18.15 LAN 8111H
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 30 of 68
5 4 3 2 1
5 4 3 2 1

ALC892 Follow APU power well

G4

G6
VDDIO_AUDIO AUDIO1C AUDIO1F
LINE_IN_L RA5 1KR/4 LINE_IN_LA 34 SROUT_L RA19 75R/4 SROUT_LA 64
33 63
11mA LINE1_JD 32 SURR_JD 62
LINE_IN_R RA6 1KR/4 LINE_IN_RA 31 SROUT_R RA24 75R/4 SROUT_RA 61
VDDIO_AUDIO Closed Codec VCC3 LDOOUT SMD CAP: Fail to test THD+N

1
EL/SOLID cap: Test THD+N will Pass

u
1

1
LDOOUT DA12 DA11
Closed pin9 ESD-MLVS0402L04/4 ESD-MLVS0402L04/4 DA7 DA8
D0G-2710510-I05 ESD-MLVS0402L04/4 ESD-MLVS0402L04/4

r
D CA15 CA18 CA24 CA23 CA25 CA26 CA14 closed PIN25 D0G-2710510-I05 D

2
X_C10u6.3X5/6 C0.1u16X7/4 C10u6.3X5/6 C0.1u16X7/4 C0.1u16X7/4C10u6.3X5/6 C22u6.3X5/8

2
.
closed PIN38 C91-1011051-N07 D0G-2710510-I05

25
38
1
9
UA5 D0G-2710510-I05

DVDD-IO

LDO-OUT1
LDO-OUT2
DVDD
EAPD 47 36 A_LOUT_R+ ECA11 1+ 2 CD100u10SO LOUT_R
[32] EAPD EAPD/SPDIFI FRONT-R 35 A_LOUT_L+ ECA12 1+ 2 CD100u10SO LOUT_L

7
48 FRONT-L

MEC2
MEC1
SPDIF-OUT
5 41 A_SROUT_R CA34 C10u6.3X5/8 SROUT_R
[5] AZ_SDOUT SDATA-OUT SURR-R
RA31 22R/4 SDIN0 8 39 A_SROUT_L CA35 C10u6.3X5/8 SROUT_L AUDIO1B AUDIO1E
[5] AZ_SDIN0 SDATA-IN SURR-L
10 LOUT_L RA13 75R/4 LOUT_LA 24 CEN_OUT RA7 75R/4 CEN_OUTA 54

-b x
[5] AZ_SYNC SYNC
CA19 X_C10p50N/4 [5] AZ_RST# 11 23 53
RESET# 43 A_CEN_OUT CA36 C10u6.3X5/8 CEN_OUT FRONT_JD 22 CEN_JD 52
RA32 0R/4 BITCLK 6 CENTER 44 A_BASS CA37 C10u6.3X5/8 BASS LOUT_R RA17 75R/4 LOUT_RA 21 BASS RA11 75R/4 BASSA 51
[5] AZ_BITCLK BCLK LFE

1
46 A_SURRBACK_R CA38 C10u6.3X5/8 SURRBACK_R DA9 DA10
SIDE-R 45 A_SURRBACK_L CA39 C10u6.3X5/8 SURRBACK_L ESD-MLVS0402L04/4 DA14 DA13
SIDE-L ESD-MLVS0402L04/4
2 D0G-2710510-I05 ESD-MLVS0402L04/4 ESD-MLVS0402L04/4
CA21 C10u6.3X5/6 REGREF 3 GPIO0/DMIC-CLK/SPDIF-OUT2
D0G-2710510-I05

2
REGREF 24 A_LINE_IN_R CA8 4.7u6.3X/8 LINE_IN_R

2
SENSE_A 13 LINE1-R 23 A_LINE_IN_L CA9 4.7u6.3X/8 LINE_IN_L
SENSE_B 34 SENSE A LINE1-L D0G-2710510-I05
SENSE B C91-1011051-N07
15 A_LINE2_R ECA6 1+ 2 CD100u10SO LINE2_R
D0G-2710510-I05

d
LINE2-R LINE2_R [32]
MIC1-VREFO-R 32 14 A_LINE2_L ECA10 1+ 2 CD100u10SO LINE2_L
MIC1-VREFO-R LINE2-L LINE2_L [32]
[32] MIC2_VREFO 30

.
MIC1-VREFO-L 28 MIC2-VREFO
37 MIC1-VREFO-L 22 A_MIC1_R CA10 4.7u6.3X/8 MIC1_R MIC1-VREFO-L RA30 2.2KR/4MIC1_LA
29 PIN37-VREFO MIC1-R 21 A_MIC1_L CA11 4.7u6.3X/8 MIC1_L
C 45.8mA LDOVDD LDO-IN MIC1-L
C

[32] LINE2_VREFO 31 MIC1-VREFO-R RA34 2.2KR/4MIC1_RA


LINE2-VREFO

G3

G5
VREF 27
GPIO1/DMIC-DATA

VREF

d
33 17 A_MIC2_R CA12 4.7u6.3X/8 MIC2_R AUDIO1A AUDIO1D
SENSE C MIC2-R MIC2_R [32]
JDREF 40 16 A_MIC2_L CA13 4.7u6.3X/8 MIC2_L MIC1_L RA29 1KR/4 MIC1_LA 14 SURRBACK_L RA58 75R/4 SURRBACK_LA 44
JDREF MIC2-L MIC2_L [32]
13 43
CA17 CA16 RA37 20 MIC1_JD 12 SURRBACK_JD 42
CD-R
X_C0.1u16X7/4

19 MIC1_R RA33 1KR/4 MIC1_RA 11 SURRBACK_R RA59 75R/4 SURRBACK_RA 41


CD-GND
DVSS
C10u6.3X5/6

20KR1%/4

AVSS
AVSS

12 18 892,887/4.7uF: Test THD+N will Pass L5 R5


BEEP CD-L
898/10uF: Test THD+N will Pass

1
m
ALC892-CG-RH DA5 DA6 DA22 DA23
4
7

26
42

B05-LC89214-R09 ESD-MLVS0402L04/4 ESD-MLVS0402L04/4 ESD-MLVS0402L04/4 ESD-MLVS0402L04/4


Closed Codec Pun 27 D0G-2710510-I05 D0G-2710510-I05

2
s
D0G-2710510-I05 D0G-2710510-I05

EMI
CPA5 X_COPPER
Closed Codec CA7 X_C0.1u16X7/4
CA32 X_C1000p50X/4
SENSE_A RA26 5.1K1%/4 FRONT_JD CPA6 X_COPPER

RA22 10KR1%/4 LINE1_JD LOUT_LA RA14 22KR/4


B [32] LOUT_LA B
LOUT_RA RA18 22KR/4
[32] LOUT_RA
RA27 20KR1%/4 MIC1_JD SROUT_LA RA20 22KR/4
[32] SROUT_LA
SROUT_RA RA25 22KR/4
[32] SROUT_RA
RA28 39.2KR1%/4 SURR_JD CEN_OUTA RA8 22KR/4
[32] CEN_OUTA
[32] BASSA BASSA RA12 22KR/4
SENSE_B RA35 10KR1%/4 CEN_JD SURRBACK_LA RA61 22KR/4
[32] SURRBACK_LA
SURRBACK_RA RA62 22KR/4
[32] SURRBACK_RA
SENSE_B
SENSE_B [32]
RA60 5.1K1%/4 SURRBACK_JD

LIN_IN SURR
C F

ATX_5VSB LDOVDD
Digital Analog
LA5 LIN_OUT CEN/BAS
B E

DA15 0R/8
X_TVS R11-0000034-W08 CA22 CA20 MIC1 SIDESURR
A A
C10u6.3X5/6

A D
C0.1u16X7/4

MICRO-START INT'L CO.,LTD.


Title
CA22,CA20 close to LA5 Audio ALC892
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 31 of 68
5 4 3 2 1
5 4 3 2 1

DA21 JAUD1
Y F_LINE_2R RA49 4.7K/4 F_LINE2_R MIC2_L RA46 75R/4 F_MIC2_L 1 2
[31] MIC2_L MIC GND
[31] LINE2_VREFO Z
X F_LINE_2L RA55 4.7K/4 F_LINE2_L MIC2_R RA47 75R/4 F_MIC2_R 3 4
[31] MIC2_R MICPWR PRESENCE#
S-BAT54A_SOT23
DA16 LINE2_R RA48 75R/4 F_LINE2_R 5 6 MIC2_JD
[31] LINE2_R FLINE OUTR LINE NEXT R
Y F_MIC_2L RA44 4.7K/4 F_MIC2_L
[31] MIC2_VREFO Z [31] SENSE_B RA43 47R/4 HPON 7 8
X F_MIC_2R RA45 4.7K/4 F_MIC2_R HPON
S-BAT54A_SOT23 LINE2_L RA56 75R/4 F_LINE2_L 9 10 LINE2_JD
[31] LINE2_L FLINE OUTL LINE NEXT L

u
H2X5[8]M_BLACK-RH
CA31 N31-2051411-H06 RA52 RA51
C1000p50X/4 39.2KR1%/4 20KR1%/4

r
D D

.
F_LINE2_L 2 1 Close to Front panel
DA20 ESD-MLVS0402L04/4
F_LINE2_R 2 1 For HDA/AC97 front cable.
DA17 ESD-MLVS0402L04/4

7
F_MIC2_R 2 1
DA19 ESD-MLVS0402L04/4
F_MIC2_L 2 1
DA18 ESD-MLVS0402L04/4

-b x
D0G-2710510-I05
Close to Front panel
F_LINE2_L RA54 22KR/4
F_LINE2_R RA50 22KR/4
ESD protect
D0G-2710510-I05
avl:D0G-2950500-SI0

Rear Line OUT De-POP circuit 3VSB

d
(De-pop circuit for Rear Line out & Front Headphone out)

.
C RA38 CA27 C
220KR1%/4 C0.1u16X7/4
VCC3

d
RA39 10KR/4 B QA8
P-MMBT3906
RA41
D02-0390629-O05

C
10KR/4
E

CA28
B QA9 C22u6.3X5/8 MUTE
P-MMBT3906
E

m
C

EAPD RA42 1KR/4 EAPD_R B QA10


[31] EAPD
P-MMBT3906
C

Digital

s
Analog

QA6 QA11

MUTE RA16 1KR/4 2 6 LOUT_LA MUTE RA53 1KR/4 2 6 F_LINE2_L


LOUT_LA [31]
1 1
RA15 1KR/4 5 3 LOUT_RA RA57 1KR/4 5 3 F_LINE2_R
LOUT_RA [31]
4 4

NN-HBN2515S6R NN-HBN2515S6R
B B
D02-2515S09-CH5 MHA5

9
1
7 2

6 3

X_MH001

4
CA30 CA29
C0.1u16X7/4 C0.1u16X7/4
(add de-pop circuit by PM spec or customer request,
NOTE: add de-pop circuit need to change CA5,CA6, CA7, CA9,to TVS)
QA5 QA7

MUTE RA10 1KR/4 2 6 CEN_OUTA MUTE RA23 1KR/4 2 6 SROUT_LA


CEN_OUTA [31] SROUT_LA [31]
1 1
RA9 1KR/4 5 3 BASSA RA21 1KR/4 5 3 SROUT_RA
BASSA [31] SROUT_RA [31]
4 4

NN-HBN2515S6R NN-HBN2515S6R

A A
QA12

MUTE RA63 1KR/4 2 6 SURRBACK_LA


SURRBACK_LA [31]
1
RA64 1KR/4 5 3 SURRBACK_RA
SURRBACK_RA [31]
4

NN-HBN2515S6R MICRO-START INT'L CO.,LTD.


Title
Audio De-POP
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 32 of 68
5 4 3 2 1
8 7 6 5 4 3 2 1

5V_RUSB

USB Power 1
F6
2
0.5A
USB_PS2_1 USB (USB2.0)
ATX_5VSB

8.7A
F-SPR-P260T
D08-0301000-P16

u
S
r
D 5VSBDRV2 G Q14 D
P-P06P03LCGA

.
D
C63
C0.018u16X/4
5V_RUSB

F8
1.8A

7
5
1 2 USB30_HDMI HDMI_USB (USB3.0)
5VDRV2 4
3 F-SPR-P260T
2 D08-0301000-P16
1

-b x
F9
1.8A
Q15 1 2 USB31_TYPEA LAN_TYPE-A (USB3.1)
ATX_5VSB N-NTMFS4C024NT1G
D03-4C02403-O05 F-SPR-P260T
R655 510R/4 5VUSB_5V 5VUSB_5VSB R654 10R/4
VCC5
VCC5
D08-0301000-P16
R656 10KR/4 C677 C0.1u16X7/4
[24,43,57] ATX_PWR_OK

F5
0.5A
1
2

U53 1 2 PS2_VCC PS2


5 7 5VSBDRV2
5VCC
5VSB

[6,24,34,43,51,54,55] SLP_S3# S3# 5VSB_DRV


6

d
F-SMD1210P110T
[6,9,24,34,43,44,45] SLP_S5# S5#
D08-0100800-P16

.
GND

4 8 5VDRV2 5VDRV2 [34]


[24,34] USB_MODE MODE 5VCC_DRV
C C
uP7501 11-18
3

R653 I32-0750119-U33 R659 C682 5VDRV2, 5VSBDRV2 width 12mil,


TO:NCT6793 GP25

d
10KR1%/4 1KR/6 C1u16X/6 Do NOT route near the edge of a
H:SUPPORT S0/S3/S5 board.
L:SUPPORT S0/S3 +12V

Rear (4.9A)

m
------------------------------------------------

s
Front (3.8A) ATX_5VSB

5V_FUSB

1A

S
F12
5VSBDRV2 G Q90 1 2 USB20_VCC1 Front USB2.0(JUSB1)
P-P06P03LCGA
F-SPR-P260T

D
C690 D08-0301000-P16
B C0.018u16X/4 B
5V_FUSB
F13
1A
1 2 USB20_VCC2 Front USB2.0(JUSB2)

5
5VDRV2 4 F-SPR-P260T
3 D08-0301000-P16
2
1
F14
1 2 USB30_VCC1 Front USB3 180° BOX Header(JUSB3)
Q86
N-NTMFS4C024NT1G F-SPR-P260T
1.8A
D03-4C02403-O05 D08-0301000-P16
VCC5

A A

MICRO-START INT'L CO.,LTD.


Title
USB Power
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 33 of 68
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

HOTKEY POWER
USB Flash BIOS F75504 layout placement must meet to spi/usb trace length spec with host.
As for as possible place near to host. C1511
VCC5
C10u6.3X5/6
ATX_5VSB
C1512 C10u6.3X5/6

u
3

5
VIH=1.4V U3
CLK running in S0,don't require in sleep

5VSB
5VCC
20180402 R2518 200KR/4 5VDRV2_EN 1 6
[33] 5VDRV2 S3# VOUT3

r
D Add 24MHz crystal. D
VCC3 HK_VSB_EN 2 7
R2519 EN UP7537 VOUT2 0.5A

.
56KR1%/4 8

GND

GND
VOUT1 RUSB_HK_VSB

1
C1501 20180402

+
U74 C0.01u16X/4 PWR_1P8B_SW Change to 5VDRV2. UP7537BSU8_PSOP8-RH EC1

9
1 4

7
CD100u16SO

2
Tri-State VDD
C4 C1508 FB_3V3
5VDUAL
2 3 R2515 0R/4 CLK_24M_75504
GND OUTPUT

C10u6.3X5/6

C0.1u16X7/4
OSC-24MHZ50-S-HF C1502 C1509

-b x
C22p50N/4 C0.1u16X7/4
3VSB
default=> GPI

28
Register POWER Well

9
Host U2 USB connector R2517
=> VSB or VBAT
100KR/4

VDD5V

CAP
SPIVDD
VCC3
2 27 USB_FB_DP0+ R2534 X_R/4 HK_VSB_EN
[16] USB_FLASH_DP0 TDP DP USB_FB_DN0- [24] USB_FLASH_EN
3 26
[16] USB_FLASH_DN0 TDM DM
R13 R2533 X_0R/4
CLK_24M_75504 [24,33] USB_MODE
10KR/4 14 C1503
24M_CLK 7 PWROK_CTL# R2526 X_R/4 C0.1u16X7/4
VCC_DET R2527 X_0R/4 USB_FS_SDA 18 POK_CTRL# ALL_PWR_MUX [7,55]
[6,9,11,29,46,56] SDATA0
R2528 X_0R/4 USB_FS_SCL 17 SDA 8

d
[6,9,11,29,46,56] SCLK0
SCL PSOUT# PWRBTIN [24,57]
C1510 20 ACT_LED

.
15 ACT_LED
C1u6.3X/4 [6,9,24,33,43,44,45] SLP_S5# S4#
C
[6,24,33,43,51,54,55] SLP_S3# 16 22 C
S3# PS_ON# 504_PSON# [57]
FLASH_ACTIVE# 19
START_UP

d
10 SPI_CS# [7]
VCC_DET 21 SPI_CS# 11 504_SPI_CLK R2529 0R/4
VCC_DET SPI_CLK 504_CLK [7]
12 504_SPI_MOSI R2530 0R/4 USB Connector power come from UP7537
SPI_MOSI 504_DATAOUT [7]
4 13 504_SPI_MISO R2531 0R/4
R2594 X_1KR/4 RSVD_STRAP 5 NC-1 SPI_MISO 504_DATAIN [7] provide(USB Hotkey Connector same)

GND-1
GND-2
GND-3
R2532 1KR/4 INTEL_AM4_STRAP 24 NC-2
3VSB 25 NC-6
NC-7 R fine tune by signal quality.

m
R2557 2.2KR/4USB_FS_SDA Pin 24 F75504N_QFN28-RH R close F75504

6
23
29
R2558 2.2KR/4USB_FS_SCL USB_PS2_1
Floating PIN24=INTEL
Pull-down Pin24=AM4 PS2_USB1B
4 1
VCC GND

s
PS2USB1- 3
RUSB_HK_VSB PS2USB1+ 2 USB2- 15
Q385 USB2+ 15 16
2N7002D 8 16
G2 D2 USB_FS_SCL USBFB_DN0- 7 VCC 5
VCC3 5VDUAL USB1- GND
USBFB_DP0+ 6 17
USB_FS_SDA D1 USB1+ 17 18
S2 SCLK0 18

VCC3 G1
R17 MINIDIN_USBX2-RH-10
47KR/4 N58-14M0241-H06
S1

SDATA0 FLASHB1
2 3 FLASH_ACTIVE#
B HK_LED1 B
4

SW-TACTB1_BLACK-RH-1 LED04-R-20mA2.4V_1608-HF

20180424 R2525 1KR/4 ACT_LED


Layout swap RUSB_HK_VSB

L5 VCC5 LED close to USB port


PS2_USB1+ 1 4 PS2USB1+
[16] PS2_USB1+
PS2_USB1- 2 3 PS2USB1-
[16] PS2_USB1-
R60
4P2R-0R/4 10KR/4
11-14
L6 Q13
USB_FB_DN0- 1 4 USBFB_DN0- 2N7002D
R59 15K/4 PM_OC7_V# G2 D2
USB_FB_DP0+ 2 3 USBFB_DP0+ PM_OC7# [16,37]
D1
4P2R-0R/4 S2 USB_PS2_1 RUSB_HK_VSB
R58 PM_OC7#RC G1
USB_PS2_1
10KR/4
S1

C49
1
ESD close to connector.

+
EC9 C1507
CD100u16SO C0.1u16X7/4

C0.1u16X7/4
D7 OC# signal connect to
USBFB_DP0+ 1 USBFB_DP0+ VCC5
NC 10 host OC pin.
USBFB_DN0- 2 NC 9 USBFB_DN0-
A A
PS2USB1- 4 7 PS2USB1- R2536
NC
PS2USB1+ 5 NC 6 PS2USB1+ 10KR/4
Q1
ESD-AOZ8829DI-03 R2559 15K/4 G2 D2
3

D1

RUSB_HK_VSB R2535 10KR/4 G1


S2
MICRO-START INT'L CO.,LTD.
Title
20180402 2N7002D USB Power
S1

Follow module circuit, use usb3.0 ESD


for good eye diagram. Size Document Number Rev
20180424 Custom MS-7B86 30
Layout swap. Date: Wednesday, April 17, 2019 Sheet 34 of 68
8 7 6 5 4 3 2 1
5 4 3 2 1

20180409
Connector change to N58-37M0121-L06.

HDMI+USB (USB3.0)
20180426
layout swap.
L10 U15
APU_USB0- 1 4 APUUSB0- HDMI_SSTX1+ 1 NC 10 HDMI_SSTX1+ HDMI_USB1B
HDMI_SSTX1- 2 NC 9 HDMI_SSTX1- APUUSB1+ 31 20
5V@1A [7] APU_USB_SSTX0+
C158 C0.22u6.3X/4 HDMI_SSTX0+ APU_USB0+ 2 3 APUUSB0+ APUUSB1- 30 D1+
D1-
VBUS-1 USB30_HDMI
HDMI_SSTX0+ 4 7 HDMI_SSTX0+ 26
NC GND_DRAIN-1
C162 C0.22u6.3X/4 HDMI_SSTX0- HDMI_SSTX0- 5 NC 6
HDMI_SSTX0- HDMI_SSTX1+ 37
[7] APU_USB_SSTX0- HDMI_SSTX1- STAD_SSTX1+
4P2R-0R/4 36 23

u
STAD_SSTX1- GND-1
[7] APU_USB_SSRX0+
C182 C0.33u6.3X/4 APUUSB_SSRX0+ ESD-AOZ8829DI-03 UP

8
L9 APUUSB_SSRX1+ 34 X5
C187 C0.33u6.3X/4 APUUSB_SSRX0- APU_USB1- 1 4 APUUSB1-
D0G-06A030C-A68 APUUSB_SSRX1- 33 STAD_SSRX1+ SHELL-5 X6
[7] APU_USB_SSRX0- STAD_SSRX1- SHELL-6

r
D D
APU_USB1+ 2 3 APUUSB1+ APUUSB0+ 22 29
D0+ VBUS-2 USB30_HDMI
C163 C0.22u6.3X/4 HDMI_SSTX1+ APUUSB0- 21

.
[7] APU_USB_SSTX1+ D0-
U16 35
C172 C0.22u6.3X/4 HDMI_SSTX1- APUUSB_SSRX0+ 1 APUUSB_SSRX0+ HDMI_SSTX0+ GND_DRAIN-2
[7] APU_USB_SSTX1-
4P2R-0R/4 NC 10 28
STAD_SSTX0+
APUUSB_SSRX0- 2 NC 9 APUUSB_SSRX0- HDMI_SSTX0- 27 32
STAD_SSTX0- GND-2
[7] APU_USB_SSRX1+
C176 C0.33u6.3X/4 APUUSB_SSRX1+
APUUSB_SSRX1+ APUUSB_SSRX1+ APUUSB_SSRX0+
DOWN
4 7 25 X7

7
NC STAD_SSRX0+ SHELL-7
C178 C0.33u6.3X/4 APUUSB_SSRX1- APUUSB_SSRX1- 5 NC 6
APUUSB_SSRX1- APUUSB_SSRX0- 24 X8
[7] APU_USB_SSRX1- STAD_SSRX0- SHELL-8
ESD-AOZ8829DI-03 USB3.0X2_HDMI-RH-1

8
APU_USB0+
[7] APU_USB0+
APU_USB0-
D0G-06A030C-A68

-b x
[7] APU_USB0-
APU_USB1+
[7] APU_USB1+
[7] APU_USB1- APU_USB1-

APU_USB_OC D79 USB30_HDMI

5
APUUSB0+ 6 4 APUUSB1-
USB_XOR0 R98 X_0R/4 APU_USB_OC#

C174
APUUSB0- 1 3 APUUSB1+
3VSB

1
3VSB ESD-AOZ8906CI-HF

+
2
D0G-05A0529-A68 EC24

d
CD560u6.3SO

C0.1u16X7/4
R265 U20
10KR/4

. 5
VCC
C USB_XOR0 2 C
B
Y 4 APU_USB_OC#
APU_USB_OC# [6]

d
1
[6,23] CORETYPE1 A
GND

SN74LVC1G86DCKR_SC70-5-RH

3
VCC5
20190329
Change to CORETYPE1.

m
R160
10KR/4
USB30_HDMI
Q27

s
11-14
2N7002D
R153 15K/4 G2 D2
R164
10KR/4 D1
S2
G1

HDMI+USB (USB3.0)
S1

PS2+USB (USB2.0)
B B
20180830
PS2_VCC 1. 400 update, R18 stuff for PS2_PWR discharge.
R36
R47
R49
R57

5V@1A C19 R18


C0.1u16X7/4 1KR/4
4.7K/4
4.7K/4
4.7K/4
4.7K/4

PS2_USB1A PS2_VCC
[24] KBDAT R48 33R/4 KBD 10 12
R46 33R/4 MSD 11 10 VCC
[24] MSDAT 11
[24] KBCLK R56 33R/4 KBC 13
R35 33R/4 MSC 14 13 9 C13
[24] MSCLK 14 GND
MS C22u6.3X5/8
C43 C180P50N/4 MINIDIN_USBX2-RH-10
C44 C180P50N/4 N58-14M0241-H06
C37 C180P50N/4
C28 C180P50N/4

D11
5

MSC 6 4 KBC

MSD 1 3 KBD
A A
ESD-AOZ8906CI-HF
2

D0G-05A0529-A68
11-18 remove
avl:D0G-45B0510-I14
layout note:
C21 must close to TVS pin5
TVS must near KB_MS1 connector and route without branch
Varistor must close to TVS and route without branch
MICRO-START INT'L CO.,LTD.
Title
Rear PS2_USB2.0/HDMI_USB3.0
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 35 of 68
5 4 3 2 1
5 4 3 2 1

TYPE-A PI3EQX1004 Redriver 20180424


Layout swap
D80

5
LU1

EQA_6
1 4 PMUSB0- PMUSB5- 6 4 PMUSB0-
[16] PM_USB0-
2 3 PMUSB0+ PMUSB5+ 1 3 PMUSB0+
[16] PM_USB0+

u
4P2R-0R/4 ESD-AOZ8906CI-HF

2
3VSB_1004 LU2
D0G-05A0529-A68

43

42

41

40

39

r
D U72 1 4 PMUSB5- D
[16] PM_USB5-

NC-7

NC-6

NC-5
EQA
GND
2 3 PMUSB5+

.
[16] PM_USB5+
4P2R-0R/4
FGA_6 1 38
EN_AB_6 2 FGA NC-4 37
3 EN_AB NC-3 36

7
CU1 C0.22u6.3X/4 PM_USB_SSPTX0+_C 4 VDD3P3-1 VDD3P3-7 35 RA_TXP0_C CU4 C0.22u6.3X/4 RA_TXP0
[16] PM_USB_SSPTX0+ RXAP TXAP
CU2 C0.22u6.3X/4 PM_USB_SSPTX0-_C 5 34 RA_TXN0_C CU3 C0.22u6.3X/4 RA_TXN0 DU2
[16] PM_USB_SSPTX0- RXAN TXAN
6 33 ESD-AOZ8829DI-03
7 Test1# NC-2 32 RA_TXP1 1 RA_TXP1
VDD3P3-2 VDD3P3-6 NC 10
CU5 C0.22u6.3X/4 PM_USB_SSPRX0+_C 8 31 RA_RXP0_C CU6 C0.33u6.3X/4 RA_RXP0 RA_RXP0 RU1 200KR/4 RA_TXN1 2 NC 9 RA_TXN1

-b x
[16] PM_USB_SSPRX0+ TXBP RXBP
CU8 C0.22u6.3X/4 PM_USB_SSPRX0-_C 9 30 RA_RXN0_C CU7 C0.33u6.3X/4 RA_RXN0 RA_RXN0 RU2 200KR/4
[16] PM_USB_SSPRX0- FGC_6 TXBN RXBN EQB_6 RA_RXP1 RA_RXP1
10 29 4 7
EQC_6 11 FGC GND EQB 28 FGB_6 RA_RXN1 5
NC RA_RXN1
EQC FGB NC 6
CU9 C0.22u6.3X/4 PM_USB_SSPTX1-_C 12 27 RA_TXN1_C CU10 C0.22u6.3X/4 RA_TXN1
[16] PM_USB_SSPTX1- RXCN TXCN
CU11 C0.22u6.3X/4 PM_USB_SSPTX1+_C 13 26 RA_TXP1_C CU12 C0.22u6.3X/4 RA_TXP1
[16] PM_USB_SSPTX1+

8
14 RXCP TXCP 25
VDD3P3-3 VDD3P3-5 D0G-06A030C-A68
15 24
CU13 C0.22u6.3X/4 PM_USB_SSPRX1-_C 16 NC-1 Test2# 23 RA_RXN1_C CU14 C0.33u6.3X/4 RA_RXN1 RA_RXP1 RU3 200KR/4
[16] PM_USB_SSPRX1- TXDN RXDN
CU15 C0.22u6.3X/4 PM_USB_SSPRX1+_C 17 22 RA_RXP1_C CU16 C0.33u6.3X/4 RA_RXP1 RA_RXN1 RU4 200KR/4
[16] PM_USB_SSPRX1+ TXDP RXDP

VDD3P3-4
EN_CD
EQD

FGD
DU3

d
ESD-AOZ8829DI-03
PI3EQX1004B1HEX_TQFN42-RH RA_TXP0 1 NC 10 RA_TXP0

18

20

21
19
RA_TXN0 2 NC 9 RA_TXN0

.
USB31_TYPEA
RA_RXP0 4 7 RA_RXP0
RA_RXN0 NC RA_RXN0
C 5 NC 6 C

EN_CD_6

8
1
EQD_6

FGD_6

d
D0G-06A030C-A68

+
ECU1 CU17 CU18
CD560u6.3SO C0.1u16X7/4 C0.1u16X7/4

2
3VSB_1004 3VSB_1004
3VSB close to Type A Connector
LAN_USB1A

m
RU5 X_1KR/4 EQA_6 RU6 X_1KR/4 EQC_6
RU7 X_1KR/4 FGA_6 RU8 X_1KR/4 FGC_6 3VSB_1004 PMUSB0+ 12 10
D1+ VBUS-2 USB31_TYPEA
RU9 X_1KR/4 EQB_6 RU10 X_1KR/4 EQD_6 L46 PMUSB0- 11
RU11 X_1KR/4 FGB_6 RU12 X_1KR/4 FGD_6 D1- 16
120L2A-50-RH GND_D-2
RA_TXP1 18 13
SSTX1+ GND-6

s
RU13 0R/4 EQA_6 RU14 0R/4 EQC_6 RA_TXN1 17 33
VCC5 SSTX1- GND-7
RU15 X_1KR/4 FGA_6
EQB_6
RU16 X_1KR/4 FGC_6
EQD_6 RA_RXP1
UP GND-8
34
RU17 0R/4 RU18 0R/4 15 35
RU19 X_1KR/4 FGB_6 RU20 X_1KR/4 FGD_6 CU21 CU22 CU23 CU19 CU24 CU25 CU20 CU26 CU27 RA_RXN1 14 SSRX1+ GND-9 36
RU21 X_1KR/4 EN_AB_6 RU22 X_1KR/4 EN_CD_6 C0.1u16X7/4 SSRX1- GND-10
RU23 PMUSB5+ 3 1 USB31_TYPEA
C22u6.3X/6 C0.1u16X7/4 C0.1u16X7/4 C0.1u16X7/4 C0.1u16X7/4 10KR/4 PMUSB5- 2 D0+ VBUS-1
C0.1u16X7/4 C0.1u16X7/4 C0.1u16X7/4 D0- 7
RA_TXP0 9 GND_D-1 4
QU1 RA_TXN0 8 SSTX0+ GND-1 37
SSTX0- GND-2
G2 D2
PM_OC1# [16] RA_RXP0
DOWN GND-3 38
R2488 6 39
D1 RA_RXN0 5 SSRX0+ GND-4 40
EQ dB FG dB 15K/4 SSRX0- GND-5
S2
0 10.9 0 to GND 0 -3 0 to GND G1 RJ45_USBX2_LEDX2-RH-31
B B

R 6.7 68K to GND R -1.5 68K to GND 2N7002D

S1
RU24 10KR/4 20180409
USB31_TYPEA Change to N58-32F0721-F02.
F 8.9 NC F 0 NC
1 13.1 0 to VDD 1 2 0 to VDD

A A

MICRO-START INT'L CO.,LTD.


Title
Rear USB3.1 Type A / redrive
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 36 of 68
5 4 3 2 1
5 4 3 2 1

Front USB2.0(JUSB1)
5V@1A
VCC5

USB20_VCC1

u
L32
1 4 PMUSB2+ USB20_VCC1 R673
[16] PM_USB2+
10KR/4

r
EC40 +

C691
D [16] PM_USB2- 2 3 PMUSB2- D51 D
Q89

5
11-14

1
4P2R-0R/4 PMUSB1+ 6 4 PMUSB2+ JUSB1 2N7002D

.
1 VCC VCC 2 R674 15K/4 PM_OC7#V G2 D2
PMUSB1- 1 3 PMUSB2- PMUSB1- 3 D0- D1- 4 PMUSB2- PM_OC7# [16,34,37]

2
CD560u6.3SO

C0.1u16X7/4
PMUSB1+ 5 D0+ D1+ 6 PMUSB2+ D1
L31 ESD-AOZ8906CI-HF 7 GND GND 8 S2

2
1 4 PMUSB1+ 10 R671 PM_OC7#P G1
D0G-05A0529-A68

7
[16] PM_USB1+ USB20_VCC1
10KR/4
[16] PM_USB1- 2 3 PMUSB1-

S1
BH2X5_NP9-5
4P2R-0R/4 N31-2051BG1-H06

. d -b x
C C

s m d
Front USB2.0(JUSB2) VCC5

USB20_VCC2
5V@1A 20180417:
R664 300K->10KR.
R664
L34 10KR/4
USB20_VCC2

EC41 +

C724
[16] PM_USB12+ 1 4 PMUSB12+ 11-14
Q88

1
2 3 PMUSB12- 2N7002D
[16] PM_USB12-
JUSB2 R665 15K/4 PM_OC7#R G2 D2
PM_OC7# [16,34,37]

CD560u6.3SO
4P2R-0R/4

2
B

C0.1u16X7/4
D53 1 VCC VCC 2 D1 B
5

PMUSB12- 3 D0- D1- 4 PMUSB13- S2


PMUSB13+ 6 4 PMUSB12+ PMUSB12+ 5 D0+ D1+ 6 PMUSB13+ R666 PM_OC7_P# G1
USB20_VCC2
L33 7 GND GND 8 10KR/4
[16] PM_USB13+ 1 4 PMUSB13+ PMUSB13- 1 3 PMUSB12- 10

S1
[16] PM_USB13- 2 3 PMUSB13- ESD-AOZ8906CI-HF
2

D0G-05A0529-A68 BH2X5_NP9-5
4P2R-0R/4 N31-2051BG1-H06

A A

MICRO-START INT'L CO.,LTD.


Title
Front USB2.0
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 37 of 68
5 4 3 2 1
5 4 3 2 1

Front JUSB3 JUSB3 VCC5


PMUSB11+ 11 11-14
5V@1.8A D2+
U57 PMUSB11- 12
ESD-AOZ8829DI-03 D2- R667
C695 C0.22u6.3X/4 PM_SSTX0+ PM_SSTX0- 1 NC 10 PM_SSTX0- PM_SSTX1+ 14 10KR/4
[16] PM_USB_SSTX0+ TX2+
PM_SSTX0+ 2 NC 9 PM_SSTX0+ 11-14
C694 C0.22u6.3X/4 PM_SSTX0- PM_SSTX1- 15 Q87
[16] PM_USB_SSTX0- TX2- 2N7002D
PM_SSTX1- 4 7 PM_SSTX1-
PM_SSTX1+ NC PM_SSTX1+ PMUSB_SSRX1+ PM_OC2#R
5 NC 6 17 R668 15K/4 G2 D2

u
RX2+ PM_OC2# [16]
PMUSB_SSRX1- 18 D1

8
C693 C0.33u6.3X/4 PMUSB_SSRX0+ RX2- S2
[16] PM_USB_SSRX0+ D0G-06A030C-A68

r
D 19 R669 10KR/4 PM_OC2#V G1 D
USB30_VCC1 VBUS2 USB30_VCC1
C692 C0.33u6.3X/4 PMUSB_SSRX0-
[16] PM_USB_SSRX0-
16

.
S1
GND
L35 13
1 4 PMUSB10+ GND
[16] PM_USB10+
2 3 PMUSB10- PMUSB10+ 9

7
[16] PM_USB10- D1+
D81

5
4P2R-0R/4 PMUSB10- 8
PMUSB10- 6 4 PMUSB11- D1-
PM_SSTX0+ 6
L36 PMUSB10+ 1 3 PMUSB11+ TX1+

-b x
1 4 PMUSB11+ PM_SSTX0- 5 USB30_VCC1
[16] PM_USB11+ TX1-
ESD-AOZ8906CI-HF

2
2 3 PMUSB11- PMUSB_SSRX0+ 3
[16] PM_USB11- D0G-05A0529-A68 RX1+

EC42 +

C725
4P2R-0R/4 PMUSB_SSRX0- 2
RX1-

1
7
GND

CD100u16SO
USB30_VCC1 1

2
VBUS1

C0.1u16X7/4
C689 C0.22u6.3X/4 PM_SSTX1+ 4
[16] PM_USB_SSTX1+ GND
U56
C688 C0.22u6.3X/4 PM_SSTX1- PMUSB_SSRX0- 1 NC 10 PMUSB_SSRX0- 10
[16] PM_USB_SSTX1- NC
PMUSB_SSRX0+ 2 NC 9 PMUSB_SSRX0+

d
PMUSB_SSRX1- 4 7 PMUSB_SSRX1- 2X10_CONNECTOR

.
NC
[16] PM_USB_SSRX1+ C687 C0.33u6.3X/4 PMUSB_SSRX1+ PMUSB_SSRX1+ 5 NC 6
PMUSB_SSRX1+ BH2X10[20]-2PITCH_BLACK-RH-1

C [16] PM_USB_SSRX1- C686 C0.33u6.3X/4 PMUSB_SSRX1- ESD-AOZ8829DI-03 C

8
20180409
D0G-06A030C-A68 Connector change to N32-2101091-H06.

d
USB3.0
D0G-06A050C-A68 Main
D0G-05A0300-I14 AVL

USB2.0
D0G-0200529-A68 Main
D0G-0100619-I05 AVL

s m
B B

A A

MICRO-START INT'L CO.,LTD.


Title
Front USB3.0 180° Header
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 38 of 68
5 4 3 2 1
5 4 3 2 1

SATA Connector
20180427
SATA1、SATA2 connector change to 180 degrees.

u
SATA1 SATA2

r
D D
X1 X1

X1

X1
7 7

GND-1 GND-2 GND-3

GND-1 GND-2 GND-3


.
SATA_RX0+_C 1 C641 SATA_RX1+_C

RX+

RX+
[15] SATA_RX0+ C648 1 2 C0.01u16X/4 6 C0.01u16X/4 2 6
C643 1 2 C0.01u16X/4 SATA_RX0-_C 5 [15] SATA_RX1+ C0.01u16X/4 2 1 C639 SATA_RX1-_C 5

RX- TX-

RX- TX-
[15] SATA_RX0- [15] SATA_RX1-
4 4
C629 1 2 C0.01u16X/4 SATA_TX0-_C 3 C0.01u16X/4 2 1 C637 SATA_TX1-_C 3
[15] SATA_TX0- [15] SATA_TX1-
C626 1 2 C0.01u16X/4 SATA_TX0+_C 2 C0.01u16X/4 2 1 C635 SATA_TX1+_C 2

TX+

7
TX+
[15] SATA_TX0+ [15] SATA_TX1+
1 1
X2 X2

X2

X2
-b x
SATA7PM_BLACK-P-RH-20 SATA7PM_BLACK-P-RH-20

SATA3_4
1 8

d
C577 1 2 C0.01u16X/4 SATA_TX2+_C 2 GND GND 9 SATA_TX3+_C C579 1 2 C0.01u16X/4
[15] SATA_TX2+ S3HT+1 S3HT+2 SATA_TX3+ [15]
C578 1 2 C0.01u16X/4 SATA_TX2-_C 3 10 SATA_TX3-_C C580 1 2 C0.01u16X/4
[15] SATA_TX2- SATA_TX3- [15]

.
4 S3HT-1 S3HT-2 11
C589 1 2 C0.01u16X/4 SATA_RX2-_C 5 GND GND 12 SATA_RX3-_C C586 1 2 C0.01u16X/4
C [15] SATA_RX2- C595 1 2 C0.01u16X/4 SATA_RX2+_C 6 S3HR-1 S3HR-2 13 SATA_RX3+_C C588 1 2 C0.01u16X/4 SATA_RX3- [15] C
[15] SATA_RX2+ 7 S3HR+1 S3HR+2 14 SATA_RX3+ [15]
X1 GND GND X2
X1 X2

d
MEC1 MEC2
MEC1 MEC2
SATA14PM_BLACK-RH-2
N5N-14M0201-L06

s m
SATA5_6
1 8
C525 1 2 C0.01u16X/4 SATA_TX5+_C 2 GND GND 9 SATA_TX6+_C C532 1 2 C0.01u16X/4
[23] SATA_TX5+ S3HT+1 S3HT+2 SATA_TX6+ [23]
C527 1 2 C0.01u16X/4 SATA_TX5-_C 3 10 SATA_TX6-_C C536 1 2 C0.01u16X/4
[23] SATA_TX5- S3HT-1 S3HT-2 SATA_TX6- [23]
4 11
C544 1 2 C0.01u16X/4 SATA_RX5-_C 5 GND GND 12 SATA_RX6-_C C540 1 2 C0.01u16X/4
[23] SATA_RX5- S3HR-1 S3HR-2 SATA_RX6- [23]
C549 1 2 C0.01u16X/4 SATA_RX5+_C 6 13 SATA_RX6+_C C542 1 2 C0.01u16X/4
[23] SATA_RX5+ S3HR+1 S3HR+2 SATA_RX6+ [23]
7 14
X1 GND GND X2
MEC1 X1 X2 MEC2
MEC1 MEC2
SATA14PM_BLACK-RH-2
B N5N-14M0201-L06 B

A A

Schematic Cfg Project

MS-7B86/B450 GAMING PLUS V A MICRO-START INT'L CO.,LTD.


Title
MS-7B86/B450-A PRO SATA
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 39 of 68
5 4 3 2 1
5 4 3 2 1

DVI CONNECTOR
20180402
VGA_DVI1B Change to N58-43F0111-EB6.

UI5 VGA_DVI1B
DVI_DATA0_DN 1 NC 10 DVI_DATA0_DN
DVI_DATA0_DP 2 NC 9 DVI_DATA0_DP X3 G1
Shell-3 Shell-5 G2
For EMI DVI_DATA_CLK_DP
DVI_DATA_CLK_DN
4
5
NC
7 DVI_DATA_CLK_DP
DVI_DATA_CLK_DN
DVI_DATA2_DN
DVI_DATA2_DP
16
DATA2
Shell-6

NC 6 17
DATA2
18
DVI_DATA2_DN ESD-AOZ8829DI-03 19 SHIELD-1

u
3

8
20 DATA4
RI15 D0G-06A030C-A68 DVI_DDC_CLK_R 21 DATA4
X_243R1%/4 DVI_DDC_DATA_R 22 DDCCLK
DDCDATA

r
D DVI_DATA2_DP 23 D
CI9 C0.1u16X7/4 DVI_DATA0_DP DVI_DATA1_DN 24 NC
[5] DP1_TX0P_APU DATA1
CI10 C0.1u16X7/4 DVI_DATA0_DN DVI_DATA1_DP 25

.
[5] DP1_TX0N_APU DATA1
DVI_DATA1_DN UI6 26
DVI_DATA2_DP 1 DVI_DATA2_DP SHIELD-2
NC 10 27
DATA3
CI12 C0.1u16X7/4 DVI_DATA1_DP RI12 DVI_DATA2_DN 2 NC 9 DVI_DATA2_DN 28
[5] DP1_TX1P_APU DATA3
CI11 C0.1u16X7/4 DVI_DATA1_DN X_243R1%/4 29
[5] DP1_TX1N_APU DVI_VGA_5V VCC5
DVI_DATA1_DP DVI_DATA1_DP 4 7 DVI_DATA1_DP 30

7
DVI_DATA1_DN NC DVI_DATA1_DN DVI_HOT_DET GND5
5 NC 6 31
CI14 C0.1u16X7/4 DVI_DATA2_DP DVI_DATA0_DN 32 HPDET
[5] DP1_TX2P_APU DATA0
CI13 C0.1u16X7/4 DVI_DATA2_DN ESD-AOZ8829DI-03 DVI_DATA0_DP 33
[5] DP1_TX2N_APU

8
DVI_DATA0_DN 34 DATA0
D0G-06A030C-A68 35 SHIELD-3

-b x
CI8 C0.1u16X7/4 DVI_DATA_CLK_DP RI9 36 DATA5
[5] DP1_TX3P_APU DATA5
CI7 C0.1u16X7/4 DVI_DATA_CLK_DN X_243R1%/4 37
[5] DP1_TX3N_APU SHIELD-4
DVI_DATA0_DP DVI_DATA_CLK_DP 38
DVI_DATA_CLK_DN 39 CLK
CLK G3
X4 Shell-7 G4
DVI_DATA_CLK_DP Shell-4 Shell-8

RI6 VGA_DVI-RH-32
X_243R1%/4
DVI_DATA_CLK_DN

d
DVI_DATA0_DP RI8 499R1%/4
DVI_DATA0_DN RI10 499R1%/4 SP6 X_COPPER

.
DVI_DATA1_DP RI13 499R1%/4
DVI_DATA1_DN RI11 499R1%/4
C DVI_DATA2_DP RI16 499R1%/4 20180507 C
DVI_DATA2_DN RI14 499R1%/4 add SP6 for EMI.
DVI_DATA_CLK_DP RI7 499R1%/4

d
DVI_DATA_CLK_DN RI5 499R1%/4

For EMI
注意:耐壓5V零件
D
QI5 DVI_HOT_DET
VCC3 G

S N-2N7002

m
DVI_DDC_CLK_R
D82

5
DVI_DDC_CLK_R 6 4 DVI_DDC_DATA_R DVI_DDC_DATA_R

s
DVI_HOT_DET 1 3

ESD-AOZ8906CI-HF CI17 CI20

2
D0G-05A0529-A68 X_C10p50N/4 X_C10p50N/4
CI15
HPD X_C10p50N/4

DVI_VGA_5V VCC3 Ib= (3.3-0.7)V/10K=0.26mA

RI22 RI23
IC=(5-0.2)V/10K=0.48mA 10KR/4 10KR/4
B IC=(5-0.2)V/10K=0.48mA LEVEL SHIFT using I2C Repeater B
DVI_DET_GATE IC=(3.3-0.2)V/10K=0.31mA
VCC3 VCC3 DVI_VGA_5V
Ib= (5-0.7)V/10K=0.43mA QI8
2 6 DP1_DP_HPD [5]
10KR/4 1
DVI_HOT_DET RI24 DVI_HOT_DET_R 5 3
4

CI19 RI21 NN-CMKT3904 CI21 RI18 RI17 RI19 RI20


C0.01u16X/4 100KR/4 X_C0.01u16X/4 2.2KR/4 2.2KR/4 2.2KR/4 2.2KR/4

G
DVI_DDC_CLK_R
[5] DP1_AUXP

D
QI6
[5] DP1_AUXN N-2N7002

G
DVI_DDC_DATA_R

D
QI7
N-2N7002 CI18
X_C0.1u16X7/4
DVI_VGA_5V CI16
DI5 FSI5 X_C0.1u16X7/4
A C VGA_5V 1 2
VCC5
S-1N5817 F-SMD1210P110T
D08-0100800-P16 CI6
A A
CI5
C0.01u16X/4 C10u6.3X5/6

MICRO-START INT'L CO.,LTD.


Title
DVI
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 40 of 68
5 4 3 2 1
5 4 3 2 1

HDMI CONNECTOR AUX Level Shifter


HDMI_PWR_5V
For HDMI 1.4
RH20
by layout 2.2KR/4
HDMI_DATA0_DP2

u
QH5 HDMI_DDC_CLK2
2N7002D RH19
CH16 C0.1u16X7/4 HDMI_DATA0_DP2 RH21 499R1%/4 G2 D2 HDMI_DATA_CLK X_0R/4 VCC3 VCC3
[5] DP0_TX0P_APU VCC3

r
D CH13 C0.1u16X7/4 HDMI_DATA0_DN2 RH18 499R1%/4 HDMI_DATA0 HDMI_DATA0_DN2 CH15 D
[5] DP0_TX0N_APU
HDMI_DATA1 D1 X_C10p50N/4

G1

G2
HDMI_DATA1_DP2 HDMI_DATA1_DP2

D1
CH5 C0.1u16X7/4 RH5 499R1%/4 S2

.
[5] DP0_TX1P_APU
CH9 C0.1u16X7/4 HDMI_DATA1_DN2 RH11 499R1%/4 HDMI_DATA1 G1 RH15 4.7K/4
[5] DP0_TX1N_APU VCC3 VCC3
RH7
CH18 C0.1u16X7/4 HDMI_DATA2_DP2 RH24 499R1%/4 X_0R/4 S1
[5] DP0_TX2P_APU [5] DP0_AUXP

S1
CH17 C0.1u16X7/4 HDMI_DATA2_DN2 RH22 499R1%/4 HDMI_DATA2 HDMI_DATA1_DN2 QH7
[5] DP0_TX2N_APU
2N7002D

7
[5] DP0_CLKP_APU CH10 C0.1u16X7/4HDMI_DATA_CLK_DP2 RH12 499R1%/4 HDMI_DATA2_DP2
[5] DP0_CLKN_APU CH11 C0.1u16X7/4HDMI_DATA_CLK_DN2 RH16 499R1%/4 HDMI_DATA_CLK
VCC3 RH14 4.7K/4 RH17 2.2KR/4 HDMI_PWR_5V

D2
S2
RH23
by layout X_0R/4 HDMI_DDC_DATA2
[5] DP0_AUXN
HDMI_DATA2_DN2

-b x
QH8 CH12
2N7002D HDMI_DATA_CLK_DP2 X_C10p50N/4
G2 D2 HDMI_DATA2
VCC3
RH13
HDMI_DATA0 D1 X_0R/4
S2 HDMI_DATA_CLK_DN2
VCC3 G1

Connector

S1
20180409
Connector change to N58-37M0121-L06.

d
HDMI_USB1A

HPD Circuit Connector Power


X1

.
SHELL-1
HDMI_DATA2_DP2 1 TMDS Data2+
2 TMDS Data2 Shield
C HDMI_DATA2_DN2 3 C
TMDS Data2-
HDMI_DATA1_DP2 4 X2
TMDS Data1+ SHELL-2
5 TMDS Data1 Shield

d
IB=(VCC5-Vbe)/10k 20180611: HDMI_DATA1_DN2 6
1. P41 Q19 D03-3010K09-U47 phase out, change to D03-606BA09-N03 TMDS Data1-
(5-0.95)/10k=0.405mA HDMI_DATA0_DP2 7 TMDS Data0+
8 TMDS Data0 Shield
VCC5 IC=(VCC3-Vce)/4.7k VCC3 R88 10KR/4 HDMI_DATA0_DN2 9 MEC1
+12V HDMI_PWR_5V TMDS Data0- MEC1
(3.3-0.2)/4.7k=0.659mA HDMI_DATA_CLK_DP2 10
TMDS Clock+
11
HDMI_DATA_CLK_DN2 TMDS Clock Shield
FS5 12
TMDS Clock-

G
RH6 RH10 1 2 HDMI_PWR_5V 13
VCC5

D
CEC

m
10KR/4 4.7K/4 14
HDMI_DDC_CLK2 Utility
Q19 F-SMD1210P110T 15
HDMI_DDC_DATA2 SCL
QH6 N-SM2306NSAC-TRG_SOT23-3-HF
D08-0100800-P16 16
HDMI_PU SDA
2 6 DP0_HDMI_HPD [5] D03-2306N09-ST8 17 DDC/CEC Ground X3
SHELL-3
1 HDMI_PWR_5V 18 +5V Power
如果用DIODE SA測試電壓會不過

s
HDMI_HOT_DET2 RH9 10KR/45 3 HDMI_PU HDMI_HOT_DET2 19 Hot Plug Delect
4 CH7 X4
SHELL-4
X_C0.01u16X/4
NN-CMKT3904 USB3.0X2_HDMI-RH-1
CH6 RH8
C0.01u16X/4 100KR/4
IB=(VCC5-Vbe)/10k CH14 CH8
(5-0.95)/10k=0.405mA C0.1u16X7/4 C10u6.3X5/6

IC=(VCC5-Vce)/10k
(5-0.2)/10k=0.48mA

B B

For EMI

UH7 UH5
HDMI_DATA0_DN2 1 NC 10 HDMI_DATA0_DN2 HDMI_DATA1_DP2 1 NC 10 HDMI_DATA1_DP2
HDMI_DATA0_DP2 2 NC 9 HDMI_DATA0_DP2 HDMI_DATA1_DN2 2 NC 9 HDMI_DATA1_DN2

HDMI_DATA2_DN2 4 7 HDMI_DATA2_DN2 HDMI_DATA_CLK_DP2 4 7 HDMI_DATA_CLK_DP2


HDMI_DATA2_DP2 NC HDMI_DATA2_DP2 HDMI_DATA_CLK_DN2 NC HDMI_DATA_CLK_DN2
5 NC 6 5 NC 6
ESD-AOZ8829DI-03 ESD-AOZ8829DI-03
3

D0G-06A030C-A68 D0G-06A030C-A68
注意:耐壓5V零件
UH6
A A
HDMI_DDC_DATA2 1 NC 10 HDMI_DDC_DATA2
HDMI_DDC_CLK2 2 NC 9 HDMI_DDC_CLK2

HDMI_HOT_DET2 4 7 HDMI_HOT_DET2
NC
5 NC 6
ESD-AOZ8808DI
MICRO-START INT'L CO.,LTD.
3

D0G-06A050C-A68 Title
HDMI
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 41 of 68
5 4 3 2 1
5 4 3 2 1

Note:
If connect to eDP port,must confirm whether it
7B86-3.0 沒有D-Sub,此頁不上件(RV1除外)。
support hot plug detection HPD and re-auxtraining
UV1

DP2_TX0P_APUCV1 C0.1u16X7/4 DP_C_TXP0 18 7 RED

u
[5] DP2_TX0P_APU RX0P IORP
DP2_TX0N_APUCV2 C0.1u16X7/4 DP_C_TXN0 19
[5] DP2_TX0N_APU RX0N 6 GREEN
IOGP
Differential impedance = 100 ohm

r
D 5 BLUE 0ohm換COPPER D
DP2_TX1P_APUCV3 C0.1u16X7/4 DP_C_TXP1 20 IOBP IVDDO_1P8V IVDD_1P8V
[5] DP2_TX1P_APU RX1P
DP2_TX1N_APUCV4 C0.1u16X7/4 DP_C_TXN1 21 3 RV7 200R1%/4

.
[5] DP2_TX1N_APU RX1N RSET CP36 X_COPPER 104mA
RV7 close to PIN3
CV25 CV28
DP2_AUXP CV5 C0.1u16X7/4 DP_C_AUXP 15 2 HSYNC
[5] DP2_AUXP RXAUXP HSYNC
DP2_AUXN CV6 C0.1u16X7/4 DP_C_AUXN 14 1 VSYNC C4.7u10X/6 C0.1u16X7/4

7
[5] DP2_AUXN RXAUXN VSYNC
0ohm換COPPER Close to PIN9.16.30.31
DP2_DP_HPD 26 13 VGADDCCLK CP37 X_COPPER 5VDDCSCL
[5] DP2_DP_HPD HPD VGADDCCLK 12 VGADDCSDA CP38 X_COPPER 5VDDCSDA IVDDO_1P8V DAC_VDDC

-b x
RV1 VGADDCSDA LV8
4.7K/4 61mA
20180402
connect to CPU.
TPV3
TPV4
28
29 PCSCL
PCSDA
IT6516BFN_CX NC
27 TPV2
60L2.5A-32_0402-HF CV26
CV32
20180508 1.7V~1.8V C4.7u10X/6 C0.1u16X7/4
RV1 stuff, HW disable DP2 function. 25 IVDDO_1P8V
VGADDCCLK 10 IVDDO CV13 C10u6.3X5/6 L02-6008113-M26, AVL: L02-6008063-T19
ISPSCL
Close to PIN4
GPIO CONTROL VGADDCSDA 11 Close to PIN25
ISPSDA
9 IVDDO_1P8V AVCC_1P8V
IVDD-1 IVDD_1P8V
16 1.7V~1.8V LV9
[6] GP_6516 RV2 X_22R/4 24 IVDD-2 30 38mA
URDBG IVDD-3 31

d
IVDD-4 60L2.5A-32_0402-HF
RV3 CV35

.
100KR/4 VCC3 3.3V 23 17 1.7V~1.8V
IVDD33 AVCC AVCC_1P8V
close to PIN 23 C0.1u16X7/4
C
20171113 C
CV21 3.3V 22 Close to PIN17
ASPVCC AVCC_1P8V
C10u6.3X5/6 8
OVDD-1

d
VCC3 32
OVDD-2 4 1.7V~1.8V
VDDAC DAC_VDDC

GND
IT6516BFN-CX-0066(R)-RH

33
DVI_VGA_5V

m
RV23 RV24
2.2KR/4 2.2KR/4

s
5VDDCSCL
5VDDCSDA

remove 3.3V-to-5V level shifter (0301)

B B

DV3

5
5VDDC_SDA 6 4 5VDDC_SCL DV2

5
If have VSIS1.2 SPEC request , You can change bead to L02-2208012-M09 use ,It test PASS.
5V_VSYNC 1 3 5V_HSYNC VGA_BLUE 6 4

ESD-AOZ8906CI-HF VGA_GREEN 1 3 VGA_RED

2
20180427
RED LV1 220L300mA-300/4 VGA_RED VGA_DVI1A Change to N58-43F0111-EB6. D0G-05A0529-A68 ESD-AOZ8906CI-HF

2
RV8
D0G-05A0529-A68
CV7 CV8 VGA_DVI1A
X1

75R1%/4
3.3p50N/4 3.3p50N/4 VGA_DVI-RH-32
6 RV11、RV12 100 ohm change to 22 ohm (0301)
1 11
7
GREEN LV2 220L300mA-300/4 VGA_GREEN 2 12 5VDDC_SDA RV11 22R/4 5VDDCSDA
8
RV9 3 13 5V_HSYNC RV16 33R/4 HSYNC
75R1%/4 CV9 CV10 9
3.3p50N/4 3.3p50N/4 4 14 5V_VSYNC RV20 33R/4 VSYNC
10
5 15 5VDDC_SCL RV12 22R/4 5VDDCSCL
CV14 C10p50N/4

CV15 X_C10p50N/4

CV16 X_C10p50N/4

CV17 C10p50N/4

BLUE LV3 220L300mA-300/4 VGA_BLUE


X2

RV10
A A
75R1%/4 CV11 CV12
3.3p50N/4 3.3p50N/4 Vendor suggest 22ohm for better I2C quality

DVI_VGA_5V
DVI_VGA_5V
MICRO-START INT'L CO.,LTD.
Title
CV38 AM4 LPC/SPI/USB/CLK/STRAP
C0.1u16X7/4
EMI Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 42 of 68
5 4 3 2 1
5 4 3 2 1

5VDUAL For 3VSB、CPU 1.8V 、 VDDP

5VDIMM FOR DDR

u
ATX_5VSB

R407 510R/4 5VCC_5V 5VSB_5V R406 10R/4


VCC5 ATX_5VSB

r
D
ATX_5VSB D

S
R408 10KR/4 C419 C0.1u16X7/4
[24,33,43,57] ATX_PWR_OK
G Q61

.
ATX_5VSB P-P06P03LCGA

S
5VDUAL
I32-0750119-U33

D
1
2
R53 510R/4 5VDIMM_5V 5VDIMM_5VSB R51 10R/4 G Q10 U34
VCC5
P-P06P03LCGA 5 7 3VSB_VSBDRV C418 C0.018u16X/4

5VCC
5VSB
[6,24,33,34,43,51,54,55] SLP_S3# S3# 5VSB_DRV
R52 10KR/4 C46 C0.1u16X7/4 6

7
[24,33,43,57] ATX_PWR_OK [6,9,24,33,34,43,44,45] SLP_S5#

D
S5# C420
5VDIMM C0.1u16X7/4

5
GND
1
2
U9 R405 47KR/4 S5_MODE 4 8 3VSB_VCCDRV 4
ATX_5VSB MODE 5VCC_DRV
5 7 5VSBDRV1_DIMM C58 C0.018u16X/4 3

-b x
5VCC
5VSB
[6,24,33,34,43,51,54,55] SLP_S3# S3# 5VSB_DRV
6 uP7501 2
[6,9,24,33,34,43,44,45] SLP_S5#

3
S5# R409 C421 1
D
11-15 Q62 1KR/6 C0.022u25X/4 Q63
[6,24,54] DEEP_S5 G
GND C50 S N-2N7002
4 8 5VDRV1_DIMM C0.1u16X7/4 N-NTMFS4C024NT1G
[24] 5VDIMM_MODE# MODE 5VCC_DRV
uP7501 +12V VCC5
D03-4C02403-O05
3

5
R50 I32-0750119-U33 R64 C57 PIN4 MODE
47KR/4 1KR/6 C0.022u25X/4 4 H:SUPPORT S0/S3/S5
3 L:SUPPORT S0/S3
2
+12V 1
H:SUPPORT S0/S3/S5

d
L:SUPPORT S0/S3
Q12
N-NTMFS4C024NT1G ATX_5VSB

.
VCC_DDR需做能記錄前一次超壓設定於S5之下的控制 VCC5
使用SIO GPIO54控制5VDIMM於S5下有電,SIO留0 ohm D03-4C02403-O05
C C

R403

d
47KR/4

Q60
C416 C1u16X/6 G2 D2 5VCC_5V
For power 700W solution (only for uP7501+uP7506 for 3VSB solution)
The power supply VCC3 delay 12ms after VCC5 assert. D1
S2
The chip U7501 5VDRV1 work when the VCC5 ready R402 47KR/4 G1
(When VCC5 up to 4.2V and the 5VDRV1 delay 6ms assert), but VCC3

m
VCC3 not ready and let the 3VSB sequence fail. 2N7002D

S1
C417
C1u16X/6

3VSB cost down

s
3.3V@2.695A OCP=3.8A

1.05V@0.05A
VDDBT_RTC_G@4.5uA
FCH@0.07A
B
CPU@0.25A B
VDDIO_AUDIO@0.278A
PCIE*6 @2.25A

VCC3 D03-4C02403-O05
5VDUAL ATX_5VSB Q77
N-NTMFS4C024NT1G
Fix 5VDUAL trun on drop.
1
R549 10R/4 3VSB_CNTL C594 2
R570 3
49.9KR1%/4 C1u6.3X/4 3VSB_VCCDRV 4
2.695A
4

U46
5

R574 0R/4 1 FOR NIKO modify


VDD

POK 6
VOUT 3VSB
D45 X_S-LRB520S-40T1G 3VSB_EN 2
[6,45,52,55] APU_AM4R1 EN 3VSB
3 C606 R569
5VDUAL VIN
C220p50X4 30.9K/1%/4
R1
GND-1

GND-2

R571 C607 7 3VSB_FB 3VSB_VCCDRV


C2.2u6.3X/4 5 FB R572 620K/1%/4
100KR/4 NC
1 +
C601 GS7133SO-R_PSOP8-HF EC37 C592
R2
8

C10u6.3X5/6 VFB=0.8 R573 CD100u16SO C10u6.3X5/6


2

10.2K1%/4
A I31-7133S02-N03 A

AVL:I31-3730S02-N62 C71-1011761-N07
VFB=3.224V for S0->S3 3VSB voltage raise & ATX_5VSB drop.

Vout = Vref * (1 +(R1/R2)) MICRO-START INT'L CO.,LTD.


= 0.8 * (1 +(30.9K/10.2K)) Title
= 3.22V ACPI 5VDIMM/3VSB
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 43 of 68
5 4 3 2 1
5 4 3 2 1

4DIMM : VPP25 VPP_BST、VPP_BST_R >50 mils.

2.5V@2.24A OCP:4A 5VDIMM VPP_BST

C1519
0.22u16X4 VPP25 VPP25
L04-01074U0-T15

u
7
U78
L8

BST
1 6 VPP_PHASE 1 2 1.0u7A11mS
VIN SW

C274 C22u6.3X/6

C267 C22u6.3X/6

C272 C22u6.3X/6
r
D D
C274、C267、C282 R2566 887KR1%/4 C1520 220p50N4
C268 VPP_EN 11 R2567

.
Close U78 EN

C307 C22u6.3X/6

C302 C22u6.3X/6

C1523 C22u6.3X/6

C1524 C22u6.3X/6
C0.1u16X7/4 R2568 499R1%/4 1KR1%/4
VPP_VR_PG 5 OpenDrain 10 VPP25_FB C320
[45] VPP_VR_PG PG FB
VFB=0.6 X_C0.1u16X7/4
R4,R9,C4 stuff for stability

7
R2569 2 R445
PGND-1 3
4.7K/4 PGND-2 309R1%/4

AGND
R5 100K->4.7K for VPP_VCC 8
VCC PGND-3
4
RT8125E_EN 台階。

-b x
MP2329GG

9
C1526
C1u6.3X/4
ATX_5VSB 5VDIMM
I9C-2329G0C-M03 CP6 X_COPPER VPP25_FB_R [56]

MP2329G-Have DCM Vout = VFB * (1 +(R上/R下)) 一階Vfb:


R215 R254 =10uA(sinking)*1KR=10mV
47KR/4 2.2KR/4 = 0.6 * (1 +(1/0.309))
= 2.542V
Q30 ENABLE HIGH:1.6V
C233 2N7002D
VPP_ENR G2 D2 VPP_EN

d
VPP_PHASE R2570 X_1R1%/6 C1527 X_2700p50N4
C1u6.3X/4 D1

.
S2 reserve snubber
[6,9,24,33,34,43,45] SLP_S5# G1 R257
C 3.3KR1%/4 C277 C
C0.1u16X7/4
S1

d
VPP_ENC

01-16

D
R189 VPP_EN_VCC5 Q29 R217
5VDIMM
100KR/4
G

S N-2N7002 X_0R/4
20190411 Remove for layout

m
C228
R233 C1u6.3X/4
X_100KR/4

s
B B

DDR VTT Power 0.6V@1.2A OCP:2A


0.3*4=1.2A
To CPU Copper trace width > 250mils , Fill
VTT_DDR
island behind DIMM > 400mils .
VCC_DDR
C185 C0.22u6.3X/4
VCC5
CP8

VCC_DDR
VCC_DDR VTT_DDR
6
X_COPPER

U17
C10u6.3X5/6
C194 1 4
VCNTL

VIN VOUT VTT_DDR


VREF tracks VDDQ/2

C188
C10u6.3X5/6

C10u6.3X5/6
R169
C195
DDRVTT_CNTL 5 8 10KR1%/4 C196 C184 C180
EN1 NC C0.1u16X7/4 C0.1u16X7/4C0.1u16X7/4
R168 10KR1%/4
GND
PAD

C203 7 3 DDRVTT_VREF C181 C0.1u16X7/4


EN2 VREF
C0.1u16X7/4
NCT3103S_ESOP8-HF
9
2

A A
near pin6 I31-3103S02-N62

MICRO-START INT'L CO.,LTD.


Title
DDR VPP25/VTT
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 44 of 68
5 4 3 2 1
5 4 3 2 1

DDR4_1.2V@26.2A 5VDIMM

15.5A FOR CPU


9.5A FOR 4DIMM
R142 EN:VIH2.4V
X_2.2KR/4

1.2A FOR DDR VTT VPP_VR_PG

R143
Rocpset:5.9K

u
X_3.3KR1%/4
OCP=Rocset*10uA/Rdson(Low side*2) C122
X_C0.1u16X7/4
=5.9K*10uA/1.65mohm

r
D D
=35.75A

.
5VDIMM

7
R130
10R/8
Follow CRB 5VDIMM

-b x
20180410: DDR_VCC C97 C4.7u10X/6 OCP=35A
follow AM4-400 update EN:VIH1.6V
R134 10K->47KR, add
0.22uF. EN pin Maximum:6.5V
R134

5
47KR/4 U12
VPP_VR_PG 7 1 DDR_BOOT1 R121 0R/4 C92 C0.1u16X7/4 VCC_DDR

VCC
EN BOOT
8 3 DDR_PH1
[51,55] DDR_PWRGD PGOOD PHASE close to DIMM side
DDR_REFOUT 10 2 DDR_UG1 R138

C1513
REFOUT UGATE

LGATE/OCSET
4 DDR_LG1
R1 100R/4

C0.22u6.3X/4 R140 10KR1%/4


C115 9 6 DDR_FB DDR_VSENP

d
665R1%/4 R139 R144 0R/4

GND
REFIN FB VDDIO_MEM_S3_SENSE [6]
C1000p50X/4
FB:0.8V C116 X_C0.1u16X7/4

.
DDR_REFIN RT8125EGQW_WDFN10-HF

11
C
I32-8125E0C-R11 C
Vout = Vref * (1 + (R1/R2))
R145
= 0.8 * (1 + (10K/19.1K))
R2 19.1K1%/4
= 1.218V

d
C114
C1000p50X/4

m
[56] DDR_OV CP7 X_COPPER

預計一階10mV則Vfb調6.56mV:
10mV*(19.1KR/29.1KR)=6.56mV
REFIN(R140)=6.56mV/10uA=656R

s
Input Current=(26.2*1.2)/5/0.8=7.86A
L04-12A7811-T15
CHOKE8
D34 S-LRB520S-40T1G VPP_VR_PG
20190410 CH-1.2u15A2m-HF
[6,43,52,55] APU_AM4R1
5VDUAL_IN_DDR 1 2 5VDIMM

1 +
1
EC11

+
C68 C61 EC10 CD560u6.3SO C117

2
5
Q17 C1u16X/6 C10u6.3X5/6 CD560u6.3SO C0.1u16X7/4

2
5
ATX_5VSB Q16 DDR_UG1_R 4
B DDR_UG1 R81 0R/6 DDR_UG1_R 4 3 B
3 2
C71-56106R1-N07
2 1
C71-56106R1-N07
1
R2596
47KR/4 R83 N-NTMFS4C029NT1G L04-47B7981-T15
Q390 X_10KR/4 N-NTMFS4C029NT1G D03-4C02903-O05
2N7002D D03-4C02903-O05 CHOKE12
G2 D2 CH-0.47u42A0.81m-HF
VPP_VR_PG [44] DDR_PH1 1 2 VCC_DDR
D1
S2
5

5
[6,9,24,33,34,43,44] SLP_S5# G1 Q21 Q22 R112

1
DDR_LG1 4 DDR_LG1 4 2.2R/8

+
3 3 C112 C91 EC22 EC19 EC25
S1

power off sequence. 2 2 snubber X_C1u6.3X/4 C22u6.3X/6 CD560u6.3SO CD560u6.3SO CD560u6.3SO

2
1 1
R97 C82
8.2KR1%4 C3300p50X/4
N-NTMFS4C024NT1G N-NTMFS4C024NT1G
D03-4C02403-O05 D03-4C02403-O05 C71-56106R1-N07 C71-56106R1-N07
C71-56106R1-N07
20180607
R97 -> 8.2KR 實測OCP為35.3A. Rocpset=(Ivalley*Rlg_ds(on))/Iocset
=36.07*1.65m/10u C110 X_C1u6.3X/6
VCC_DDR
=5.95Kohm. C146 X_C1u6.3X/6
C154 X_C1u6.3X/6
Ivalley=39.3A-1/2[(5V-1.2V)/(0.47uF*300KHz)]*(1.2V/5V) C156 X_C1u6.3X/6
A A
=36.07A. C121 X_C0.1u16X7/4
Rds(on)=3.3m*0.5(two MOS) C124 X_C0.1u16X7/4
=1.65m ohm. C129 X_C0.1u16X7/4
C134 X_C0.1u16X7/4
C159 X_C0.1u16X7/4
C165 X_C0.1u16X7/4
MICRO-START INT'L CO.,LTD.
C173 X_C2.2u6.3X/4 Title
DDR Power-RT8125E
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 45 of 68
5 4 3 2 1
5 4 3 2 1

VCC5 12VIN CPU_1P8

VR135 VR90 VR138


2.2R/8 2.2R/8 2.2R/8
VR_EF

VC28C10u25X5/8
CPU_1P8 VR_VCC

VC24C1u6.3X/6
VR_PVCC

VR_VDDIO
VC20 VC25

u
VR61 1KR/4

VR57 1KR/4

VR53 1KR/4

VR67 X_2.2KR/4
C1u6.3X/6 C0.47u16X/6

r
32

55

21

19
D D
VU5
design check 113K1%/4

.
VDDIO
VCC

PVCC

V064
RT8894_EN VR36 X_R/4 VRMEN 42 5 VR_TONSET VR92 VR102 1R/1%/4
[55,56] RT8894_EN EN TONSET 12VIN
APU_SVC VC37 C0.1u16X7/4
[6] APU_SVC APU_SVD VRM_VRDY VR_TONSETA
VR47 X_R/4 VRDY 43 44 VR46 VR39 1R/1%/4 12VIN
[6] APU_SVD APU_SVT [55] VRM_VRDY PGOOD TONSETA 118KR1%/4 VC21 C0.1u16X7/4
[6] APU_SVT APU_PWROK APU_PWROK 22

7
[6] APU_PWROK PWROK 47 VCORE_BOOT1 [47]
BOOT1
VR60 X_220R/4

VR64 X_220R/4

VR65 X_220R/4
1.767V VR136 X_R/4 VR_HOT# 30 48 VCORE_UG1 [47]
[6,24] PROCHOT# OCP_L/VR_HOT UGATE1 49 VCORE_PH1 [47]
PHASE1 50
LGATE1 VCORE_LG1 [47]
APU_SVC 23 VC41 C0.1u16X7/4 Close to PWM

-b x
APU_SVD 24 SVC 8 ISEN1N VR105 680R1%/4
APU_SVT SVD ISEN1N VCORE_ISEN1P VCORE_ISEN1N [47]
25 9
SVT ISEN1P VCORE_ISEN1P [47]

[6,9,11,29,34,56] SCLK0 26
27 SCL 54
[6,9,11,29,34,56] SDATA0 SDA BOOT2 VCORE_BOOT2 [47]
53 VCORE_UG2 [47]
UTAGE2 52
PHASE2 VCORE_PH2 [47]
51 VCORE_LG2 [47]
VR99 0R/4 VCORE_SEN 14 LGATE2
VSEN VSEN VSEN
VR101 100R1%/4 VC29 C0.1u16X7/4 6 VCORE_ISEN2P
VCORE ISEN2P VCORE_ISEN2P [47]
2.94KR1%/4 7 ISEN2N VR104 680R1%/4
VCORE_COMP ISEN2N VCORE_ISEN2N [47]
VR85 0R/4 VR93 10KR1%/4 VR87 VR84 30KR1%/4 16 VC40 C0.1u16X7/4
[6] VDDCR_CPU_SENSE+ COMP
Close to PWM
VC38 C150p50N/4 VR98 0R/4 VR91 0R/4 3

d
VC32 C68p50N/4 VCORE_BOOT3 [47]
VC30 X_C3300p50X/4 VR89 X_0R/4 VCORE_FB 15 BOOT3 2
Diff pair FB UGATE3 VCORE_UG3 [47]
1 VCORE_PH3 [47]

.
VR86 0R/4 Close to IC PHASE3 56
[6] VDDCR_CPU_SENSE- LGATE3 VCORE_LG3 [47]
VR82 100R1%/4 RGND 17
C VR17 0R/4 VC27 X_C3300p50X/4 RGND 10 VCORE_ISEN3P C
[6] VDDCR_SOC_SENSE- ISEN3P VCORE_ISEN3P [47]
VR83 X_100R1%/4 11 ISEN3N VR108 680R1%/4
VCCP_NB_SEN ISEN3N VCORE_ISEN3N [47]
37 VC42 C0.1u16X7/4
VSENA VSENA

d
Diff pair VCCP_NB VR8 100R1%/4 VSENA VR13 0R/4 Close to PWM
10KR1%/4 VC11 C0.1u16X7/4 4 VCCP_PWMA4
PWM4 VCCP_PWMA4 [48]
VR12 0R/4 VR14 VR27 43.2KR1%/4 VCCP_NB_COMP 35 VC43 C0.1u16X7/4
[6] VDDCR_SOC_SENSE+ COMPA
VR18 1.82KR1%/4 12 ISEN4NA VR109 680R1%/4
ISEN4N VCCP_ISEN4PA VCCP_ISEN4NA [48]
VC8 C220p50X4 VR16 0R/4 VR30 0R/4 VC14 C68p50N/4 13
VCCP_NB_FB ISEN4P VCCP_ISEN4PA [48]
Note:VID Override Circuit VC15 X_C3300p50X/4 VR25 X_0R/4 36
FBA
Close to PWM
BOOT VOLTAGE 46 VCCP_NB_PWMA1
PWMA1 VCCP_NB_PWMA1 [49]

m
Pre_PWROK VCORE_TSEN 33 41 VCCP_NB_ISEN1PA
TSEN ISENA1P VCCP_NB_ISEN1PA [49]
Metal VID 40 ISEN1NA VR48 680R1%/4
SVC SVD VCCP_NB_TSENA 31 ISENA1N VC16 C0.1u16X7/4
VCCP_NB_ISEN1NA [49]
TSENA
0 0 1.1 Close to PWM

s
45 VCCP_NB_PWMA2
0 1 1.0 PWMA2 VCCP_NB_PWMA2 [49]
VR49 VR_IBIAS 34
1 0 0.9 100KR1%/4 IBIAS 38 VCCP_NB_ISEN2PA
1 1 0.8 ISENA2P 39 ISEN2NA VR42 680R1%/4
VCCP_NB_ISEN2PA [49]
ISENA2N VCCP_NB_ISEN2NA [49]
VC17 C0.1u16X7/4
Close to PWM Close to PWM
VR41 10KR/4 VRM_VRDY VCORE_IMON 18 28 VCORE_SET1 VR45 60.4KR1%/4 VCORE_SET1A VR38 2.1KR1%/4
VCC3 IMON SET1 VCC5
VR51 22.1KR1%/4 VCORE_SET1B VR55 133R1%/4
VCCP_NB_IMONA 20 29 VCORE_SET2 VR40 127K1%/4 VCORE_SET2A VR35 316R1%/4

GND
IMONA SET2 VCC5
VR137 X_1KR/4 VR_HOT# VR43 2KR1%/4 VCORE_SET2B VR44 191R1%/4
VR_VDDIO
RT8894AGQW_WQFN56-HF

57
I32-8894A0C-R11
SET1 control ICCMAX,OCP setting
B
VRHOT在125度pull low VRHOT在110度pull low SET2 control Internal compensation B

Close to PWM Close to PWM


Close to MOSFET Close to MOSFET VCORE IccMAX: 140A =>OCP=>200A (4 x 50A)
VCORE_TSEN VR37 VCCP_NB_TSENA VR29
VCC5 VCC5 LL=1.3m ohm
511R1%/4 357R1%4 VCC_NB IccMAX: 75A =>OCP=> 90A
LL 2.1m ohm
VRT7 VR50 VRT6 VR26
10KRT1%0402 8.45KR1%4 VC19 VC65 10KRT1%0402 787R1%4 VC13 VC64
X_C0.1u16X7/4 C0.1u16X7/4 X_C0.1u16X7/4 C0.1u16X7/4

CP15 VCORE_TSEN_R CP5 VCCP_NB_TSENA_R

X_COPPER X_COPPER

close to PWM close to PWM

VR_EF VR_EF

VCORE_NTCN VR74 0R/4 VCCP_NB_NTCN VR68 0R/4

close to phase1 CHOKE close to phase1 CHOKE


VR72 VR75
17.4KR1%/4 130R1%/4
A A
VRT8 VRT5
100KRT1%/4 100KRT1%/4

VR76 VR71
120R1%/4 32.4KR1%/4
VCORE_NTCP VR81 VR80 VR79 VR78 VCORE_IMON VCCP_NB_NTCP VR63
232R1%/4
VR70
34.8KR1%/4
VR69
9.31KR1%/4
VR73
200R1%/4
VCCP_NB_IMONA
MICRO-START INT'L CO.,LTD.
2.55KR1%/4 26.7K/1%/4 0R/4 750R1%/4 Title
CPU RT8894 4+2
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 46 of 68
5 4 3 2 1
5 4 3 2 1

12VIN

VCORE 105W TDC:95A EDC:140A


VC45 VC52
C1u16X/6 C10u25X5/8

5
VQ27 VQ24
VR122 0R/6 VCORE_UG1_R 4 VCORE_UG1_R 4

u
[46] VCORE_UG1
3 3
2 2
1 1

r
D VR59 VCORE_BT1 VR124 D
[46] VCORE_BOOT1
2.2R/8 10KR/4
N-NTMFS4C029NT1G N-NTMFS4C029NT1G CHOKE14 VCORE

.
VC23 D03-4C02903-O05 D03-4C02903-O05 CH-0.22u48A0.54m-HF
C0.1u16X/6
[46] VCORE_PH1 VCORE_PH1 1 2

CP29
7
CP30
VQ25 VQ28
[46] VCORE_LG1 VCORE_LG1 4 VCORE_LG1 4 VR123
3 3 2.2R/8
2 2
1 1

X_COPPER
-b x
X_COPPER
ISEN1+
N-NTMFS4C024NT1G N-NTMFS4C024NT1G VC51
D03-4C02403-O05 D03-4C02403-O05 C3300p50X/4
VCORE

VR113 VR106 2.26KR1%/4 VC34 C0.1u16X7/4


2.32KR1%/4

[46] VCORE_ISEN1P VR95 X_0R/4

[46] VCORE_ISEN1N EC28 1+ 2 CD560u6.3SO

d
EC13 1+ 2 CD560u6.3SO
Close to IC

.
EC16 1+ 2 CD560u6.3SO
12VIN
C EC18 1+ 2 CD560u6.3SO C

EC21 1+ 2 CD560u6.3SO

d
EC23 1+ 2 CD560u6.3SO
VC53 VC44
C1u16X/6 C10u25X5/8 EC26 1+ 2 CD560u6.3SO
5

5
VQ19 VQ20
VR118 0R/6 VCORE_UG2_R 4 VCORE_UG2_R 4
[46] VCORE_UG2
3 3
C71-56106R1-N07
2 2

m
1 1
VR77 VCORE_BT2 VR121
[46] VCORE_BOOT2
2.2R/8 10KR/4
N-NTMFS4C029NT1G N-NTMFS4C029NT1G CHOKE11 VCORE
VC26 D03-4C02903-O05 D03-4C02903-O05 CH-0.22u48A0.54m-HF

s
C0.1u16X/6
[46] VCORE_PH2 VCORE_PH2 1 2
5

CP27

CP26
VQ18 VQ21
[46] VCORE_LG2 VCORE_LG2 4 VCORE_LG2 4 VR119
3 3 2.2R/8
2 2
1 1

X_COPPER

X_COPPER
ISEN2+
N-NTMFS4C024NT1G N-NTMFS4C024NT1G VC47
D03-4C02403-O05 D03-4C02403-O05 C3300p50X/4

B VR112 VR103 2.26KR1%/4 VC33 C0.1u16X7/4 B


2.32KR1%/4

[46] VCORE_ISEN2P VR94 X_0R/4

[46] VCORE_ISEN2N
12VIN

Close to IC
5

VQ29 VQ31
[46] VCORE_UG3 VR125 0R/6 VCORE_UG3_R 4 4 VC50 VC49
3 3 C1u16X/6 C10u25X5/8
2 2
1 1
VR88 VCORE_BT3
[46] VCORE_BOOT3
2.2R/8 VR127
10KR/4 N-NTMFS4C029NT1G N-NTMFS4C029NT1G CHOKE17
VC31 D03-4C02903-O05 D03-4C02903-O05 CH-0.22u48A0.54m-HF
C0.1u16X/6
[46] VCORE_PH3 VCORE_PH3 1 2 VCORE
CP35

CP32
5

VQ30 VQ32 VR126


[46] VCORE_LG3 4 4 2.2R/8
3 3
2 2
X_COPPER

X_COPPER

1 1
A A
VC54
ISEN3+

C1000p50X/4
N-NTMFS4C024NT1G N-NTMFS4C024NT1G
D03-4C02403-O05 D03-4C02403-O05
VR114 VR107 2.26KR1%/4 VC35 C0.1u16X7/4
2.32KR1%/4
MICRO-START INT'L CO.,LTD.
[46] VCORE_ISEN3P VR96 X_0R/4 Title
CPU Phase1-3
[46] VCORE_ISEN3N
Size Document Number Rev
Custom MS-7B86 30
Close to IC
Date: Wednesday, April 17, 2019 Sheet 47 of 68
5 4 3 2 1
5 4 3 2 1

12VIN
12VIN

VR120

5
5.1R1%/6 VQ14 VQ16 C1517 VC56 VC55

u
VU6 VCCP_UG4 VR100 0R/6 VCCP_UG4R 4 4 C1u16X/6 C10u25X5/8
C0.1u16X7/4
3 3
VC48 C1u16X/6 4 8 VCCP_BOOT4 2 2
VCC BOOT

r
D 1 1 D
7 VCCP_UG4 VCCP_BOOT4 VR117 2.2R/8 VR116
1 UGATE 10KR/4

.
[46] VCCP_PWMA4 PWM VCCP_PH4
6 N-NTMFS4C029NT1G N-NTMFS4C029NT1G CHOKE9
3 PHASE VC46 CH-0.22u48A0.54m-HF
NC D03-4C02903-O05 D03-4C02903-O05
2 5 VCCP_LG4 C0.1u16X/6
9 GND LGATE VCCP_PH4 1 2
GND-PAD VCORE

7
CP23

CP18
RT9624F

5
I33-9624F0C-R11 VQ15 VQ17 VR111
VCCP_LG4 4 VCCP_LG4 4 2.2R/8
3 3
2 2

-b x
X_COPPER

X_COPPER
1 1

ISEN4A+
VC39
C1000p50X/4
N-NTMFS4C024NT1G N-NTMFS4C024NT1G
D03-4C02403-O05 D03-4C02403-O05
VR115 VR110 2.26KR1%/4 VC36 C0.1u16X7/4
2.32KR1%/4

[46] VCCP_ISEN4PA VR97 X_0R/4

[46] VCCP_ISEN4NA

d
Close to IC

.
C C

A s m d Title

Size
CPU Phase4
Document Number
MICRO-START INT'L CO.,LTD.

Rev
B

Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 48 of 68
5 4 3 2 1
5 4 3 2 1

VCCP_NB 105W TDC:50A EDC:75A

12VIN 12VIN

r u
VCCP_NB 105W TDC:50A EDC:75A
D VR132 D
5.1R1%/6
VU8

5
VQ6 VQ5 VC7 VC59

.
VCCP_NB_UG1 VR9 0R/6 VCCP_NB_UG1R 4 VCCP_NB_UG1R 4 C1u16X/6 C10u25X5/8
VC63 C1u16X/6 4 8 VCCP_NB_BOOT1 3 3
VCC BOOT 2 2
7 VCCP_NB_UG1 1 1
1 UGATE VCCP_NB_BOOT1 VR134 2.2R/8 VR6

7
[46] VCCP_NB_PWMA1 PWM VCCP_NB_PH1
6 10KR/4 L04-22B7601-T15
3 PHASE N-NTMFS4C029NT1G N-NTMFS4C029NT1G
2 NC 5 VCCP_NB_LG1 VC62 CHOKE7
GND LGATE D03-4C02903-O05 D03-4C02903-O05
9 C0.1u16X/6 CH-0.22u48A0.54m-HF
GND-PAD VCCP_NB_PH1 1 2

-b x
VCCP_NB
RT9624F

CP13

CP17
5

5
I33-9624F0C-R11 VQ11 VQ9 VR24
VCCP_NB_LG1 4 VCCP_NB_LG1 4 2.2R/8
3 3
2 2

X_COPPER

X_COPPER
1 1

ISEN1A+
VC9
C1000p50X/4
N-NTMFS4C024NT1G N-NTMFS4C024NT1G
D03-4C02403-O05 D03-4C02403-O05
VR21 VR20 2.26KR1%/4 VC18 C0.1u16X7/4

d
2.32KR1%/4

[46] VCCP_NB_ISEN1PA VR32 X_0R/4

.
[46] VCCP_NB_ISEN1NA
C C

Close to IC

d
VCCP_NB

C71-56106R1-N07

m
EC7 1+ 2 CD560u6.3SO

EC8 1+ 2 CD560u6.3SO
12VIN
12VIN EC6 1+ 2 CD560u6.3SO

s
EC43 1+ 2 CD560u6.3SO

VR5
5.1R1%/6
VU7

5
VQ7 VQ8
VCCP_NB_UG2 VR10 0R/6 VCCP_NB_UG2R 4 VCCP_NB_UG2R 4 VC5 VC60
VC6 C1u16X/6 4 8 VCCP_NB_BOOT2 3 3 C1u16X/6 C10u25X5/8
VCC BOOT 2 2
7 VCCP_NB_UG2 1 1
1 UGATE VCCP_NB_BOOT2 VR133 2.2R/8 VR7
[46] VCCP_NB_PWMA2 PWM VCCP_NB_PH2
6 10KR/4 L04-22B7601-T15
3 PHASE N-NTMFS4C029NT1G N-NTMFS4C029NT1G
2 NC 5 VCCP_NB_LG2 VC61 CHOKE6
GND LGATE D03-4C02903-O05 D03-4C02903-O05
9 C0.1u16X/6 CH-0.22u48A0.54m-HF
B GND-PAD VCCP_NB_PH2 1 2 B
VCCP_NB
RT9624F

CP12

CP16
5

5
I33-9624F0C-R11 VQ10 VQ12 VR19
VCCP_NB_LG2 4 VCCP_NB_LG2 4 2.2R/8
3 3
2 2

X_COPPER

X_COPPER
1 1

ISEN2A+
VC10
C1000p50X/4
N-NTMFS4C024NT1G N-NTMFS4C024NT1G
D03-4C02403-O05 D03-4C02403-O05
VR23 VR33 2.26KR1%/4 VC22 C0.1u16X7/4
2.32KR1%/4

[46] VCCP_NB_ISEN2PA VR22 X_0R/4

[46] VCCP_NB_ISEN2NA

Close to IC

A A

MICRO-START INT'L CO.,LTD.


Title
CPU NB
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 49 of 68
5 4 3 2 1
5 4 3 2 1

20190409
Not support BR CPU, Remove..

r u
D D

d -b x 7 .
.
C C

A s m d Title

Size
CPU NB_S5
Document Number
MICRO-START INT'L CO.,LTD.

Rev
B

Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 50 of 68
5 4 3 2 1
5 4 3 2 1

CPU 1.8V S5 @3.5A OCP=4A

1.8V S5@0.5A
1.8V S0@2A CPU_1P8_S5_BST、CPU_1P8_S5_BST_R >50 mils.

0.9A(VCCP_NB_S5)

u
VDDP S5@1A Imax=2.5A
CPU_1P8_S5_BST CPU_1P8_S5_BST_R
5VDUAL R2579 0R/6

r
D
5VDUAL D
5VDUAL C562 CPU_1P8_S5
L04-01074U0-T15

7
U80 0.22u16X4

.
5VDUAL
L12

BST
1 6 CPU_1P8_S5_PHASE 1 2 1.0u7A11mS
VIN SW
R2597 R2578 X_887KR1%/4 C573 220p50N4
C1533 C388 C386 X_47KR/4 CPU_1P8_S5_EN 11 R633

7
EN

C1528 C22u6.3X/6

C1529 C22u6.3X/6

C1530 C22u6.3X/6

C1531 C0.1u16X7/4
R2575 499R1%/4 1KR1%/4

C22u6.3X/6

C22u6.3X/6
C0.1u16X7/4
5 OpenDrain 10 CPU_1P8_S5_FB
[55] CPU_1P8_S5_PG PG FB
VFB=0.6V
R367、R369、C390 stuff for stability

-b x
R2576 2
100KR/4 PGND-1 3
PGND-2

AGND
CPU_1P8_S5_VCC 8 4 R2577
VCC PGND-3
VCC=3.65V Vout = VFB * (1 +(R上/R下))
C1533、C388、C386 Close U80. 487R1%/4
MP2329CGG = 0.6 * (1 +(1/0.487))

9
C1532 = 1.832V
C1u6.3X/4

3VSB
MP2329C-Force CCM CP9 X_COPPER CPU_1P8_S5_FB_R [56]

d
一階Vfb:
=10uA(sinking)*1KR=10mV

.
C R349 C
10KR/4

d
ENABLE HIGH:1.25V
CPU_1P8_S5_EN

CPU_1P8_S5_PHASER2580 X_1R1%/6 C1534 X_2700p50N4

R353 reserve snubber


X_3.3K/4 C378

m
C0.1u16X7/4

s
CPU 1.8V S0 CPU_1P8_S5

1.8V@2A OCP=6A C1514


C1515
C22u6.3X/6
C22u6.3X/6
1
2
U1
VIN1-1 VOUT1-1
13
14
CPU_1P8
VIN1-2 VOUT1-2
B 6 8 B
7 VIN2-1 VOUT2-1 9
VIN2-2 VOUT2-2
CPU_1P8_EN 3 12
5 ON1 CT1 10 20180425
ON2 CT2 module update.
VCC3 4 11
VBIAS GND 15 C342
Thermal Pad CPU_1P8
C4700p25/4
VCC3 C343 TPS22976DPUR_WSON14-HF
ATX_5VSB C0.1u16X7/4
20180425
module update.
R320 R321 Adijustable Rise Time
20180410 47KR/4 10KR/4 C265 C264
SR = 0.42*CT+66
X_C22u6.3X/6 C1u6.3X/4
Q37 SR is the slew rate in (μs/V)
2N7002D CT is constant value on CT pin (in pF)
C339 X_C0.33u6.3X/4 G2 D2 CPU_1P8_EN The units for the constant 66 is in (μs/V)
Q36 D1
2N7002D [52] CPU_VDDP_EN S2 C331
[6,24,33,34,43,54,55] SLP_S3# G2 D2 G1 C0.1u16X7/4
D1
S1

S2
G1
[45,55] DDR_PWRGD
S1

A A
DDR_PWRGD --> CPU_VDDP_EN
DDR_PWRGD --> CPU_1P8

MICRO-START INT'L CO.,LTD.


Title
CPU 1.8_S0/S5
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 51 of 68
5 4 3 2 1
5 4 3 2 1

CPU_VDDP_S0
Input Current= (8.5A*1.05V)/12V/0.8=0.93A

1.05V/0.9V@S0:8.5A OCP=14A

S0:8.5A +12V_VDDP
S5:1A

u
+12V CHOKE21

1 2
OCP=14A

r
D D

CH-0.47u5A21mS-HF C352 C375 C366 C357

.
C10u25X5/8 C10u25X5/8 C10u25X5/8
C0.1u16X7/4 1.05V,8.5A
VCC3 U27 CPU_VDDP

7
9 1 CPU_VDDP_BOOT R312 0R/6 CPU_VDDP_BOOT_R C330 C0.1u25X/4
L04-68B7350-T15
VIN BST CHOKE19
R337
CPU_VDDP_EN 5 2 CPU_VDDP_SW 1 2

-b x
10KR/4 EN SW
EN H 1.2V
CH-0.68u15A5mS-HF-1
CPU_VDDP_PG 7 10 CPU_VDDP_SENSE_R C282 C278 C280 C284 C279 C285
[55] CPU_VDDP_PG PG VOUT C0.1u16X7/4
C22u6.3X/6 C22u6.3X/6 C22u6.3X/6 C22u6.3X/6 C22u6.3X/6
20171215 R2510
VCCSA_PG disconnect C356 VDDP_VCC 13 11 CPU_VDDP_FB_R R325 10KR/4 CPU_VDDP_FB X_1R1%/6
MP8712_VCC, pull up VCC3. 3.5V output VCC FB
C0.1u16X7/4
20180426
12 C278、C280、C284、C279、C285 change to 0603.
SS
8 C1499
C335 C336 3 PGND X_C3300p50X/4
C0.022u25X/4 4 NC-1
C0.47u16X5/4 NC-2
6 14

d
NC-3 AGND
CPU_VDDP

.
MP8712

C I9C-8712G0C-M03 C

R317
+12V_VDDP

d
6.8R1%4

D33 CPU_VDDP_EN CPU_VDDP_SENSE_R R316 0R/4


[6,43,45,55] APU_AM4R1 CPU_VDDP_SENSE [6]
S-LRB520S-40T1G R332
100KR1%/4 CPU_VDDP_EN:
0:TYPE 2 R323
1:TYPE 3 R1 1KR1%/4

m
TYPE0_CPU_SEL: CP10 X_COPPER
1:TYPE 2 CPU_VDDP_EN [51] CPU_VDDP_FB
CPU_VDDP_OV [56] 一階Vfb:
0:TYPE 3
=10uA(sinking)*1KR=10mV

s
D
[6,7,55] TYPE0_CPU_SEL G Q46 R327 C348
S N-2N7002 39.2KR1%/4 C0.1u16X7/4
R329
R2 2KR1%/4
Type 2/3:
Vout = Vref * (1 +(R1/R2))
TYPE0_CPU_SEL TYPE1_CPU_SEL CPU_VDDP_EN = 0.6 * (1 +(1K/2K))
CPU TYPE = 0.9V

BR 0 1 0 1

B
NA 0 0 0 B

SR 2 1 1 0 CPU VDDP NOT SUPPORT TYPE2


RV/ZP 3 0 1 1

CPU_VDDP_S5 20190402 MP2143->GS7133


0.9V
S5:1A
5VDUAL
OCP=3.8A
CPU_1P8_S5 R2590 10R/4 VDDP_VSB_CNTL C1544 C1u6.3X/4
CPU_VDDP_S5 20190410 Remove
10

3VSB U83
VDD

7 1
C1545 8 VIN1 VOUT1 2
R2591 C10u6.3X5/6 9 VIN2 VOUT2 3 C1542
VIN3 VOUT3 C560p50X/4 R2588
10KR/4 R1 1.1K1%/4

VDDP_VSB_EN EN H 1.4V 6 4 VDDP_VSB_FB C1543


EN FB C22u6.3X/6
A A
5
GND

5VDUAL [55] VDDP_VSB_PG POK


C1546 R2589
C1u6.3X/4 GS7133TD-R
R2 8.06K1%/4
11

R357
47KR/4
MICRO-START INT'L CO.,LTD.
Vout = Vref * (1 +(R1/R2)) Title
VDDP_VSB_PG
= 0.8 * (1 +(1.1K/8.06K)) CPU Power VDDP
= 0.909V Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 52 of 68
5 4 3 2 1
5 4 3 2 1

Promontory-2.5V

u
2.5V@900mA OCP=3.8A

r
D D
1221

.
5VDUAL
VCC3
R431 10R/4 PM_2P5V_CNTL C473 C1u6.3X/4
ATX_5VSB

7
PM_2P5V
R430

4
R423 10KR/4 U40
47KR/4 Q67 PM_2P5V_POK 1

VDD
2N7002D POK 6

-b x
G2 D2 PM_2P5V_EN 2 VOUT
EN
PM_2P5V_C D1 3 C494 R439
VCC3 VIN
S2 C560p50X/4 10KR1%/4
G1 7 PM_2P5V_FB R1

GND

GND
[53,54] PM_1P05_PG FB
5 VFB=0.8
C465 NC

S1
C10u6.3X5/6 GS7133SO-R_PSOP8-HF C495

9
R437
R2 4.7KR1%/4
C22u6.3X5/8
I31-7133S02-N03

AVL: I31-3730S02-N62

. d
Vout = Vref * (1 +(R1/R2))
C C
= 0.8 * (1 +(10K/4.7K))
= 2.502V

A s m d [53,54]

[6,7,55,57]
PM_1P05_PG

SYSREST#
PM_2P5V_POK D39

D40

D41
S-LRB520S-40T1G

S-LRB520S-40T1G

X_S-LRB520S-40T1G

Add by CRB Rev. E


VCC3

R422
10KR/4

C470
C1u6.3X/4
PM_PWRGD [17,55]

Title

Size
Prom-GS7133/2.5V
Document Number
MICRO-START INT'L CO.,LTD.

Rev
B

Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 53 of 68
5 4 3 2 1
5 4 3 2 1

+12V CHOKE22 SY8288_VIN

FOR Promontory 1.05V_S0 OCP=8A


1 2

CH-0.47u5A21mS-HF
1.05V Input Current= (5.5A*1.05V)/12V/0.8=0.6A
S0:5.5A

u
S5:0.05A
SY8288_VIN Width:>20mil U35 L04-82B7190-T15 1.05V@5.5A

r
D D
1 SY8288_BOOT C451 C0.1u25X/4 CHOKE20 PM_1P05
SY8288_VIN 2 BS CH-0.82u12A5.7mS-HF

.
3 IN-1 6 PM_1P05_PHASE 1 2
C449 C448 C455 R419 4 IN-2 LX-1 19
300K1%/4 5 IN-3 LX-2 20
C10u25X5/8 C0.1u16X7/4 IN-4 LX-3 C423 C453 C447 C454 C450 C446 C426
C10u25X5/8 X_C3300p50X/4 C0.1u16X7/4 C22u6.3X5/8 C22u6.3X5/8 C22u6.3X5/8 C22u6.3X5/8 C22u6.3X5/8

7
PM_1P05_EN 11
EN 14 PM_1P05_FB R414 X_499R1%/4 PM_1P05_FB_R
FB
R420 PM_1P05_PG 9 0.6V

-b x
[53] PM_1P05_PG PG
39KR1%/4 C456
X_C0.1u16X7/4
VCC3 10
R411 0R/4 SY8288_OCP 13 NC-1 12
R416 10KR/4 PM_1P05_PG ILMT NC-2 16
NC-3

R412 0R/4 VCC3_BYP 15 17 SY8288_LDO C424 C2.2u6.3X/4 PM_1P05


VCC3

GND-2

GND-4
GND-1

GND-3
BYP VCC

C425
C1u6.3X/4 SY8288RAC_QFN20-HF
R1

7
8
18
21
ATX_5VSB R410

d
1KR1%/4

PM_1P05_FB

.
R424
47KR/4 Q65
C C464 2N7002D C
G2 D2 PM_1P05_EN R413 Vout = Vref * (1 + (R1/R2))
1.33K1%4 = 0.6 * (1 + (1K/1.33K))
R2

d
X_C1u6.3X/4 D1
S2 = 1.051V
[6,24,33,34,43,51,54,55] SLP_S3# G1
S1

SY8288_OCP OCP

m
0 8A
floating 12A

s
+12V
1 16A
R2560
47KR/4 Q386
C1516 2N7002D
G2 D2 PM_1P05_EN

X_C1u6.3X/4 D1
S2
[6,24,33,34,43,51,54,55] SLP_S3# G1
S1

B B

20180502:
when loss AC power, +12V dischange slow.

FOR Promontory 1.05V_S5 OCP=0.7A


3VSB 3VSB
AVL:I31-0111A29-U33
PM_1P05_S5
1.05V@0.05A
I31-8866509-A36

I31-7116S09-N03
0.05A FOR VSUS105
R499 C543 C1u6.3X/4
10KR/4 U44 GS7116S5
1 5
VDD VOUT
GND

ADJ

PM_1P05_S5_EN 3
EN C551
EN:VIH1.6V R1
C555 C4.7u10X/6
2

X_C0.1u16X7/4 R513
C550 1KR1%/4
A A
C1u6.3X/4
PM_1P05_S5_FB Vout = Vref * (1 +(R1/R2))
R2
= 0.8 * (1 +(1K/3.16K))
[6,24,43] DEEP_S5 G
D
Q72 R510 = 1.05V
S N-2N7002 3.16K1%/4
MICRO-START INT'L CO.,LTD.
Title
Prom- SY8288RAC / 1.05V
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 54 of 68
5 4 3 2 1
5 4 3 2 1

VRM_Enable circuit [6,24,33,34,43,51,54] SLP_S3# D75 S-LRB520S-40T1G

ATX_5VSB +12VIN

[6,43,45,52] APU_AM4R1 D32 S-LRB520S-40T1G


VCC3 VCC5 VR11

u
ATX_5VSB VR31 9.1KR1%/4
VQ13
47KR/4
2N7002D

r
D
+12VIN Ib=(3.3-0.95)/47k=0.05mA VR130 VR28 G2 D2 D
RT8894_EN [46,56]
VR128 IC=(3.3-0.2)/22k=0.14mA X_22KR/4 22KR/4
D1

.
47KR/4
VQ35 S2 VR15 VC12
VR139 RT8894_EN_R 2 6 RT8894_EN_C G1 3KR1%/4 C0.1u16X7/4
47KR/4 1
VQ37 VR129 1KR/4 5 3 RT8894_EN_R
CPU_1P8

S1
2N7002D 4 VR34

7
G2 D2 RT8894_EN 47KR/4 VC58 12*(3/12.1)=2.975V >1V
Ib=(3.3-0.2)/47k=0.066mA VC57 NN-CMKT3904 C2.2u6.3X/4
D1 IC=(1.8-0.95)/4.7k=0.18mA C0.1u16X7/4 Make sure +12VIN
S2 connector plug in
RT8894_EN_C G1

S1

-b x
TYPE0_CPU_SEL:
20180502: 1:TYPE 2
0:TYPE 3
when loss AC power, +12VIN dischange slow. D
[6,7,52] TYPE0_CPU_SEL G Q50
S N-2N7002

d
D
VQ34

.
[52] CPU_VDDP_PG G

S N-2N7002
Vgs<+/-8V
C C
20190410 remove TYPE1_CPU_SEL

d
CPU TYPE TYPE1_CPU_SEL TYPE0_CPU_SEL

BR 0 0 1

m
NA 0 0

CPU VDDP NOT SUPPORT TYPE2 SR 2 1 1

s
RV/ZP 3 1 0

ALL POWER GOOD MUX VCC3 VCC3

3VSB

3VSB
B R267 R264 B
4.7K/4 4.7K/4
C256 C0.1u16X7/4 R249
X_8.2K/4
5

D23 X_S-LRB520S-40T1G U19


[6,7,53,57] SYSREST# ALL_PWR_MUX+ 1 A
VCC

Y
4 ALL_PWR_PWRGD [6]
D24 X_S-LRB520S-40T1G ALL_PWR_MUX 2
C [45,51] DDR_PWRGD B

GND
3

D22 S-LRB520S-40T1G SN74LVC1G08DBVR_SOT23-5


D [24] CHIP_PWGD
R243
100KR/4 When you use external buffer
D21 S-LRB520S-40T1G
D [46] VRM_VRDY then you cannot let APU PWR_GOOD pin float
in any sleep state.
D20 S-LRB520S-40T1G If you're buffer use 3.3V_S0 and you need Pull-down 100K
C [17,53] PM_PWRGD
If you're buffer use 3.3V_S5 and you don't need PD.
To SPI POK_CTRL# use.
[7,34] ALL_PWR_MUX

S0 PG
S5 PG ATX_5VSB

A A
VR131
47KR/4
VQ36
2N7002D RSMRST# [6,24]
D
G2 D2 RSMRST#D Q71
[51] CPU_1P8_S5_PG G

S N-2N7002
NB_S5_PG D1
S2 NB_S5_PG MICRO-START INT'L CO.,LTD.
G1 Title
[52] VDDP_VSB_PG
VRM-EN/PWRGD
S1

Size Document Number Rev


Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 55 of 68
5 4 3 2 1
5 4 3 2 1

CPU POWER CONNECTOR 20190329:


Unstuff +12VIN OCP circuit(U8, U7, Q9, C36....)

MEC1
+12VIN 12VIN
CHOKE5

RT9553B CURRENT SENSE


CPU_PWR1 CH-0.22u48A0.54m-HF
1 5 1 2 For Vcore For NB
+12V
GND
2 6

u
+12V +12V +12V
GND

CP14

CP11
3 7 L04-22B7601-T15
GND

4 8 ATX_5VSB
RT9553 PIN5: When start OV/UV, RESET delay time can meet SPEC 15us.
GND

C732

1
r
PWRCONN8P_BLACK EC20 EC12 EC14 EC27

+
D X_C10u25X5/8 D
CD270u16SO CD270u16SO CD270u16SO C733
R65

X_COPPER

X_COPPER
N93-08M0221-H06 CD270u16SO

.
C10u25X5/8

2
EC5 U8 X_10KR/4
CD270u16SO Default:Hi ;Acitve:UP

12VIN_CS_P 12VIN_CS_N_R 10 9 RT9553_PROCHOT# R61 X_0R/4 RT9553_FLAG#


C71-27118C1-N07 C71-27118C1-N07 C71-27118C1-N07 CSN PROCHOT#

7
12VIN_CS_N 12VIN_CS_P_R 1 8 RT9553_RESET R63 X_0R/4
C71-27118C1-N07 C71-27118C1-N07 CSP RESET

R40 X_2.2R/4 RT9553_VCC 2


VCC5 VCC
C22 X_C0.1u16X7/4

-b x
R38 X_15K/4 RT9553_EN 2V 4
VCC5 EN
R37 X_10KR/4
11-22 C39 X_C0.1u16X7/4
R55 RT9553_TIMER 5 7 R62 X_100KR/4
TIMER OVSET SIO_3VA
X_374K1%/4 375k:15us R68 X_78.7K1%/4
+12VIN 125K:5us C48 X_C2200p50X/4
R26 X_56KR1%/4 RT9553_ILIM 3 6 R67 X_38.3K1%/4
SIO_3VA ILIM UVSET SIO_3VA
R28 X_42.2KR1%/4 R66 X_100KR/4
C17 X_C2200p50X/4 C47 X_C2200p50X/4
11 Disable UV & OV fuction
C15 R39 X_0R/4 EP(GND)
C0.1u16X7/4 [56] RT9553A_IMON X_RT9553BGQW
I34-9553B0C-R11

d
一階VILIM: OCP = 32A

.
Close Power Connector =10uA*((56KR*42.2KR)/(56KR+42.2KR))
=240.65mV
C C
OCP (Isense):
=240.65mV/(100*0.54mR)
=4.456A

d
11-15

m
Over Voltage Control IC
12VIN_CS_P R33 X_44.2R1%/6 R41 12VIN_CS_P_R
X_0R/4

C24 C36 R45

s
X_C0.1u16X7/4 X_C10u25X5/8 X_523R1%/4
UPI VOLTAGE CONSOLE
12VIN_CS_N R54 12VIN_CS_N_R
ADDRESS 0x2A 0X28 0x26 0x24 0x22 0x20 X_0R/4

RH (KOhm) OPEN 3.9 3 2.2 1.3 10 Rcsn C45


X_C0.1u16X7/4
RL (KOhm) 10 1.3 2.3 3 3.9 OPEN

20190329: BUS_SEL 0% 25% 40% 60% 75% 100%


Unstuff +12VIN OCP circuit(U8, U7, Q9, C36....)
B RT8894_EN [46,55] B
VCC5 VCC5
0x2A:RH=OPEN,RL=10K
ATX_5VSB G
D
Q11
S X_N-2N7002
C31 X_C0.1u16X7/4
R42
X_1KR/4 R19
U7 X_47KR/4
1 8 Q9
VCC OUT1 RT9553A_IMON [56] FAULT#_VRD
R43 X_10KR1%/4 2 G2 D2 R16 X_0R/4
ADD_SEL PWR_FAULT# [57]
SCLK0 5 7
SDATA0 4 SCL OUT2 RT9553_FLAG#_G D1
3 SDA 6 S2
GND OUT3 RT9553_FLAG# G1
X_NCT3933U_SOT23-8-HF
X_2N7002D

S1
0x26:RH=18K,RL=13K
0x28:RH=9.1K,RL=3K
D5 X_S-LRB520S-40T1G
5VDIMM 5VDIMM APU_THERMTRIP# [6]
5VDIMM 5VDIMM

C353 C0.1u16X7/4
C14 C0.1u16X7/4 R336
R20 18K/1%/4
9.1KR1%/4 U29
U6 R2564 1 8
A
DIMM_CA_VREF_A_R OV_ADD1 VCC OUT1 CPU_VDDP_OV [52] A
1 8 0R/4 DIMM_CA_VREF_A R335 13K1%/4 2
R25 3KR1%/4 2 VCC OUT1 R2565 5 ADD_SEL 7
ADD_SEL DIMM_CA_VREF_B_R [6,9,11,29,34,46] SCLK0 SCL OUT2 CPU_1P8_S5_FB_R [51]
SCLK0 5 7 0R/4 DIMM_CA_VREF_B 4
SDATA0 4 SCL OUT2 [6,9,11,29,34,46] SDATA0 3 SDA 6
SDA GND OUT3 DDR_OV [45]
3 6
GND OUT3 VPP25_FB_R [44] NCT3933U_SOT23-8-HF
NCT3933U_SOT23-8-HF I34-3933U09-N62 MICRO-START INT'L CO.,LTD.
Title
RT9553B CURRENT SENSE/OV Control
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 56 of 68
5 4 3 2 1
8 7 6 5 4 3 2 1

ATX POWER CONNECTOR


FRONT PANNEL VCC5 For EMI

PWR_LED SUS_LED
JPWR1 R740
ATX_5VSB ATX_PWR1 C720 C721

25
330R/4
JFP1 X_C0.1u16X7/4 X_C0.1u16X7/4
13 1

25

u
[34] 504_PSON# VCC3 3.3V 3.3V VCC3 PWR_LED
R341 X_0R/4 C271 X_C0.1u16X7/4 HDD+ 1 2
R2516 R288 14 2 C290 C0.1u16X7/4 HDD+ PLED
-12V -12V 3.3V IDE_LED 3
X_R/4 10KR/4 C289 C0.1u16X7/4 C727 X_C0.1u16X7/4 4 SUS_LED
Q41 HDD- SLED

r
D 15 3 D
N-2N7002 GND GND 5 6 R733 100R/4
RESET- PWSW+ PWRBTIN [24,34]
PS_ON# 16 4

.
[24] SIO_PSON# P_ON 5V VCC5

D
S
C245 C0.1u16X7/4 R734 33R/4 RESET+ 7 8
[6,7,53,55] SYSREST#

G
C291 C0.1u16X7/4 17 5 R735 X_R/4 RESET+ PWSW-
GND GND [24] WDT# PWSW+ [59]

1
VCC5 9
D25 18 6 C702 NC
X_C0.1u16X7/4 GND 5V C0.1u16X7/4

7
[56] PWR_FAULT#
19 7 R198 H2X5[10]M_BLACK-RH
GND GND
4.7K/4 N31-2051331-H06

2
R342 20 8 ATX_PWR_OK [24,33,43]
47KR/4 -5V POK C222 X_C0.1u16X7/4
21 9

-b x
VCC5 5V 5VSB ATX_5VSB
C250 X_C0.1u16X7/4 C210 X_C0.1u16X7/4
22 10 VCC3
5V +12V +12V VCC3
ATX_5VSB
23 11 C206 C0.1u16X7/4
5V +12V
24 12 R742
GND 3.3V VCC3
R738 5.1K1%/4
PWRCONN24P C177 X_C0.1u16X7/4 5.1K1%/4
N93-24M0191-H06 Q98
Q97 R745 M.2_1_DASR 2 6
SATA_LED [26] M.2_1_DAS
R737 2 6 5.1K1%/4 1
[6,15] SATA_LED# IDE_LED
5.1K1%/4 1 5 3
VCC5 ATX_5VSB VCC5 ATX_5VSB 5 3 IDE_LED 4

d
上1K是解決航嘉200W(huntkey)power 4
supply的問題,加1K是為了不讓ATX_5VSB空載而產生震盪 NN-CMKT3904

.
NN-CMKT3904 IDE_LEDC
1

R186 IDELED
+

C EC32 EC30 R250 1KR/4 C


X_1KR/4
2

CD560u6.3SO VCC5

d
CD100u16SO D50
1N4148W
A C JFP2
C71-1011761-N07 1
2
SPEAKER 3
4

TPM LED ( for NCT6797)


RN5 150R/8P4R

m
2 1 H1X4M_BLACK
4 3 C685 N31-1040131-H06
6 5 C0.1u16X7/4
8 7 BUZZER_R

C
s
R//R//R//R=37.5ohm
3VSB B SPKR_R 10KR/4 SPKR [6]
5VDIMM C684 R658
JTPM1 Ib=(VCC3_SB-Vbe)/(R535) X_C0.1u16X7/4 Q85

E
TPM_LPCCLK0 1 2 VCC3 (3.3-0.95)/1K=2.35mA N-SST3904_SOT23
[7] TPM_LPCCLK0 Ic=(5VDIMM-Vce)/R541
3 4 R2512 C679
[7,24] LPC_RST# LPC_AD0 (5-0.2)/330=14.5mA
5 6 100KR/4 X_C0.1u16X7/4
[7,24] LPC_AD0 LPC_AD1 LPC_SERIRQ [7,24]
7 8 VCC5 R730
[7,24] LPC_AD1 LPC_AD2 9 330R/6 BIb>Ic R677 X_1KR/4 3VSB
[7,24] LPC_AD2 LPC_AD3 11 12
[7,24] LPC_AD3 LPC_LFRAME# 13 14 Q92
[7,24] LPC_LFRAME# SUS_LED 6 2 SUSLED R690 4.7K/4
LED_VSB [24]
1
H2X7[10]M-2PITCH PWR_LED 3 5 PWRLED R679 4.7K/4
LED_VCC [24]
EMI N31-2071101-H06 4
B B

Voltage Mearsure Point


NN-CMKT3904 R675 1KR/4 3VSB
3VSB VCC3
TP close to SIO
R729 Cap close to TP
Ib=(VCC3_SB-Vbe)/R529 1
(3.3-0.95)/1K=2.35mA VTT_DDR TP_VTT_DDR
C534 C535 330R/6
Ic=(5VDIMM-Vce)/R530 1
C0.1u16X7/4 C0.1u16X7/4 (5-0.2)/330=14.5mA VPP25 TP_VPP25
1
VCORE TP_CPU_CORE
CPU_1P8_S5 1
5VDIMM BIb>Ic 1 TP_CPU_1P8_S5
VCCP_NB TP_CPU_NB
PM_1P05 1
1 TP_PM_1P05
CPU_VDDP TP_CPU_VDDP
PM_1P05_S5 1
1 TP_PM_1P05_S5
VCC_DDR TP_VCC_DDR
PM_2P5V 1
1 TP_PM_2P5V
CPU_1P8 TP_CPU_1P8
CPU_VDDP_S5 1
TP_CPU_VDDP_S5

CPU_V_1P5V 1
TP_CPU_V_1P5V
1
20190411 add 5VDIMM TP_5VDIMM
Put bottom side 5VDUAL 1
TP_5VDUAL
VCORE_1
VCORE
F_check
VCCP_NB_1
VCCP_NB
A F_check A

CPU_VDDP_1
CPU_VDDP
F_check
VCC_DDR_1
1.8A
VCC_DDR
F_check
MICRO-START INT'L CO.,LTD.
Title
CPU_1P8_1 ATX/Front Panel
CPU_1P8
F_check Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 57 of 68
8 7 6 5 4 3 2 1
5 4 3 2 1

VCC5 VCC5
VCC5 VCC5
EZ Debug LED R159
R151 1KR/4 R167
R147 1KR/4 1KR/4
紅:M:D0C-040P100-H91 1KR/4
VCC5
DEBUG_VGAR
DEBUG_DRAMR DEBUG_DEVICER
S:D0C-040S500-E07*4 VCC5
VGA
DEBUG_CPUR

DRAM DEVICE

A
CPU

A
u
R148

A
VCC3 47KR/4 DRAM_LED1 R155 VGA_LED1 VCC5

A
LED04-R-20mA2.4V_1608-HF VCC3 47KR/4 LED04-R-20mA2.4V_1608-HF

r
VCC3 CPU_LED1 DEBUGDRAM BOOT_LED1
D D0C-040P100-H91 DEBUGVGA
D0C-040P100-H91 LED04-R-20mA2.4V_1608-HF
D
LED04-R-20mA2.4V_1608-HF

C
D0C-040P100-H91 R152 Q25 R165 D0C-040P100-H91

C
.
4.7K/4 G2 D2 DEBUG_DRAM R154 Q26 47KR/4

C
R141 4.7K/4 G2 D2 DEBUG_VGA VCC3

C
4.7K/4 DEBUG_CPU D1 DEBUGDEVICE
S2 D1
G1 S2 Q28

7
D [6,58] GPIO98_DRAM
VQ23 G1 R166 G2 D2 DEBUG_DEVICE
[6] GPIO97_CPU G [6] GPIO99_VGA
S N-2N7002 2N7002D 4.7K/4

S1
R149 2N7002D D1

S1
X_100KR/4 S2
11-15 R158 G1

-b x
[6] GPIO100_DEVICE
X_100KR/4
2N7002D

S1
D
[6,58] GPIO98_DRAM G VQ26 R150 R163
N-2N7002 X_0R/4 GPIO X_100KR/4
S
LED GPIO97 GPIO98 GPIO99 GPIO100
亮 GPI PULL HIGH GPO PO LOW GPO PO LOW GPO PO LOW
LED亮燈時同時將 CPU LED關掉 GPO HIGH GPO HIGH GPO HIGH
滅 GPO LOW (default HIGH) (default HIGH) (default HIGH)

MKT Name LED x10

. d
C C

LED 擺置背面"GAMING PLUS"字樣下方。

d
LED1 LED4 LED7 LED10
MKT_R_LED MKT_R_LED MKT_R_LED MKT_R_LED
VCC5 VCC5 VCC5 VCC5
LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH

m
LED2 LED5 LED8

s
MKT_R_LED MKT_R_LED MKT_R_LED
VCC5 VCC5 VCC5
LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH

LED3 LED6 LED9


MKT_R_LED MKT_R_LED MKT_R_LED
VCC5 VCC5 VCC5
LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH LED04-[BR]-25mA2.35V_1711-RH

B B

R2550 330R/6 MKT_R_LED


R2551 330R/6
Vf=1.75~2.35V
If=25mA
(5V-1.75V)/(330/2)=0.0197A <If
0.0197A*0.0197A*165=0.064W <1/10W
SIO_FADING_BOT3

D
Q384
[24,60] SIO_MLED G

S N-SM2306NSAC-TRG_SOT23-3-HF

A A

MICRO-START INT'L CO.,LTD.


Title
ALL LED Control
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 58 of 68
5 4 3 2 1
5 4 3 2 1

Add for EMI (Moat)

C701 C0.1u16X7/4 VCCP_NB C80 X_C0.1u16X7/4


[57] PWSW+
C78 X_C0.1u16X7/4

u
VCORE C75 C0.1u16X7/4 VCC_DDR C105 C0.1u16X7/4

r
D C235 C0.1u16X7/4 C104 C0.1u16X7/4 D
C219 C0.1u16X7/4 C191 C0.1u16X7/4

.
VCC3 C422 C0.1u16X7/4
C30 C0.1u16X7/4

-b x 7
return path
VCORE C212 C0.1u16X7/4 VCCP_NB C90 C0.1u16X7/4
C216 C0.1u16X7/4 C86 C0.1u16X7/4
C254 C0.1u16X7/4 C89 C0.1u16X7/4
C218 C0.1u16X7/4 C93 C0.1u16X7/4
C240 C0.1u16X7/4
C77 X_C0.1u16X7/4
C227 C0.1u16X7/4

d
C213 C0.1u16X7/4
C229 C0.1u16X7/4

.
C209 C0.1u16X7/4
C214 C0.1u16X7/4
C C
C211 C0.1u16X7/4
C244 C0.1u16X7/4

d
C217 C0.1u16X7/4
C145 C0.1u16X7/4

C101 C2.2u6.3X/4
C102 C2.2u6.3X/4

s m
B B

A A

MICRO-START INT'L CO.,LTD.


Title
NCT7718W temp sensor /EMI CAP
Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 59 of 68
5 4 3 2 1
5 4 3 2 1

JRGB1 JRGB2
U66 U67
>60mil TPS25944L >60mil >60mil TPS25944L >60mil
+12V 9 4 +12V_LED1 +12V 9 4 +12V_LED2
10 IN1 OUT1 5 10 IN1 OUT1 5
11 IN2 OUT2 6 11 IN2 OUT2 6 C1458
C1455 12 IN3 OUT3 7 C1457 C1456 12 IN3 OUT3 7
C10u25X5/8 13 IN4 OUT4 8 C10u25X5/8 13 IN4 OUT4 8
C1u16X/6 C1u16X/6

u
IN5 OUT5 IN5 OUT5
R2411 0R/4 1 R2412 0R/4 1
DMODE 2 R2413 100KR/4 DMODE 2 R2414 100KR/4
PGOOD +12V_LED1 PGOOD +12V_LED2

r
D D
+12V R2415 383K/1%/4 14 3 R2416 475K/4 +12V_LED1 +12V R2417 383K/1%/4 14 3 R2418 475K/4 +12V_LED2
R2419 8.25K/1%/4 EN/ULVO PGTH R2420 44.2K/1%/4 R2421 8.25K/1%/4 EN/ULVO PGTH R2422 44.2K/1%/4

.
15 0A to 10 15 0A to 10
OVP OVP
18 20 R2423 100KR/4 +12V 18 20 R2424 100KR/4 +12V
19 dV/dT FLT# 17 19 dV/dT FLT# 17

7
GND

GND
PAD

PAD
IMON ILIM 20180403 IMON ILIM 20180403
R2425 C1461 Follow Module, R2423 change to 100K. R2426 C1462 Follow Module, R2424 change to 100K.
R2427 TPS25944L R2429 TPS25944L

16

21

16

21
Trip@3.6A Trip@3.6A
30.9K/1%/4 390p50N4 R2428 30.9K/1%/4 390p50N4 R2430
26.7K/1%/4 24.9K/1%/4 26.7K/1%/4 24.9K/1%/4

-b x
Color SIO_LED_R SIO_LED_G SIO_LED_B

RED 1 0 0

d
JRGB2
GREEN 0 1 0 +12V_LED2 1

.
JRGB1 2
BLUE 0 0 1 +12V_LED1 1
G_LED2
R_LED2 3
C 2 4 C
WHITE 1 1 1 G_LED1
R_LED1 3
B_LED2

B_LED1 4 H1X4M_BLACK-RH-6
SIO_3VA

d
H1X4M_BLACK-RH-6
R684 10KR/4 SIO_LED_R R685 X_100KR/4
I NI
R682 10KR/4 SIO_LED_G R681 X_100KR/4
I NI
R688 10KR/4 SIO_LED_B R687 X_100KR/4 G_LED2
I NI

G
m
S

D
Q353
D
PM SPEC Default WHITE Color Q391
[24,60] SIO_LED_G G

S N-SM2306NSAC-TRG_SOT23-3-HF
N-SM2306NSAC-TRG_SOT23-3-HF D03-2306N09-ST8

s
R_LED1 +12V_LED1
SIO_FADING_BOT2 R_LED2 +12V_LED2
1

20180403

1
Change control by SIO. G_LED1 D63 D
Q383
[24,58,60] SIO_MLED G
C1459 S N-SM2306NSAC-TRG_SOT23-3-HF D64 C1460
C0.1u16X7/4
Q352 ESD-AOZ8831DT-24-HF C0.1u16X7/4
2

D
ESD-AOZ8831DT-24-HF
[24,60] SIO_LED_G G

2
S
N-SM2306NSAC-TRG_SOT23-3-HF

SIO_FADING_BOT1
B G_LED1 B
R_LED2 G_LED2
D
Q382
[24,58,60] SIO_MLED G
1

S N-SM2306NSAC-TRG_SOT23-3-HF

1
D65 Q355
D
D66
[24,60] SIO_LED_R G

S
ESD-AOZ8831DT-24-HF N-SM2306NSAC-TRG_SOT23-3-HF
2

ESD-AOZ8831DT-24-HF

2
SIO_FADING_BOT2
R_LED1

B_LED2
Q354
D B_LED1
[24,60] SIO_LED_R G
B_LED2
S Q357
D
N-SM2306NSAC-TRG_SOT23-3-HF
[24,60] SIO_LED_B G
1

1
SIO_FADING_BOT1 D67 N-SM2306NSAC-TRG_SOT23-3-HF
D68
SIO_FADING_BOT2
B_LED1 ESD-AOZ8831DT-24-HF
2

ESD-AOZ8831DT-24-HF

2
Q356
D
[24,60] SIO_LED_B G

S 外接LED 燈條 (RGB )
N-SM2306NSAC-TRG_SOT23-3-HF
---- PCB 文字面 (JRGB2)
SIO_FADING_BOT1 ---- 手冊 註明 RGB 接頭支援標準 5050 RGB LED 燈條 (12V/G/R/B) , 燈條總輸出電流限制為3安培 (12 伏特) ,
A
長度限制為2公尺 A

MICRO-START INT'L CO.,LTD.


外接LED 燈條 (RGB ) Title
---- PCB 文字面 (JRGB1) JRGB1/2
---- 手冊 註明 RGB 接頭支援標準 5050 RGB LED 燈條 (12V/G/R/B) , 燈條總輸出電流限制為3安培 (12 伏特) , Size Document Number Rev
長度限制為2公尺 Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 60 of 68
5 4 3 2 1
5 4 3 2 1

BOARD SIDE LED *6


20180426
PM SPEC. cancel board side LED.

r u
D D

d -b x 7 .
.
C C

A s m d Title

Size
BOARD SIDE LED
Document Number
MICRO-START INT'L CO.,LTD.

Rev
B

Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 61 of 68
5 4 3 2 1
5 4 3 2 1

OPTION BOM PARTS

60 Level 5010 Level

u
A B C D E A B C D E

r
D D

.
PCIE X16
OPT_PCIE_X16_1 OPT_PCIE_X16_2
PCIE x16 PCIE x16
SLOT SLOT_PCIEXP164_18P SLOT_PCIEXP164_18P FCH
N11-1641821-L06 N11-1641811-L06

7
PCIE X8
OPT_PCIE_X8_1 OPT_PCIE_X8_2

M.2 SLOT
PCIE x16 PCIE x16 FOOTPRINT
SLOT SLOT_NGFFCARD67_31 可包容

-b x
SLOT_PCIEXP100_7P SLOT_PCIEXP100_7P SLOT_NGFFCARD67_2
N11-1000331-L06 N11-1000321-L06

REAL VGA+DVI
OPT_VGA_DVI_1 OPT_VGA_DVI_2
VGA+DVI 單層 DVI VGA+DVI 雙層 DVI+VGA
USB Type A DVI_CONN_24P_17P IOA_VGA_DVI_43P
FOOTPRINT
IOA_VGA_DVI_43P 可包容
DVI_CONN_24P_17P
N5B-24F0821-EB6 N58-43F0111-EB6

SOLID CAP
OPT_PCB_1 OPT_PCB_2

PCB
FOOTPRINT PCB PCB
270u16 C_P3_5_D8_H12 因為機構無法使用 請注意!

d
7B86-1.0 7B86-2.0
C_P3_5_D8_H9 可包容
C_P3_5_D8_H8 PD0-07B8630-G37 PK0-07B8640-G37

.
SOLID CAP
C C

0 Ohm
FOOTPRINT
560u6.3 C_P2_5_D6_3_H9_5 可包容
(0402)
C_P2_5_D6_3_H9

d
SOLID CAP
LED
FOOTPRINT OPT_RED_LED_5010_1 OPT_RED_LED_5010_2
470u6.3 C_P2_5_D6_3_H9_5 可包容
C_P2_5_D6_3_H9
RED LED
LEDS_19_21SYGC
RED LED
LEDS_19_21SYGC

m
D0C-040P100-H91 D0C-040T200-H91

SOLID CAP FOOTPRINT 5020 Level


100u16 C_P2_5_D6_3_H6 可包容

s
C_P2_5_D6_3_H5

A B C D E
MEM
OPT_MEM_RED1 OPT_MEM_BLK1 FOOTPRINT
MEM SLOT MEM SLOT DDRIV_D288_1_T 可包容
SLOT
DDRIV_D288
DDRIV_D288 DDRIV_D288 LED
N13-2880701-L06 N13-2880581-L06

MKTG
B Label 60 Level B

PCH
OPT_MOSPCH_1
MEM SLOT
OPT_MOSPCH_2
MEM SLOT A B C D E
SINK HS_81_42X68_48 HS_53_6X41_5
E31-0409760-K08 E31-0409790-K08 Audio cover
MOSN
OPT_MOSN_1 OPT_MOSN_2
MEM SLOT MEM SLOT

HS_88_04X22_18 HS_89_5X22_19
E31-0505810-K08 E31-0505820-K08 OPT_AUD_JACK_1 OPT_AUD_JACK_2

Audio Jack
Audio Jack Audio Jack

MOSW
OPT_MOSW_1 OPT_MOSW_2 AUDIO_JACK6_26P_U2 JACK_AUD_D26P
MEM SLOT MEM SLOT
N54-26F0361-L06 N54-26F0351-L06
HS_111_52X34_41 HS_108_69X31_7
E31-0505800-K08 E31-0505830-K08
M.2 SCREW
PS2_USB
OPT_PS2_USB_1 OPT_PS2_USB_2
PS2_USB PS2_USB

IOASM_USB_DIN14 IOASM_USB_DIN14
N58-14M0241-H06 N58-14M0221-H06
A
PCIE X4 A

HDMI_USB
OPT_HDMI_USB_1
HDMI_USB
OPT_HDMI_USB_2
HDMI_USB SLOT
IOASM_USB3_HDMI37 IOASM_USB3_HDMI37
N58-37M0121-L06 N58-37M0101-L06
MICRO-START INT'L CO.,LTD.
OPT_LAN_USB_1 OPT_LAN_USB_2 Title

LAN_USB
LAN_USB LAN_USB
BOM Option
IOASM_RJ45_USB_LED32 RJ45_USBX2_LEDX2-1000-RH Size Document Number Rev
N58-32F0721-F02 N58-32F0791-F02 Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 62 of 68
5 4 3 2 1
5 4 3 2 1

11-16

PCH SINK
RM: E95-0000022-C22/ E95-0000022-A91

1.0 HESTSINK CPU Socket Simulation

u
CPU3
X_JS3

r
D MEC1 MOS_N1 MEC1 MOS_PCH1 D
SIM1

.
X_PIN1*2

E95-0000022-C22
X_JS4

7
HS-0505810-RH HS-0409760-RH E95-0000022-C22 SIM2

MEC2

MEC2
E31-0505810-K08 E31-0409760-K08
X_PIN1*2

-b x
MEC1 MOS_W1

AUDIO COVER
HS-0505800-RH
MEC2

E31-0505800-K08

. d
C C

d
MANUAL PART BIOS LABEL ROYALTY

m
UEFI1
Label
HDMI_LA1 Optics Orientation Holes

s
UEFI BIOS FM7 FM11

9
1

9
1

9
1
G51-M1SPXXA-A09 Y01-RHDMI03-000 MH8 MH10 MH12
BAT1_X1 G51-M1SPXXA-A09 Y01-RHDMI03-000 7 2 7 2 7 2
BAT-CR2032-RH X_FM120 X_FM120
6 3 6 3 6 3
AVL: GAMING Only
D06-0100161-F52
D06-0100101-K26

MKTG name Label


X_MH001 X_MH001 X_MH001 FM6 FM9

4
X_FM120 X_FM120

9
1

9
1
1.0 havn't MKT name label, use MKT LED. NAHIMIC
B MH9 MH11 B

GAMING Only 7 2 7 2

9
1
PCB1 FM8 FM12
MH5 6 3 6 3
MKTG1
Y02-MU00100-NAH 7 2
Y02-MU00100-NAH
Label 6 3 X_MH001 X_MH001 X_FM120 X_FM120

4
MKTG NAME
G51-M1SPN15-Q13
X_MH001

4
FM10 FM5

9
1

9
1
MH7 MH6
7B86-1.0 & 2.0 7 2 7 2
HOLES_4S_NOINT X_FM120 X_FM120
6 3 6 3

X_MH001 X_MH001

4
A A

Schematic Cfg Project


MICRO-START INT'L CO.,LTD.
MS-7B86/B450 GAMING PLUS V A Title
Manual Parts
MS-7B86/B450-A PRO Size Document Number Rev
Custom MS-7B86 30
Date: Wednesday, April 17, 2019 Sheet 63 of 68
5 4 3 2 1

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