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chapter 5: Combinational Logic Circuit

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 chapter 5: Combinational Logic Circuit

Combinational Logic Circuit

Objective
 To learn how to design a combinational circuit
and reduce the circuit size to increase the speed
and reduce the power usage.
 To get familiar about implementing a Boolean
function using a combinational circuit.
5.1 Theory
Digital circuits for digital systems may be
combinational or sequential. The sequential circuit will
discuss in next chapters. Combinational circuits consist
of a logic gates whose output at any time are
determined directly from the present combination of
inputs without regard to previous inputs. There is not
requiring memory element. Sequential circuits, on the
other hand, are circuits in which their outputs are
dependent on not only the current inputs but also on
past inputs. Because of their dependency on past
inputs, sequential circuits must contain memory
elements in order to remember the past input values. A
digital circuit may contain both combinational circuits

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 chapter 5: Combinational Logic Circuit

and sequential circuits. In this chapter, we will look at

the design of combinational circuits, while the design
of sequential circuits will discuss next chapter.

Fig (5-1): The parts of a microprocessor that fit together

Different combinational components and sequential
components are connected together to form either the
data path or the control unit of the microprocessor.

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 chapter 5: Combinational Logic Circuit

Finally, combining the data path and the control unit

together will produce the circuit for a microprocessor,
which can be either a dedicated microprocessor or a
general microprocessor, as shown in fig (5-1).
A combinational circuit consists of input variables,
logic gates, and output variables.

5.2 Design Procedure

The procedure of designing a combinational logic
circuit involves the following steps:
1. The problem is stated.
2. The number of available variables and required
output variables is determined.
3. The input variables and output variables are
assigned letter symbols.
4. The truth table that defines the required relationships
between inputs and outputs is derived.
5. The simplified Boolean function for each output is
obtained.
6. The logic diagram is drawn.

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 chapter 5: Combinational Logic Circuit

Adder
Object:
To construct and test combinational logic circuits

those perform the additions. It includes quarter adder,

half adder and full adder circuits.

5.3 Theory

It is a combinational circuit that performs arithmetic

addition according to the binary addition rules. There
are two types of adder: half adder and full adder.

5-3-1 Quarter Adder

A quarter adder is a circuit that can add two binary

digits but will not produce a carry, there is only one
output. The truth table and the function are produced
in the following results:

Input Output
A B Sum
0 0 0
0 1 1
1 0 1
1 1 0
No carry

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 chapter 5: Combinational Logic Circuit

From the truth table, the function of its output is

The sum = A B + A B = A  B

The circuit of the quarter adder is

We notice that the output produced, sum, is the same

as the output for the Truth Table of an X-OR.
Therefore, an X-OR gate can be used as a quarter
adder.

5.3.2 Half Adder

It is a combination circuit that performs the arithmetic
addition of two bits. This circuit needs two binary
inputs and two binary outputs.
The input variables consist of the two binary bits to be
added; and the output consists of the sum of these two
bits and a carry bit. When adding two binary numbers
whose sum is greater than one bit in length, a carry
must be generated (a one added to one results in sum
of zero and a carry of one).

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 chapter 5: Combinational Logic Circuit

The truth table that identifies exactly the function of

half adder is shown in table (5-1):
Table (5-1): Half adder truth table

Input Output
X Y C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

The simplified Boolean function for the two outputs

can be obtained from truth table. The simplification of
the outputs of half adder are:
S = X .Y + X .Y =Xy
C = X.Y
The half adder circuit is shown in fig (5-2).

Fig (5-2): half adder circuit

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 chapter 5: Combinational Logic Circuit

The drawback of the half adder circuit is that in case

of a multiple addition, it cannot include a carry.
5.3.3 Full Adder
In computer operation, the half adder is not sufficient
for adding more than two (one – bit) numbers .When
adding two binary numbers whose sum is greater than
one bit in length, carry must be generated (1+1=1 0,
where 0= sum, 1= a carry), when adding the next digit
the possibility of a carry from the previous addition
must be taken in a consideration. A full adder is a
combinational circuit that performs the arithmetic sum
of three input bits. It consists of three inputs and two
outputs. Two of the inputs variables, denoted by A and
b, represent the two bits to be added. The third input,
denoted by C, represents the carry from the previous
lower position. The two outputs are the sum and
carry.
Table (5-2) shows all possible combination for
producing the sum and carry output, in the truth table
form.

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 chapter 5: Combinational Logic Circuit

Table (5-2): Full adder truth table

Input Output
A B C Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

The implementation of full adder can be done by using

the following Boolean functions.
Sum = ABC+ABC+ABC+ABC
= A(BC+BC)+ A(BC+AB)
= A (B  C) + A(B  C)
= A  B  C.
Carry = ABC + ABC + ABC + ABC
= C (AB +AB) + AB(C+C)
= C (A⊕B) + AB(1)
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 chapter 5: Combinational Logic Circuit

= C (A  B) + AB
Full binary adder can combined from two half adder
taking the OR of their carry with the sum of the second
being as the output. The circuit of full adder is shown
in Fig (5-3).

Fig (5-3): Full adder circuit

Example: Implement the full adder circuit in Fig (5-4)
to other design using only eleven 2-input NAND
gates?

Fig (5-4)
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 chapter 5: Combinational Logic Circuit

The implementation is done by replace each gate with

its equivalent NAND gates.
Solution:

5.3.4 Binary parallel adder

A binary parallel adder is a digital circuit that
generates the arithmetic sum of two binary numbers in
parallel. It consists of full adders connected in cascade,
with the output carry from one full adder connected to

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 chapter 5: Combinational Logic Circuit

the input carry of the next full adder. Fig (5-5) show
the 4- bit binary parallel adder.

Fig (5-5): 4-bit full adder

Experiment No. (9)

Procedure:
1. Design a half adder circuit by using basic logic gates
and find truth table?
2. Connect the circuit of the half adder in fig (5-2) and
compare the results with the results in step1?
3. Implement half adder using NAND gates only and
find truth table?
4. Design a full adder circuit using basic gates, and find
its truth table?

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 chapter 5: Combinational Logic Circuit

5. Implement the full adder using NOR gates only and

find truth table?
Discussion:
1. Is a half adder considered to a possibility of a carry
from the previous addition?
2. Implement the half adder without using NOR gate
only, show the logic circuit. And compare it with the
one you have used?
3. Implement the half adder by using NOR gate only,
show the logic circuit. And compare it with the one
you have used?
4. Design full adder using two half adder and OR gate?

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 chapter 5: Combinational Logic Circuit

Subtractor
Object:
To learn how one can construct the subtractor circuit;
half or full subtractor.
5.4 Theory
The Subtractor is a combinational logic circuit that
performs the arithmetic subtraction operation of
number. There are two types of Subtractor: half
subtractor and full subtractor.
5.4.1 Half Subtractor
A half subtractor is a combinational circuit that
subtracts two bits and produces their difference. It has
two outputs. One output generates the difference and
will be designated by the symbol D. The second
designate B for borrowed. The truth table for the half
subtractor is shown in table (5-3).
The Boolean functions for the two outputs of the half
subtractor are:
D=XY+XY
B=XY

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 chapter 5: Combinational Logic Circuit

Table (5-3): Half subtractor truth table

Input Output
X Y B D
0 0 0 0
0 1 1 1
1 0 0 1
1 1 0 0

The logic circuit of half subtractor is shown in fig (5-

6).

Fig (5-6): Half subtractor circuit

5.4.2 Full Subtractor

A full subtractor is a combinational circuit that
performs a subtraction between two bits, taking in
account that a 1 may have been borrowed by a lower

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 chapter 5: Combinational Logic Circuit

significant stage. This circuit has three inputs and two

out puts.
The two outputs, D and B, represent the difference and
borrow, respectively. The truth table for the full
subtractor is shown in table (5-4).
Table (5-4): Full subtractor truth table
Input Output
X Y Z D B
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

The simplified Boolean functions for the two outputs

of the full subtractor are:
:
B= X.Y.Z + X.Y.Z + X.Y.Z + X.Y.Z

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 chapter 5: Combinational Logic Circuit

B= X.(Y.Z + Y.Z) + Y.Z.(X+X)

B = X.(Y

B = X (Y  Z) + Y. Z
D = XYZ+ XYZ + XYZ + XYZ
D = X(YZ+YZ)+ X(YZ+YZ)
D = X (X⊕Y) + X(Y⊙Z)
= X (Y  Z) + X(Y  Z)
D=XYZ
The logic circuit of full subtractor is shown in fig (5-
7).
We note that the logic function for output D in the half
and full subtractors is exactly the same as output S in
the half and full adders respectively. While the
difference between the borrow B of the half and full
subtractors and the Carry of the half and full adders is
the complement of the first input variable X.

Experiment No. (10)

Procedure:

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 chapter 5: Combinational Logic Circuit

1. Connect the circuit that performs the function of

half subtractor?
2. Implement the half subtractor using NAND gates
only?
3. Connect the circuit that performs the function of full
subtractor?

Fig (5-7): Full subtractor circuit.

Discussion:
1. Can you modify the full adder circuit to perform the
function of full subtractor? How?

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 chapter 5: Combinational Logic Circuit

2. Explain the relation between the D output of full

subtractor circuit and the C output of full adder
circuit?
3. Design a half adder/ subtractor circuit using control
when Z=1 we get a half adder and when Z=0 we get
a half subtractor?

Code Conversion
Object
To learn how to build logic circuits that convert from a
system or coding method to another.
5.5 Theory
There are varieties of codes that use in digital systems.
A conversion between codes is sometimes necessary to
get the output of a system as input to other system.
A code converter is a circuit that makes two systems
compatible even thought each uses a different binary
code. The number of input variables and output
variables depend on representing of the systems that
convert one to other.
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 chapter 5: Combinational Logic Circuit

Example: Design the conversion circuit that convert

BCD code to excess-3 code?
Solution
The number of input is four and the number of output is
four because each of the BCD code and excess-3 code
represent by 4 bits. The truth table of the converter is:

Input (BCD) Output (excess-3)

A B C D W X Y Z
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 x X x x
1 0 1 1 x X x x
1 1 0 0 x X x x
1 1 0 1 x X x x
1 1 1 0 x X x x
1 1 1 1 x X x x

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 chapter 5: Combinational Logic Circuit

Next, simplify the output variables using Karnaugh

map.

The logic diagram is shown in fig (5-9).

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 chapter 5: Combinational Logic Circuit

Fig (5-9): BCD-to-excess 3 converter

Example: Design a combinational circuit that

generates 9's complement of a 3 input numbers and
implementing it using 3 gates only.
Solution
Firstly, we construct the truth table.
Decimal A B C X Y Z W
0 0 0 0 1 0 0 1
1 0 0 1 1 0 0 0
2 0 1 0 0 1 1 1
3 0 1 1 0 1 1 0

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 chapter 5: Combinational Logic Circuit

4 1 0 0 0 1 0 1
5 1 0 1 0 1 0 0
6 1 1 0 0 0 1 1
7 1 1 1 0 0 1 0

Next, simplify the output variables using K map.

X=AB =(A+B)' Y=AB+AB

Z= B W= C

The diagram of the circuit is:

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 chapter 5: Combinational Logic Circuit

Fig (5-10): 3-bit 9's complement converter

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