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Calculation of Output Voltage Ripple and Design Considerations of SEPIC

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Article  in  IEEE Transactions on Industrial Electronics · March 2014

DOI: 10.1109/TIE.2013.2262748

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Calculation of Output Voltage Ripple and Design
Considerations of SEPIC Converter
Ebrahim Babaei, Member, IEEE, and Mir Esmaeel Seyed Mahmoodieh, Student Member, IEEE
Abstract—In this paper, a design method is proposed for finding
the equivalent inductance and capacitance of the single-ended
primary-inductor converter (SEPIC). The relations of the output
voltage ripple (OVR) of the SEPIC converter are obtained in com-
plete inductor supply mode–continuous conduction mode (CISM-
CCM), incomplete inductor supply mode-CCM (IISM-CCM), and
IISM-discontinuous conduction mode (IISM-DCM). The maxi-
mum of OVR (MOVR) is investigated for a specified range of
the input voltage and load resistance. This value of the MOVR
is obtained for the minimum values of input voltage and load
resistance. In this paper, the minimum values of the equivalent
inductance and capacitance are calculated in obtaining the min-
imum value of the MOVR. One of the other performed studies
in this paper is calculation of the switch peak current in CCM
and DCM. In addition, the converter is designed based on the
minimum values of the MOVR and stress of the switching current.
Experimental and simulation results are used to prove the validity
of the presented theoretical subjects.
Index Terms—Complete inductor supply mode (CISM), con-
tinuous conduction mode (CCM), discontinuous conduction mode
(DCM), incomplete inductor supply mode (IISM), output voltage
ripple (OVR), single-ended primary-inductor converter (SEPIC),
stress of switching current.
I. I NTRODUCTION
N OWADAYS, the dc/dc converters are widely used in
different applications. In some special applications such
as military, aerospace, cranes, and precision instrumentation
[1], the output voltage ripple (OVR) has to be maintained in
an acceptable level to achieve superior performance [2], [3]. In
addition to the aforementioned applications, the dc/dc convert-
ers are applied to tie the renewable energy to the utility [4], [5]
and the speed control of adjustable motors [6]. Therefore, the
quality of the output voltage has a special importance in these
kinds of applications. In [6], the author has studied the speed
control of a dc series motor by using a buck–boost converter by
presenting a new control method. Also, the ripple of the input
voltage and current of the motor was decreased by designing
a proper PI controller. In [7], the authors have decreased the
OVR of a buck converter by combining a resonant controller in
parallel connection with a PID controller. The major disadvan-
Manuscript received April 30, 2012; revised October 25, 2012 and
March 28, 2013; accepted April 4, 2013. Date of publication July 29, 2013;
date of current version August 23, 2013.
The authors are with the Faculty of Electrical and Computer Engineer-
ing, University of Tabriz, Tabriz 51664, Iran (e-mail: e-babaei@tabrizu.ac.ir;
es_mahmoodieh@yahoo.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2013.2262748
0278-0046 © 2013 IEEE
1213
tages of the presented methods in [6] and [7] are the complexity
of the system and its control method. In [8], the authors have
investigated the OVR of a buck converter by classifying contin-
uous conduction mode (CCM) and discontinuous conduction
mode (DCM) by the critical inductance. In [9], a chaotic
control method has been presented for decreasing the OVR and
electromagnetic interference (EMI) of a buck converter. In [10],
a new modified boost topology has been presented with some
significant new features, such as reduced component current
stress and continuous output current. The major disadvantage of
this converter is the limited range of the voltage conversion ratio
(M ). The allowable range of M for the presented method is 1 <
M < 1.6. In [11], a different arrangement of a boost converter
with an extra LC filter is presented to decrease the OVR.
The major disadvantages of [11] are increasing the cost and
complexity of the converter. Until now, the studies which have
been done about the single-ended primary-inductor converter
(SEPIC) are more about the control method, in order to decrease
the switching losses by using soft switching [12], [13]. In [14],
studies about the OVR in a SEPIC converter have been done.
In [14], the authors have presented a modified topology of a
SEPIC converter in order to decrease the OVR in CCM and
DCM. The major disadvantage of this method is the high stress
of switching voltage compared with the conventional SEPIC
converter. Because of this disadvantage, the presented method
in [14] is just applied in low voltages and high currents. The use
of more power supply elements (inductor and capacitor) in [14]
causes the increase of EMI. One of the other disadvantages of
this method is the complexity of the converter and its control
method.
By developing CCM and DCM to complete inductor supply
mode (CISM) and incomplete inductor supply mode (IISM) [3],
the operational modes of the SEPIC converter are divided into
three groups: CISM-CCM, IISM-CCM, and IISM-DCM. In this
paper, the OVR of the converter is investigated by considering
the stress of switching current and size of elements in all three
operational modes.
In dc/dc converters, the value of the OVR is determined
by the values of the inductances and capacitances. In addition,
the value of the switch peak current (SPC) is determined by
the values of the inductances. In addition to the values of the
inductances and capacitances, the values of the input voltage
and load resistance can affect the values of the OVR and SPC.
In this paper, the aim is to calculate the values of inductances
and capacitances in such a way that the values of maximum of
OVR (MOVR) and SPC are minimized. In this paper, first the
different operational modes of the SEPIC converter are intro-
duced. Then, the critical inductances between these operational
1214 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

The following is valid if the SEPIC converter operates

in CCM:
Vo
D= . (4)
Vo + Vi
Considering (1) and (2), and (4), the values of LCe and LKe
can be explained as follows, respectively:

Fig. 1. Power circuit of the SEPIC converter. RL Vi2

LCe = (5)
2f (Vi + Vo )2
modes are calculated. After this, the relations of the OVR,
RL Vi2
MOVR, and stress of switching current are obtained as func- LKe = . (6)
tions of different quantities of the converter. In addition, a 2f Vo (Vo + Vi )
design method is given for calculating the minimum values
of inductances and capacitances to guarantee the minimum
III. OVR C ALCULATION
values of the MOVR and SPC. It is important to note that the
presented method can be applied for different kinds of dc/dc The OVR is one of the effective parameters in designing a
converters. Finally, the experimental and simulation results are dc/dc converter. In dc/dc converters, the circuit elements should
presented to reconfirm the validity of the proposed theoretical be designed in such a way that the OVR has the minimum
subjects. value. In this section, the analysis of the OVR is carried out
in all operational modes, and the effect of each of the electrical
parameters on OVR is investigated.
II. O PERATIONAL M ODES AND C ALCULATION OF
E QUIVALENT C RITICAL I NDUCTANCES
A. Calculating OVR in CISM-CCM
The topology of the SEPIC converter is shown in Fig. 1.
The operational modes in a SEPIC converter are generally According to Fig. 2(a), the OVR in this operational mode is
classified in CCM and DCM. The borderline between these obtained by integrating iC2 during Ton as follows:
two operational modes is specified by the equivalent critical Ton
inductance LCe . Considering the load current (Io ) and the sum 1
VP P = VCP 2 − VCV 2 =− iC2 (t)dt (7)
of the minimum currents of L1 (ILV 1 ) and L2 (ILV 2 ), CCM is C2
0
divided into two operational modes, namely, CISM and IISM.
The borderline of these two operational modes is determined where VCP 2 and VCV 2 are the maximum and minimum values
by critical inductance LKe . The DCM just contains an interval of the output voltage, respectively.
of IISM. Therefore, the SEPIC converter contains three oper- In time interval Ton , iC2 is equal to
ational modes. The waveforms of different quantities of the
converter in different operational modes are shown in Fig. 2. iC2 (Ton ) = −Io . (8)
In CISM-CCM operational, the sum of the minimum currents
of the inductors (ILV 1 + ILV 2 ) is more than Io , and also, the Assuming a high value for capacitor C2 , the value of Io can be
equivalent inductance Le = L1 L2 is more than LKe . In IISM- considered constant.
CCM operational, LCe < Le < LKe and ILV 1 + ILV 2 < Io Applying (3) and (8) in (7), we have
are valid. In IISM-DCM operational, ILV 1 + ILV 2 = 0 and -CCM = DT Io
Le < LCe are valid. VPCISM
P . (9)
C2
Considering Fig. 2, it is illustrated that the equivalent criti-
cal inductances between CCM and DCM (LCe ) and between Applying (4) in (9), considering T = 1/f and Vo = RL Io , the
CISM and IISM (LKe ) are obtained by considering ILV 1 + value of the OVR in this operational mode is
ILV 2 = 0 and ILV 1 + ILV 2 = Io , respectively Vo2
VPCISM -CCM = . (10)
P
RL RL C2 f (Vi + Vo )
LCe = (1 − D)2 (1)
2f Considering (10), it is illustrated which OVR in the CISM-
RL (1 − D)2 CCM is independent of the values of L1 and L2 . Meanwhile,
LKe = . (2) the value of the OVR in this operational mode has a reverse
2f D
relation with the values of input voltage and load resistance. In
In (1) and (2), f is the switching frequency, and D is the duty other words
cycle of the converter which is defined as follows: -CCM
∂VPCISM
P
Ton <0 (11)
D= . (3) ∂Vi
T -CCM
∂VPCISM
P
< 0. (12)
Considering 0 < D < 1, (1) and (2), LKe > LCe is valid. ∂RL
BABAEI AND SEYED MAHMOODIEH: CALCULATION OF OVR AND DESIGN CONSIDERATIONS OF SEPIC CONVERTER 1215

Fig. 2. Waveforms of the SEPIC converter. (a) CISM-CCM. (b) IISM-CCM. (c) IISM-DCM.

B. Calculating OVR in IISM-CCM Applying (18), (19), and t1 = 0 (new time era) in (13),
we have
Considering Fig. 2(b), the value of the OVR is obtained by
integrating iC2 during (t1 , t2 ) as follows: -CCM = Le
VPIISM
P (ILP 1 + ILP 2 − Io )2 . (20)
t2 2C2 Vo
-CCM = 1
VPIISM
P iC2 (t)dt. (13) The value of ILP 1 + ILP 2 in CCM is
C2
t1
 
1 RL
Considering Fig. 1, in time interval Toff , iC2 is equal to ILP 1 + ILP 2 = Io + (1 − D) . (21)
1 − D 2Le f
iC2 (t) = iL1 (t) + iL2 (t) − Io . (14) Applying (4) and (21) in (20) and Vo = RL Io , the value of the
OVR will be
Considering Figs. 1 and 2(b), the relations of iL1 and iL2 are as
follows, respectively:  2
-CCM Le V o Vo Vi
VPIISM = + . (22)
Vi − VC1 − Vo P
2C2 RL Vi 2Le f (Vi + Vo )
iL1 (t) = t + ILP 1 (15)
L1
In this operational mode, we have LCe < Le < LKe , so ac-
Vo
iL2 (t) = − t + ILP 2 . (16) cording to (22), the OVR has a reverse relation with the values
L2
of Le , Vi , and RL . In other words
It should be noted that (15) and (16) are obtained by assuming -CCM
t1 = 0 (new time era). ∂VPIISM
P
<0 (23)
The voltage value of C1 is as follows [15]: ∂Le
∂VPIISM -CCM
P
VC1 = Vi . (17) <0 (24)
∂Vi
Considering (14)–(17), in time interval Toff , the relation of iC2 ∂VPIISM -CCM
P
< 0. (25)
can be written as follows: ∂RL
Vo
iC2 (t) = − t + ILP 1 + ILP 2 − Io . (18) According to the aforementioned explanations, if Le = LCe ,
Le the OVR will be maximum. Therefore, by applying (5) in (22),
Considering Fig. 2(b), the value of t2 is obtained by applying the maximum value of the OVR is obtained for the specific
zero for (18) values of Vi and RL as follows:

Le -CCM = (2Vo + Vi )2 Vo
t2 = (ILP 1 + ILP 2 − Io ). (19) VPIISM
P,max . (26)
Vo 4Rf C2 (Vo + Vi )2
1216 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

With a similar analysis, if Le = LKe , the minimum value of the

OVR is obtained as follows:

-CCM = Vo2
VPIISM
P,min . (27)
RL C2 f (Vi + Vo )

Comparing (10) and (27) leads to the following:

VPIISM -CCM = V CISM-CCM . (28)

P,min PP
Fig. 3. Variation of the OVR versus Le for constant values of Vi , C2 , f ,
and RL .
From (28), it can be concluded that, for specific values of Vi
and RL , the OVR in IISM-CCM is more than the OVR in of inductances L1 and L2 . In addition, the OVR has a reverse
CISM-CCM. relation with the load resistance as follows:

∂VPIISM-DCM
P
C. Calculating OVR in IISM-DCM <0 (36)
∂Le
In time interval (t1 , t2 ), the value of the OVR is obtained by -DCM
∂VPIISM
P
integrating iC2 as follows: < 0. (37)
∂RL
t2
-DCM 1 According to the aforementioned explanations, the maximum
VPIISM
P = iC2 (t) dt. (29)
C2 value of the OVR is obtained for Le = LCe . Therefore, by
t1 applying (5) in (35), for the specific values of Vi and RL , the
minimum value of the OVR will be
Applying (18), (19), and t1 = 0 (new time era) in (29)
leads to -DCM = (2Vo + Vi )2 Vo
VPIISM
P,min . (38)
4Rf C2 (Vo + Vi )2
-DCM = Le
VPIISM
P (ILP 1 + ILP 2 − Io )2 . (30)
2C2 Vo Comparing (26) and (38) leads to

Considering (17), Figs. 1 and 2(c), and boundary conditions, VPIISM -DCM = V IISM-CCM . (39)
P,min P P,max
the values of ILP 1 and ILP 2 in IISM-DCM are obtained as
follows: From (39), it can be concluded that, for specific values of Vi
and RL , the OVR in IISM-DCM is more than the OVR in
Vi IISM-CCM.
ILP 1 = DT + Ib (31)
L1 According to the aforementioned explanations in different
Vi operational modes, it is observed that the value of the OVR is
ILP 2 = DT − Ib . (32) specified by the value of Le . Considering (10), (22), and (35),
L2
for constant values of switching frequency, C2 , input voltage,
Applying (31) and (32) in (30) and T = 1/f leads to and load resistance, the relation between OVR and Le is given
by Fig. 3. According to Fig. 3, the value of the OVR in IISM-
 2
-DCM Le DVi DCM is more than the other operational modes. It has a reverse
VPIISM
P = − Io . (33) relation with the value of Le . Also, in IISM-CCM, the value
2C2 Vo Le f
of the OVR is less than its value in IISM-DCM and more
When the converter operates in DCM, the value of the duty than it in CISM-CCM. The value of the OVR has a reverse
cycle is as follows [15]: relation with the value of Le in IISM-CCM. The OVR in CISM-
 CCM has the minimum value, and it is independent of the
Vo 2Le f value of Le .
D= . (34)
Vi RL
Applying (34) in (33) and considering Vo = RL Io , the value of IV. C ALCULATION OF M AXIMUM OVR
the OVR is given by
In practical applications, we have Vi,min < Vi < Vi,max and
 2
-DCM = Le Vo 2 1 RL,min < RL < RL,max , so according to (11), (12), (24), (25),
VPIISM
P − . (35) and (37), the maximum value of the OVR is obtained for a
2C2 f R L Le RL
specific value of Le as the values of Vi and RL are minimum. In
Equation (35) shows that, in IISM-DCM, the value of the OVR other words, considering the operational range, for Vi = Vi,min
is independent of Vi . and RL = RL,min , MOVR is obtained.
In this operational mode, we have Le < LCe , so according to Considering (5) and (6), the values of LCe and LKe are
(35), the value of the OVR has a reverse relation with the values functions of Vi and RL , so by varying Vi from Vi,min to Vi,max
BABAEI AND SEYED MAHMOODIEH: CALCULATION OF OVR AND DESIGN CONSIDERATIONS OF SEPIC CONVERTER 1217

VP P 2,max are obtained for Le = LCe,min and Le = LCe,max ,

respectively. By applying (40) in (35) and the value of Le =
LCe,max in (22), the following equations are valid:
 -DCM
max VPIISM
P 2,max

(2Vo + Vi,min )2 Vo
= (46)
4f RL,min C2 (Vo + Vi,min )2
 IISM-DCM
min V P P 2,max
Fig. 4. Different operational modes. (a) LCe,max < LKe,min . (b) LCe,max>  2
LKe,min . LCe,max Vo Vo Vi,min
= + .
2C2 RL,min Vi,min 2LCe,max f (Vi,min + Vo )
and RL from RL,min to RL,max , the minimum and maximum
(47)
values of LCe and LKe are obtained as follows:
RL,min 2
Vi,min Comparing (45) and (46) leads to
LCe,min = (40) 
2f (Vi,min + Vo )2 max VPIISM -DCM = min V IISM-DCM . (48)
P 2,max P P 1,max
2
RL,max Vi,max
LCe,max = (41) By selecting LCe,max < Le < LKe,min , the whole operational
2f (Vi,max + Vo )2
region of the converter will be in IISM-CCM. If the MOVR of
2 region 3 is specified by VP P 3,max , the maximum and minimum
RL,min Vi,min
LKe,min = (42) values of VP P 3,max are obtained for Le = LCe,max and Le =
2f Vo (Vo + Vi,min )
LKe,min , respectively. By applying the aforementioned values
2
RL,max Vi,max in (22), the following equations are valid:
LKe,max = . (43)
2f Vo (Vo + Vi,max )  -DCM
max VPIISMP 3,max
Considering (40)–(43), the values of LCe,min , LCe,max ,  2
LCe,max Vo Vo Vi,min
LKe,min , and LKe,max are dependent on the values of Vi and = +
RL . Therefore, the operational region of the SEPIC converter 2C2 RL,min Vi,min 2LCe,max f (Vi,min + Vo )
contains five parts in the equivalent inductance axis as shown (49)
 IISM-DCM
in Fig. 4. Considering (41) and (42), the values of LCe,max and min VP P 3,max
LKe,min can have two states LCe,max < LKe,min or LCe,max >  2
LKe,min Vo Vo Vi,min
LKe,min . = + .
2C2 RL,min Vi,min 2LKe,min f (Vi,min + Vo )
(50)
A. LCe,max < LKe,min
Applying (42) in (50), the minimum value of VP P 3,max will be
If LCe,max < LKe,min , five operational regions of the con-
verter exist in the inductance axis as shown in Fig. 4(a). If  -CCM = Vo2
Le < LCe,min , the converter operates in IISM-DCM (region 1). min VPIISM
P 3,max . (51)
RL,min C2 f (Vi,min + Vo )
If the MOVR of region 1 is specified by VP P 1,max , the min-
imum value of VP P 1,max is obtained for Le = LCe,min , so Comparing (47) and (49) leads to
by applying Le = LCe,min in (35), the following relation is  -CCM = min V IISM-CCM .
valid: max VPIISM
P 3,max P P 2,max (52)
 -DCM = LCe,min V0 By selecting LKe,min < Le < LKe,max , one section of the
min VPIISM
P 1,max
2C2 operational region of the converter will be in IISM-CCM, and

 2 the other section will be in CISM-CCM. If the MOVR of
2 1 region 4 is specified by VP P 4,max , the maximum and minimum
× − . (44)
f RL,min LCe,min RL,min values of VP P 4,max are equal to
 -CCM
By applying (40) in (44), the minimum value of VP P 1,max max VPIISMP 4,max
will be  2
LKe,minVo Vo Vi,min
 -DCM = (2Vo + Vi,min )Vo =
2C2 RL,min Vi,min
+
2LKe,min f (Vi,min + Vo )
min VPIISM
P 1,max . (45)
4f RL,min C2 (Vo + Vi,min )2
(53)
By selecting LCe,min < Le < LCe,max , one section of the op-  -CCM
min VPIISM
P 4,max
erational region of the converter will be in IISM-DCM, and the
other section will be in IISM-CCM. If the MOVR of region 2 is Vo2
= . (54)
specified by VP P 2,max , the maximum and minimum values of RL,min C2 f (Vi,min + Vo )
1218 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

Applying (42) in (53), the maximum value of VP P 4,max will be Considering (58)–(63) leads to
 -CCM = min V CISM-CCM
max VPIISM P 4,max P P 4,max VP P 1,max > VP P 2,max > VP P 3,max
Vo2 = VP P 4,max = VP P 5,max . (64)
= . (55)
RL,min C2 f (Vi,min + Vo )
In CCM, according to (57) and (64), for Le > LKe,min , the
If Le > LKe,max , the converter will operate in CISM-CCM. value of the MOVR is minimum, and it is independent of Le .
If the MOVR of region 5 is assumed to be VP P 5,max , the In other words, by increasing the value of Le , the value of
following is valid: the MOVR remains constant, and it is minimum. In DCM, for
Vo2 Le = LCe,min , the value of the MOVR is minimum.
VPCISM -CCM = . (56)
P 5,max
RL,min C2 f (Vi,min + Vo )
V. C ALCULATION OF S TRESS OF S WITCHING C URRENT
Considering (48), (52), and (54)–(56) leads to
One of the other effective parameters in designing a dc/dc
VP P 1,max > VP P 2,max > VP P 3,max > VP P 4,max converter is the stress of the switching current. The converter
= VP P 5,max . (57) should be designed in such a way that it contains the minimum
stress of the switching current.
Considering Fig. 1, when switch S is on, the current passing
through the switch is equal to
B. LCe,max > LKe,min
If LCe,max > LKe,min , the converter will have five opera- iS (t) = iL1 + iL2 (t). (65)
tional regions. If Le < LCe,min , the converter operates in IISM-
DCM (region 1). The minimum value of VP P 1,max is obtained According to Fig. 2, SPC in CCM and DCM is at t1 , and it is
for Le = LCe,min . Therefore, by applying (40) in (35), the equal to
following is valid:
 ISP = ILP 1 + ILP 2 (66)
min VPIISM -DCM = (2Vo + Vi,min )2 Vo
. (58)
P 1,max
4f RL,min C2 (Vo + Vi,min )2
where ISP is the SPC.
CCM
If LCe,min < Le < LKe,min , one section of the operational Considering (4), (21), and Vo = RL Io , SPC in CCM (ISP )
region of the converter will be in IISM-DCM, and the other is obtained as follows:
section will be in IISM-CCM. The maximum and minimum
CCM Vo (Vi + Vo ) Vo Vi
values of VP P 2,max are obtained for Le = LCe,min and Le = ISP = + . (67)
LKe,min , respectively. Considering (22), (35), (40), and (42), RL Vi 2f Le (Vi + Vo )
the following equations are obtained:
Equation (67) shows that SPC has a reverse relation with the
 -DCM = (2Vo + Vi,min )2 Vo values of Le and RL . Considering the specific values of Vi
max VPIISM
P 2,max (59)
4f RL,min C2 (Vo + Vi,min )2 and RL , if Le > LCe , the converter operates in CCM, so the
maximum value of SPC is obtained for Le = LCe , and by
 -CCM = Vo2 applying (5) in (67), the maximum value of SPC is obtained
min VPIISM
P 2,max . (60)
RL,min C2 f (Vi,min + Vo )2 as follows:

If LKe,min < Le < LCe,max , one section of the operational CCM 2Vo (Vi + Vo )
ISP,max = . (68)
region of the converter will be in IISM-CCM, and the other RL Vi
section will be in CISM-CCM. The maximum and minimum
With a similar analysis, SPC in DCM is equal to the sum of
values of VP P 3,max are as follows:
(31) and (32), so by considering (34), SPC in DCM is obtained
 -CCM = Vo2 as follows:
max VPIISM
P 3,max (61) 
RL,min C2 f (Vi,min + Vo ) 2
DCM
ISP = Vo . (69)
 R L f Le
min VPCISM -CCM = Vo2
. (62)
P 3,max
RL,min C2 f (Vi,min + Vo ) Considering (69), SPC in DCM has a reverse relation with Le
and RL . For specific values of Vi and RL , if Le < LCe , the
For LCe,max < Le < LKe,max (region 4) and Le > LKe,max converter operates in DCM, so the minimum value of SPC is
(region 5), the converter will operate in CISM-CCM, so obtained for Le = LCe . Hence, by applying (5) in (69), the
minimum value of SPC can be calculated as
-CCM = V CISM-CCM = Vo2
VPCISM
P 4,max P P 5,max . 2Vo (Vi + Vo )
RL,min C2 f (Vi,min + Vo ) DCM
ISP,min = . (70)
(63) RL Vi
BABAEI AND SEYED MAHMOODIEH: CALCULATION OF OVR AND DESIGN CONSIDERATIONS OF SEPIC CONVERTER 1219

addition, the stress value of the switching current will be high,

so the following should be valid:
2
RL,min Vi,min
Le < LCe,min = . (73)
2f (Vi,min + Vo )2
Considering (72) and (73) leads to

LCe,min < Le < LKe,max . (74)

According to (57) and (64), it is observed that, for Le >
LKe,min , the value of the MOVR is independent of Le . It means
that, by increasing the equivalent inductances, the MOVR
does not vary. Also, the stress of the switching current of
Fig. 5. Variations of SPC in different operational modes versus Le . the converter is low because it operates in CCM. Therefore,
the minimum value of the equivalent inductance in order to
Comparing (68) and (70) leads to ensure facing with minimum MOVR in the worst operational
DCM CCM conditions (MOVR) is LKe,min as follows:
ISP,min = ISP,max . (71)
2
RL,min Vi,min
Considering (71), SPC in DCM is more than that in CCM. Le,min = LKe,min = . (75)
2f Vo (Vo + Vi,min )
Fig. 5 shows the variations of SPC versus the equivalent
inductance for specific values of Vi and RL and for a constant According to (63), MOVR is equal to
switching frequency. As it is observed in Fig. 5, SPC is max- Vo2
imum in DCM, and it is low to some extent in CCM. In both VP P,max = . (76)
RL,min C2 f (Vi,min + Vo )
DCM and CCM, the value of SPC has a reverse relation with
the value of Le . Considering (76), the minimum value of C2 is as follows:
Vo2
VI. D ESIGN C ONSIDERATIONS C2,min = . (77)
RL,min VP P,max f (Vi,min + Vo )
The OVR and stress of switching current are two effective pa-
By considering the equivalent series resistance (ESR) effect of
rameters in designing a dc/dc converter. The value of the OVR
the output capacitor, the minimum value of the output capacitor
is determined by the values of L1 , L2 , C2 , and the switching
in (77) varies as follows:
frequency. The stress value of the switching current is also de-
termined by the values of L1 , L2 , and the switching frequency. Vo2
C2,min = (78)
By increasing the switching frequency, the OVR and stress of (Vo + Vi,min )(VP P,max − λ)RL,min f
the switching current can be decreased. However, in practice,
where λ of the aforementioned relation is equal to
there is limitation in applying high frequency. The other method
for decreasing OVR and the stress of the switching current 2RESR Vo2
is increasing the equivalent inductance. As it is expressed in λ= . (79)
RL,min Vi,min
Section IV, the worst operational condition (MOVR) is for the
minimum values of input voltage and load resistance (Vi,min RESR in the aforementioned relation is the resistance value
and RL,min ). Considering which stress value of the switching of ESR.
current has a reverse relation with the value of RL , in the worst In designing the elements of the converter, calculating the
operational condition, the stress value of the switching current value of C1 is needed in addition to the values of L1 , L2 , and
is high. The proposed method in this section is a desired method C2 . The value of the voltage ripple of capacitor C1 is obtained
for achieving the minimum value of the MOVR considering the by integrating iC1 in time interval Toff as
minimum stress of the switching current. Vo2
As it is expressed in Section III, OVR is minimum in CISM- VP P,C1 = . (80)
RL f C1 (Vi + Vo )
CCM and is independent of Le . If Le > LKe,max , for all
possible values of Vi and RL , the converter will operate in As shown in (80), the value of the voltage ripple of capacitor
CISM-CCM. Considering (43), using a high value for Le , the C1 has a reverse relation with the values of Vi and RL , so the
size of the elements of the converter increases, so selecting a MOVR of capacitor C1 can be expressed as follows:
high value for Le is not proposed. Hence Vo2
VP P,C1,max = . (81)
RL,max 2
Vi,max RL,min f C1 (Vi,min + Vo )
Le < LKe,max = . (72)
2f Vo (Vo + Vi,max ) Considering (81), the minimum value of capacitor C1 is
equal to
If Le < LCe,min , the converter will operate in IISM-DCM (for
all values of Vi and RL ), but as expressed in Section III, Vo2
C1,min = . (82)
the OVR will be high, and it increases by decreasing Le . In RL,min f VP P,C1,max (Vi,min + Vo )
1220 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

VII. E FFICIENCY OF S EPIC C ONVERTER

One of the other significant parameters of designing a con-
verter is its efficiency. Considering which one of the objects
of this paper is designing converter inductance to achieve the
minimum MOVR and for Le > LKe,min , the value of the
MOVR is minimum and independent of the inductance value,
so in this section, the effect of inductance increase on converter
efficiency is investigated.
The efficiency of the SEPIC converter is equal to
P out
η= (83)
Pout + Ploss Fig. 6. Effect of inductance on the converter efficiency.
where Ploss is the total loss of the converter as follows:
show that the converter loss decreases by increasing the value
Ploss = PS + PD + PL + PC1 + PC2 (84) of the inductance. In other words, the converter efficiency
increases. Therefore, by considering Le > LKe,min , in addition
where PS , PD , PLe , PC1 , and PC2 are the losses of the to obtaining the minimum of the MOVR which is independent
switch and diode, the ESR of the inductances, and the ESR of of inductance, the converter efficiency also increases.
capacitors C1 and C2 , respectively. Fig. 6 shows the converter efficiency versus the equivalent
According to Fig. 1, the switch loss is equal to inductance for different ESR values of the inductances. In this
figure, the converter efficiency is calculated for Vi = 80 V,
2
PS = PrS + 0.5PSW = rS IS,rms + 0.5f Co (Vo + Vi )2 (85) Vo = 150 V, f = 15 kHz, RL = 50 Ω, VD = 0.7 V, Co =
100 PF, rS = 50 mΩ, and rC1 = rC2 = rD = 20 mΩ. Accord-
where PrS , PSW , rS , IS,rms , and Co are the switch conduction ing to the figure, it is observed that, by increasing the inductance
loss, the switching loss, the ON-state resistance of the switch, value, the converter efficiency also increases.
the rms value of the switch current, and the capacitor capacity
of the switch output, respectively.
VIII. T HEORETICAL A NALYSIS AND E XPERIMENTAL
By calculating each of the parameters of the aforementioned
AND S IMULATION R ESULTS
relation, the switch loss is expressed as follows:
  In order to prove the theoretical subjects presented in the
D(1 − D)2 Vo2 DIo2 f Co Vo2
PS = rS + + . (86) previous sections, the SEPIC converter which is shown in Fig. 1
12L2e f 2 (1 − D)2 2D2 is simulated in a computer. In addition, for reverification of
The diode loss is equal to the theoretical analysis, experimental and simulation (using
  PSCAD/EMTDC software) results have been presented. For
Vo2 (1 − D)3 Io2 better detection, the experimental and simulation results are
PD = VD Io + rD + (87)
12L2e f 2 1−D presented for steady state. The transistor (switch S) and diode
(D) of the prototype are MJ13005 and MUR460, respectively.
where VD is the ON-state voltage drop of the diode and rD is The C1 and C2 capacitors are composed of series and parallel
the diode conduction resistance. connections of some 40 μF/250 V electrolytic, 1 μF/250 V
The loss of equivalent inductance is obtained by polyester, and 100 nF/400 V ceramic. The L1 and L2 induc-
 2  tors are composed of series and parallel connections of some
V (1 − D)2 Io2
PL = rL(IL1 + IL2 )2rms = rL o + (88) 500-μH air-gapped ferrite-type core using multilayer wires
12L2e f 2 (1 − D)2
(Litz wire) for winding. The 89C52 microcontroller by ATMEL
where rL is the ESR of the inductances. Company has been used to generate the switching pattern. Tek-
The ESR losses of capacitors C1 and C2 are expressed as tronix TDS 2024B four channel digital storage oscilloscope is
follows, respectively: used for measurements in the laboratory. The major parameters
of the converter are shown in Table I. According to (40)–(43),
2
PC1 = rC1 IC1,rms (77), (82), and Table I, the values of the inductances and
 2  capacitances are expressed as shown in Table II.
Vo (1 − D)3 Vo2 D(1 − D)2 DIo
= rC1 + + (89) Fig. 7(a) shows the variation of the OVR versus Le for
12L1 f 2 12L2 f 2 1−D different values of Vi and RL in buck mode. As shown in this
 2 
V (1 − D)3 DIo2 figure, the values of the OVR in IISM-DCM and IISM-CCM
2
PC2 = rC2 IC1,rms = rC2 o + (90) decrease by increasing the value of Le . In CISM-CCM, the
12L2e f 2 1−D
value of the OVR is independent of the value of Le . Also, it
where rC1 and rC2 are the ESR losses of capacitors C1 and C2 , is observed that, for low equivalent inductances, the converter
respectively. is in IISM-DCM. Considering Fig. 7(a), the value of the OVR
Calculating the converter loss using (86)–(90), the converter in IISM-DCM is independent of Vi . Also, in this operational
efficiency can be calculated using (83). Equations (86)–(90) mode, the OVR value has a reverse relation with the value of
BABAEI AND SEYED MAHMOODIEH: CALCULATION OF OVR AND DESIGN CONSIDERATIONS OF SEPIC CONVERTER 1221

TABLE I
PARAMETERS OF C ONVERTER

TABLE II
VALUES OF I NDUCTANCES AND C APACITANCES

RL . Fig. 7(a) shows that the values of the OVR in IISM-CCM

and CISM-CCM have a reverse relation with the values of Vi
and RL . It is observed that the maximum value of the OVR
occurs for Vi,min and RL,min .
Fig. 7(b) shows the variation of the OVR versus Vi for
RL,min = 50 Ω and different values of Le in buck mode. As
shown in this figure, for Le = 0.4 mH < LCe,min , the converter
in the whole operational region is in IISM-DCM. Therefore,
the value of the OVR is independent of the value of Vi .
For high values of Le , the converter operates in IISM-CCM
and CISM-CCM. By increasing the values of Le and Vi , the Fig. 7. Variation of the OVR. (a) Versus the equivalent inductance for different
values of Vi and RL . (b) Versus Vi for different values of Le . (c) Versus RL
value of the OVR decreases. Considering which MOVR is for different values of Le .
obtained for Vi,min and RL,min , for Le > LKe,min = 1.27 mH,
the value of the MOVR is independent of the value of Le
and has its minimum value (VP P,max = 1.2 V). Therefore,
this subject proves the validity of the presented subjects in
Section IV.
Fig. 7(c) shows the variations of the OVR versus RL for
Vi,min = 80 V and different values of Le . As shown in this
figure, the value of the OVR decreases as the value of RL
increases. Also, it is observed that the value of the OVR
decreases by increasing the value of Le . As shown in this figure,
for this condition, the MOVR does not change, and its value is
equal to 1.2 V. In other words, for Le > LKe,min = 1.27 mH,
the MOVR is independent of the value of Le . This subject
Fig. 8. SPC versus equivalent critical inductance for RL,min and RL,max .
proves the validity of the presented subjects in Section IV.
Fig. 8 shows the variation of SPC versus Le for RL,min and
RL,max . This figure shows that the SPC decreases by increasing As shown in Figs. 7 and 8, the experimental and simulation
the value of Le . In DCM, SPC is high, and it is low in CCM. results have good agreement with the results of theoretical
In addition, the SPC decreases in both DCM and CCM as the analysis, and they reconfirm the theoretical analysis.
value of RL increases. Hence, for specific values of RL,min and Figs. 9 and 10 show the experimental results of the SEPIC
Le , SPC has the most value of itself. This subject proves the converter in boost mode for Vi,min = 80 V and RL,min = 50 Ω
validity of (71). (MOVR condition). As shown in Fig. 9, by selecting
1222
Fig. 9. Experimental results of the SEPIC converter in boost mode at the worst
operational conditions (RL,min , Vi,min ) for Le = 0.67 mH. (a) Current of
capacitor C2 . (b) OVR.
Fig. 10. Experimental results of the SEPIC converter in boost mode at the
worst operational conditions (RL,min , Vi,min ) for Le = 1.2 mH. (a) Current
of capacitor C2 . (b) OVR.
L1 = 2 mH and L2 = 1 mH because Le = 0.67 mH >
LKe,min = 0.31 mH, M OV R = 3 V (%2 Vo ).
According to Fig. 10, for L1 = 2 mH and L2 = 3 mH, by
increasing Le to 1.2 mH, the value of the MOVR does not
change, and it is equal to 3 V. Hence, it can be concluded that,
for Le > LKe,min , the MOVR is independent of the value of
Le . Expressing this subject proves the validity of the subjects
presented in Section IV. It should be noted that, in Figs. 9(b)
and 10(b), the OVR is just presented and the dc component of
the output voltage is eliminated.
IX. C ONCLUSION
The operational modes of the SEPIC converter are divided
into CISM-CCM, IISM-CCM, and IISM-DCM.
In CCM, with constant values of load, capacitor capacity,
and switching frequency, the OVR is not always independent
of the inductance value. In CISM-CCM, its value is mini-
mum and also independent of the equivalent inductance. In
IISM-CCM and IISM-DCM, the OVR is more and increases
by decreasing the equivalent inductance value. In CCM, the
stress of the switching current is less than its value in DCM
and has a reverse relation with the values of Le and RL . In
Le,min = LKe,min condition, not only a minimum value of
the MOVR is obtained, but also a low value for the stress of
the switching current is produced. In Vi = Vi,min and RL =
RL,min conditions, the minimum value of the equivalent critical
inductance between CISM and IISM is obtained, and in these
conditions, the minimum value of the MOVR is generated. It
is important to note that, for Le ≥ LKe,min , the value of the
MOVR is independent of the value of the equivalent inductance.
In addition, by increasing the inductance value, the converter
efficiency also increases.
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
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Ebrahim Babaei (M’10) was born in Ahar, Iran,
in 1970. He received the B.S. and M.S. degrees in
electrical engineering (first class honors) from the
Department of Engineering, University of Tabriz,
Tabriz, Iran, in 1992 and 2001, respectively, and
the Ph.D. degree in electrical engineering from the
Department of Electrical and Computer Engineering,
University of Tabriz, in 2007.
In 2004, he joined the Faculty of Electrical and
Computer Engineering, University of Tabriz, where
he was an Assistant Professor from 2007 to 2011 and
where he has been an Associate Professor since 2011. He is the author of more
than 210 journal and conference papers. His current research interests include
the analysis and control of power electronic converters, matrix converters,
multilevel converters, FACTS devices, power system transients, and power
system dynamics.
Mir Esmaeel Seyed Mahmoodieh (S’13) was born
in Tabriz, Iran, in 1984. He received the B.S. de-
gree in power engineering from the Department of
Engineering, Islamic Azad University of Ardabil,
Ardabil, Iran, in 2008 and the M.S. degree from the
Department of Engineering, Islamic Azad University
of Ahar, Ahar, Iran, in 2011. He is currently working
toward the Ph.D. degree in power engineering at
Bu-Ali Sina University, Hamedan, Iran.
His major fields of interest include the anal-
ysis, control, and modeling of power electronic
converters.