G41M05 Schematic Foxconn Precision Co. Inc.: Fab.A Data: 2008/7/30 Page Index

亞
5 4 3 2 1
Foxconn Precision Co. Inc.

D G41M05 Schematic D
美
Fab.A
Data: 2008/7/30
Page Index
01. Index Page 25. ICH7 -1
02. Topology 26. ICH7 -2
03. Rest Map 27. ICH7 -3
04. Clock Distribution 28. REAR USB
商
C
05. Power Delivery Map 29. FRONT USB C
06. Power Sequence 30. PCI Express x1Slot

07. CLOCKGEN 31. LAN-RTL8101E/8111B/8111C
08. Power / MISC Connectors 32 AUDIO 662
09. VRD11.1-RT8857 33. Super I/O -IT8720F
10. 1D125V 1D5V FSB 34. Keyboard / Mouse / Fan
11. STR1D8V 3D3_DUAL 35. Serial Port / IR / CIR
匯
12. LGA775 -1 36. BOARD ID
13. LGA775 -2 37. Changlist
14. Eaglelake -GMCH -1
B
15. Eaglelake -GMCH -2 B

18. DDR2 Channel A Termination
19. DDR2 Channel A DIMM1
20. DDR2 Channel B Termination
21. DDR2 Channel B DIMM2
22. PCI Express x16 Gfx Slot
23. VGA
A 24. DVI A
FOXCONN PCEG
Title
Index Page
Size Document Number Rev
C G41M05 A
Date: Thursday, October 22, 2009 Sheet 1 of 34

5 4 3 2 1
亞
5 4 3 2 1
Yorkfield
Wolfdale
VRD 11.1 LGA775 Processor
3 Phase PWM
D Socket T D
美
800/1066/1333/1600(oc) FSB
CK-505 Clock
PCI Express x 16 Channel A DDR2

PCI Express x16 Port DDR2 667/800/1066
External Graphics
DIMM1
Card
GMCH DDR2 667/800/1066 Channel B DDR2

VGA Connector
Eaglelake DIMM1
商
C C
Back Panel
PCIe port
USB2.0 Port 7 LAN
4 Lanes
USB2.0 Port 8 Realtek
Direct Media Interface (DMI)
USB2.0 Port 5 Controller Link
USB2.0 Port 6
PCI Slot 1X2
SPI Flash
匯
Header ICH7
USB2.0 Port 1
USB2.0 Port 2
USB2.0 Port 3
B
USB2.0 Port 4 B
Serial ATA
LPC I/F
SATA Connector 1
IDE AHCI, RAID0,1,5,10
SATA Connector 2
SPI Flash SATA Connector 3

(BIOS) SATA Connector 4
PCI Express x 1
HDA Codec
TPM Realtek ALC662/888
TPM
LPC I/F
Super I/O
IT8720/FX
A A
Floppy
IR/CIR Serial & Parallel
Drive Connector
FOXCONN PCEG
Title
TOPOLOGY
C G41M05 A
Date: Friday, August 28, 2009 Sheet 2 of 34

5 4 3 2 1
亞
5 4 3 2 1
CPU
(Cedar Mill/Presler/Conroe/Allendale)
CPU_PWRGD
CPURST#
D
LGA775 processor D
美
ATX
Power
Vtt_PwrGd CK505
Translation PWRGD_3V
PWRGD_PS PWROK CPURST#
Circuitry PCI Express x16
PS_ON#
GMCH
Broadwater
商
C
RSTIN# C
ICH7
ICH_PWRGD
CK_PWRGD
SLP_M#
PCIRST#
匯
PLTRST#
Front Panel PWROK ACZ_RST#

RST# Audio
FR_RST SYS_RESET# LAN_RSTSYNC
B B
SW_ON PWRBTN#
RSMRST#
RCIN#
SLP_S3#
RST#
TPM
RST#
RST#
Power on/off KBRST PCI Slot 1
circuit RSMRST#
Super IO
RST# PCIe Slot
SLP_S3# PCIe LAN
PSOUT
PSIN RST#
A IDE Controller A
PSOUT#
RSMRST circuit FOXCONN PCEG

Title
Reset Map
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
14.318MHz
CPU
D
CPU 200/266/333 MHz Diff Pair D
美
MCH 200/266/333 MHz Diff Pair
PCI Express 100 MHz Diff Pair PCI Express x16 Gfx Channel A DDR2
DIMM1
DOT 96 MHz Diff Pair G41
Channel B DDR2
商
DIMM1
PCI Express/DMI 100 MHz Diff Pair
C C
ICS9LPRS908DGLF
PCI Express/DMI 100 MHz Diff Pair
USB/SIO 48 MHz
ICH 33 MHz
REF 14 MHz
SPI Clock SPI
匯
ICH7
Azalia Bit Clock
B
PCI 33 MHz PCI Slot 1 B
TPM 33 MHz TPM
32.768KHz
HD Audio
SIO 33 MHz Super I/O
SATA 100 MHz Diff Pair

PCI Express 100 Mhz Diff Pair
A A
FOXCONN PCEG
Title
Clock Distribution
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
3.3V Super I/O

ATX P/S 3.3V
Icc(Max)=50mA
Proceessor
Vccp (CPU Vcore)
5V 5VSB VRD 11 3.3SBV
12V Voltage=1.15~1.5V 5V
Switching Icc(Max)=50mA(S0)
Icc(Max)=125A
Three Phase
5VDUAL 3-Phases Swithing 3.3SBV
D
DDR2 Channel A Icc(Max)= Icc(Max)=38mA(S3)
D
1.2V FSB 5VSB

Vdd (Core)=1.8V 10A Vtt=5.3A
美
Ivdd(Max)=TBD(per channel)
USB2.0 10 Ports 5VDUAL
+5V DUAL=5A(S0, S1) Icc(Max)=
Vtt (Core) Broadwater GMCH 4.345A(S0,S1)
Single Phase Switch +5V DUAL=20mA(S3)
0.9V 22mA(S3)
Ivterm(Max)=200mA 5V to 1.8V
Ivdd(Max)=TBD FSB_Vtt
(per channel) Linear 1.8V PS2
LDO 1.2V FSB Vtt
to 1.2V +5V DUAL=345mA(S0, S1)
1.8V to 0.9V Icc(Max)=1.3A
6A +5V DUAL=2mA(S3)
Ivterm(Max)=1.2A
DDR2 Channel B
1.8V VCCSM FWH
Vdd (Core)=1.8V 1.8V VCC_SMCLK
Ivdd(Max)=TBD(per channel) 3.3V=107mA(S0, S1)
GMCH 1.25 V Vcore (Core Logic) PCI Express X16

Vtt (Core) 3.3V 21.34A 1.25V
0.9V Switching Icc(Max)=18.8A(Integrated)
slot (1)
商
Ivterm(Max)=200mA 12V
*1.25V (DMI&PCIe) +12V=5.5A
(per channel) VCCA_EXP 2.5A
3.3VSB
C
1.25V C
Icc(Max)=0.375A(wake)
VCC_CL 3.8A
Icc(Max)=0.02A(no wake)
+3.3V=3A
3.3V VCCA_DAC 70mA
3.3V VCC3_3 15.8mA
PCI Express X1
Per slot (1)
+12V=0.5A
HDA Codec
3.3VSB
Vcc LDO Icc(Max)=0.375A(wake)
5V ICH7
匯
12V Icc(Max)=0.02A(no wake)
Icc(Max)=200mA to 5V
1.25V VCCDMI 40mA
Vcc +3.3V=3A
3.3V Linear 1.25V 1.2V VCC_CPU_IO 14mA
Icc(Max)=40mA to 1.05V
V_1P05V_ICH 1.05V (Core) VCC1_05
2A 1.17A PCI Per Slot (X2)
1.5V (USB &SATA) VCC1_5A -12V
B -12V B
Linear 1.8V 1.12A Icc(Max)=0.1A
to 1.5V 1.5V (PCIe)VCC1_5B
V_1P5V_ICH 0.77A 5V
2.2A 1.5V VCCGLAN1_5 5V Icc(Max)=5A
74mA
3.3V
RTC
5VSB RTC=5uA Icc(Max)=7.6A
Battery
12V
3.3V VccCL3_3 12mA Icc(Max)=0.5A
5V_STBY to 3.3SB 3.3V VccSUS3_3 141mA
1.5A 3.3V VccLAN (10/100) 12mA 3.3VSB
3.3V VccSUSHDA 4mA Icc(Max)=0.375A(wake)
3.3V VCC3_3 310mA Icc(Max)=0.02A(no wake)
3.3V
3.3V VccGLAN3_3 1mA
3.3V VccHDA 4mA
Nineveh GbE Lan

3.3V STBY
A IO LED 15.5nA A
1.8V ANALOG 418.2mA BJT

CK505
1.0V Internal 1.8
to 1.0 VR core Vdd (Core) FOXCONN PCEG
277.2mA 3.3V Title
Ivdd(Max)=250mA Power Delivery Map
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
S0->S5
+12V_SYS +12V_SYS
S5->S0
D D
+5V_DUAL +5V_SYS +5V_SYS +5V_DUAL
美
+3D3V_DUAL +3D3V_SYS +3D3V_SYS +3D3V_DUAL
+1D8V_STR +1D8V_STR
VTT_DDR
VTT_DDR
VTT_VR VTT_VR
Vcc Vcc
1ms to 10ms
Vcc_PWRGD
Vcc_PWRGD
VRM_OUTEN
商
VRM_OUTEN
VIDPWRGD VIDPWRGD PS_ONJ
C
PS_ONJ C
S0->S3 S3->S0
匯
+12V_SYS +12V_SYS
+5V_SYS +5V_DUAL +5V_DUAL +5V_SYS
+3D3V_SYS +3D3V_DUAL +3D3V_DUAL +3D3V_SYS

B B
+1D8V_STR +1D8V_STR +1D8V_STR +1D8V_STR
VTT_DDR
VTT_DDR
VTT_VR VTT_VR
Vcc Vcc
1ms to 10ms
Vcc_PWRGD
Vcc_PWRGD
VRM_OUTEN
VRM_OUTEN
VIDPWRGD PS_ONJ VIDPWRGD
PS_ONJ
A A
FOXCONN PCEG
Title
Power Sequence
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
3D3V_SYS 3D3V_SYS
3D3V_CLK_SATA
FB16 0 Dummy
FB17 Dummy
0 3D3V_CLK +/-5%
+/-5% CP2 3D3V_CLK_SATA
4.7uFC114
0.1uFC119
16V, X7R, +/-10%
6.3V, X5R, +/-10%
CP3 3D3V_CLK X_COPPER
4.7uFC118
0.1uFC145
0.1uFC162
0.1uFC120
0.1uFC123
0.1uFC150
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%

6.3V, X5R, +/-10%
1
Dummy X_COPPER * *
1
* * * * * *
2
3D3V_CLK_48M
2
3D3V_SYS
3D3V_CLK_REF
FB18 Dummy
0
D D
3D3V_CLK_48M +/-5%
0.1uFC148
CP7 3D3V_CLK_REF
16V, X7R, +/-10%
0.1uFC133
16V, X7R, +/-10%
Dummy X_COPPER
1
* C157
美
1
1
* 4.7uF
6.3V, X5R, +/-10% *
2
3D3V_CLK
* R120
4.7K
+/-5% U37
*
+/-5% 33R111 1 64
22 CK_14M_ICH *REF0/GSEL GND64
4.7K +/-5% R121 2 63 X1
**DOC_0 X1
*
3 62 X2
**DOC_1 X2
36 CK_33M_PCI2 CK_33M_PCI2
*1 RN12
2 33 4
5
GND4 VDDREF 61
60
3D3V_CLK_REF
3D3V_CLK
CK_33M_SIO 3 4 +/-5% PCICLK0_2X VDD CP10 X_COPPER
30 CK_33M_SIO 5 6 6 **SEL_STOP/PCICLK1_2X SDATA 59 SMB_DATA_MAIN 18,19,20,22,27,31,36
商
CK_33M_PCI1 7 58 CP11 X_COPPER
36 CK_33M_PCI1 7 8 PCICLK2_2X SCLK SMB_CLK_MAIN 18,19,20,22,27,31,36
ICS_FSBSEL2 8 57
** **
ICS_FSBSEL1 FSLC/PCICLK3_2X GND57 R731 33 Ohm +/-1%
9 FSLB/PCICLK4_2X CPUT_L0*** 56 CK_200M_P_CPU 12
3D3V_CLK 10 55 R732 33 Ohm +/-1%
VDDPCI CPUC_L0*** CK_200M_N_CPU 12
C
30 CK_33M_TPM
24 CK_33M_ICH
CK_33M_TPM
CK_33M_ICH
*1 RN47
2 33 11
12
PCICLK5_2X VDDCPU 54
53
3D3V_CLK
R733 33 Ohm +/-1%
CK_200M_P_GMCH 14 C
CK_48M_ICH 3 4 +/-5% PCICLK6_2X CPUT_L1F*** R734 33 Ohm +/-1%
22 CK_48M_ICH 5 6 3D3V_CLK_48M 13 VDD48 CPUC_L1F*** 52 CK_200M_N_GMCH 14
CK_48M_SIO ICS_FSBSEL0 14 51
ICS9LPRS916
30 CK_48M_SIO ICH_SYS_RSTJ 8,12,22
*
R118 4.7K 7
+/-5% 8 FSLA/USB_48 RESET_IN#/RESET# R112 4.7K +/-5%
15 *SEL24_48#/24_48Mhz RLATCH** 50 3D3V_CLK
*
16 GND16 GNDA 49
96M_P_GMCH 17 48
14 CK_96M_P_GMCH DOT96T_LR/PCIeT_LR0 24.576Mhz
96M_N_GMCH 18 47 3D3V_CLK
14 CK_96M_N_GMCH DOT96C_LR/PCIeC_LR0 VDDA
19 46 X1
SATA_100M_P_ICH GND19 GND46
23 CK_SATA_100M_P_ICH 20 SATACLKT_LR 25Mhz 45
SATA_100M_N_ICH 21 44 3D3V_CLK X2
23 CK_SATA_100M_N_ICH SATACLKC_LR VDD
3D3V_CLK_SATA 22 VDDSATA GND43 43
23 42 X3
VRMPWRGD GND23 PCIeT_LR6/CPU_STOP#*
24 Vtt_PwrGd#/WOL_STOP# PCIeC_LR6/CPU_STOP#* 41 2 1
28 CK_PE_100M_P_LAN 25 PCIeT_LR0 VDD 40 3D3V_CLK
28 CK_PE_100M_N_LAN 26 39 C117 C116
PCIeC_LR0 GND39 PE_100M_P_GMCH XTAL-14.318MHz27pF
3D3V_CLK
27
28
GND27
VDD
PCIeT_LR5
PCIeC_LR5
38
37 PE_100M_N_GMCH
CK_PE_100M_P_GMCH 14
CK_PE_100M_N_GMCH 14
27pF
+/-5% * +/-5% *
PE_100M_P_16PORT 29 36 PE_100M_P_ICH CK_PE_100M_P_ICH 22
20 CK_PE_100M_P_16PORT PE_100M_N_16PORT PCIeT_LR1 PCIeT_LR4 PE_100M_N_ICH
20 CK_PE_100M_N_16PORT 30 PCIeC_LR1 PCIeC_LR4 35 CK_PE_100M_N_ICH 22
14 DPL_REFSSCLKIN_P 31 PCIeT_LR2 PCIeT_LR3 34 CK_PE_100M_P_1PORT 27
14 DPL_REFSSCLKIN_N 32 PCIeC_LR2 PCIeC_LR3 33 CK_PE_100M_N_1PORT 27 3D3V_CLK
匯
ICS9LPRS916JGLF-T
*R127
8.2K
+/-5%
VRMPWRGD VRMPWRGD 9,22
FSB_VTT
B B
RN15
*1 2 FSBSEL0
FSBSEL0 12,14
3 4 FSBSEL2
5 6 FSBSEL2 12,14
FSBSEL1
7 8 FSBSEL1 12,14
470
+/-5%
RN14
ICS_FSBSEL0 FSBSEL0
CK_33M_PCI1 ICS_FSBSEL1 8 7 FSBSEL1
ICS_FSBSEL2 6 5 FSBSEL2
CK_33M_PCI2 4 3 *
2 1
CK_48M_SIO
2.2K Ohm
CK_48M_ICH +/-5%
CK_33M_SIO
CK_33M_ICH
CK_14M_ICH
CK_33M_TPM
50V, NPO, +/-5%
50V, NPO, +/-5%
50V, NPO, +/-5%
50V, NPO, +/-5%
C134 C122
50V, NPO, +/-5%
50V, NPO, +/-5%
50V, NPO, +/-5%
* 10pF
Dummy * 10pF
Dummy *
C149
10pF
*
C146
22pF
*
C125
10pF
*
C132
10pF
*
C127
10pF
*
C126
10pF
50V, NPO, +/-5%
Dummy Dummy Dummy Dummy Dummy
Dummy
A BSEL TABLE A
FS_C FS_B FS_A FSB Frequency

0 0 1 133MHz(533)
0 1 0 200MHz(800)
0 0 0 266MHz(1066)
FOXCONN PCEG
1 0 0 333MHz(1333)
Title
1 1 0 400MHz(1600) CLOCKGEN
1 1 0 400MHz(1600) C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
3D3V_SYS 3D3V_SYS 5V_SYS 5V_SB -12V_SYS 12V_SYS
25V, X7R, +/-10%
25V, X7R, +/-10%

C476 C481 C332 C464
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
1
0.1uF 0.1uF 0.1uF 0.1uF
5V_SB -12V_SYS 3D3V_SYS 3D3V_SYS 12V_SYS 5V_SB * * * * * C488 * C473
0.1uF Dummy
0.1uF
2
5V_SYS Dummy
5V_SYS
*R375
4.7K 13 +3.3V3 +3.3V1
PWR1
1 5V_SYS
D +/-5% 14 2 D
-12V +3.3V2
30 PS_ONJ
15
16
GND4
PSON
GND1
+5V1
3
4 *R374
4.7K
place at power connecter
17 5 +/-5%
美
C466 GND5 GND2
18 GND6 +5V2 6
0.1uF
* 16V, Y5V, +80%/-20%
19
20
GND7 GND3
RSVD PWR0K
7
8 PWRG_ATX
PWRG_ATX 11,30
21 9 C463
+5V3 +5V_AUX 0.1uF
22
23
+5V4
+5V5
+12V_1
+12V_2
10
11
* 16V, Y5V, +80%/-20%
24 GND8 +3.3V4 12
Dummy
Header_2x12
5V_SYS 3D3V_SB 5V_SYS 5V_SB
商
R391 R393 3D3V_SYS 3D3V_SYS 3D3V_SYS 12V_SYS
330 10K R390
*R378
16V, Y5V, +80%/-20%

C * C
25V, X7R, +/-10%
25V, X7R, +/-10%

+-5% +/-5% 330 4.7K C455
16V, Y5V, +80%/-20%

+-5% +/-5% C452 C454 C465
1
0.1uF 10nF 0.1uF 0.1uF
1
FP1
2
* * * *
HDD_LEDJ 3 4 Dummy
23 HDD_LEDJ
2
5 6 PBTNJ_SIO
PBTNJ_SIO 30
7,12,22 ICH_SYS_RSTJ 7 8
9 X C487 C471
220pF 220pF
Header_2X5_K10 * Dummy * Dummy 5V_SYS
C490 C492 5V_SYS 5V_SYS 1D1V_MCH
220pF 220pF
* *
50V, NPO, +/-5%50V, NPO, +/-5% C462 C240
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

C97 C350 0.1uF C347 0.1uF
* *
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

Dummy Dummy 3D3V_SYS 0.1uF 0.1uF 0.1uF
* * *
匯
R387
* 10K
+/-5%
C
Front Panel Switch/LED
*
Q49 B R388 1K PWR_LED 30
MMBT3904-7-F +/-1%
HD_LED+ 1 2 Power
E
HD_LED- 3 4 Power LED(Green)
B
GND 5 6 Power button Change to 5% or not
B
Reset button 7 8 Power
NC 9 10 Key
SPEAKER HEADER
SPEAKER
1 1
5V_SYS
3 3
4 4
5V_SYS RN45
*1 2
Header_1X4_K2
@SPEAKER
3 4 BUZ
5 6
7 8 +
*R358
4.7K 100 Ohm BUZZER
+/-5% +/-5% -
Buzzer
Q47
C
25V, X7R, +/-10%
1 C472 @Buzzer
22 SPKR
*
3 R367 2.2K B Q46

1
+/-5% MMBT3904-7-F 0.1uF

30 SIO_BEEP 2
*
E
A A
2
BAT54C
FOXCONN PCEG
Title
Power/MISC Connectors
Custom G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
5V_SYS 12V_VRM
VCCP
3D3V_SYS VTT_OUT_RIGHT 12V_VIN
Dummy PR4 *PR7 12V_VCCP
PC111 0.1uF 2.2 1
*
16V, X7R, +/-10% PD1
*
1
PR6
Dummy
680 PC5 PC6
A C
* C89
4.7uF
D
PR5
* PC4
*
1uF
* 10uF BAT54HT1G 16V, Y5V, +80%/-20%
2
D
*
Dummy
PC7
2KOhm
+/-1% * 0.1uF +/-10%
16V, X7R, +/-10% c0603h9
+/-10%
c1206h18
R85 2.2
+/-5% R87
Q9
D
0.1uF 10KOhm G VCCP
16V, Y5V, +80%/-20% PR63 2.2 +/-1% AOD452AL 300nH@100KHz
24
40
U12 r0805h6 PC8 2 L141
*
*220nF
VCC
VCCP
34 37 BST1 +/-10% R81
D
7,22 VRMPWRGD
美
VR_RDY BST1 c0603h9 2.2
12 VRM_EN 33 EN
1
VID0 3 38 TG1 Q12 Q14 r0805h6
12 VID0 VID0 TG1
PCP1
PCP2
VID1 4 39 SWN1
12 VID1 VID1 SWN1
VID2 5 36 BG1 G G
12 VID2 VID2 BG1
VID3
12 VID3 6 AOD472AL AOD472AL
* C104
CS1 2
CS1N 2
VID4 VID3 CS1N Dummy 2.2nF
12 VID4 7 32
S
*
*
VID5 VID4 CS1N PR10 0 PR11 100KOhm c0603h9
12 VID5 8 VID5 CS1P 31
VID6 9 +/-1% 50V, X7R, +/-10%
12 VID6 VID6
VID7 10 PR13
12 VID7
*
*
PR12 0 PSI_N_IN VID7 CS1 2.49K PC12 220nF 12V_VIN
2 Close to L/S MOS
*
13 P_PSI_N PSI
Dummy 16 PR15 +/-1% +/-10%
PR8 PR14 PC14 DIFFOUT 2.2 PD2 c0603h9
*
12 PC11 4.12K 1.8nF COMP 17 44 BST2 C A 12V_VCCP

*
COMP BST2
1
+/-1% 680pF
50V, X7R, +/-10%
+/-1%
50V, X7R, +/-10% r0805h6 * PC13
220nF BAT54HT1G * C90
4.7uF
VCORE OUTPUT
D
*
PR16 +/-10% 16V, Y5V, +80%/-20% MLCC CAP
2
*
1K +/-1% PC17 22pF 43 TG2 c0603h9 R84 2.2 Q10

*
50V, NPO, +/-5% VFB TG2 SWN2 +/-5% R86

5V_SYS 18 VFB SWN2 42
Dummy PR19 41 BG2 10KOhm G
**
PR17 BG2
100KOhm *PR21
240KOhm
Dummy
2.7K
+/-1%
19 DROOP
30 CS2N Dummy
+/-1% AOD452AL 300nH@100KHz
2 L151
S
*
*
CS2N
*
+/-1% +/-1% PR22 820 29 PR23 0 PR24 100KOhm
+/-1% CS2P +/-1% PR26
D
* PR25 2.2
1
T PRT1
*PR27 * PC23 CS2 2.49K PC20 220nF Q13 Q15 r0805h6
PCP3
PCP4
4.7K 22pF PR28 +/-1% +/-10%
r0603h10 1K 50V, NPO, +/-5% 2.2 PD3 c0603h9 G G
BST3
+/-1% 48 C A 12V_VCCP AOD472AL AOD472AL
* PC27
CS2 2
CS2N 2
BST3
* PC24 2.2nF
S
*
Close to PL1 PR29 820 20 r0805h6 220nF BAT54HT1G c0603h9

+/-1% VDFB +/-10% 50V, X7R, +/-10%
商
PR30 47 TG3 c0603h9
*
910 Ohm 21 TG3 SWN3 12V_VIN

CSSUM SWN3 46 Close to L/S MOS
+/-1% 1 BG3
BG3
*PR31 28 CS3N * Dummy
*
CS3N
1
750 27 PR32 0 PR33 100KOhm
* C131
D
C VCCP +/-1% CS3P +/-1% 4.7uF C
PC33 10nF 22 PR35 Q17 16V, Y5V, +80%/-20%
2
*
*
DAC
50V, X7R, +/-10% CS3 2.49K PC36 220nF R131 2.2
*
+/-1% +/-10% +/-5% R132 G
*PR36 c0603h9 10KOhm AOD452AL
*
51 Ohm 35 G4 PR61 0 +/-1% 300nH@100KHz
S
PR38 Dummy G4 L201
45 2
*
DRVON
*
0 PC39 14
12 VCC_SENSE VSP
*
10nF 26 PR39
D
25V, X7R, +/-10% CS4N 2.2
CS4P 25
1
15 Q20 Q21 r0805h6
12 VSS_SENSE VSN
PCP5
PCP6
Dummy Dummy
*PR40 * PC136
0.1uF *
PC54
0.1uF
G G
AOD472AL AOD472AL
* PC46
CS3 2
CS3N 2
PAD_GND
51 Ohm 16V, X7R, +/-10% 16V, X7R, +/-10% 2.2nF
S
12VMON
>300us FILTER c0603h9

ROSC
13 50V, X7R, +/-10%

ILIM
IMON
PR41
Dummy Close to L/S MOS
NCP5395TMNR2G 330Ohm
12
11
23
49
Fsw= 280kHz +/-1%
OCP ~170A PC48
12V_VRM * 1uF
*PR42 +/-10%
Dummy
匯
20K c0603h9
+/-1%
*PR43 *PR72
10K
10K +/-1%
+/-1% BOTTOM PAD
CONNECT TO
*PR62
1K
*
PC183
10nF
GND Through
8 VIAs
+/-1% 25V, X7R, +/-10%
change to 0 ohm
1
* L13 Input LC circuit

B 12V_VRM Choke 1uH B
12V_VIN
PWR2
5V_SYS
2
2
4
*
PR64 VFB C103 C105 C124 C92 C102 EC17 EC18 EC16 EC21
0.1uF* * * *
*PR65 51KOhm
* 100nF
* 0.1uF
* 0.1uF
* *
0.1uF 1000uF 1000uF 1000uF 1000uF
1
9.09KOhm
+/-1% * PC52 +/-1%
150pF
25V, X5R,+/-10%
Dummy
Dummy +/-20% +/-20% +/-20% +/-20%
C
50V, NPO, +/-5%

2
B
PQ12 Header_2X2
MMBT3904-7-F
E
PR54 PC51 PC53 COMP

*
*
1K
+/-1% * 0.1uF 33nF
16V, Y5V, +80%/-20%+/-10%
*PR66
33KOhm
+/-1%
VCCP
5V_SYS Q28
5V_SYS EC33 EC28 EC24 EC25
1
1
5 VCC
IO 1 P_PSI_N
P_PSI_N 13 * 820uF *820uF
+/-20% Dummy
+/-20%
* 820uF
+/-20%
* 820uF
+/-20% * 22uF *
C228
Dummy 22uF *
C214
Dummy
C226
10uF * C216
10uF * 22uF *
C215
Dummy
C229
22uF
Dummy
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
+/-10%
+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
2
2
*R279 *R275 * C318
0.1uF
1K 1K 16V, Y5V, +80%/-20%
OI 2 PSI_N_IN
4 C EC26 EC27 EC34
* 820uF
+/-20%
* 820uF
+/-20%
* 820uF
+/-20%
C
MMBT3904-7-F 3
R277 5.1KOhm
+/-1% Q33 Q30 GND
12,14 HCPURSTJ B B
1
C322
74V1G66CTR
5V_SYS * C221
10uF * C209
10uF * C207
22uF Dummy
Dummy 22uF Dummy *
22uF Dummy
C224
22uF * C208
* C225
E
A A
+/-10%
+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
* 10uF MMBT3904-7-F
2
10V, Y5V, +80%/-20%

*
R273 1K
C
B Q27 Q29 B R278 1K HCPURSTJ

E
MMBT3904-7-F MMBT3904-7-F
1
*
TC25
100uF *
TC26
100uF * C191
10uF * C219
22uF
Dummy * C231
10uF * C194
10uF * 22uF
Dummy
C220
* C195
10uF
FOXCONN PCEG
+/-10%
6.3V,X5R,+/-10%
+/-10%
+/-10%
6.3V,X5R,+/-10%
+/-10%
2V,+30/-20% 2V,+30/-20%
2
Dummy Dummy Title

VRD11.1-NCP5395
Custom G41M05 D

5 4 3 2 1
亞
5 4 3 2 1
12V_SYS
C342
D13
A C 1 2 1125V_PHASE * L31
*
*
12V_SYS R285 10 LS4148-F 1uH@1KHz
+/-5% 0.1uF
25V, X7R, +/-10%
close to Q61 Drain

C326 1uF 16V, X7R, +/-10%
*
R291 C316 EC37
14.3K
* 0.1uF * 270uF
D
5
D D
+/-1% U15 25V, X7R, +/-10% 16V, +/-20%
1 R227 Q25
VCC
Rocset BOOT 2.2
+/-5%
7 COMP/OCSET UGATE 2
*R225
10K
G
AOD452AL 1D1V_MCH
美
L28 Need to change to RUBYCON
+/-5%
*
S
6 8 1125V_PHASE 16MBZ470MEFC8X11.5 1D1V_MCH
FB PHASE
GND
LGATE 4
Near MOSFET R257 2.5uH@100KHz
D
APW7120KE-TRL 2.2
1
* R290
115 Ohm
Q24 +/-5%
*
C273
0.1uF *
EC35
1000uF *
EC36
1000uF * C265
10uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

10V, Y5V, +80%/-20%
2.2uF C417
2.2uF C419
1uF C259
1uF C262
G C308 +/-20% +/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%

+/-1% 16V, Y5V, +80%/-20%
2
1
1
AOD472AL
* 2.2nF
50V, X7R, +/-10% * * * *
2
VOUT= 0.8V(1+R638 / R658)
R638,R658 must less than 1k
R282 Pull FB trace out after Cout
*
47 Ohm
+/-1%
R286 C330
*
220 18nF
+/-1% 50V, X7R, +/-10%
商
Dummy Dummy
1D125V FOR CHIP
C C
12V_SYS
3D3V_SB
1D5V_STR
50 mils Q36
1
* R359
1.8KOhm * C449
0.1uF Dummy 2 1D1V_MCH
+/-1% FSB_VTT 3
2
25V, X7R, +/-10% 1 1D5V_CORE

D
1D5V_CORE
4
Q41 12V_SYS
匯
BAT54A
@1.5V 1D5V_REF 3 +
U18A
2
1 G
P3055LDG 1A
-
LM324DR2G 50 mils
S
R353
11
*R360 C447 1K
Dummy
4
*
1.5KOhm
+/-1%
0.1uF
16V, Y5V, +80%/-20%
+/-5%
12 +
U18D
Can change to 0402 or not EC41 C441 14
* 1000uF
+/-20% * 0.1uF
16V, Y5V, +80%/-20%
Dummy
13 -
LM324DR2G
11
B B
Reserved
1D5V_SYS
3D3V_SB
3D3V_SB 12V_SYS
1D5V_STR *R365
2.2KOhm
1D5V_STR
+/-1% 50 mils
50 mils
D
3D3V_SB 12V_SYS
*R370 FSB_VTT 1D05V_SYS
4
21KOhm Q34
+/-1% @1.05V 1.8V 5 U18B
+
R361
* 7 G 1A
D
1K 6 P3055LDG
-
4
+/-5% Q18 LM324DR2G 50 mils
S
VREF1D2 @1.2V 10 U18C R329
11
*
+
1D5V_CORE 8 G R366 C450 1K
Dummy
Q38
2N7002
9 -
LM324DR2G P3055LDG 1.02KOhm
+/-1% * 0.1uF
16V, Y5V, +80%/-20%
+/-5%
S
Can change to 0402 or not

*R355 R133 EC40
11
470
*R369 C451 1K
Dummy * 1000uF
* C460
+/-5%
*
12KOhm 1uF +/-5%
6.3A 50 mils +/-20% 10uF
C
+/-1% 10V, Y5V, +80%/-20%

Q42 Can change to 0402 or not EC30 C153 C160 10V, Y5V, +80%/-20%
B
C432
MMBT3904-7-F
* 1000uF
+/-20% * 10uF
*
10V, Y5V,
0.1uF
+80%/-20%
Dummy16V, Y5V, +80%/-20%
Dummy
E
A
* 1uF
10V, Y5V, +80%/-20% Dummy A
1D05V_SYS
FSB_VTT FSB_VTT
C158 C155 FOXCONN PCEG

FSB_VTT * 0.1uF
16V, Y5V, +80%/-20% * 0.1uF
16V, Y5V, +80%/-20% Title
1D125V 1D5V FSB
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
DDR_VTT
5V_SB 12V_SYS
D D
5V_DUAL
D18 D20 C461
1 1
3 1D8V_Switch 3 1 2 18V_PHASE * L35
1.8V Voltage
*
2 2
美
1uH@1KHz
*
R392 10 0.1uF
BAT54C BAT54C
1.8V Power requires
+/-5% 25V, X7R, +/-10%
17A maximum current
close to Q61 Drain
C491
*
1uF
*R381 16V, X7R, +/-10% EC43
1
14.3KOhm
* C446 * 470uF
* C391
5
+/-1% U19 Q40 0.1uF 6.3V, +/-20% 10uF
1 R337
VCC
2
Rocset BOOT 2.2 25V, X7R, +/-10% 10V, Y5V, +80%/-20%
G
5V_SB 7 2 +/-5% R344 AOD452AL 1D5V_STR 3D3V_SYS
COMP/OCSET UGATE *
10K
L36
1D5V_STR
S
+/-5%
*
R364 6 8 18V_PHASE
* 10K FB PHASE
GND
+/-5% 2N7002DW 2.5uH@100KHz
LGATE 4
1 4 R362 U17 VTT_DDR
D
S1 S2 R386 2.2 C445 EC32 EC44 EC45 EC39 EC52
2 5 APW7120KE-TRL 1 8
15,22 SLP_S4J *
3
G1 G2 VIN VCNTL
6 D1 D2 3 210Ohm
+/-1%
Q43 +/-5%
*
Dummy
0.1uF * 1000uF
+/-20%
* 1000uF * 1000uF
+/-20%
* 1000uF
+/-20%
* 1000uF
+/-20% R357 VCNTL 7
6
*
16V, Y5V, +80%/-20%

Q48 C453 +/-20% 100KOhm VCNTL
G VCNTL 5
1
Don't in CIS
AOD472AL
* 2.2nF
50V, X7R, +/-10%
+/-1%
4
S
VOUT
16V, Y5V, +80%/-20%

Near MOSFET
2
3 REFEN GND 2
商
VOUT= 0.8V(1+R638 / R658) RT9173 C411 EC42
R638,R658 must less than 1k
*R356 C426
* 0.1uF * 1000uF
R377
226Ohm
Pull FB trace out after Cout 100KOhm
+/-1% * 0.1uF
16V, Y5V, +80%/-20%
+/-20%
C +/-1% C
R385
*
220 Ohm
Dummy C475Dummy
18nF
*
+/-1% 50V, X7R, +/-10% Need to Check Change to Dummy
*R373
442 Ohm
R372
1.02KOhm
+/-1% +/-1%
Dummy Dummy
22 1D8V_GPIO10
22 1D8V_GPIO14
1D8V_STR
匯
5V_SB
Q44
3D3V_SB
B B
Vin 3
EC46
* 1000uF
+/-20% Vout 2 Max. output current = 3A
D29
1 32 NRIB 1
ADJ
3
AZ1084D-ADJTRE1 *R379
301 32 NRIA
2
PWOK+
3D3VADJ
+/-1%
BAT54C Ring 25 PWOK+
EC48 RN44 ICH_RIJ_PU

* 1000uF 915 series failure issue
*1 2
ICH_RIJ_PU 22
*R380 +/-20%
C
499 3 4
+/-1% 5 6 ICH_RIJ_PU D17 2N7002DW
3D3V_SB 7 8 5V_SYS
LS4148-F 1 4
10K Ohm S1 S2
2 G1 G2 5
+/-5% 6 3
A
D1 D2 EC49
Q39
* 1000uF
+/-20%
S
PWOK+ G Q50
PWOKJ
5V_SB AOD452AL 5V_DUAL
Vout=Vref(1+R2/R1)+IadjR2
D
2N7002DW
R1 is Up Resistor. PWRG_ATX
4 S2 S1 1
L
8,30 PWRG_ATX 5 G2 G1 2
1
Iadj=50uA 3 D2 D1 6
H
* C486
10uF
S
Vref=1.25V Q45
2
5V_SB PWOK- G 10V, Y5V, +80%/-20%
AP3310H
RN46 Q51
A
*1 2
PWOKJ
PWOK-
A
3D3V_DUAL
D
3 4
5 6 PWOK+
12V_SYS 7 8
10K Ohm
+/-5%
FOXCONN PCEG
Title
5V_DUAL Size
STR 1D8V 3D3V_DUAL 5V_DUAL
Document Number Rev
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
HAJ[35..3]
14 HAJ[35..3]
HDJ[63..0]
HDJ[63..0] 14 U11A
HAJ3 L5 D2 3 OF 7
HAJ4 A03# ADS# HADSJ 14 U11C
P6 A04# BNR# C2 HBNRJ 14
2 OF 7 HAJ5 M5 D4 P2 F26 TESTHI_0
U11B A05# HIT# HITJ 14 23 SMIJ SMI# TESTHI00
HAJ6 L4 H4 TP_RSPJ K3 W3 TESTHI_1
A06# RSP# TP16 23 A20MJ A20M# TESTHI01
HAJ7 M4 G8 R3 P1 DPSLP#
A07# BPRI# HBPRIJ 14 23 FERRJ FERR#/PBE# TESTHI11
HDJ0 B4 G16 HDJ32 HAJ8 R4 B2 K1 W2 TESTHI_12
D00# D32# A08# DBSY# HDBSYJ 14 23 INTR LINT0 TESTHI12
HDJ1 C5 E15 HDJ33 HAJ9 T5 C1 L1 F25
D01# D33# A09# DRDY# HDRDYJ 14 23 NMI LINT1 TESTHI02
HDJ2 A4 E16 HDJ34 HAJ10 U6 E4 N2 G25
D02# D34# A10# HITM# HITMJ 14 23 IGNNEJ IGNNE# TESTHI03
HDJ3 C6 G18 HDJ35 HAJ11 T4 AB2 HIERRJ M3 G27
D03# D35# A11# IERR# 23 STPCLKJ STPCLK# TESTHI04 FSB_VTT
HDJ4 A5 G17 HDJ36 HAJ12 U5 P3 G26
HDJ5 D04# D36# HDJ37 HAJ13 A12# INIT# INITJ 23 HVCCA TESTHI05
D
B6 D05# D37# F17 U4 A13# LOCK# C3 HLOCKJ 14 13 HVCCA A23 VCCA TESTHI06 G24 D
HDJ6 B7 F18 HDJ38 HAJ14 V5 E3 HVSSA B23 F24 TESTHI_2_7
D06# D38# A14# TRDY# HTRDYJ 14 13 HVSSA VSSA TESTHI07
HDJ7 A7 E18 HDJ39 HAJ15 V4 AD3 TP_BINITJ VCC_PLL D23 AK6 FORCEPHJ R254
D07# D39# A15# BINIT# TP19 RSVD5 FORCEPH *
HDJ8 A10 E19 HDJ40 HAJ16 W5 G7 HVCCPLL C23 G6 51 Ohm
D08# D40# A16# DEFER# HDEFERJ 14 13 HVCCPLL VCCIOPLL RSVD11
HDJ9 A11 F20 HDJ41 N4 F2 HGTLREF_1_2 +/-5%
HDJ10 D09# D41# HDJ42 RSVD1 EDRDY# TP_MCERRJ CPU_SLPJ
B10 E21 P5 AB3 L2
美
D10# D42# 14 HREQJ[4..0] RSVD2 MCERR# TP20 TESTHI13
HDJ11 C11 F21 HDJ43 HREQJ0 K4 VID0 AM2 AH2
D11# D43# REQ0# 9 VID0 VID0 RSVD12
HDJ12 D8 G21 HDJ44 HREQJ1 J5 U2 TP_APJ0 VID1 AL5 N1
D12# D44# REQ1# AP0# TP17 9 VID1 VID1 PWRGOOD CPU_PWRG 22
HDJ13 B12 E22 HDJ45 HREQJ2 M6 U3 TP_APJ1 VID2 AM3 AL2 PROCHOTJ
D13# D45# REQ2# AP1# TP21 9 VID2 VID2 PROCHOT#
HDJ14 C12 D22 HDJ46 HREQJ3 K6 VID3 AL6 M2
D14# D46# REQ3# 9 VID3 VID3 THERMTRIP# THERMTRIPJ 23
HDJ15 D11 G22 HDJ47 HREQJ4 J6 F3 HBR0J VID4 AK4
D15# D47# HAJ[35..3] REQ4# BR0# HBR0J 14 9 VID4 VID4
HDBIJ0 A8 D19 HDBIJ2 R6 G3 TESTHI_8 VID5 AL4
14 HDBIJ0 DBI0# DBI2# HDBIJ2 14 14 HAJ[35..3] 14 HADSTBJ0 ADSTB0# TESTHI08 9 VID5 VID5
C8 G20 G5 G4 TESTHI_9 VID6 AM5 A13 HCOMP0 FSB_VTT
14 HDSTBNJ0 DSTBN0# DSTBN2# HDSTBNJ2 14 30 PECI PCREQ# TESTHI09 9 VID6 FC11 COMP0
B9 G19 H5 TESTHI_10 VID7 AM7 T1 HCOMP1
14 HDSTBPJ0 DSTBP0# DSTBP2# HDSTBPJ2 14 TESTHI10 9 VID7 FC12 COMP1
HAJ17 AB6 VID_SELECT AN7 G2 HCOMP2
HDJ16 G9 D16# D48# D20 HDJ48 HAJ18 W6
A17#
A18# DP0# J16 TP_DPJ0
TP10 7 CK_200M_P_CPU F28
FC16
BCLK0
COMP2
COMP3 R1 HCOMP3 * R242
HDJ17 F8 D17 HDJ49 HAJ19 Y6 H15 TP_DPJ1 G28 J2 HCOMP4 49.9
D17# D49# A19# DP1# TP7 7 CK_200M_N_CPU BCLK1 COMP4
HDJ18 F9 A14 HDJ50 HAJ20 Y4 H16 TP_DPJ2 T2 DPRSTP# +/-1%
D18# D50# 4 mils width, 10 mils spacing A20# DP2# TP6 COMP5
HDJ19 E9 C15 HDJ51 HAJ21 AA4 J17 TP_DPJ3 AE8
D19# D51# A21# DP3# TP5 TP15 SKTOCC#
HDJ20 D7 C14 HDJ52 HAJ22 AD6 N5
HDJ21 D20# D52# HDJ53 HAJ23 A22# HGTLREF_1_2 RSVD13
E10 D21# D53# B15 AA5 A23# GTLREF1 H2 RSVD14 AE6
HDJ22 D10 C18 HDJ54 HAJ24 AB5 H1 HGTLREF_0_3 AL1 C9 H_TEST
D22# D54# A24# GTLREF0 30 THERMDA THERMDA RSVD15
HDJ23 F11 B16 HDJ55 HAJ25 AC5 E24 AK1 G10 HGTLREF_0_3
D23# D55# A25# CS_GTLREF TP4 30 THERMDC THERMDC RSVD16
HDJ24 F12 A17 HDJ56 HAJ26 AB4 D16
HDJ25 D24# D56# HDJ57 HAJ27 A26# RSVD17
D13 D25# D57# B18 AF5 A27# AN3 VCCSENSE RSVD18 A20
HDJ26 E13 C21 HDJ58 HAJ28 AF4 G23 AN4 E23
HDJ27 D26# D58# HDJ59 HAJ29 A28# RESET# HCPURSTJ 9,14 VSSSENSE RSVD19
G13 D27# D59# B21 AG6 A29# 9 VCC_SENSE AN5 VCC_MB_REG RSVD21 F23
HDJ28 F14 B19 HDJ60 HAJ30 AG4 B3 AN6 J3
D28# D60# A30# RS0# HRSJ0 14 9 VSS_SENSE VSS_MB_REG RSVD24
HDJ29 G14 A19 HDJ61 HAJ31 AG5 F5
HDJ30 D29# D61# HDJ62 HAJ32 A31# RS1# HRSJ1 14 Changed pin name MS_ID1
F15 D30# D62# A22 AH4 A32# RS2# A3 HRSJ2 14 MSID1 V1
HDJ31 G15 D31# D63# B22 HDJ63 HAJ33 AH5 A33# F29 from RSV
RSVD9 MSID0 W1 MS_ID0
HDBIJ1 G11 C20 HDBIJ3 HAJ34 AJ5
14 HDBIJ1 DBI1# DBI3# HDBIJ3 14 A34#
G12 A16 HAJ35 AJ6
14 HDSTBNJ1 DSTBN1# DSTBN3# HDSTBNJ3 14 A35#
商
E12 C17 AC4 THERMDA/THERMDC Y1 CPU_BOOT
14 HDSTBPJ1 DSTBP1# DSTBP3# HDSTBPJ3 14 RSVD3 1. width=10 mils, spacing=10 mils. BOOTSELECT
AE4 V2 TP_CPU_V2 R237
RSVD4 2. route the lines in parallel LL_ID0 TP23
AD5 AA2 TP_CPU_AA2 51 Ohm
14 HADSTBJ1 ADSTB1# LL_ID1 TP22 *
Socket-IntelPrescottCPU +/-5%
Socket-IntelPrescottCPU
C 1 OF 7 C
Socket-IntelPrescottCPU
* *
R238 62 HTCK
VTT_OUT_RIGHT +/-5%
R239 62 HTRSTJ
*
R250 62 HTDO +/-5%
VTT_OUT_LEFT VTT_OUT_RIGHT +/-5% Dummy
VTT_OUT_RIGHT
In Design Guide is NC
Place at CPU end of route RN29 VID6
*
R255 62 +/-5% HBR0J 7 8 680 VID1 U11D 4 OF 7 FSB_VTT

5 6 +/-5% VID3 HTCK
3 4 AE1 TCK VTT1 A29
Place at CPU end of route * VID7 HTDI AD1 B25
1 2 RN24 HBPM2J HTDO TDI VTT2
7 8 AF1 TDO VTT3 B29
51 HBPM3J HTMS AC1 B30
RN25 VID0 5 6 +/-5% HTDI HTRSTJ TMS VTT4
AG1 C29
匯
RN31 TESTHI_9 7 8 680 VID2 * 3 4 HTMS TRST# VTT5
7 8 5 6 1 2 VTT6 A26
51 TESTHI_8 +/-5% VID5 B27
+/-5% 5 6 TESTHI_10 * 3 4 VID4 HBPM0J VTT7
3 4 1 2 AJ2 BPM0# VTT8 C28
* H_TEST RN28 HBPM1J HBPM1J AJ1 A25
1 2 7 8 51 HBPM0J HBPM2J BPM1# VTT9
5 6 AD2 BPM2# VTT10 A28
FSB_VTT +/-5% HBPM5J HBPM3J AG2 A27
3
* 4 HBPM4J HBPM4J BPM3# VTT11
1 2 AF2 BPM4# VTT12 C30
1D5V_CORE HBPM5J AG3 A30
RN30 TESTHI_12 Place BPM termination near CPU BPM5# VTT13
C25
* **
51 7 8 R253 51 Ohm +/-5% DPSLP# ICH_SYS_RSTJ AC2

VTT14
C26
7,8,22 ICH_SYS_RSTJ
+/-5% 5 6 DBR# VTT15
1
TESTHI_1 C27
3
* 4 R129 51 Ohm +/-5% TESTHI_0 #REFDE10 VTT16
1 2 AK3 ITPCLKOUT0 VTT17 B26
COPPER AJ3 ITPCLKOUT1 VTT18 D27
VTT_OUT_LEFT D28
*
2
R240 49.9 +/-1% HCOMP4 R128 51 Ohm +/-5% TESTHI_2_7 FSBSEL0 VTT19
B 7,14 FSBSEL0 G29 BSEL0 VTT20 D25 B
Dummy 10 mils width VCC_PLL FSBSEL1 H30 D26
7 mils spacing to low speed signals 7,14 FSBSEL1 FSBSEL2 BSEL1 VTT21
7,14 FSBSEL2 G30 BSEL2 VTT22 B28
14mils spacing to high speed signals VTT_OUT_RIGHT R235 C398 C399 D29
VTT23
1
max. 1200mils
* 51 Ohm
+/-5%
10uF
*
Dummy * 10nF
25V, X7R, +/-10%
Dummy
VTT24 D30
AM6 VTT_PWRGD
**
R249 49.9 +/-1% HCOMP2 10V, Y5V, +80%/-20% VTT_OUT_RIGHT VTT_OUT_LEFT VTTPWRGD
2
R264 130 +/-1% FORCEPHJ AA1 VTT_OUT_RIGHT VTT_OUT_RIGHT
R160 49.9 +/-1% HCOMP0 TP_CPU_G1 C297 C302 VTT_OUT1 VTT_OUT_LEFT
TP_CPU_G1 13 VTT_OUT2 J1 VTT_OUT_LEFT
PROCHOTJ
R281 130 +/-1%
reserve for Kentsfield CPU support placed near pin D23, within 500 mils * 0.1uF
* 0.1uF
VTT_SEL F27
10 mils width 16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
7 mils spacing to low speed signals Socket-IntelPrescottCPU
Dummy Dummy
14mils spacing to high speed signals VTT_OUT_RIGHT
max. 1200mils
* **
R246 62 +/-5% HIERRJ PROCHOTJ R280 0 +/-5%

**
R241 49.9 +/-1% HCOMP3 Dummy ICH_THRM_UP 22,30 VTT_OUT_RIGHT

R243 49.9 +/-1% HCOMP1 R276 62 +/-5% HCPURSTJ
Place at CPU end of route VTT_OUT_RIGHT 5V_SB
Stuff to enable Thermal event
*R283
1K
R269 680 Ohm +/-1% VID_SELECT +/-5%
R288 R295 VTT_PWRGD
*4.12K * 20K #REFDE27
+/-1% +/-1% Q32 2 1 VRM_EN VRM_EN 9
2N7002
*
* *
R287 100KOhm COPPER C319
C
+/-1% 2.2uF
C323 Dummy B Q31 6.3V, Y5V, +80%/-20%
MMBT3904-7-F
E
MS_ID1 2.2uF
VTT_OUT_RIGHT 6.3V, Y5V, +80%/-20%
MS_ID0 VTT_OUT_RIGHT
meet the 0.63Vtt value before
BIOS GPIO setting. This is a Intel spec.
*R256 GPIO26: Default low *R263
49.9
O.667*VTT
57.6 Ohm +/-1%
A R236 * *
R251
Dummy +/-1% GPIO13: Default input A
51 Ohm 51 Ohm
Dummy O.635*VTT
*
R259 10 Ohm HGTLREF_1_2
*
R233 10 Ohm HGTLREF_0_3 +/-1%

+/-1% C295
10V, Y5V, +80%/-20%
*R260 R261 C310

* *R258 * 220pF
C307
* *R252
100 Ohm
*
C296
220pF
576 Ohm
+/-1%
1.3KOhm
+/-1%
1uF
10V, Y5V, +80%/-20%
100 Ohm
+/-1%
50V, NPO, +/-5%
1uF +/-1% 50V, NPO, +/-5%

MSID0: NC = 2005 Mainstream / Value, 2006 65W FMB
Vss = 2005 Performance FMB
22 GTL_GPIO13 FOXCONN PCEG
MSID1: Vss = 2005 Performance,2005 Mainstream/Value,2006 65W FMB 22 GTL_GPIO26
Title
GTLREF voltage should be 0.63*VTT
12 mils width, 15 mils spacing LGA775-1
divider should be within 1.5" of the GTLREF pin Size Document Number Rev
0.22nF caps should be placed near CPU pin
place series resistor as close to divider
C G41M05 A
Date: Friday, October 23, 2009 Sheet 12 of 34

5 4 3 2 1
亞
5 4 3 2 1
VCCP
U11E
VCCP VCCP
U11F
U11G 7 OF 7 PLL Supply Filter
5 OF 7 6 OF 7
AG22 VCCP1 VCCP93 AK12 AF9 VCCP185 VSS41 AL23 H22 VSS126 VSS211 D5
K29 AH22 AF22 FSB_VTT
VCCP2 VCCP94 VCCP186 VSS42 A12 H21 VSS127 VSS212 A9
AM26 VCCP3 VCCP95 T29 AH11 VCCP187 VSS43 L25 H20 VSS128 VSS213 D3
AL8 VCCP4 VCCP96 AM14 AJ14 VCCP188 VSS44 J7 H19 VSS129 VSS214 B1
AE12 VCCP5 VCCP97 AM25 AH19 VCCP189 VSS45 AE28 H18 VSS130 VSS215 B5
AE11 VCCP6 VCCP98 AE9 AH29 VCCP190 VSS46 AE29 AB7 VSS131 VSS216 B8
1
W23 VCCP7 VCCP99 Y29 AH27 VCCP191 VSS47 K5 H17 VSS132 VSS217 AJ4
W24 AK25 AG28 L17 Dummy
VCCP8 VCCP100 VCCP192 VSS48 J4 AJ24 VSS133 VSS218 AE26
L0805 10uH
D W25 VCCP9 VCCP101 AK19 AL26 VCCP193 VSS49 AE30 AM17 VSS134 VSS219 AH1 D
T25 AG15 AM12 TP_CPU_E29
VCCP10 VCCP102 VCCP194 VSS50 AN20 AC3 VSS135 VSS220 E29 TP3
Y28 VCCP11 VCCP103 J22 J24 VCCP195 VSS51 AF10 H14 VSS136 VSS221 V7
AL18 T24 J13 VSS52 AE24 P28 C13
2
美
VCCP12 VCCP104 VCCP196 VSS137 VSS222
AC25 VCCP13 VCCP105 AG21 T28 VCCP197 VSS53 AM24 V6 VSS138 VSS223 AK24
W30 VCCP14 VCCP106 AM21 W28 VCCP198 VSS54 AN23 AK2 VSS139 VSS224 AB30
Y30 J25 J12 HVCCIOPLL
VCCP15 VCCP107 VCCP199 VSS55 H9 P27 VSS140 VSS225 L6 12 HVCCPLL
AN14 VCCP16 VCCP108 U30 J27 VCCP200 VSS56 H8 P26 VSS141 VSS226 L7
AD28 VCCP17 VCCP109 AL21 AG19 VCCP201 VSS57 H13 AM28 VSS142 VSS227 AB29
Y26 AG25 AL9 HVCCA
VCCP18 VCCP110 VCCP202 VSS58 AC6 AJ13 VSS143 VSS228 M1 12 HVCCA
AC29 VCCP19 VCCP111 AJ18 AD30 VCCP203 VSS59 AC7 W4 VSS144 VSS229 AB28
M29 VCCP20 VCCP112 J19 AF21 VCCP204 VSS60 AH6 P25 VSS145 VSS230 E8
1
C156
U24
J23
VCCP21
VCCP22
VCCP113
VCCP114
AH30
J15
Y24
AK14
VCCP205
VCCP206
VSS61 C16
VSS62 AM16
AJ20
W7
VSS146
VSS147
VSS231
VSS232
AG20
AN17
* 10uF
Dummy
AC27 AG12 J9 10V, Y5V, +80%/-20%
VSS63 AE25 P23 AB27
2
VCCP23 VCCP115 VCCP207 VSS148 VSS233
AM18 VCCP24 VCCP116 AJ22 M27 VCCP208 VSS64 AE27 AG13 VSS149 VSS234 AB26
AM19 J20 AF14 HVSSA
VCCP25 VCCP117 VCCP209 VSS65 AJ28 AG16 VSS150 VSS235 AN16 12 HVSSA
AB8 VCCP26 VCCP118 AH18 J30 VCCP210 VSS66 AJ7 AG17 VSS151 VSS236 M7
AC26 VCCP27 VCCP119 AH26 AG18 VCCP211 VSS67 F19 C7 VSS152 VSS237 AB25
J8 W27 AA8 Notes:
VCCP28 VCCP120 VCCP212 VSS68 AH13 Y2 VSS153 VSS238 AB24
1. Cap. should be within 1.5" mils of the VCCA and VSSA pins
J28 VCCP29 VCCP121 AL25 AG8 VCCP213 VSS69 AD7 L30 VSS154 VSS239 AB23
T30 AN8 AL29 2. VCCA route should be parallel and next to VSSA route to minimize
VCCP30 VCCP122 VCCP214 VSS70 AH16 L29 VSS155 VSS240 N3
loop area
AM9 VCCP31 VCCP123 AH14 AD29 VCCP215 VSS71 AK17 D15 VSS156 VSS241 AA30
3. VCCIOPLL route should be parallel and next to VSSA route to
AF15 U27 W8 VSS72 E17 AL27 F4
商
VCCP32 VCCP124 VCCP216 VSS157 VSS242 minimize loop area
AC8 VCCP33 VCCP125 T23 AH8 VCCP217 VSS73 AH17 Y7 VSS158 VSS243 AG10
3. Min. 12 mils trace from the filter to the processor pins
AE14 VCCP34 VCCP126 R8 N24 VCCP218 VSS74 AH20 L27 VSS159 VSS244 AE13 4. The inductors should be close to the cap.
N23 VCCP35 VCCP127 AK22 AN22 VCCP219 VSS75 AE5 AA29 VSS160 VSS245 AF30
C W29 VCCP36 VCCP128 AN29 J14 VCCP220 VSS76 AH23 N6 VSS161 VSS246 H28 C
U29 AG11 K26 can be NC for supporting only Core2 Duo, Core2 Extreme,
VCCP37 VCCP129 VCCP221 VSS77 AE7 N7 VSS162 VSS247 F7
Wolfdale and Yorkfield family processors (have on-die filter)
AC24 VCCP38 VCCP130 AK26 AF19 VCCP222 VSS78 AM13 AA28 VSS163 VSS248 AF29
AC23 VCCP39 VCCP131 J10 N8 VCCP223 VSS79 AH24 AN13 VSS164 VSS249 AF28
Y23 VCCP40 VCCP132 AJ15 AF12 VCCP224 VSS80 AJ30 AA27 VSS165 VSS250 G1 TP_CPU_G1 12
AN26 VCCP41 VCCP133 AG26 M28 VCCP225 VSS81 AJ10 AA26 VSS166 VSS251 AF27
AN25 VCCP42 VCCP134 AN9 AK9 VCCP226 VSS82 AF3 P4 VSS167 VSS252 AF26
AN11 VCCP43 VCCP135 AH15 VSS83 AK5 AA25 VSS168 VSS253 AF25
AN18 AF18 FSB_VTT
VCCP44 VCCP136 VSS84 AJ16 AA24 VSS169 VSS254 AN28
Y27 VCCP45 VCCP137 AL15 C10 VSS1 VSS85 AF6 P7 VSS170 VSS255 AN27
Y25 J26 D12 VSS86 AK29 E26 AF24
*
VCCP46 VCCP138 VSS2 VSS171 VSS256 R248 49.9 +/-1% P_PSI_N
AD24 VCCP47 VCCP139 J18 VSS87 AJ17 V30 VSS172 VSS257 AF23
AE23 VCCP48 VCCP140 J21 C24 VSS4 VSS88 F22 R2 VSS173 VSS258 AG24
AE22 VCCP49 VCCP141 AG27 K2 VSS5 VSS89 AH3 V29 VSS174 VSS259 AF17
AN19 VCCP50 VCCP142 AK15 C22 VSS6 VSS90 AK10 V28 VSS175 VSS260 AN24
V8 AF11 AN1 VTT_OUT_RIGHT
VCCP51 VCCP143 VSS7 VSS91 AM10 R5 VSS176 VSS261 H3
匯
K8 AD23 B14 VSS92 F16 V27
*
VCCP52 VCCP144 VSS8 VSS177 R244 49.9 +/-1% HCOMP7
AE21 VCCP53 VCCP145 AM15 K7 VSS9 VSS93 AJ23 R7 VSS178 VSS263 P24
AM30 VCCP54 VCCP146 AF8 AE16 VSS10 VSS94 F13 E20 VSS179 VSS264 AE20 Dummy
AE19 AK21 B11 VTT_OUT_LEFT
VCCP55 VCCP147 VSS11 VSS95 AG7 AN10 VSS180 VSS265 AE17
10 mils width
AC30 VCCP56 VCCP148 AG30 AL10 VSS12 VSS96 F10 V25 VSS181 VSS266 E27
AE15 AJ21 AK23 7 mils spacing to low speed signals
VCCP57 VCCP149 VSS13 VSS97 L26 R262
T3 VSS182 VSS267 T7
14mils spacing to high speed signals
M30 AM11 H12 VSS98 AD4 V24 R30
K27
VCCP58
VCCP59
VCCP150
VCCP151 AL11 AF7
VSS14
VSS15 VSS99 H11
*
51 Ohm V23
VSS183
VSS184
VSS268
VSS269 AJ27 max. 1200mils
M24 AJ11 AK7 +/-5%
VCCP60 VCCP152 VSS16 VSS100 L24 T6 VSS185 VSS270 AB1
AN21 VCCP61 VCCP153 K30 H7 VSS17 VSS101 L23 AL7 VSS186 VSS271 AM4
T8 AL14 E14 R159
VSS102 AM23 E25 V26
*
VCCP62 VCCP154 VSS18 VSS187 VSS272 24.9 HCOMP8
B AC28 VCCP63 VCCP155 AN30 L28 VSS19 VSS103 A15 U1 VSS188 VSS273 AA23 B
N25 AH25 Y5 +/-1%
VCCP64 VCCP156 VSS20 VSS104 AH10 R29 VSS189 VSS274 AL28
AE18 VCCP65 VCCP157 AL12 E11 VSS21 VSS105 H29 TP2 R28 VSS190 VSS275 AF20
W26 VCCP66 VCCP158 AJ9 AL16 VSS22 VSS106 B24 R27 VSS191 VSS276 AG23
AD25 AK11 AL24 15 mils width
VCCP67 VCCP159 VSS23 VSS107 L3 R26 VSS192 7 mils spacing to low speed signals
M8 VCCP68 VCCP160 AG14 AK13 VSS24 VSS108 H27 R25 VSS193
N30 N29 AL3 14mils spacing to high speed signals
VCCP69 VCCP161 TP18 VSS25 VSS109 A21 U7 VSS194 max. 1200mils
AD26 VCCP70 VCCP162 AL30 D21 VSS26 VSS110 AE2 R24 VSS195
AJ26 AJ25 AL20 VSS111 AJ29 R23
*
VCCP71 VCCP163 VSS27 VSS196

AM29 VCCP72 VCCP164 AH9 D18 VSS28 VSS112 A24 P30 VSS197
M25 VCCP73 VCCP165 J29 AN2 VSS29 VSS113 AK27 V3 VSS198
M26 J11 VRDSEL AK16 R130
VCCP74 VCCP166 VSS30 VSS114 AK28 1K
P29 VSS199 IMPSEL
L8 VCCP75 VCCP167 K25 AK20 VSS31 VSS115 B20 AF16 VSS200 RSVD26 F6
U25 P8 AM27 +/-5%
VCCP76 VCCP168 VSS32 VSS116 AM20 AE10 VSS201 P_PSI_N
Y8 VCCP77 VCCP169 K23 AM1 VSS33 VSS117 H26 AF13 VSS202 RSVD28 Y3 P_PSI_N 9
AJ12 AL19 AL13 Dummy HCOMP7
VCCP78 VCCP170 VSS34 VSS118 B17 H6 VSS203 RSVD29 AE3
AD27 VCCP79 VCCP171 AM8 AL17 VSS35 VSS119 H25 A18 VSS204
U23 T26 C19 VSS120 H24 A2 E7
*
VCCP80 VCCP172 VSS36 VSS205 RSVD31 HCOMP8 R232 51 Ohm IMPSEL
M23 VCCP81 VCCP173 N28 E28 VSS37 VSS121 AA3 E2 VSS206 RSVD32 B13
AG29 AH12 AH7 +/-5%
VCCP82 VCCP174 VSS38 VSS122 AA7 D9 VSS207 RSVD33 D14
N27 VCCP83 VCCP175 AL22 AK30 VSS39 VSS123 H23 C4 VSS208 RSVD34 E6
AM22 VCCP84 VCCP176 AN15 D24 VSS40 VSS124 AA6 A6 VSS209 RSVD35 D1
U28 VCCP85 VCCP177 AJ8 VSS125 H10 D6 VSS210 RSVD36 E5
K28 VCCP86 VCCP178 U26
U8 VCCP87 VCCP179 AJ19 Socket-IntelPrescottCPU Socket-IntelPrescottCPU
AK18 VCCP88 VCCP180 T27
AD8 VCCP89 VCCP181 AK8
A K24 VCCP90 VCCP182 AN12 A
AH28 VCCP91 VCCP183 AG9
AH21 VCCP92 VCCP184 N26
Socket-IntelPrescottCPU FOXCONN PCEG

Title
LGA775-2
Custom G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
Concurrent SDVO and PCI Express: PCI Express* Static Lane Reversal:
0 = Only SDVO or PCI Express is operational. 0 = GMCH PCI Express lane numbers are reversed (BTX)
1 = Both SDVO and PCI Express are operating 1 = Normal operation (ATX)
HDJ[63..0]
12 HAJ[35..3] 2 OF 10 HDJ[63..0] 12 TLS confidentiality enable:
U33B
HAJ3 L36 F44 HDJ0 1 = Enable TLS
HAJ4 FSB_AB_3 FSB_DB_0 HDJ1 0 = Disable TLS U33E 5 OF 10
L37 FSB_AB_4 FSB_DB_1 C44
HAJ5 J38 D44 HDJ2 Note: +/-1%
**
HAJ6 FSB_AB_5 FSB_DB_2 HDJ3 For platforms that do not support Intel H_FSBSEL0 HSYNC_P R167 39Ohm
F40 FSB_AB_6 FSB_DB_3 C41 F17 BSEL0 CRT_HSYNC D14 HSYNC 21
HAJ7 HDJ4 AMT,no action is needed. H_FSBSEL1 VSYNC_P R166 39Ohm
H39 FSB_AB_7 FSB_DB_4 E43 G16 BSEL1 CRT_VSYNC C14 VSYNC 21
HAJ8 HDJ5 update: Ref spec update 1.01 H_FSBSEL2 +/-1%
L38 FSB_AB_8 FSB_DB_5 B43 011808 P15 BSEL2
HAJ9 L43 D40 HDJ6 M20
HAJ10 FSB_AB_9 FSB_DB_6 HDJ7 TP28 TP_XORTEST ALLZTEST
N39 FSB_AB_10 FSB_DB_7 B42 N17 XORTEST CRT_RED B18 RED 21
HAJ11 N35 B38 HDJ8 K16 D18
FSB_AB_11 FSB_DB_8 RSVD_29 CRT_GREEN GREEN 21
HAJ12 N37 F38 HDJ9 EXP_SLR F15 C18
FSB_AB_12 FSB_DB_9 TP32 EXP_SLR CRT_BLUE BLUE 21
HAJ13 J41 A38 HDJ10 U33A 1 OF 10 G15 F13
HAJ14 FSB_AB_13 FSB_DB_10 HDJ11 EXP_RXP0 EXP_TXP0 EXP_SM RSVD_7 CRT_IRTN
D
HAJ15
N40
M45
FSB_AB_14
FSB_AB_15
FSB_DB_11
FSB_DB_12
B37
D38 HDJ12 20
20
EXP_RXP0
EXP_RXN0
EXP_RXN0
F6
G7
PEG_RXP_0
PEG_RXN_0
PEG_TXP_0
PEG_TXN_0
C11
B11 EXP_TXN0
EXP_TXP0
EXP_TXN0
20
20
H17
L17
EXP_SM
ITPM_ENABLE
*R168
150 *R165
150 *R170
150 D
HAJ16 R35 C37 HDJ13 EXP_RXP1 H6 A10 EXP_TXP1 L15 +/ -1% +/ -1% +/ -1%
VGA
FSB_AB_16 FSB_DB_13 20 EXP_RXP1 PEG_RXP_1 PEG_TXP_1 EXP_TXP1 20 CRT_DDC_DATA DDCA_DATA 21 Placed close to
HAJ17 T36 D37 HDJ14 EXP_RXN1 G4 B9 EXP_TXN1 M15
FSB_AB_17 FSB_DB_14 20 EXP_RXN1 PEG_RXN_1 PEG_TXN_1 EXP_TXN1 20 CRT_DDC_CLK DDCA_CLK 21 GMCH within
HAJ18 R36 B36 HDJ15 EXP_RXP2 J6 C9 EXP_TXP2 TP_MCH_M17 M17
FSB_AB_18 FSB_DB_15 20 EXP_RXP2 PEG_RXP_2 PEG_TXP_2 EXP_TXP2 20 TP27
Enable TLS RSVD_8 250 mils
HAJ19 R34 E37 HDJ16 EXP_RXN2 J7 D8 EXP_TXN2 TLS J17 B15 DAC_REFSET
美
FSB_AB_19 FSB_DB_16 20 EXP_RXN2 PEG_RXN_2 PEG_TXN_2 EXP_TXN2 20 CEN DAC_IREF
HAJ20 R37 J35 HDJ17 EXP_RXP3 L6 B8 EXP_TXP3 TP_MCH_G20 G20
FSB_AB_20 FSB_DB_17 20 EXP_RXP3 PEG_RXP_3 PEG_TXP_3 EXP_TXP3 20 BSCANTEST
HAJ21 HDJ18 EXP_RXN3 EXP_TXN3 CK_96M_P_GMCH
HAJ22
R39
U38
FSB_AB_21
FSB_AB_22
FSB_DB_18
FSB_DB_19
H35
F37 HDJ19 20
20
EXP_RXN3
EXP_RXP4
EXP_RXP4
L7
N9
PEG_RXN_3
PEG_RXP_4
PEG_TXN_3
PEG_TXP_4
C7
B7 EXP_TXP4
EXP_TXN3
EXP_TXP4
20
20
*R149
1K
TP25 J16
M16
RSVD_10
RSVD_11
DPL_REFCLKINP
DPL_REFCLKINN
E15
D15 CK_96M_N_GMCH
CK_96M_P_GMCH 7
CK_96M_N_GMCH 7
HAJ23 T37 G37 HDJ20 EXP_RXN4 N10 B6 EXP_TXN4 +/-5% TP_MCH_J15 J15
FSB_AB_23 FSB_DB_20 20 EXP_RXN4 PEG_RXN_4 PEG_TXN_4 EXP_TXN4 20 RSVD_12
HAJ24 U34 J33 HDJ21 EXP_RXP5 N7 B3 EXP_TXP5 TP33 TP_MCH_J20 J20 G8 DPL_REFSSCLKIN_P
FSB_AB_24 FSB_DB_21 20 EXP_RXP5 PEG_RXP_5 PEG_TXP_5 EXP_TXP5 20 RSVD_13 DPL_REFSSCLKINP DPL_REFSSCLKIN_P 7
HAJ25 U40 L33 HDJ22 EXP_RXN5 N6 B4 EXP_TXN5 TP34 TP_MCH_F20 F20 G9 DPL_REFSSCLKIN_N
FSB_AB_25 FSB_DB_22 20 EXP_RXN5 PEG_RXN_5 PEG_TXN_5 EXP_TXN5 20 TP24 DUALX8_ENABLE DPL_REFSSCLKINN DPL_REFSSCLKIN_N 7
HAJ26 T34 G33 HDJ23 EXP_RXP6 R7 D2 EXP_TXP6
FSB_AB_26 FSB_DB_23 20 EXP_RXP6 PEG_RXP_6 PEG_TXP_6 EXP_TXP6 20
HAJ27 Y36 L31 HDJ24 EXP_RXN6 R6 C2 EXP_TXN6
FSB_AB_27 FSB_DB_24 20 EXP_RXN6 PEG_RXN_6 PEG_TXN_6 EXP_TXN6 20
HAJ28 U35 M31 HDJ25 EXP_RXP7 R9 H2 EXP_TXP7
FSB_AB_28 FSB_DB_25 20 EXP_RXP7 PEG_RXP_7 PEG_TXP_7 EXP_TXP7 20
HAJ29 AA35 M30 HDJ26 EXP_RXN7 R10 G2 EXP_TXN7
FSB_AB_29 FSB_DB_26 20 EXP_RXN7 PEG_RXN_7 PEG_TXN_7 EXP_TXN7 20
HAJ30 U37 J30 HDJ27 EXP_RXP8 U10 J2 EXP_TXP8 AY4 AN6
EXP_TXP8 20 PLTRSTJ 20,22,27,30
FSB
FSB_AB_30 FSB_DB_27 20 EXP_RXP8 PEG_RXP_8 PEG_TXP_8 CL_DATA RSTINB
PCIE
HAJ31 Y37 G31 HDJ28 EXP_RXN8 U9 K2 EXP_TXN8 AY2 AR4 PWRGD_3V
FSB_AB_31 FSB_DB_28 20 EXP_RXN8 PEG_RXN_8 PEG_TXN_8 EXP_TXN8 20 CL_CLK PWROK PWRGD_3V 22,30
HAJ32 Y34 K30 HDJ29 EXP_RXP9 U6 K1 EXP_TXP9 CL_VREF_MCH AN13 K15 ICH_SYNCJ
FSB_AB_32 FSB_DB_29 20 EXP_RXP9 PEG_RXP_9 PEG_TXP_9 EXP_TXP9 20 CL_VREF ICH_SYNCB ICH_SYNCJ 22
HAJ33 Y38 M29 HDJ30 EXP_RXN9 U7 L2 EXP_TXN9 CL_RST AW2
FSB_AB_33 FSB_DB_30 20 EXP_RXN9 PEG_RXN_9 PEG_TXN_9 EXP_TXN9 20 CL_RSTB
HAJ34 AA37 G30 HDJ31 EXP_RXP10 AA9 P2 EXP_TXP10 PWRGD_3V AN8
FSB_AB_34 FSB_DB_31 20 EXP_RXP10 PEG_RXP_10 PEG_TXP_10 EXP_TXP10 20 CL_PWROK
HAJ35 AA36 J29 HDJ32 EXP_RXN10 AA10 M2 EXP_TXN10 AU4 HDA_BCLK 3D3V_SYS
FSB_AB_35 FSB_DB_32 20 EXP_RXN10 PEG_RXN_10 PEG_TXN_10 EXP_TXN10 20 HDA_BCLK
HDJ33 EXP_RXP11 EXP_TXP11 HDA_RSTB
F29 R4 T2
*R217 AV4
MISC
FSB_DB_33 20 EXP_RXP11 PEG_RXP_11 PEG_TXP_11 EXP_TXP11 20 HDA_RSTB
H29 HDJ34 EXP_RXN11 P4 R1 EXP_TXN11 10K AU2 HDA_SDI
12 HREQJ[4..0] FSB_DB_34 20 EXP_RXN11 PEG_RXN_11 PEG_TXN_11 EXP_TXN11 20 HDA_SDI
HREQJ0 G38 L25 HDJ35 EXP_RXP12 AA7 U2 EXP_TXP12 AR7 AV1 HDA_SDO
FSB_REQB_0 FSB_DB_35 20 EXP_RXP12 PEG_RXP_12 PEG_TXP_12 EXP_TXP12 20 JTAG_TDI HDA_SDO
HREQJ1 K35 K26 HDJ36 EXP_RXN12 AA6 V2 EXP_TXN12 AN10 AU3 HDA_SYNC
HREQJ2 J39
FSB_REQB_1
FSB_REQB_2
FSB_DB_36
FSB_DB_37 L29 HDJ37 20
20
EXP_RXN12
EXP_RXP13
EXP_RXP13 AB10
PEG_RXN_12
PEG_RXP_13
PEG_TXN_12
PEG_TXP_13 W4 EXP_TXP13
EXP_TXN12
EXP_TXP13
20
20 AN11
JTAG_TDO
JTAG_TCK
HDA_SYNC *R140 *R141
HREQJ3 C43 J26 HDJ38 EXP_RXN13 AB9 V3 EXP_TXN13 AN9 2.2K 2.2K
FSB_REQB_3 FSB_DB_38 20 EXP_RXN13 PEG_RXN_13 PEG_TXN_13 EXP_TXN13 20 JTAG_TMS
HREQJ4 G39 M26 HDJ39 EXP_RXP14 AB3 AA4 EXP_TXP14 J11 DDPC_CTRLCLK dummy dummy
FSB_REQB_4 FSB_DB_39 20 EXP_RXP14 PEG_RXP_14 PEG_TXP_14 EXP_TXP14 20 DDPC_CTRLCLK
H26 HDJ40 EXP_RXN14 AA2 Y4 EXP_TXN14 F11 DDPC_CTRLDATA
FSB_DB_40 20 EXP_RXN14 PEG_RXN_14 PEG_TXN_14 EXP_TXN14 20 DDPC_CTRLDATA
J40 F25 HDJ41 EXP_RXP15 AD10 AC1 EXP_TXP15
12 HADSTBJ0 FSB_ADSTBB_0 FSB_DB_41 20 EXP_RXP15 PEG_RXP_15 PEG_TXP_15 EXP_TXP15 20
T39 F24 HDJ42 EXP_RXN15 AD11 AB2 EXP_TXN15
12 HADSTBJ1 FSB_ADSTBB_1 FSB_DB_42 20 EXP_RXN15 PEG_RXN_15 PEG_TXN_15 EXP_TXN15 20 FSB_VTT
G25 HDJ43 R31
FSB_DB_43 RSVD_14
商
C39 H24 HDJ44 DMI_RXP0 AD7 AC2 DMI_TXP0 R32 P42 R403
12 HDSTBPJ0 FSB_DSTBPB_0 FSB_DB_44 22 DMI_RXP0 DMI_RXP_0 DMI_TXP_0 DMI_TXP0 22 RSVD_15 SLPB
B39 L24 HDJ45 DMI_RXN0 AD8 AD2 DMI_TXN0 U30 P43 49.9
12 HDSTBNJ0 FSB_DSTBNB_0 FSB_DB_45 22 DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 22 RSVD_16 DPRSTPB
HDBIJ0 B40 J24 HDJ46 DMI_RXP1 AE9 AD4 DMI_TXP1 U31 +/-1%
12 HDBIJ0 FSB_DINVB_0 FSB_DB_46 22 DMI_RXP1 DMI_RXP_1 DMI_TXP_1 DMI_TXP1 22 RSVD_17
K31 N24 HDJ47 DMI_RXN1 AE10 AE4 DMI_TXN1 R15
12 HDSTBPJ1 FSB_DSTBPB_1 FSB_DB_47 22 DMI_RXN1 DMI_RXN_1 DMI_TXN_1 DMI_TXN1 22 RSVD_18
J31 C28 HDJ48 DMI_RXP2 AE6 AE2 DMI_TXP2 R14
12 HDSTBNJ1 FSB_DSTBNB_1 FSB_DB_48 22 DMI_RXP2 DMI_RXP_2 DMI_TXP_2 DMI_TXP2 22 RSVD_19
DMI
C HDBIJ1 F33 B31 HDJ49 DMI_RXN2 AE7 AF2 DMI_TXN2 T15 AN17 C
12 HDBIJ1 FSB_DINVB_1 FSB_DB_49 22 DMI_RXN2 DMI_RXN_2 DMI_TXN_2 DMI_TXN2 22 RSVD_20 NC1
J25 F35 HDJ50 DMI_RXP3 AF9 AF4 DMI_TXP3 T14 A44
12 HDSTBPJ2 FSB_DSTBPB_2 FSB_DB_50 22 DMI_RXP3 DMI_RXP_3 DMI_TXP_3 DMI_TXP3 22 RSVD_21 NC2
K25 C35 HDJ51 DMI_RXN3 AF8 AG4 DMI_TXN3 AB15 BD1
12 HDSTBNJ2 FSB_DSTBNB_2 FSB_DB_51 22 DMI_RXN3 DMI_RXN_3 DMI_TXN_3 DMI_TXN3 22 RSVD_22 NC3
HDBIJ2 F26 B35 HDJ52 A45 BD45
12 HDBIJ2 FSB_DINVB_2 FSB_DB_52 1D1V_MCH RSVD_23 NC4
C32 D35 HDJ53 B2 BE2
12 HDSTBPJ3 FSB_DSTBPB_3 FSB_DB_53 HDJ54 R188 RSVD_24 NC5
12 HDSTBNJ3 D32 FSB_DSTBNB_3 FSB_DB_54 D31 BE1 RSVD_25 NC6 BE44
HDBIJ3 D30 A34 HDJ55 D9 Y7 GMCH_EXP_COMP 49.9 BE45 B14
12 HDBIJ3 FSB_DINVB_3 FSB_DB_55 7 CK_PE_100M_P_GMCH EXP_CLKP EXP_RCOMPO RSVD_26 NC7
B32 HDJ56 E9 Y8 +/-1% TP_MCH_L13 L13 B45
FSB_DB_56 7 CK_PE_100M_N_GMCH EXP_CLKN EXP_COMPI RSVD_27 NC8
J42 F31 HDJ57 Y6 L11 AK15
12 HADSJ FSB_ADSB FSB_DB_57 HDJ58 EXP_ICOMPO RSVD_28 NC9
12 HTRDYJ L40 FSB_TRDYB FSB_DB_58 D28 20 SDVO_CTRLDATA J13 SDVO_CTRLDATA NC10 AD42
J43 A29 HDJ59 G13 R206 AN16
*
12 HDRDYJ FSB_DRDYB FSB_DB_59 HDJ60 20 SDVO_CTRLCLK SDVO_CTRLCLK GMCH_EXP_RBIAS 750 NC11
12 HDEFERJ G44 FSB_DEFERB FSB_DB_60 C30 EXP_RBIAS AG1 NC12 W30
K44 B30 HDJ61 TP_MCH_AB13 AB13 +/-1% AW44
12 HITMJ FSB_HITMB FSB_DB_61 TP29 RSVD_1 NC13
H45 E27 HDJ62 TP_MCH_AD13 AD13 R42
12 HITJ FSB_HITB FSB_DB_62 TP30 RSVD_2 NC14
H40 B28 HDJ63 U32
12 HLOCKJ FSB_LOCKB FSB_DB_63 NC15
12 HBR0J L42 FSB_BREQ0B
12 HBNRJ J44 FSB_BNRB Eaglelake-Q
H37 B24 HSWING
12 HBPRIJ FSB_BPRIB FSB_SWING HRCOMP
12 HDBSYJ H42 FSB_DBSYB FSB_RCOMP A23
12 HRSJ0 G43 FSB_RSB_0
L44 C22 MCH_GTLREF
12 HRSJ1 FSB_RSB_1 FSB_DVREF
12 HRSJ2 G42 FSB_RSB_2 FSB_ACCVREF B23
D27 Eaglelake-Q
匯
9,12 HCPURSTJ FSB_CPURSTB
HPL_CLKINP P29 CK_200M_P_GMCH 7
TP_MCH_N25 N25 P30
TP26 RSVD_3 HPL_CLKINN CK_200M_N_GMCH 7
Eaglelake-Q
FSB_VTT
FSB_VTT
B
*R135 *R143 3D3V_SYS B
57.6 Ohm R137
*
301 +/-1% placed close to GMCH within 500 mils TP_MCH_L13 10K
Dummy
+/-1% 4 mils width +/-5%
*
R161 49.9 MCH_GTLREF 6 mils spacing to static signals

*
R164 49.9 HSWING +/-1% 12 mils spacing to toppling signals

+/-1%
R171 1.02KOhm DAC_REFSET
*R139 * * C184 *R158 * C206 +/-1%

C177 1uF 100 Ohm 220pF RN16
100 Ohm
+/-1%
0.1uF
16V, Y5V, +80%/-20% 10V, Y5V, +80%/-20%
+/-1% 50V, NPO, +/-5%
dummy 7,12 FSBSEL0 1
3
* 2
4
H_FSBSEL0
H_FSBSEL1
7,12 FSBSEL1 H_FSBSEL2
7,12 FSBSEL2 5 6
7 8 TP_MCH_J15
HSWING voltage should be 0.25*FSB_VTT
10 mils width, 10 mils spacing GTLREF voltage should be 0.67*VTT = 0.75V 10K
max. 3 inches long 12 mils width, 15 mils spacing +/-5% TP_MCH_J20
divider should be within 1.5" of the GTLREF pin
220pF caps should be placed near MCH pin
place series resistor as close to divider
Resistor and Capacitor next to each other
*
HRCOMP R169 16.5 3D3V_SYS

+/-1%
10 mils width, 7 mils spacing

1D1V_MCH *R138
10K
Dummy
+/-5%
max. 500 mils EXP_SM
5 on 5 mils in breakout, max 250 mils 20 GMCH_EXP_EN_HDR
*R221 R230
*
1K PLTRSTJ 2.2KOhm CL_RST

+/-1% 20,22,27,30 PLTRSTJ +/-1%
0.35V
CL_VREF_MCH R226
A C287 * 1.1KOhm A
*R222
464 * 0.1uF +/-1%
+/-1% 16V, Y5V, +80%/-20%
Check DG1.2
useR2=464ohm?????
min. 4 mils width

10 mils spacing
FOXCONN PCEG
5 mils min. for max. of 300 mils in breakout Title
Eaglelake -GMCH -1
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
U33D 4 OF 10
U33C 3 OF 10
19 M_MAA_A[14..1] M_DQS_A[7..0] 19 18 M_MAA_B[14..0] M_DQS_B[7..0] 18
BC41 BC5 M_DQS_A0 M_MAA_B0 BD24 AW8 M_DQS_B0
DDR_A_MA_0 DDR_A_DQS_0 M_DQS_AJ[7..0] 19 DDR_B_MA_0 DDR_B_DQS_0 M_DQS_BJ[7..0] 18
M_MAA_A1 BC35 BD4 M_DQS_AJ0 M_MAA_B1 BB23 AW9 M_DQS_BJ0
DDR_A_MA_1 DDR_A_DQSB_0 M_DQM_A[7..0] 19 DDR_B_MA_1 DDR_B_DQSB_0 M_DQM_B[7..0] 18
M_MAA_A2 BB32 BC3 M_DQM_A0 M_MAA_B2 BB24 AY6 M_DQM_B0
DDR_A_MA_2 DDR_A_DM_0 M_DATA_A[63..0] 19 DDR_B_MA_2 DDR_B_DM_0 M_DATA_B[63..0] 18
M_MAA_A3 BC32 M_MAA_B3 BD23
M_MAA_A4 DDR_A_MA_3 M_DATA_A0 M_MAA_B4 DDR_B_MA_3 M_DATA_B0
BD32 DDR_A_MA_4 DDR_A_DQ_0 BC2 BB22 DDR_B_MA_4 DDR_B_DQ_0 AV7
M_MAA_A5 BB31 BD3 M_DATA_A1 M_MAA_B5 BD22 AW4 M_DATA_B1
M_MAA_A6 DDR_A_MA_5 DDR_A_DQ_1 M_DATA_A2 M_MAA_B6 DDR_B_MA_5 DDR_B_DQ_1 M_DATA_B2
AY31 DDR_A_MA_6 DDR_A_DQ_2 BD7 BC22 DDR_B_MA_6 DDR_B_DQ_2 BA9
M_MAA_A7 BA31 BB7 M_DATA_A3 M_MAA_B7 BC20 AU11 M_DATA_B3
BD31 DDR_A_MA_8 DDR_A_DQ_4 BB2 BB20 DDR_B_MA_8 DDR_B_DQ_4 AU7
M_MAA_A9 BD30 BA3 M_DATA_A5 M_MAA_B9 BD20 AU8 M_DATA_B5
AW43 DDR_A_MA_10 DDR_A_DQ_6 BE6 BC26 DDR_B_MA_10 DDR_B_DQ_6 AW7
M_MAA_A11 BC30 BD6 M_DATA_A7 M_MAA_B11 BD19 AY9 M_DATA_B7
M_MAA_A12 DDR_A_MA_11 DDR_A_DQ_7 M_MAA_B12 DDR_B_MA_11 DDR_B_DQ_7
BB30 DDR_A_MA_12 M_DQS_A[7..0] 19 BB19 DDR_B_MA_12 M_DQS_B[7..0] 18
M_MAA_A13 AM42 BB9 M_DQS_A1 M_MAA_B13 BE38 AT15 M_DQS_B1
D DDR_A_MA_13 DDR_A_DQS_1 M_DQS_AJ[7..0] 19 DDR_B_MA_13 DDR_B_DQS_1 M_DQS_BJ[7..0] 18 D
M_MAA_A14 BD28 BC9 M_DQS_AJ1 M_MAA_B14 BA19 AU15 M_DQS_BJ1
DDR_A_MA_14 DDR_A_DQSB_1 M_DQM_A[7..0] 19 DDR_B_MA_14 DDR_B_DQSB_1 M_DQM_B[7..0] 18
BD9 M_DQM_A1 AR15 M_DQM_B1
DDR_A_DM_1 M_DATA_A[63..0] 19 DDR_B_DM_1 M_DATA_B[63..0] 18
AW42 DDR_A_WEB 18 M_WE_BJ BD36 DDR_B_WEB
AU42 BB8 M_DATA_A8 BC37 AY13 M_DATA_B8
19 M_CAS_AJ DDR_A_CASB DDR_A_DQ_8 M_DATA_A9 18 M_CAS_BJ DDR_B_CASB DDR_B_DQ_8 M_DATA_B9
AV42 AY8 BD35 AP15
美
19 M_RAS_AJ DDR_A_RASB DDR_A_DQ_9 M_DATA_A10 18 M_RAS_BJ DDR_B_RASB DDR_B_DQ_9 M_DATA_B10
DDR_A_DQ_10 BD11 18 M_BS_B[2..0] DDR_B_DQ_10 AW15
M_BS_A0 AV45 BB11 M_DATA_A11 M_BS_B0 BD26 AT16 M_DATA_B11
M_BS_A1 DDR_A_BS_0 DDR_A_DQ_11 M_DATA_A12 M_BS_B1 DDR_B_BS_0 DDR_B_DQ_11 M_DATA_B12
AY44 DDR_A_BS_1 DDR_A_DQ_12 BC7 BB26 DDR_B_BS_1 DDR_B_DQ_12 AU13
M_BS_A2 BC28 BE8 M_DATA_A13 M_BS_B2 BD18 AW13 M_DATA_B13
DDR_A_BS_2 DDR_A_DQ_13 M_DATA_A14 DDR_B_BS_2 DDR_B_DQ_13 M_DATA_B14
19 M_BS_A[2..0] DDR_A_DQ_14 BD10 DDR_B_DQ_14 AP16
AU43 AY11 M_DATA_A15 BB35 AU16 M_DATA_B15
19 M_SCS_A0J DDR_A_CSB_0 DDR_A_DQ_15 18 M_SCS_B0J DDR_B_CSB_0 DDR_B_DQ_15
AR40 DDR_A_CSB_1 M_DQS_A[7..0] 19 18 M_SCS_B1J BD39 DDR_B_CSB_1 M_DQS_B[7..0] 18
AU44 BD15 M_DQS_A2 BB37 AR20 M_DQS_B2
DDR_A_CSB_2 DDR_A_DQS_2 M_DQS_AJ[7..0] 19 DDR_B_CSB_2 DDR_B_DQS_2 M_DQS_BJ[7..0] 18
AM43 BB15 M_DQS_AJ2 BD40 AR17 M_DQS_BJ2
DDR_A_CSB_3 DDR_A_DQSB_2 M_DQM_A[7..0] 19 DDR_B_CSB_3 DDR_B_DQSB_2 M_DQM_B[7..0] 18
BD14 M_DQM_A2 AU17 M_DQM_B2
19 M_SCKE_A[1..0] DDR_A_DM_2 M_DATA_A[63..0] 19 18 M_SCKE_B[1..0] DDR_B_DM_2 M_DATA_B[63..0] 18
M_SCKE_A0 BB27 M_SCKE_B0 BC18
M_SCKE_A1 DDR_A_CKE_0 M_DATA_A16 M_SCKE_B1 DDR_B_CKE_0 M_DATA_B16
BD27 DDR_A_CKE_1 DDR_A_DQ_16 BB14 AY20 DDR_B_CKE_1 DDR_B_DQ_16 AY17
BA27 BC14 M_DATA_A17 BE17 AV17 M_DATA_B17
DDR_A_CKE_2 DDR_A_DQ_17 M_DATA_A18 DDR_B_CKE_2 DDR_B_DQ_17 M_DATA_B18
AY26 DDR_A_CKE_3 DDR_A_DQ_18 BC16 BB18 DDR_B_CKE_3 DDR_B_DQ_18 AR21
BB16 M_DATA_A19 AV20 M_DATA_B19
19 M_ODT_A[1..0] M_ODT_A0 DDR_A_DQ_19 M_DATA_A20 18 M_ODT_B[1..0] M_ODT_B0 DDR_B_DQ_19 M_DATA_B20
AR42 DDR_A_ODT_0 DDR_A_DQ_20 BC11 BD37 DDR_B_ODT_0 DDR_B_DQ_20 AP17
M_ODT_A1 AM44 BE12 M_DATA_A21 M_ODT_B1 BC39 AW16 M_DATA_B21
DDR_A_ODT_1 DDR_A_DQ_21 M_DATA_A22 DDR_B_ODT_1 DDR_B_DQ_21 M_DATA_B22
AR44 DDR_A_ODT_2 DDR_A_DQ_22 BA15 BB38 DDR_B_ODT_2 DDR_B_DQ_22 AT20
AL40 BD16 M_DATA_A23 BD42 AN20 M_DATA_B23
DDR_A_ODT_3 DDR_A_DQ_23 DDR_B_ODT_3 DDR_B_DQ_23
M_DQS_A[7..0] 19 M_DQS_B[7..0] 18
AY37 AR22 M_DQS_A3 AY33 AU26 M_DQS_B3
19 CK_M_200M_P_DDR0_A DDR_A_CK_0 DDR_A_DQS_3 M_DQS_AJ[7..0] 19 18 CK_M_200M_P_DDR0_B DDR_B_CK_0 DDR_B_DQS_3 M_DQS_BJ[7..0] 18
BA37 AT22 M_DQS_AJ3 AW33 AT26 M_DQS_BJ3
19 CK_M_200M_N_DDR0_A DDR_A_CKB_0 DDR_A_DQSB_3 M_DQM_A[7..0] 19 18 CK_M_200M_N_DDR0_B DDR_B_CKB_0 DDR_B_DQSB_3 M_DQM_B[7..0] 18
AW29 AV22 M_DQM_A3 AV31 AV25 M_DQM_B3
DDR_A_CK_1 DDR_A_DM_3 M_DATA_A[63..0] 19 DDR_B_CK_1 DDR_B_DM_3 M_DATA_B[63..0] 18
AY29 DDR_A_CKB_1 AW31 DDR_B_CKB_1
AU37 AW21 M_DATA_A24 AW35 AT25 M_DATA_B24
19 CK_M_200M_P_DDR2_A DDR_A_CK_2 DDR_A_DQ_24 M_DATA_A25 18 CK_M_200M_P_DDR2_B DDR_B_CK_2 DDR_B_DQ_24 M_DATA_B25
19 CK_M_200M_N_DDR2_A AV37 DDR_A_CKB_2 DDR_A_DQ_25 AY22 18 CK_M_200M_N_DDR2_B AY35 DDR_B_CKB_2 DDR_B_DQ_25 AV26
AU33 AV24 M_DATA_A26 AT31 AU29 M_DATA_B26
DDR_A_CK_3 DDR_A_DQ_26 DDR_B_CK_3 DDR_B_DQ_26
商
AT33 AY24 M_DATA_A27 AU31 AV29 M_DATA_B27
DDR_A_CKB_3 DDR_A_DQ_27 M_DATA_A28 DDR_B_CKB_3 DDR_B_DQ_27 M_DATA_B28
AT30 DDR_A_CK_4 DDR_A_DQ_28 AU21 AP31 DDR_B_CK_4 DDR_B_DQ_28 AW25
AR30 AT21 M_DATA_A29 AP30 AR25 M_DATA_B29
DDR_A_CKB_4 DDR_A_DQ_29 M_DATA_A30 DDR_B_CKB_4 DDR_B_DQ_29 M_DATA_B30
AW38 DDR_A_CK_5 DDR_A_DQ_30 AR24 AW37 DDR_B_CK_5 DDR_B_DQ_30 AP26
AY38 AU24 M_DATA_A31 AV35 AR29 M_DATA_B31
DDR_A_CKB_5 DDR_A_DQ_31 DDR_B_CKB_5 DDR_B_DQ_31
C C
M_DQS_A[7..0] 19 M_DQS_B[7..0] 18
AH43 M_DQS_A4 AR38 M_DQS_B4
DDR_A_DQS_4 M_DQS_AJ[7..0] 19 DDR_B_DQS_4 M_DQS_BJ[7..0] 18
AH42 M_DQS_AJ4 AR37 M_DQS_BJ4
DDR_A_DQSB_4 M_DQM_A[7..0] 19 DDR_B_DQSB_4 M_DQM_B[7..0] 18
AK42 M_DQM_A4 AR43 AU39 M_DQM_B4
DDR_A_DM_4 M_DATA_A[63..0] 19 19 M_SCS_A1J_DDR3 DDR3_A_CSB1 DDR_B_DM_4 M_DATA_B[63..0] 18
19 M_MAA_A0_DDR3 BB40 DDR3_A_MA0
Note: AL41 M_DATA_A32 AT44 AR36 M_DATA_B32
For a single DIMM per channel implementation, DDR_A_DQ_32 M_DATA_A33 19 M_WE_AJ_DDR3 DDR3_A_WEB DDR_B_DQ_32 M_DATA_B33
DDR_A_DQ_33 AK43 AV40 DDR3_A_ODT3 DDR_B_DQ_33 AU38
the following second DIMM specific system memory AG42 M_DATA_A34 DDR3_DRAM_PWROK AR6 AN35 M_DATA_B34
signals should be tested pointed. DDR_A_DQ_34 M_DATA_A35 DDR3_DRAMRST_N DDR3_A_DRAM_PWROK DDR_B_DQ_34 M_DATA_B35
DDR_A_DQ_35 AG44 18,19 DDR3_DRAMRST_N BC24 DDR3_DRAMRSTB DDR_B_DQ_35 AN37
CK/CKB[5:3] - DDR2 Clock Pairs AL42 M_DATA_A36 AV39 M_DATA_B36
CK/CKB[3 and 5] - Channel A DDR3 Clock Pairs DDR_A_DQ_36 M_DATA_A37 DDR_B_DQ_36 M_DATA_B37
DDR_A_DQ_37 AK44 DDR_B_DQ_37 AW39
CK/CKB[3 and 4] - Channel B DDR3 Clock Pairs M_DATA_A38 M_DATA_B38
CSB[3:2] DDR_A_DQ_38 AH44 DDR_B_DQ_38 AU40
AG41 M_DATA_A39 AU41 M_DATA_B39
CKE[3:2] DDR_A_DQ_39 DDR_B_DQ_39
ODT[3:2] M_DQS_A[7..0] 19 AN29 RSVD_4 M_DQS_B[7..0] 18
AD43 M_DQS_A5 AN30 AK34 M_DQS_B5
DDR_A_DQS_5 M_DQS_AJ[7..0] 19 RSVD_5 DDR_B_DQS_5 M_DQS_BJ[7..0] 18
AE42 M_DQS_AJ5 AJ33 AL34 M_DQS_BJ5
DDR_A_DQSB_5 M_DQM_A[7..0] 19 RSVD_6 DDR_B_DQSB_5 M_DQM_B[7..0] 18
AE45 M_DQM_A5 AK33 AL37 M_DQM_B5
DDR_A_DM_5 M_DATA_A[63..0] 19 RSVD_7 DDR_B_DM_5 M_DATA_B[63..0] 18
AF43 M_DATA_A40 AL35 M_DATA_B40
1D5V_STR DDR_A_DQ_40 M_DATA_A41 DDR_B_DQ_40 M_DATA_B41
DDR_A_DQ_41 AF42 DDR_B_DQ_41 AL36
AC44 M_DATA_A42 AK36 M_DATA_B42
DDR_A_DQ_42 M_DATA_A43 DDR_B_DQ_42 M_DATA_B43
DDR_A_DQ_43 AC42 DDR_B_DQ_43 AJ34
AF40 M_DATA_A44 AN39 M_DATA_B44
匯
*R247
10K DDR_A_DQ_45
DDR_A_DQ_46
AF44
AD44 M_DATA_A46 DDR_B_DQ_45
DDR_B_DQ_46
AN40
AK37 M_DATA_B46
+/-5% AC41 M_DATA_A47 MCH_DDR_VREF BB44 AL39 M_DATA_B47
DDR_A_DQ_47 DDR_VREF DDR_B_DQ_47
M_DQS_A[7..0] 19 M_DQS_B[7..0] 18
DDR3_DRAM_PWROK Y43 M_DQS_A6 AF37 M_DQS_B6
DDR_A_DQS_6 M_DQS_AJ[7..0] 19 DDR_B_DQS_6 M_DQS_BJ[7..0] 18
Y42 M_DQS_AJ6 AF36 M_DQS_BJ6
DDR_A_DQSB_6 M_DQM_A[7..0] 19 DDR_B_DQSB_6 M_DQM_B[7..0] 18
C298 AA45 M_DQM_A6 MCH_DDR_RPD AY42 AJ35 M_DQM_B6
DDR_A_DM_6 M_DATA_A[63..0] 19 DDR_RPD DDR_B_DM_6 M_DATA_B[63..0] 18
* 1uF
10V, X5R, +/-10%
DDR_A_DQ_48 AB43 M_DATA_A48
MCH_DDR_RPU
MCH_DDR_SPD
BA43
BC43
DDR_RPU
DDR_SPD DDR_B_DQ_48 AJ38 M_DATA_B48
AA42 M_DATA_A49 MCH_DDR_SPU BC44 AJ37 M_DATA_B49
DDR_A_DQ_49 M_DATA_A50 DDR_SPU DDR_B_DQ_49 M_DATA_B50
DDR_A_DQ_50 W42 DDR_B_DQ_50 AF38
W41 M_DATA_A51 AE37 M_DATA_B51
DDR_A_DQ_52 AB42 DDR_B_DQ_52 AK40
2N7002DW M_DATA_A53 M_DATA_B53
DDR_A_DQ_53 AB44 DDR_B_DQ_53 AJ40
1 4 Y44 M_DATA_A54 AF34 M_DATA_B54
B S1 S2 DDR_A_DQ_54 M_DATA_A55 DDR_B_DQ_54 M_DATA_B55 B
11,22 SLP_S4J 2 G1 G2 5 DDR_A_DQ_55 Y40 DDR_B_DQ_55 AE35
6 D1 D2 3 M_DQS_A[7..0] 19 M_DQS_B[7..0] 18
T44 M_DQS_A7 AB35 M_DQS_B7
5V_SB
Q52 DDR_A DDR_A_DQS_7
DDR_A_DQSB_7 T43 M_DQS_AJ7
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
DDR_B_DQS_7
DDR_B_DQSB_7 AD35 M_DQS_BJ7
M_DQS_BJ[7..0] 18
M_DQM_B[7..0] 18
T42 M_DQM_A7 AD37 M_DQM_B7
DDR_A_DM_7 M_DATA_A[63..0] 19 DDR_B DDR_B_DM_7 M_DATA_B[63..0] 18
V42 M_DATA_A56 AD40 M_DATA_B56
*R265
10K DDR_A_DQ_57
DDR_A_DQ_58
U45
R40 M_DATA_A58 DDR_B_DQ_57
DDR_B_DQ_58
AD38
AB40 M_DATA_B58
+/-5% P44 M_DATA_A59 AA39 M_DATA_B59
DDR_A_DQ_60 V44 DDR_B_DQ_60 AE36
V43 M_DATA_A61 AE39 M_DATA_B61
DDR_A_DQ_62 R41 DDR_B_DQ_62 AB37
R44 M_DATA_A63 AB38 M_DATA_B63
DDR_A_DQ_63 DDR_B_DQ_63
Eaglelake-Q
Eaglelake-Q
1D5V_STR DDRII Compensation Group Signals
*R231
1K * R219
80.6 MCH_DDR_RPD
+/-1% +/-1%
MCH_DDR_VREF
1D5V_STR
*R228 * C289 R229

*
1K 0.1uF 80.6 MCH_DDR_RPU

+/-1% 16V, Y5V, +80%/-20% +/-1%
* C293
0.1uF
Dummy
16V, Y5V, +80%/-20%
A width 10 mils, spacing 10 mils A

*
5 mils width/spacing minimum for max. of 300 mils R245 249 Ohm MCH_DDR_SPD
in GMCH break-out area
+/-1%
Placed close to GMCH pin
1D5V_STR
R234
*
80.6 MCH_DDR_SPU
+/-1%
* C300
0.1uF FOXCONN PCEG
16V, Y5V, +80%/-20%
Title
Eaglelake -GMCH -2
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
1D1V_MCH 1D1V_PCIEXPRESS
VCCDQ_CRT is very sensitive to 1250mA

1D5V_CORE low frequency noise (noise below 1MHz). U33F 6 OF 10 #REFDE25
2 1 COPPER
L25
1D1V_MCH U33G 7 OF 10 1D1V_MCH 1D1V_MCH
R163 1 VCCDQ_CRT (mA)MinVout #REFDE24 1 COPPER
* VCCDQ_CRT 0.5 1.35V
2
AA19 VCC_1 VCC_EXP_1 AA14
1
FB 600 Ohm
* C187
1uF AA32 VCC_CL_1 VCC_CL_42 AK21
AA21
AA23
VCC_2
VCC_3
VCC_EXP_2
VCC_EXP_3
AA15
AB14
#REFDE23
2 1 COPPER
10V, Y5V, +80%/-20% AA33 AK22 AA25 AC15
2
VCC_CL_2 VCC_CL_43 VCC_4 VCC_EXP_4
AB32 VCC_CL_3 VCC_CL_44 AK23 AA27 VCC_5 VCC_EXP_5 AD14
D
AB33 VCC_CL_4 VCC_CL_45 AK24 AA29 VCC_6 VCC_EXP_6 AD15 D
AD32 VCC_CL_5 VCC_CL_46 AK25 AA30 VCC_7 VCC_EXP_7 AE14
1
1D5V_CORE
AD33
AE32
VCC_CL_6
VCC_CL_7
VCC_CL_47
VCC_CL_48
AK26
AK27
AB20
AB22
VCC_8
VCC_9
VCC_EXP_8
VCC_EXP_9
AE15
AF14
* C277
10uF * C279
10uF * C278
10uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

AE33 AK29 AB24 AF15 Dummy
2
AF32 AK30 AB26 AG15
美
L26 VCC_CL_9 VCC_CL_50 VCC_11 VCC_EXP_11
AJ32 VCC_CL_10 VCC_CL_51 AL1 AB29 VCC_12 VCC_EXP_12 AJ10
Dummy (mA)MinVout AK31 AL10 AB30 AJ11
R157 1 VCCA_EXP VCCA_EXP 4 1.425V VCC_CL_11 VCC_CL_52 VCC_13 VCC_EXP_13
* AL30
AM15
VCC_CL_12
VCC_CL_13
VCC_CL_53
VCC_CL_54
AL11
AL12
AC16
AC17
VCC_14
VCC_15
VCC_EXP_14
VCC_EXP_15
AJ12
AJ13
1
FB 600 Ohm
* C181
1uF
AM16
AM17
VCC_CL_14
VCC_CL_15
VCC_CL_55
VCC_CL_56
AL14
AL15
AC19
AC21
VCC_16
VCC_17
VCC_EXP_16
VCC_EXP_17
AJ14
AJ6
#REFDE18 10V, Y5V, +80%/-20% AM20 AL16 AC23 AJ7
2

2 1 AM21 VCC_CL_17 VCC_CL_58 AL17 AC25 VCC_19 VCC_EXP_19 AJ8
AM22 VCC_CL_18 VCC_CL_59 AL19 AC27 VCC_20 VCC_EXP_20 AJ9
COPPER AM24 AL2 AC29 AK10
AM25 VCC_CL_20 VCC_CL_61 AL20 AD16 VCC_22 VCC_EXP_22 AK11
3D3V_SYS AM26 AL21 AD17 AK12
L24 VCC_CL_21 VCC_CL_62 VCC_23 VCC_EXP_23 1D1V_MCH
AM29 VCC_CL_22 VCC_CL_63 AL22 AD20 VCC_24 VCC_EXP_24 AK13
(mA)MinVout Y32 AL23 AD22 AK6
R162 1 VCCA_DAC VCCA_DAC 70 2.97V VCC_CL_23 VCC_CL_64 VCC_25 VCC_EXP_25
* Y33
AP1
VCC_CL_24
VCC_CL_25
VCC_CL_65
VCC_CL_66
AL24
AL25
AD24
AD26
VCC_26
VCC_27
VCC_EXP_26
VCC_EXP_27
AK7
AK8
AP2 VCC_CL_26 VCC_CL_67 AL26 AD29 VCC_28 VCC_EXP_28 AK9
1
FB 600 Ohm
* C180
* C198
* C213 Y31 VCC_CL_27 VCC_CL_68 AL27 AE16 VCC_29 VCC_EXP_29 U14
1
POWER
10uF 1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
0.1uF
16V, Y5V, +80%/-20%
AA31
AB31
VCC_CL_28 VCC_CL_69 AL29
AL4
AE17
AE19
VCC_30 VCC_EXP_30 U15
W15
* C236
10uF * C246
10uF * C234
10uF * C227
10uF
2
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

Dummy AC31 AL5 AE21 Y14
2
AD31 VCC_CL_31 VCC_CL_72 AL6 AE23 VCC_33 VCC_EXP_33 Y15
AE31 VCC_CL_32 VCC_CL_73 AL7 AE25 VCC_34 VCC_EXP_34 AJ1
AF31 VCC_CL_33 VCC_CL_74 AL8 AE27 VCC_35 VCC_EXP_35 AJ2
AG30 VCC_CL_34 VCC_CL_75 AL9 AE29 VCC_36 VCC_EXP_36 AK2
AG31 AM2 AF16 AK3 Place in 1D1V_MCH_CL plane
VCC_CL_35 VCC_CL_76 VCC_37 VCC_EXP_37 (less than 100 mils from the package)
AJ30 VCC_CL_36 VCC_CL_77 AM3 AF17 VCC_38 VCC_EXP_38 AK4
商
AJ31 VCC_CL_37 VCC_CL_78 AM4 AF19 VCC_39
AK16 VCC_CL_38 VCC_CL_79 AJ15 AF20 VCC_40
#REFDE21 AK17 AK14 AF21
(mA)(mVpp)MinVout VCC_CL_39 VCC_CL_80 VCC_41
2 1 AK19 VCC_CL_40 VCC_CL_81 AJ27 AF22 VCC_42
1D1V_MCH VCCA_HPLL >50 70 1.045V AK20 AJ29 Place these parts close to AF23
VCC_CL_41 VCC_CL_82 VCC_43
POWER
C COPPER Y29 VCC_CKDDR ballout in MCH backside AF24 C
*
L27 270nH VCCA_HPLL VCC_CL_83 VCC_44

Dummy VCC_CL_84 Y30 AF25 VCC_45
+/-20% 1D1V_MCH W31 AF26
VCC_CL_85 1D5V_STR VCC_46 FSB_VTT
AF27 VCC_47
1
For layout, change it from * C217

2.2uF 2
#REFDE15
1 VCC_DDR_1
1D5V_STR
AP44
AF29
AG16
VCC_48
VCC_49
2
1D1V_MCH_CL to 1D1V_MCH. 6.3V, Y5V, +80%/-20% VCCA_GPLLD B12 AT45 AG17 FSB_VTT
2
VCCD_HPLL VCCDPLL_EXP VCC_DDR_2 L41 VCC_50

COPPER U33 AV44 AG20
VCCA_GPLL VCCD_HPLL VCC_DDR_3 0.16uH L0805 1uH VCC_51
B16 VCCAPLL_EXP VCC_DDR_4 AY40 AG22 VCC_52 VTT_FSB_1 A25
1
VCC_DDR_5
VCC_DDR_6
BA41
BB39 (mA)MinVout
+/-10%
BACK
AG24
AG26
VCC_53
VCC_54
VTT_FSB_2
VTT_FSB_3
B25
B26
* C238
2.2uF * C420
2.2uF * C230
2.2uF
VCCA_HPLL B22 BD21 VCC_SMCLK 450 1.7V AG29 C24
2
3D3V_SYS VCCA_MPLL VCCA_HPLL VCC_DDR_7 VCC_55 VTT_FSB_4
A21 VCCA_MPLL VCC_DDR_8 BD25 AJ16 VCC_56 VTT_FSB_5 C26
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%

VCCA_DPLLA D20 BD29 VCC_CKDDR AJ17 D22
VCCA_DPLLB VCCA_DPLLA VCC_DDR_9 VCC_57 VTT_FSB_6
Near E19 Pin C20 VCCA_DPLLB VCC_DDR_10 BD34 AJ19 VCC_58 VTT_FSB_7 D23
BD38 C438 AJ21 D24
(mA)(mVpp)MinVout VCC_DDR_11 VCC_59 VTT_FSB_8
VCC_DDR_12 BE23 0.1uF
* AJ23 VCC_60 VTT_FSB_9 E23
1
1D1V_MCH VCCA_MPLL >102 70 1.045V E19 BE27 AJ25 F21
VCC3_3 VCC_DDR_13 VCC_61 VTT_FSB_10
* C199
* C189 BE31 #REFDE35 R25 F22
*
L19 2.2uH VCCA_MPLL 0.1uF 4.7uF VCC_HDA VCC_DDR_14 25V, Y5V, +80%/-20% VCC_62 VTT_FSB_11
Dummy Dummy AR2 VCC_HDA VCC_DDR_15 BE36 COPPER R26 VCC_63 VTT_FSB_12 G21
16V, Y5V, +80%/-20%
6.3V, X5R, +/-10%
+/-20% Dummy VCCA_DAC BACK BACK R27 G22
2
#REFDE6 R142 1 VCC_64 VTT_FSB_13
Dummy R29 VCC_65 VTT_FSB_14 H21
2 1 #REFDE12 B19 T21 H22
匯
For layout, change it from VCCA_DAC_1 VCC_66 VTT_FSB_15 Place in FSB_VTT plane as close to the GMCH as possible
1D1V_MCH_CL to 1D1V_MCH.
COPPER
2 1 D19 VCCA_DAC_2
VCC_CKDDR_1 AK32
* C439
22uF
T24
T25
VCC_67
VCC_68
VTT_FSB_16
VTT_FSB_17
J21
J22 (less than 100 mils from the package)
1
R136 Dummy
#REFDE7
1
COPPER
* C175
10uF
VCCA_EXP A17 VCC_EXP VCC_CKDDR_2
VCC_CKDDR_3
AL31
AL32
6.3V,X5R,+/-20% T26
T27
VCC_69
VCC_70
VTT_FSB_18
VTT_FSB_19
K21
K22
2 1 10V, Y5V, +80%/-20% AM31 BACK T29 L21
2
VCCDQ_CRT VCC_CKDDR_4 VCC_71 VTT_FSB_20

B20 VCCDQ_CRT U21 VCC_72 VTT_FSB_21 L22
COPPER B17 AM30 U22 M21
VSS VCCCML_DDR VCC_73 VTT_FSB_22
U23 VCC_74 VTT_FSB_23 M22
U24 VCC_75 VTT_FSB_24 N20
VCCAVRAM_EXP AG2 U25 VCC_76 VTT_FSB_25 N21
L29 1D1V_MCH U26 N22 1D5V_STR
(mA)(mVpp)MinVout 100nH VCC_77 VTT_FSB_26
U27 P20
*
1D1V_MCH VCCAPLL_EXP 50 20 1.045V VCCCML_DDR VCC_78 VTT_FSB_27
U29 VCC_79 VTT_FSB_28 P21
/VCCDPLL_EXP Eaglelake-Q W19 P22
VCC_80 VTT_FSB_29
W21 VCC_81 VTT_FSB_30 P24
1
B 1D1V_MCH B
VCCA_GPLLD
L23 1 Dummy 2 L0805 1uH R156 1
Dummy W23 VCC_82 VTT_FSB_31 R20
* C304
1
+/-10% W25 VCC_83 VTT_FSB_32 R21
* C303
* C301 2.2uF
* C306
1
#REFDE17
* C202
* C212 VCCAVRAM_EXP W27 R22 2.2uF 2.2uF 2.2uF
2
R153 1 10uF 0.1uF VCC_84 VTT_FSB_33
2 1 Dummy W29 R23
2
VCC_85 VTT_FSB_34
6.3V, Y5V, +80%/-20%

10V, Y5V, +80%/-20% 16V, Y5V, +80%/-20% Y20 R24
2
VCC_86 VTT_FSB_35
1
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%

COPPER
2
#REFDE20
1
* C261
2.2uF
Y22
Y24
VCC_87
VCC_88
6.3V, Y5V, +80%/-20% Y26
2
(mA)(mVpp)MinVout Dummy VCC_89

COPPER T22
L22 1 Dummy VCCA_GPLL VCCAPLL_EXP 50 20 1.045V VCC_90
2 L0805 1uH R155 1
Dummy T23 VCC_91
+/-10% /VCCDPLL_EXP VCC_HDA INT VRM DISABLE: VCCAVRM_EXP --->1.1V AC4 VCC_92
1
INT VRM ENABLE: VCCAVRM_EXP --->1.5V

2
#REFDE16
1 R151 1
Dummy * C188
10uF * C190
0.1uF for better PCIe Gen2 performance???
AF3
F9
VCC_93
VCC_94
10V, Y5V, +80%/-20% 16V, Y5V, +80%/-20% H4
2
#REFDE19 refer to EL update summary VCC_95

COPPER L3
If HDMI is not supported,VCC_HDA 052208 VCC_96 Connect ground sides of caps with traces to GND balls
2 1 P3 VCC_97
should be shorted to GND V4 (less than 100 mils from the package)
VCC_98
COPPER
L21 1 Dummy 2 L0805 10uH VCCA_DPLLA Eaglelake-Q

+/-20%
1
2
#REFDE8
1
* C185
22uF * C218
0.1uF
6.3V,X5R,+/-10% 16V, Y5V, +80%/-20% (mA)(mVpp)MinVout
2
COPPER VCCA_DPLLA/B>102 50 1.045V
1D1V_MCH 1D1V_MCH
L18 1 Dummy 2 L0805 10uH VCCA_DPLLB
+/-20%
1
2
#REFDE5
1
* C168
22uF * C171
0.1uF
6.3V,X5R,+/-10% 16V, Y5V, +80%/-20%
2
1
COPPER
* C429
10uF * C430
10uF * C428
10uF * C495
10uF * C494
10uF * C493
10uF * C254
1uF * C421
1uF
Dummy * C436
1uF * C422
1uF
Dummy * C423
1uF * C424
1uF * C434
1uF
Dummy
2
2
BACK BACK BACK BACK BACK BACK BACK BACK BACK BACK BACK
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

A A
FOXCONN PCEG
Place these caps close to 1D1V_MCH plane in MCH backside
Title
Eaglelake -GMCH -3
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
U33H 8 OF 10 U33I 9 OF 10
U33J 10 OF 10
BD12 VSS_186 VSS_271 W17

A12 VSS_1 VSS_94 AJ36 BD17 VSS_187 VSS_272 L26
A15 VSS_2 VSS_95 AJ39 BD43 VSS_188 VSS_273 L30
A19 VSS_3 VSS_96 AJ44 BD8 VSS_189 VSS_274 L35 VSS_355 A3
A27 VSS_4 VSS_97 AJ45 BE10 VSS_190 VSS_275 L39 VSS_356 A43
A31 VSS_5 VSS_98 AK35 BE15 VSS_191 VSS_276 L4 VSS_357 A6
A36 VSS_6 VSS_99 AK38 BE19 VSS_192 VSS_277 L8 VSS_358 B44
A40 VSS_7 VSS_100 AK39 BE21 VSS_193 VSS_278 L9 VSS_359 BC1
D
A8 VSS_8 VSS_101 AL38 BE25 VSS_194 VSS_279 M1 VSS_360 BC45 D
AA1 VSS_9 VSS_102 AL44 BE29 VSS_195 VSS_280 M24 VSS_361 BD2
AA11 VSS_10 VSS_103 AL45 BE34 VSS_196 VSS_281 M25 VSS_362 BD44
AA12 VSS_11 VSS_104 AN21 BE40 VSS_197 VSS_282 M44 VSS_363 BE3
AA13 VSS_12 VSS_105 AN22 C16 VSS_198 VSS_283 N11 VSS_364 BE43
GND
AA16 AN24 C3 N13 C1
美
VSS_13 VSS_106 VSS_199 VSS_284 VSS_365
AA17 VSS_14 VSS_107 AN25 C5 VSS_200 VSS_285 N16 VSS_366 C45
AA20 VSS_15 VSS_108 AN26 D11 VSS_201 VSS_286 N26 VSS_367 F1
AA22 VSS_16 VSS_109 AN33 D16 VSS_202 VSS_287 N29 VSS_368 BA5
AA24 VSS_17 VSS_110 AN36 D21 VSS_203 VSS_288 N30 VSS_369 AD30
AA26 VSS_18 VSS_111 AN38 D25 VSS_204 VSS_289 N33 VSS_370 AC30
AA34 VSS_19 VSS_112 AN7 D26 VSS_205 VSS_290 N36 VSS_371 AF30
AA38 VSS_20 VSS_113 AP20 D39 VSS_206 VSS_291 N38 VSS_372 AE30
AA40 VSS_21 VSS_114 AP21 D6 VSS_207 VSS_292 N8
AA44 VSS_22 VSS_115 AP22 D7 VSS_208 VSS_293 P16
AA8 VSS_23 VSS_116 AP24 E3 VSS_209 VSS_294 P17
AB11 VSS_24 VSS_117 AP25 E31 VSS_210 VSS_295 P25
AB17 VSS_27 VSS_120 AR10 F16 VSS_213 VSS_298 R11
AB21 AR13 F30 R16 Eaglelake-Q
VSS_29 VSS_122 VSS_215 VSS_300
AB34 VSS_33 VSS_126 AR31 G11 VSS_219 VSS_304 R30
GND
GND
AB7 VSS_38 VSS_131 AR9 G3 VSS_224 VSS_309 T10
AB8 VSS_39 VSS_132 AT1 G35 VSS_225 VSS_310 T11
AC20 VSS_40 VSS_133 AT11 H1 VSS_226 VSS_311 T12
商
C AD12 VSS_46 VSS_139 AT35 H25 VSS_232 VSS_317 T3 C
AD19 VSS_47 VSS_140 AU20 H30 VSS_233 VSS_318 T30
AD39 VSS_55 VSS_148 AV11 J3 VSS_241 VSS_326 T6
AE1 VSS_58 VSS_151 AV16 J5 VSS_244 VSS_329 T9
AE11 VSS_59 VSS_152 AV2 J8 VSS_245 VSS_330 U1
AE12 VSS_60 VSS_153 AV21 J9 VSS_246 VSS_331 W2
AE13 VSS_61 VSS_154 AV30 K11 VSS_247 VSS_332 W20
AE38 VSS_67 VSS_160 AW11 K33 VSS_253 VSS_338 W5
AE40 AW17 K45 Y10
匯
VSS_68 VSS_161 VSS_254 VSS_339
AE44 VSS_69 VSS_162 AW20 L10 VSS_255 VSS_340 Y11
AE8 VSS_70 VSS_163 AW22 L16 VSS_256 VSS_341 Y12
AF10 VSS_71 VSS_164 AW24 L20 VSS_257 VSS_342 Y13
AF11 VSS_72 VSS_165 AW26 U11 VSS_258 VSS_343 Y16
AF33 VSS_75 VSS_168 AY1 U16 VSS_261 VSS_346 Y2
AG19 VSS_80 VSS_173 AY30 U39 VSS_266 VSS_351 Y3
AG21 VSS_81 VSS_174 AY45 U44 VSS_267 VSS_352 Y35
AG23 VSS_82 VSS_175 B10 U8 VSS_268 VSS_353 Y39
B
AG25 VSS_83 VSS_176 B21 W1 VSS_269 VSS_354 Y9 B
AG27 VSS_84 VSS_177 B27 W16 VSS_270
AG45 VSS_85 VSS_178 B29
AG5 VSS_86 VSS_179 B34
AH2 VSS_87 VSS_180 BA23
AH3 VSS_88 VSS_181 F8
AH4 VSS_89 VSS_182 BB21
AJ20 VSS_90 VSS_183 BB25
AJ26 VSS_93
U33_1
11
FOXCONN
A A
2
Heatsink
2
FOXCONN PCEG
Title
Eaglelake -GMCH -4
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
DIMM2
1D5V_STR
M_ODT_B[1..0] 15
198 FREE1 RSVD 79
187 77 M_ODT_B1
FREE2 ODT1 M_ODT_B0
49 FREE3 ODT0 195
VTT_DDR 48 FREE4 VTT_DDR VTT_DDR
*R398
1K
240
120
VTT
VTT NC/PAR_IN 68
+/-1% 53
NC/ERR_OUT
NC/TEST4 167
239 VSS
235 VSS
SMVREFDQ_B 232 VSS
C498
C499
229 VSS
226 C394
VSS
1
D D
*R338
1K
* C402
223
220
VSS
VSS
CB<0>
CB<1>
39
40
* 4.7uF
6.3V, X5R, +/-10%
* *
+/-1% 1uF 217 45
2
VSS CB<2>
16V, Y5V, +80%/-20%
0.1uF
16V, Y5V, +80%/-20%
0.1uF
214 VSS CB<3> 46
211 158
美
VSS CB<4>
208 VSS CB<5> 159
205 VSS CB<6> 164
10V, Y5V, +80%/-20% 202 165
VSS CB<7>
199 VSS
166 VSS
163 7 M_DQS_B0
VSS DQS<0> M_DQS_BJ0
160 VSS DQS*<0> 6
1D5V_STR 157 VSS M_DQS_B1
154 VSS DQS<1> 16
151 15 M_DQS_BJ1
VSS DQS*<1>
148 VSS
145 25 M_DQS_B2
142 VSS DQS*<2> 24
*R345
1K
139
136
VSS
VSS DQS<3> 34 M_DQS_B3 1D5V_STR
+/-1% 133 33 M_DQS_BJ3 Place around DIMM PIN
VSS DQS*<3>
130 VSS
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
127 85 M_DQS_B4
VSS DQS<4>
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
124 84 M_DQS_BJ4
VSS DQS*<4>
C378
SMVREF_B_DDR3 121 VSS
C376
C331
C337
C335
C377
C444
C336
119 94 M_DQS_B5
116 VSS DQS*<5> 93
* R336
1K
* C388
113
110
VSS
VSS DQS<6> 103 M_DQS_B6
* * * * * * * *
10V, Y5V, +80%/-20%

+/-1% 1uF 107 102 M_DQS_BJ6
VSS DQS*<6>
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

104 VSS
1uF
1uF
1uF
1uF
1uF
1uF
1uF
101 112 M_DQS_B7
VSS DQS<7>
商
98 111 M_DQS_BJ7
VSS DQS*<7> M_DQS_B[7..0] 15
95 VSS M_DQS_BJ[7..0] 15
10V, Y5V, +80%/-20% 92 43
VSS DQS<8>
89 VSS DQS*<8> 42
86 VSS
C 83 125 M_DQM_B0 C
VSS DM0/DQS9
80 VSS DQS9* 126
47 VSS
44 134 M_DQM_B1
VSS DM1/DQS10
41 VSS DQS10* 135
38 1D5V_STR
VSS M_DQM_B2
35 143
DDRIII
VSS DM2/DQS11
C427
32 VSS DQS11* 144
29 VSS
26 152 M_DQM_B3
VSS DM3/DQS12
23
20
VSS
VSS
DQS12* 153
* *
C431
0.1uF
*
C443
0.1uF
10V, Y5V, +80%/-20%

17 203 M_DQM_B4 16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
VSS DM4/DQS13
1uF
14 VSS DQS13* 204
11 VSS
8 212 M_DQM_B5
VSS DM5/DQS14
5 VSS DQS14* 213
2 VSS
1D5V_STR 221 M_DQM_B6
DM6/DQS15
197 VDDQ DQS15* 222
194 VDDQ
191 230 M_DQM_B7
VDDQ DM7/DQS16
189 231
匯
VDDQ NC/DQS16*
186 VDDQ M_DQM_B[7..0] 15
183 VDDQ DM8/DQS17 161
182 VDDQ DQS17* 162
179 VDDQ M_DATA_B[63..0] 15
176 3 M_DATA_B0
VDDQ DQ<0> M_DATA_B1
173 VDDQ DQ<1> 4
170 9 M_DATA_B2
VDDQ DQ<2> M_DATA_B3
78 VDD DQ<3> 10
75 122 M_DATA_B4
VDD DQ<4> M_DATA_B5
72 VDD DQ<5> 123
69 128 M_DATA_B6
VDD DQ<6> M_DATA_B7
66 VDD DQ<7> 129
65 12 M_DATA_B8
SPD_PWR VDD DQ<8> M_DATA_B9
62 VDD DQ<9> 13
60 18 M_DATA_B10
B VDD DQ<10> M_DATA_B11 B
57 VDD DQ<11> 19
54 131 M_DATA_B12
VDD DQ<12> M_DATA_B13
51 VDD DQ<13> 132
236 137 M_DATA_B14
VDDSPD DQ<14>
* C520 DQ<15>
DQ<16>
138
21
M_DATA_B15
M_DATA_B16
1uF SMVREF_B_DDR3 67 22 M_DATA_B17
SMVREFDQ_B VREFCA DQ<17> M_DATA_B18
1 VREFDQ DQ<18> 27
118 28 M_DATA_B19
7,19,20,22,27,31,36 SMB_CLK_MAIN SCL DQ<19> M_DATA_B20
238 SDA DQ<20> 140
7,19,20,22,27,31,36 SMB_DATA_MAIN 237 141 M_DATA_B21
SA1 SA0 SA1 DQ<21> M_DATA_B22
117 SA0 DQ<22> 146
1 0 147 M_DATA_B23
DQ<23> M_DATA_B24
DQ<24> 30
31 M_DATA_B25
15 M_BS_B[2..0] M_BS_B2 DQ<25> M_DATA_B26
15 M_BS_B[2..0] 52 BA2 DQ<26> 36
M_BS_B1 190 37 M_DATA_B27
M_BS_B0 BA1 DQ<27> M_DATA_B28
71 BA0 DQ<28> 149
150 M_DATA_B29
DQ<29> M_DATA_B30
DQ<30> 155
15 M_SCKE_B[1..0] M_SCKE_B1 169 156 M_DATA_B31
M_SCKE_B0 CKE1 DQ<31> M_DATA_B32
50 CKE0 DQ<32> 81
82 M_DATA_B33
DQ<33> M_DATA_B34
76 S1* DQ<34> 87
15 M_SCS_B1J 193 88 M_DATA_B35
15 M_SCS_B0J S0* DQ<35> M_DATA_B36
DQ<36> 200
201 M_DATA_B37
DQ<37> M_DATA_B38
64 CK1/NU* DQ<38> 206
15 CK_M_200M_N_DDR2_B 63 207 M_DATA_B39
15 CK_M_200M_P_DDR2_B CK1/NU DQ<39> M_DATA_B40
185 CK0* DQ<40> 90
15 CK_M_200M_N_DDR0_B 184 91 M_DATA_B41
15 CK_M_200M_P_DDR0_B CK0 DQ<41> M_DATA_B42
15 M_MAA_B[14..0] DQ<42> 96
M_MAA_B0 188 97 M_DATA_B43
M_MAA_B1 A0 DQ<43> M_DATA_B44
181 A1 DQ<44> 209
180 A3 DQ<46> 215
A 58 A5 DQ<48> 99 A
56 A7 DQ<50> 105
175 A9 DQ<52> 218
M_MAA_B11 A10/AP DQ<53> M_DATA_B54
55 A11 DQ<54> 224
M_MAA_B12 174 225 M_DATA_B55
196 A13 DQ<56> 108
M_MAA_B14 172 109 M_DATA_B57
171
A14
A15
DQ<57>
DQ<58> 114 M_DATA_B58
M_DATA_B59
FOXCONN PCEG
DQ<59> 115
168 227 M_DATA_B60 Title
15,19 DDR3_DRAMRST_N RESET* DQ<60> M_DATA_B61
15 M_CAS_BJ 74 CAS* DQ<61> 228 DDR2 Channel B
192 233 M_DATA_B62
15 M_RAS_BJ RAS* DQ<62> M_DATA_B63 Size Document Number Rev
73 234
15 M_WE_BJ WE*
DDR III
DQ<63> C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
DIMM1
M_ODT_A[1..0] 15
1D5V_STR 198 79
FREE1 RSVD M_ODT_A1 1D5V_STR
187 FREE2 ODT1 77
49 195 M_ODT_A0 VTT_DDR
FREE3 ODT0
48 FREE4
VTT_DDR 240 VTT
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
*R340
1K
120 VTT NC/PAR_IN
NC/ERR_OUT
68
53
C360
C365
C369
C364
C358
C389
C362
C409
C442
C410
+/-1% 167
NC/TEST4
239 VSS
C374
235 VSS
SMVREF_A_DDR3
232
229
VSS
VSS
* * * * * * * * * *
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

226 VSS *
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
223 VSS CB<0> 39
16V, Y5V, +80%/-20%
0.1uF
R339 C361 220 40
D * 1K
* 1uF 217
VSS
VSS
CB<1>
CB<2> 45
D
+/-1% 16V, Y5V, +80/-20% 214 46
VSS CB<3>
211 VSS CB<4> 158
208 VSS CB<5> 159
205 164
美
VSS CB<6>
202 VSS CB<7> 165
199 VSS M_DQS_AJ[7..0] 15
166 VSS
163 7 M_DQS_A0
VSS DQS<0> M_DQS_AJ0
160 VSS DQS*<0> 6
157 VSS
1D5V_STR 154 16 M_DQS_A1
151 VSS DQS*<1> 15
148 VSS
145 25 M_DQS_A2
142 VSS DQS*<2> 24
139 VTT_DDR
R325 VSS M_DQS_A3
136 34
* 1K 133
VSS
VSS
DQS<3>
DQS*<3> 33 M_DQS_AJ3 1D5V_STR
+/-1% 130 VSS M_DQS_A4
127 VSS DQS<4> 85
124 84 M_DQS_AJ4
VSS DQS*<4>
121 VSS
SMVREFDQ_A 119 94 M_DQS_A5
VSS DQS<5>
C407
C370
116 93 M_DQS_AJ5
VSS DQS*<5>
C440
C437
113 VSS
R323 C355 110 103 M_DQS_A6
* 1K
* 1uF 107
VSS
VSS
DQS<6>
DQS*<6> 102 M_DQS_AJ6
* *
+/-1% 16V, Y5V, +80/-20% 104 VSS * *
16V, Y5V, +80%/-20%
0.1uF
16V, Y5V, +80%/-20%
0.1uF
101 112 M_DQS_A7
VSS DQS<7>
16V, Y5V, +80%/-20%
0.1uF
16V, Y5V, +80%/-20%
0.1uF
98 111 M_DQS_AJ7
VSS DQS*<7>
95 VSS
商
92 VSS DQS<8> 43
89 VSS DQS*<8> 42
86 VSS M_DQS_A[7..0] 15
83 125 M_DQM_A0
VSS DM0/DQS9
80 VSS DQS9* 126
C 47 VSS
C
44 134 M_DQM_A1
VSS DM1/DQS10
41 VSS DQS10* 135
38 VSS
35 143 M_DQM_A2
DDRIII
VSS DM2/DQS11
32 VSS DQS11* 144
29 VSS
26 152 M_DQM_A3
VSS DM3/DQS12
23 VSS DQS12* 153
20 VSS
17 203 M_DQM_A4
VSS DM4/DQS13
14 VSS DQS13* 204
11 VSS
8 212 M_DQM_A5
VSS DM5/DQS14
5 VSS DQS14* 213
2 VSS
1D5V_STR 221 M_DQM_A6
DM6/DQS15
197 VDDQ DQS15* 222
194 VDDQ
191 230 M_DQM_A7
VDDQ DM7/DQS16
189 VDDQ NC/DQS16* 231
186 VDDQ
183 161
匯
VDDQ DM8/DQS17
182 VDDQ DQS17* 162 M_DQM_A[7..0] 15
179 VDDQ M_DATA_A[63..0] 15
176 3 M_DATA_A0
VDDQ DQ<0> M_DATA_A1
173 VDDQ DQ<1> 4
3D3V_SYS 170 9 M_DATA_A2
VDDQ DQ<2> M_DATA_A3
78 VDD DQ<3> 10
75 122 M_DATA_A4
VDD DQ<4> M_DATA_A5
72 VDD DQ<5> 123
69 128 M_DATA_A6
VDD DQ<6> M_DATA_A7
SPD_PWR
*R296
0
66
65
VDD
VDD
DQ<7>
DQ<8>
129
12 M_DATA_A8
+/-5% 62 13 M_DATA_A9
VDD DQ<9> M_DATA_A10
60 VDD DQ<10> 18
57 19 M_DATA_A11
B
54 VDD DQ<12> 131 B
51 132 M_DATA_A13
236 VDDSPD DQ<14> 137
* C519 DQ<15>
DQ<16>
138
21
M_DATA_A15
M_DATA_A16
1uF SMVREF_A_DDR3 67 22 M_DATA_A17
SMVREFDQ_A VREFCA DQ<17> M_DATA_A18
1 VREFDQ DQ<18> 27
118 28 M_DATA_A19
7,18,20,22,27,31,36 SMB_CLK_MAIN SCL DQ<19> M_DATA_A20
238 SDA DQ<20> 140
7,18,20,22,27,31,36 SMB_DATA_MAIN 237 141 M_DATA_A21
SA1 DQ<21> M_DATA_A22
117 SA0 DQ<22> 146
147 M_DATA_A23
DQ<23> M_DATA_A24
DQ<24> 30
31 M_DATA_A25
15 M_BS_A[2..0] M_BS_A2SA2 SA1 SA0 DQ<25> M_DATA_A26
52 BA2 DQ<26> 36
M_BS_A1 0 0 0 190 37 M_DATA_A27
M_BS_A0 BA1 DQ<27> M_DATA_A28
71 BA0 DQ<28> 149
150 M_DATA_A29
DQ<29> M_DATA_A30
DQ<30> 155
15 M_SCKE_A[1..0] M_SCKE_A1 169 156 M_DATA_A31
M_SCKE_A0 CKE1 DQ<31> M_DATA_A32
50 CKE0 DQ<32> 81
82 M_DATA_A33
M_SCS_A1J_DDR3 DQ<33> M_DATA_A34
76 S1* DQ<34> 87
15 M_SCS_A1J_DDR3 M_SCS_A0J 193 88 M_DATA_A35
15 M_SCS_A0J S0* DQ<35> M_DATA_A36
DQ<36> 200
201 M_DATA_A37
DQ<37> M_DATA_A38
64 CK1/NU* DQ<38> 206
15 CK_M_200M_N_DDR0_A 63 207 M_DATA_A39
15 CK_M_200M_P_DDR0_A CK1/NU DQ<39> M_DATA_A40
185 CK0* DQ<40> 90
15 CK_M_200M_N_DDR2_A 184 91 M_DATA_A41
15 CK_M_200M_P_DDR2_A M_MAA_A0_DDR3 CK0 DQ<41> M_DATA_A42
15 M_MAA_A0_DDR3 DQ<42> 96
188 97 M_DATA_A43
15 M_MAA_A[14..1] M_MAA_A1 A0 DQ<43> M_DATA_A44
181 A1 DQ<44> 209
M_MAA_A2 61 210 M_DATA_A45
M_MAA_A3 A2 DQ<45> M_DATA_A46
180 A3 DQ<46> 215
58 A5 DQ<48> 99
A 56 A7 DQ<50> 105 A
175 A9 DQ<52> 218
M_MAA_A11 A10/AP DQ<53> M_DATA_A54
55 A11 DQ<54> 224
M_MAA_A12 174 225 M_DATA_A55
196 A13 DQ<56> 108
M_MAA_A14 172 109 M_DATA_A57
A14 DQ<57> M_DATA_A58
171 A15 DQ<58> 114
115 M_DATA_A59
15,18 DDR3_DRAMRST_N
168 RESET*
DQ<59>
DQ<60> 227 M_DATA_A60
M_DATA_A61
FOXCONN PCEG
15 M_CAS_AJ 74 CAS* DQ<61> 228
192 233 M_DATA_A62 Title
15 M_RAS_AJ RAS* DQ<62> M_DATA_A63
15 M_WE_AJ_DDR3 73 WE* DQ<63> 234 DDR2 Channel B
DDR III
C G41M05 A
Date: Friday, October 23, 2009 Sheet 19 of 34

5 4 3 2 1
亞
5 4 3 2 1
3D3V_SB 3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS

PCI-E1_16X
B1 12V PRSNT1# A1
B2 12V 12V A2
B3 RSVD1 12V A3
B4 GND GND A4
7,18,19,22,27,31,36 SMB_CLK_MAIN B5 SMCLK JTAG2 A5
7,18,19,22,27,31,36 SMB_DATA_MAIN B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9
B10 3.3VAUX 3.3V A10
WAKEJ B11 A11 PLTRSTJ
22,27 WAKEJ WAKE# PWRGD PLTRSTJ 14,22,27,30
D KEY D
B12 RSVD2 GND A12

B13 A13 CK_PE_100M_P_16PORT
GND REFCLK+ CK_PE_100M_P_16PORT 7
EXP_TXP0 C151 0.1uF 16V, X7R, +/-10% EXP_TXP0_C B14 A14 CK_PE_100M_N_16PORT
14 EXP_TXP0 CK_PE_100M_N_16PORT 7
**
EXP_TXN0 C154 0.1uF 16V, X7R, +/-10% EXP_TXN0_C HSOP0 REFCLK-
B15 A15
美
14 EXP_TXN0 HSON0 GND
B16 A16 EXP_RXP0
#REFDE4 SDVO_CTRLCLK_PCIE GND HSIP0 EXP_RXN0 EXP_RXP0 14
14 SDVO_CTRLCLK 2 1 B17 PRSNT2_B17# HSIN0 A17 EXP_RXN0 14
COPPER B18 A18
GND GND
EXP_TXP1 C159 0.1uF 16V, X7R, +/-10% EXP_TXP1_C B19 A19

14 EXP_TXP1
** ** ** HSOP1 RSVD3
EXP_TXN1 C161 0.1uF 16V, X7R, +/-10% EXP_TXN1_C B20 A20
B21 A21 EXP_RXP1
GND HSIP1 EXP_RXN1 EXP_RXP1 14
B22 GND HSIN1 A22 EXP_RXN1 14
14 EXP_TXP2 HSOP2 GND
B25 A25 EXP_RXP2
B29 A29 EXP_RXP3
B30 RSVD4 HSIN3 A30 EXP_RXN3 14
#REFDE13
2 1 SDVO_CTRLDATA_PCIE B31 A31
14 SDVO_CTRLDATA PRSNT2_B31# GND
COPPER B32 A32
GND RSVD5
EXP_TXP4_GFX C182 0.1uF 16V, X7R, +/-10% EXP_TXP4_GFX_C B33 A33
14 EXP_TXP4
** ** ** **
EXP_TXN4_GFX C186 0.1uF 16V, X7R, +/-10% EXP_TXN4_GFX_C HSOP4 RSVD

14 EXP_TXN4 B34 HSON4 GND A34
B35 A35 EXP_RXP4
EXP_TXP5_GFX C211 0.1uF 16V, X7R, +/-10% EXP_TXP5_GFX_C B37 A37
EXP_TXN5_GFX C203 0.1uF 16V, X7R, +/-10% EXP_TXN5_GFX_C B38 A38
B39 A39 EXP_RXP5
GND HSIP5 EXP_RXP5 14
商
B40 A40 EXP_RXN5
EXP_TXP6_GFX C223 0.1uF 16V, X7R, +/-10% EXP_TXP6_GFX_C GND HSIN5 EXP_RXN5 14
14 EXP_TXP6 B41 HSOP6 GND A41
B43 A43 EXP_RXP6
C EXP_TXP7_GFX C233 0.1uF 16V, X7R, +/-10% EXP_TXP7_GFX_C B45 A45 C
B47 A47 EXP_RXP7_SW
#REFDE22 EXP_PRSNT_C GND HSIP7 EXP_RXN7_SW EXP_RXP7 14
14 GMCH_EXP_EN_HDR 2 1 B48 PRSNT2_B48# HSIN7 A48 EXP_RXN7 14
COPPER B49 A49
GND GND

14 EXP_TXP8
** ** ** ** ** ** ** **
EXP_TXN8 C239 0.1uF 16V, X7R, +/-10% EXP_TXN8_C HSOP8 RSVD6

14 EXP_TXN8 B51 HSON8 GND A51
B52 A52 EXP_RXP8
B56 A56 EXP_RXP9
B60 A60 EXP_RXP10
B64 A64 EXP_RXP11
B65 A65
匯
EXP_TXP12 C266 0.1uF 16V, X7R, +/-10% EXP_TXP12_C GND HSIN11 EXP_RXN11 14
14 EXP_TXP12 B66 HSOP12 GND A66
B68 A68 EXP_RXP12
B72 A72 EXP_RXP13
B76 A76 EXP_RXP14
B80 A80 EXP_RXP15
B GND HSIP15 EXP_RXN15 EXP_RXP15 14 B
B81 PRSNT2_B81# HSIN15 A81 EXP_RXN15 14
B82 RSVD7 GND A82
Slot-PCIE-16X
Change to another part.

050608
12V_SYS 3D3V_SYS 3D3V_SB
EC23 C112 EC29 C129

* 470uF
16V, +/-20% * 0.1uF
16V, Y5V, +80%/-20%
* 1000uF
+/-20% * 0.1uF
16V, Y5V, +80%/-20%
A A
FOXCONN PCEG
Title
PCI Express x16 Gfx Slot
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
D D
美
5V_SYS
3D3V_SYS
*
F1
RED L5 L3 Fuse 1.5A
14 RED
*
5V_SYS 5V_SYS 100nH
82nH@100MHz
3
C35 C24 Q7 *R43
150
*
C37
3.3pF
*
C39
22pF
*
C30
10pF
* 0.1uF
* 0.1uF BAV99DPT +/ -1% 50V, NPO, +/-0.25pF 50V, NPO, +/-5% 50V, NPO, +/-5%
1
16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
L10
Dummy FB 300 Ohm
2
L_RED
EMI cap. for RGB layer change GREEN L6 L8 L_GREEN
14 GREEN
*
L_BLUE
3D3V_SYS 100nH
82nH@100MHz
商
VGA
*R47
150
*
C45
3.3pF
*
C52
22pF
*
C42
10pF VGA
+/ -1% 50V, NPO, +/-0.25pF 50V, NPO, +/-5% 50V, NPO, +/-5% 5V_DDCA_CLK 15 SCL GND 5
3
RGB routing 5V_DDCA_DATA 10 GND
C
1. from GMCH to the first 150 ohm resistor: 7.5 mils(min. 6 mils spacing ) Q8 14 VSYNC ID0 4 C
BAV99DPT 9 NC
2. from the first 150 ohm res. to the second 150 ohm resistor: 4 mils 13 HSYNC B 3
3. from the second 150 ohm resistor to connector: 4 mils 8 GND
12 SDA G 2
4. spacing minimum 6 mils, 30 mils spacing is recommended 7 GND
16V, Y5V, +80%/-20%

5. R,G,B should be length matched to 700 mils, max. length is 8400 mils 11 ID1 R 1
6 GND
6. R,G,B signals should be ground referenced * C69
0.1uF
BLUE L9 L11 CONN-VGA
16
17
14 BLUE
*
100nH
82nH@100MHz
*R54
150
*
C64
3.3pF
*
C66
22pF
*
C61
10pF
+/ -1% 50V, NPO, +/-0.25pF 50V, NPO, +/-5% 50V, NPO, +/-5%
3D3V_SYS 5V_SYS
匯
RN5
2
4
6
8
2.2K
+/-5% The 150 Ohm resistors near VGA connector and
* 13
5
7
minimizing length to filter. The filters to VGA

connector maximum distance 800 mils.
3D3V_SYS
VSYNC_S
HSYNC_S
B 2N7002DW B
DDCA_CLK 1 4
14 DDCA_CLK S1 S2
2 G1 G2 5
6 D1 D2 3 5V_SYS
Q2
*
R10 +/-1% 5V_DDCA_CLK

DDCA_DATA 100 Ohm
14 DDCA_DATA
1
Q1
BAV99DPT
6
3D3V_SYS
*
R22 +/-1% 5V_DDCA_DATA

100 Ohm
VSYNC VSYNC_S
14 VSYNC
C22
* 10pF
1
50V, NPO, +/-5%

Q5 Dummy
BAV99DPT
A A
C15,C26 Near by the connector
6
HSYNC HSYNC_S
14 HSYNC
C18
* 10pF
50V, NPO, +/-5% FOXCONN PCEG
Dummy
Title
VGA
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
GPIO[39:36,23:21,19,7:0]: default as inputs and should be

pulled up to Vcc3_3 if unused.
GPIO[31:29,15:8]: default as inputs and should be pulled up to
VccSus3_3 if unused.
double check unused GPIO

pins
U13F
U13C
Only G41 place ICH7
ICH7
ICH7
D 30 L_AD[3..0] D
DMI_TXN0 C204 0.1uF 16V, X7R, +/-10% DMI_TXN0_ICH V26 DMI0RXN USBP0N F1 USBP0N AA5 LDRQ1*/GPIO23 GPIO0/BM_BUSY* AB18 ICH7_GPIO0
14 DMI_TXN0
****************
DMI_TXP0 C205 0.1uF 16V, X7R, +/-10% DMI_TXP0_ICH USBP0P USBN0 25 L_AD0 ICH7_GPIO6
14 DMI_TXP0 V25 DMI0RXP USBP0P F2 USBP0 25 AA6 LAD0 GPIO6 AC21
DMI_RXN0 C353 0.1uF 16V, X7R, +/-10% DMI_RXN0_ICH U28 DMI0TXN USBP1N G4 USBP1N L_AD1 AB5 LAD1 GPIO7 AC18 ICH7_GPIO7
14 DMI_RXN0 USBN1 26
LPC
DMI_RXP0 C357 0.1uF 16V, X7R, +/-10% DMI_RXP0_ICH U27 DMI0TXP USBP1P G3 USBP1P L_AD2 AC4 LAD2 GPIO8 E21 L_PMEJ
美
14 DMI_RXP0 DMI_TXN1 C201 0.1uF 16V, X7R, +/-10% DMI_TXN1_ICH USBP2N USBP1 26 L_AD3 ICH7_GPIO9 L_PMEJ 30
14 DMI_TXN1 Y26 DMI1RXN USBP2N H1 USBN2 26 Y6 LAD3 GPIO9 E20 P66DET 23
DMI_TXP1 C200 0.1uF 16V, X7R, +/-10% DMI_TXP1_ICH Y25 DMI1RXP USBP2P H2 USBP2P AC3 LDRQ0* GPIO10 A20 ICH7_GPIO10
14 DMI_TXP1 USBP2 26 30 L_DRQ0J 1D8V_GPIO10 11
DMI_RXN1 C359 0.1uF 16V, X7R, +/-10% DMI_RXN1_ICH W28 DMI1TXN USBP3N J4 USBP3N AB3 LFRAME* GPIO12 F19 LAN_PMEJ
14 DMI_RXN1 USBN3 25 30 L_FRAMEJ LAN_PMEJ 28
DMI
DMI_RXP1 C366 0.1uF 16V, X7R, +/-10% DMI_RXP1_ICH W27 DMI1TXP USBP3P J3 USBP3P +/-5% GPIO13 E19 ICH7_GPIO13
**
14 DMI_RXP1 DMI_TXN2 C197 0.1uF 16V, X7R, +/-10% DMI_TXN2_ICH USBP4N USBP3 25 33
R304 R308 ICH7_GPIO14 GTL_GPIO13 12
14 DMI_TXN2 AB26 DMI2RXN USBP4N K1 USBN4 26 29 ICH_BCLK U1 ACZ_BCLK GPIO14 R4 1D8V_GPIO14 11
DMI_TXP2 C196 0.1uF 16V, X7R, +/-10% DMI_TXP2_ICH AB25 DMI2RXP USBP4P K2 USBP4P 33 R5 ACZ_RST* GPIO15 E22 BIOS_WPJ
14 DMI_TXP2 USBP4 26 29 ICH_RSTJ
AUDIO
DMI_RXN2 C373 0.1uF 16V, X7R, +/-10% DMI_RXN2_ICH USBP5N +/-5% Need to Checked
14 DMI_RXN2 AA28 DMI2TXN USBP5N L4 USBN5 28 T2 ACZ_SDI_0 GPIO16/DPRSLPVR AC22
DMI_RXP2 C372 0.1uF 16V, X7R, +/-10% DMI_RXP2_ICH AA27 DMI2TXP USBP5P L5 USBP5P T3 ACZ_SDI_1 GPIO18/STPPCI* AC20
14 DMI_RXP2 DMI_TXN3 C193 0.1uF 16V, X7R, +/-10% DMI_TXN3_ICH USBP6N USBP5 28 R306
14 DMI_TXN3 AD25 DMI3RXN USBP6N M1 T1 ACZ_SDI_2 GPIO20/STPCPU* AF21
**
DMI_TXP3 C192 0.1uF 16V, X7R, +/-10% DMI_TXP3_ICH USBP6P USBN6 26 29 ICH_SDIN2 33
R303 R271
14 DMI_TXP3 AD24 DMI3RXP USBP6P M2 T4 ACZ_SDOUT GPIO24 R3
*
DMI_RXN3 C379 0.1uF 16V, X7R, +/-10% DMI_RXN3_ICH USBP7N USBP6 26 29 ICH_SDOUT +/-5%
33 1K
14 DMI_RXN3 AC28 DMI3TXN USBP7N N4 USBN7 28 29 ICH_SYNC R6 ACZ_SYNC GPIO25 D20
DMI_RXP3 C375 0.1uF 16V, X7R, +/-10% DMI_RXP3_ICH AC27 DMI3TXP USBP7P N3 USBP7P +/-5% AC1 CLK14 EL_RSVD/GPIO26 A21 ICH_GPIO26
+/-5%
14 DMI_RXP3 USBP7 28 7 CK_14M_ICH GTL_GPIO26 12
USB
EL_STATE0/GPIO27 B21
EPROM
W1 EE_CS EL_STATE1/GPIO28 E23
27 HSI_N1_SLOT F26 PERN_1 OC0* D3 W3 EE_DIN GPIO32/CLKRUN* AG18
27 HSI_P1_SLOT F25 PERP_1 OC1* C4 Y2 EE_DOUT GPIO33/AZ_DOCK_EN* AC19
C328 0.1uF 16V, X7R, +/-10% HSO_N1 E28 PETN_1 OC2* D5 ICH_BCLK Y1 EE_SHCLK GPIO34/AZ_DOCK_RST* U2 Board_ID1 33
** **
27 HSO_N1_SLOT C327 0.1uF 16V, X7R, +/-10% HSO_P1 USB_OCJ_FRONT 26

27 HSO_P1_SLOT E27 PETP_1 OC3* D4 GPIO35 AD21
H26 PERN_2 OC4* E5 V3 LAN_CLK GPIO38 AD20 ICH7_GPIO38
28 HSI_N2_LAN Board_ID2 33Need to Checked
H25 PERP_2 OC5*/GPIO29 C3 C351 R268 U3 LAN_RSTSYNC GPIO39 AE20 ICH7_GPIO39
28 HSI_P2_LAN
*
HSO_N2
28
28
HSO_N2_LAN
HSO_P2_LAN
C340
C334
0.1uF 16V, X7R, +/-10%
0.1uF 16V, X7R, +/-10% HSO_P2
G28
G27
PETN_2
PETP_2
OC6*/GPIO30
OC7*/GPIO31
A2
B3 USB_OCJ_BACK 28
* 22pF
50V, NPO, +/-5%
10KICH_LAN_RSTJ
+/-5%
C19
U5
LAN_RST*
LAN_RXD0
CPUPWRGD_GPIO49 AG24 CPU_PWRG 12
PERN_3 LAN_RXD1 THRM* ICH_THRM_UP
LAN
K26 V4 AF20 ICH_THRM_UP 12,30
K25 PERP_3 R294 T5 LAN_RXD2 VRMPWRGD AD22 ICH_VRMPWRGD_UP
MISC
J28 PETN_3 USBRBIAS D1 USBRBIAS_ICH 22.6 U7 LAN_TXD0 MCH_SYNC* AH20
+/-1% ICH_SYNCJ 14
PETP_3 USBRBIAS* LAN_TXD1 PWRBTN*
PCI-EXPRESS
J27 D2 Dummy V6 C23 PWRBTNJ 30
M26 PERN_4 V7 LAN_TXD2 RI* A28 ICH_RIJ_PU
ICH_RIJ_PU 11
商
M25 PERP_4 SUS_STAT* A27 LPCPDJ
ICH_RTCX1 LPCPDJ 30 VCCRTC
L28 PETN_4 AB1 RTCX1 SUSCLK C20
RTC
L27 PETP_4 CLK48 B2 CK_48M_ICH ICH_RTCX2 AB2 RTCX2 SYS_RST* A22
CK_48M_ICH 7 RTCRSTJ PLTRSTJ ICH_SYS_RSTJ 7,8,12
P26 PERN_5 23 RTCRSTJ AA3 RTCRST* PLTRST* C26 PLTRSTJ 14,20,27,30
P25 PERP_5 WAKE* F20 WAKEJ
USBRBIAS connection SMB_ALERT_PU INTRUDERJ WAKEJ 20,27 R324
C N28 PETN_5 B23 SMBALERT*/GPIO11 INTRUDER* Y5 C
N27 PETP_5 5 mils width, length no longer than 500 mils C22 SMBCLK PWROK AA4 390K
Trace tied together close to pins. 7,18,19,20,27,31,36 SMB_CLK_MAIN PWRGD_3V 14,30
T25 PERN_6 B22 SMBDATA RSMRST* Y4 NB_RSMRSTJ +/-5%
7,18,19,20,27,31,36 SMB_DATA_MAIN
PERP_6 SMALERT_ICH LINKALERT* INTVRMEN INTVRMEN
SMB
T24 A26 W4
R28 PETN_6 SMLINK0 B25 SMLINK0 SPKR A19 SPKR
SPKR 8 check pull-up resistor
1D5V_PE_ICH R27 PETP_6 SMLINK1 A25 SMLINK1
SLP_S3* B24 SLP_S3J 30
R289 24.9 DMI_COMP_ICH C25 DMI_ZCOMP ICH_SPI_MOSI P5 SPI_MOSI SLP_S4* D23
+/-1% ICH_SPI_MISO SLP_S4J 11,15
DMI_IRCOMP SPI_MISO SLP_S5*
SPI
D25 P2 F22
ICH_SPI_CSJ P6 SPI_CS*
DMI compensation CK_PE_100M_N_ICH AE28 DMI_CLKN ICH_SPI_CLK R2 SPI_CLK TP0/BATLOW* C21 ICH_BATLOW_PU
5 mils width, 7 mils spacing 7 CK_PE_100M_N_ICH
CK_PE_100M_P_ICH AE27 DMI_CLKP 2 of 6 TP1 SPI_ARB P1 SPI_ARB TP1/DPRSTP* AF24
Place the resistor within 500 mils of ICH7 7 CK_PE_100M_P_ICH TP12
TP2/DPSLP* AH25 TP13
TP3 TP_ICH7_F21
1 ? 4 of 6 F21 TP8
1 ?
3D3V_SB
*
7,9 VRMPWRGD R341 Dummy
0 ICH_VRMPWRGD_UP
+/-5%
匯
R331
3D3V_SYS
*R342 * *1K
1
C406
3D3V_SB 100KOhm 1uF +/-5%
RN27 +/-1% 10V, Y5V, +80%/-20%
*
2
*1 2
LPCPDJ
SMALERT_ICH
Dummy R333
0
+/-5%
RN43 3 4 SMLINK0
5 6
ICH7_GPIO7
ICH_VRMPWRGD_UP
*1 2 7 8
SMLINK1
30 RSMRSTJ
RSMRSTJ E C
Q37
NB_RSMRSTJ
ICH_THRM_UP 3 4 10K Ohm MMBT3906

ICH7_GPIO6 5 6 +/-5% Dummy *R328
10K
B
7 8 +/-5%
10K Ohm
+/-5% 3D3V_SB
R330
R349 RN26
*
*
B B
ICH7_GPIO0 10K
+/-5%
*1 2
SMB_ALERT_PU
L_PMEJ
3D3V_SB
3 4
*
R348 ICH_BATLOW_PU
5 6 4.7K
1
ICH7_GPIO39 10K LAN_PMEJ VCCRTC
+/-5% 7 8 +/-5%
10K Ohm R326 Dummy 3
+/-5% INTRUDERJ 1M
+/-5% Q35
BAV99
A 2
3D3V_SB Dummy
D15
Dummy
*
U13_1 R270 +/-5% WAKEJ LS4148-F

1K
C
1 1
SPI_SOCKET_1 *R332
2.2K
+/-5%
Use 3D3V_SYS or not Dummy
1 VCC 8
Steven Sun Update 2007.03.28 CS
2 DO 7
HOLD
3 WP CLK 6
4 GND DIO 5
INTR
INTRUDERJ 1 W25X80VDAIZ
2 2 3D3V_SB
2 close to ICH7
ICH_RTCX2 Header_1X2
ICH_RTCX1 RN20
2
4
6
8
Heatsink
10K Ohm
3D3V_SB
+/-5%
*
* 13
5
7
R310 10M
+/-5%
A A
X2 XTAL-32.768kHz X2_1 16V, Y5V, +80%/-20%
2 1 3D3V_SB C274 0.1uF *R223
10K
*
+/-5%
Need to Apply C356 C367 SPI_SOCKET
4
* 12pF
* 12pF 8 CS 1
ICH_SPI_CSJ
*
+/-5% +/-5% Crystal Retainer ICH_SPI_HOLDJ VCC SPI_MISO R204 47 ICH_SPI_MISO

7 DO 2
**
ICH_SPI_CLK R213 47 +/-5% SPI_CLK HOLD +/-5% BIOS_WPJ

6 CLK WP 3
ICH_SPI_MOSI R220 47 +/-5% SPI_MOSI 5 DIO GND 4
This clip is for ICH7
32.768Khz Crystal clip. close to ICH7 within 100 mils Socket
FOXCONN PCEG
Assume Capastor CL value is 12.5 Title
SPI Population Options ICH7 -1
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
U13B 1
SATA_1
ICH7 SATA_TXP0 C485 10nF 25V, X7R, +/-10% SATA_TXP0_C 2
** **
SATA_TXN0 C479 10nF 25V, X7R, +/-10% SATA_TXN0_C 3 8
PIDE_D0 AB15 DD0 SATA0RXN AF3 SATA_RXN0 4
PIDE_D1 AE14 DD1 SATA0RXP AE3 SATA_RXP0 SATA_RXN0 C467 10nF 25V, X7R, +/-10% SATA_RXN0_C 5 9
PIDE_D2 AG13 DD2 SATA0TXN AG2 SATA_TXN0 SATA_RXP0 C456 10nF 25V, X7R, +/-10% SATA_RXP0_C 6
PIDE_D3 AF13 DD3 SATA0TXP AH2 SATA_TXP0 7
D RSVD/SATA1RXN D
PIDE_D4 AD14 DD4 AE5 SATA_RXN1 3D3V_SYS
PIDE_D5 AC13 DD5 RSVD/SATA1RXP AD5 SATA_RXP1 CONN-SATA
PIDE_D6 AD12 DD6 RSVD/SATA1TXN AG4 SATA_TXN1
PIDE_D7 AC12 DD7 RSVD/SATA1TXP AH4 SATA_TXP1
PIDE_D8 AE12 DD8 SATA2RXN AF7 SATA_RXN2
美
PIDE_D9 SATA_RXP2
SATA
AF12 DD9 SATA2RXP AE7 SATA_3
PIDE_D10 AB13 DD10 SATA2TXN AG6 SATA_TXN2 1
PIDE_D11 SATA2TXP SATA_TXP2 SATA_TXP1 C484 10nF 25V, X7R, +/-10% SATA_TXP1_C
AC14 DD11
IDE
AH6 2
*R383 *R382
** **
PIDE_D12 AF14 DD12 RSVD/SATA3RXN AD9 SATA_RXN3 SATA_TXN1 C480 10nF 25V, X7R, +/-10% SATA_TXN1_C 3 8 8.2K 4.7K
PIDE_D13 AH13 DD13 RSVD/SATA3RXP AE9 SATA_RXP3 4 +/-5% +/-5%
PIDE_D14 AH14 DD14 RSVD/SATA3TXN AG8 SATA_TXN3 SATA_RXN1 C468 10nF 25V, X7R, +/-10% SATA_RXN1_C 5 9
PIDE_D15 AC15 DD15 RSVD/SATA3TXP AH8 SATA_TXP3 SATA_RXP1 C457 10nF 25V, X7R, +/-10% SATA_RXP1_C 6
SATACLKN AF1 CK_SATA_100M_N_ICH 7
CK_SATA_100M_N_ICH 7
PIDE_DAKJ AF16 DDACK* SATACLKP AE1 CK_SATA_100M_P_ICH
CK_SATA_100M_P_ICH 7
PIDE_DREQ AE15 DDREQ CONN-SATA PIDE
PIDE_IORJ AF15 DIOR* P_IDERSTJ 1 2
*
PIDE_IOWJ AH15 DIOW* SATARBIASN AH10 SATARBIAS_ICH R352 27 PIDE_D7 3 4 PIDE_D8
PIDE_RDY AG16 IORDY AG10 +/-1% SATARBIAS connection PIDE_D6 5 6 PIDE_D9
SATARBIASP SATA_LED PIDE_D5 PIDE_D10
SATALED* AF18 5 mils width, length no longer than 500 mils 7 8
PIDE_A0 AH17 DA0 Trace tied together close to pins.
PIDE_D4 9 10 PIDE_D11
PIDE_A1 AE17 DA1 GPIO21/SATA0GP AF19 R350 10K 3D3V_SYS PIDE_D3 11 12 PIDE_D12
*
PIDE_A2 AF17 DA2 GPIO19/SATA1GP AH18 +/-5% PIDE_D2 13 14 PIDE_D13
GPIO36/SATA2GP AH19 PIDE_D1 15 16 PIDE_D14
PIDE_CS1J AE16 DCS1* GPIO37/SATA3GP AE19 PIDE_D0 17 18 PIDE_D15
PIDE_CS3J AD16 DCS3* 19 X
A20GATE AE22 A20GATE 30
PIDE_DREQ 21 22 ?
A20M* AH28 A20MJ 12
PIDE_IOWJ 23 24 Cable detection
IRQ14 AH16 IDEIRQ CPUSLP* AG27 TP14 SATA_2 PIDE_IORJ 25 26 high: 40-conductor cable(ATA 33)
IGNNE* AG22 1 PIDE_RDY 27 28 low: 80-conductor cable(ATA 66/100)
IGNNEJ 12
INIT3_3V* AG21 SATA_TXP2 C482 10nF 25V, X7R, +/-10% SATA_TXP2_C 2 PIDE_DAKJ 29 30
** **
HOST
INIT* AF22 SATA_TXN2 C477 10nF 25V, X7R, +/-10% SATA_TXN2_C 3 8 IRQ14 31 32
INITJ 12
INTR AF25 4 PIDE_A1 33 34
INTR 12 P66DET 22
商
FERR* AG26 FERRJ SATA_RXN2 C470 10nF 25V, X7R, +/-10% SATA_RXN2_C 5 9 PIDE_A0 35 36 PIDE_A2
FERRJ 12
NMI AH24 SATA_RXP2 C458 10nF 25V, X7R, +/-10% SATA_RXP2_C 6 PIDE_CS1J 37 38 PIDE_CS3J
NMI 12
RCIN* AG23 7 PIDE_LED 39 40
KBRSTJ 30
SERIRQ AH21 SERIRQ 30
CONN-SATA C474
C
SMI*
STPCLK*
AF23
AH22
SMIJ
STPCLKJ
12
12
Header_2X20_K20
47nF
* *R384
10K C
3 of 6 THERMTRIP* AF26 THERMTRIPJ
THERMTRIPJ 12
IDE data lines should be matched to strobes(IORJ, RDY)within
strobes should
+/- 250 mils,
16V,X7R,+/-10%
Dummy
be matched to their complement within +/- 10 mils
+/-5%
HDD1
SATA_4
1 ? 1
SATA_TXP3 C483 10nF 25V, X7R, +/-10% SATA_TXP3_C 2
** **
Reserved SATA_TXN3 C478 10nF 25V, X7R, +/-10% SATA_TXN3_C 3 8
4
SATA_RXN3 C469 10nF 25V, X7R, +/-10% SATA_RXN3_C 5 9
SATA_RXP3 C459 10nF 25V, X7R, +/-10% SATA_RXP3_C 6
7
CONN-SATA
*
R389 33 P_IDERSTJ
30 IDE_RSTJ +/-5%
C489
placed near IDE connector
* 180pF
+/-5%
匯
3D3V_SB 3D3V_SYS
VCCRTC
FSB_VTT Q19
width 20 mils
R147
1
3 *R371
10K *R368
10K
VBAT 1K D8 C A 2 +/-5% +/-5%
*
+/-5%
*
R334 62 THERMTRIPJ
B
+/-5% SD103AW BAT54C *R134
20K
B
+/-1%
PIDE_LED
C172 D19
*
FERRJ
R335
+/-5%
62
*R154
1K * 1uF
10V, X5R, +/-10%
1
3 HDD_LEDJ 8
+/-1% RTCRST 2
C173 SATA_LED
1
Place at ICH7 end of route BAT54A
C382 * 1uF
10V, Y5V, +80%/-20%
* 1uF
2
+
10V, Y5V, +80%/-20% BAT1

Dummy
Battery Holder
-
BAT1_1
LITHIUM BATT
CR2032
Battery
Clear CMOS
For battery cell.
CLR_CMOS CLR_CMOS CMOS CLR_CMOS:2-3
1 1
RTCRSTJ 2
22 RTCRSTJ RTCRST 2
A 3 3 Clear (1-2) A
Header_1X3 Normal (2-3) Default Jumper_2P_Blu
FOXCONN PCEG
Title
ICH7 -2
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
U13A U13E
ICH7 ICH7
AD[31..0]
AD[31..0] 36
PAR E10 PAR AD0 E18 AD0 U13D E4 VSS VSS A4
36 PAR
36 DEVSELJ DEVSELJ A12 DEVSEL* AD1 C18 AD1
ICH7 AG11 VSS VSS A23
7 CK_33M_ICH A9 PCICLK AD2 A16 AD2 1D5V_CORE C27 VSS VSS B1
B18 PCIRST* AD3 F18 AD3 1D5V_CORE REF5V R14 VSS VSS B8
36 PCIRSTJ IRDY*
36 IRDYJ IRDYJ A7 AD4 E16 AD4 R15 VSS VSS B11
PMEJ B19 PME* AD5 A18 AD5 A1 VCC1_5_A R16 VSS VSS B14
36
36
PMEJ
SERRJ SERRJ
STOPJ
B10
F15
SERR*
STOP*
PCI AD6
AD7
E17
A17
AD6
AD7
AB10
AB17
VCC1_5_A
VCC1_5_A
V5REF
V5REF
AD17
G10
R17
R18
VSS
VSS
VSS
VSS
B17
B20
36 STOPJ
1
36 LOCKJ
LOCKJ E11 PLOCK* AD8 A15 AD8 AB7 VCC1_5_A REF5V_SUS T6 VSS VSS B26
36 TRDYJ TRDYJ F14 TRDY* AD9 C14 AD9 AB8 VCC1_5_A V5REF_SUS F6 VCCRTC L34 T12 VSS VSS B28
36 PERRJ PERRJ C9 PERR* AD10 E14 AD10 AB9 VCC1_5_A L0805 10uH T13 VSS VSS C2
36 FRAMEJ FRAMEJ F16 FRAME* AD11 D14 AD11 AC10 VCC1_5_A VCCRTC W5 1D5V_CORE T14 VSS VSS C6
AD12 B12 AD12 AC17 VCC1_5_A +/-20% T15 VSS VSS D10
36 GNT0J E7 GNT0* AD13 C13 AD13 AC6 VCC1_5_A VCCUSBPLL C1 T16 VSS VSS D13
2
36 GNT1J D16 GNT1* AD14 G15 AD14 3D3V_SYS 3D3V_SYS AC7 VCC1_5_A T17 VSS VSS D18
D17 GNT2* AD15 G13 AD15 AC8 VCC1_5_A VCCSATAPLL AD2 U4 VSS VSS D21
D F13 GNT3* AD16 E12 AD16 AD10 VCC1_5_A U12 VSS VSS D24 D
A14 GNT4*/GPIO48 AD17 C11 AD17 C312 C397 AD6 VCC1_5_A VCCDMIPLL AG28 VCCDMIPLL 1D05V_SYS C414 C412 Near AD2 U13 VSS VSS E1
1
AD18
GNT5J D8 GNT5*/GPIO17
AD19
D11
A11
AD18
AD19 * 0.1uF
* 0.1uF AE10
AE6
VCC1_5_A
VCC1_5_A VCC1_05 L11
* 10uF
10V, Y5V, +80%/-20% * 0.1uF U14
U15
VSS
VSS
VSS
VSS
E2
E8
36 PREQ0J D7 REQ0* AD20 A10 AD20 16V, Y5V, +80%/-20% 25V, X7R, +/-10% AF10 VCC1_5_A VCC1_05 L12 16V, Y5V, +80%/-20% U16 VSS VSS E15
2
36 PREQ1J C16 REQ1* AD21 F11 AD21 AF5 VCC1_5_A VCC1_05 L14 U17 VSS VSS F3
C17 REQ2* AD22 F10 AD22 AF6 VCC1_5_A VCC1_05 L16 U24 VSS VSS F4
美
36 PREQ2J
36 PREQ3J E13 REQ3* AD23 E9 AD23 AF9 VCC1_5_A VCC1_05 L17 U25 VSS VSS F5
36 PREQ4J A13 REQ4*/GPIO22 AD24 D9 AD24 AG5 VCC1_5_A VCC1_05 L18 U26 VSS VSS F12
36 PREQ5J C8 GPIO1/REQ5* AD25 B9 AD25 AG9 VCC1_5_A VCC1_05 M11 V2 VSS VSS F27
AD26 A8 AD26 AH5 VCC1_5_A VCC1_05 M18 V13 VSS VSS F28
36 INTAJ A3 PIRQA* AD27 A6 AD27 AH9 VCC1_5_A VCC1_05 P11 V15 VSS VSS G1
36 INTBJ B4 PIRQB* AD28 C7 AD28 F17 VCC1_5_A VCC1_05 P18 V24 VSS VSS G5
36 INTCJ C5 PIRQC* AD29 B6 AD29 G17 VCC1_5_A VCC1_05 T11 V27 VSS VSS G2
36 INTDJ B5 PIRQD* AD30 E6 AD30 H6 VCC1_5_A VCC1_05 T18 V28 VSS VSS G6
36 INTEJ G8 GPIO2/PIRQE* AD31 D6 AD31 H7 VCC1_5_A VCC1_05 U11 W6 VSS VSS G9
36 INTFJ F7 GPIO3/PIRQF* J6 VCC1_5_A VCC1_05 U18 W24 VSS VSS G14
36 INTGJ F8 GPIO4/PIRQG* C/BE0* B15 CBEJ0 J7 VCC1_5_A VCC1_05 V11 W25 VSS VSS G18
CBEJ1 CBEJ0 36
36 INTHJ G7 GPIO5/PIRQH* C/BE1* C12 CBEJ1 36
1D5V_PE_ICH T7 VCC1_5_A VCC1_05 V12 W26 VSS VSS G21
C/BE2* D12 CBEJ2 VCC1_05 V14 Y3 VSS VSS G24
1 of 6 C/BE3* C15 CBEJ3 CBEJ2
CBEJ3
36
36 D26 VCC1_5_B VCC1_05 V16 Y24 VSS VSS G25
D27 VCC1_5_B VCC1_05 V17 Y27 VSS VSS G26
D28 VCC1_5_B VCC1_05 V18 Y28 VSS VSS H3
1 E24 VCC1_5_B AA1 VSS VSS H4
E25 VCC1_5_B FSB_VTT AA24 VSS VSS H5
E26 VCC1_5_B V_CPU_IO AE23 AA25 VSS VSS H24
F23 VCC1_5_B V_CPU_IO AE26 AA26 VSS VSS H27
POWER
F24 VCC1_5_B V_CPU_IO AH26 3D3V_SYS AB4 VSS VSS H28
GNT5J G22 VCC1_5_B AB6 VSS VSS J1
R272 VCC1_5_B VCC3_3 VSS VSS
GNT5J GNT4J BOOT
* 1K
G23
H22 VCC1_5_B VCC3_3
A5
AA7
AB11
AB14 VSS VSS
J2
J5
+/-5% H23 VCC1_5_B VCC3_3 AB12 AB16 VSS VSS J24
0 1 SPI J22 VCC1_5_B VCC3_3 AB20 AB19 VSS VSS J25
1 0 PCI J23 VCC1_5_B VCC3_3 AC16 AB21 VSS VSS J26
1 1 LPC 1D5V_CORE K22 VCC1_5_B VCC3_3 AD13 AB24 VSS VSS K24
K23 VCC1_5_B VCC3_3 AD18 AB27 VSS VSS K27
L22 VCC1_5_B VCC3_3 AG12 AB28 VSS VSS K28
L23 VCC1_5_B VCC3_3 AG15 AC2 VSS VSS L13
VCCDMIPLL LRC Filter M22 VCC1_5_B VCC3_3 AG19 AC5 VSS VSS L15
L0805 1uH M23 VCC1_5_B VCC3_3 AH11 AC9 VSS VSS L24
商
L33 1 2 VCCDMIPLL N22 VCC1_5_B VCC3_3 B13 AC11 VSS VSS L25
+/-10% N23 VCC1_5_B VCC3_3 B16 AD1 VSS VSS L26
C385 C383 P22 VCC1_5_B VCC3_3 B27 AD3 VSS VSS M3
1
Rated at least 100mA
* 10uF
10V, Y5V, +80%/-20% * 10nF P23
R22
VCC1_5_B
VCC1_5_B
VCC3_3
VCC3_3
B7
C10
AD4
AD7
VSS
VSS
VSS
VSS
M4
M5
extra one 47uF(backside) in DG0.7 Dummy 25V, X7R, +/-10% R23 VCC1_5_B VCC3_3 D15 AD8 VSS VSS M12
C C
2
R24 VCC1_5_B VCC3_3 F9 AD11 VSS VSS M13
R25 VCC1_5_B VCC3_3 G11 AD15 VSS VSS M14
R26 VCC1_5_B VCC3_3 G12 AD19 VSS VSS M15
1D05V_SYS T22 VCC1_5_B VCC3_3 G16 AD23 VSS VSS M16
T23 VCC1_5_B VCC3_3 U6 3D3V_SB AE2 VSS VSS M17
Place LRC near pin AG28 T26 VCC1_5_B VCCSUS3_3 A24 AE4 VSS VSS M24
T27 VCC1_5_B VCCSUS3_3 C24 AE8 VSS VSS M27
T28 VCC1_5_B VCCSUS3_3 D19 AE11 VSS VSS M28
C401 C400 1D5V_CORE U22 VCC1_5_B VCCSUS3_3 D22 AE13 VSS VSS N1
* 0.1uF
* 1uF U23 VCC1_5_B VCCSUS3_3 E3 AE18 VSS VSS N2
10V, X5R, +/-10%
V22 VCC1_5_B VCCSUS3_3 G19 AE21 VSS VSS N5

25V, X7R, +/-10%
VCC1_5_B LC Filter V23 VCC1_5_B VCCSUS3_3 K3 AE24 VSS VSS N6

#REFDE28 W22 VCC1_5_B VCCSUS3_3 K4 AE25 VSS VSS N11
2 1 W23 VCC1_5_B VCCSUS3_3 K5 AF2 VSS VSS N12
Y22 VCC1_5_B VCCSUS3_3 K6 AF4 VSS VSS N13
COPPER Near D28, T28,and AD28 Y23 VCC1_5_B VCCSUS3_3 L1 AF8 VSS VSS N14
R305Dummy0 1D5V_PE_ICH AA22 VCC1_5_B VCCSUS3_3 L2 AF11 VSS VSS N15
C317 C321 AA23 VCC1_5_B VCCSUS3_3 L3 AF27 VSS VSS N16
#REFDE29 0.1uF 0.1uF C344 AB22 VCC1_5_B VCCSUS3_3 L6 AF28 VSS VSS N17
1
ICH7 Core decoupling caps. 2 1

*
Dummy * * 10uF AB23
AC23
VCC1_5_B
VCC1_5_B
VCCSUS3_3
VCCSUS3_3
L7
M6
AG1
AG3
VSS
VSS
VSS
VSS
N18
N24
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
COPPER AC24 VCC1_5_B VCCSUS3_3 M7 AG7 VSS VSS N25

2
AC25 VCC1_5_B VCCSUS3_3 N7 AG14 VSS VSS N26

AC26 VCC1_5_B VCCSUS3_3 P7 AG17 VSS VSS P12
AD26 VCC1_5_B VCCSUS3_3 R7 AG20 VSS VSS P13
AD27 VCC1_5_B VCCSUS3_3 V1 AG25 VSS VSS P14
AD28 VCC1_5_B VCCSUS3_3 V5 AH1 VSS VSS P15
匯
VCCSUS3_3 W2 AH3 VSS VSS P3
1D5V_PE_ICH 3D3V_SYS VCCSUS3_3 W7 VSS P4
VSS P16
Place LC near pin D28 VCCSUS1_05 AA2 AH7 VSS VSS P17
VCCSUS1_05 C28 AH23 VSS VSS P24
C349 C256 VCCSUS1_05 G20 AH27 VSS VSS P27
* 0.1uF
16V, Y5V, +80%/-20% * 0.1uF
16V, Y5V, +80%/-20%
5 of 6
VCCSUS1_05
VCCSUS1_05
K7
Y7 AH12 VSS
VSS
VSS
P28
R1
5V_SB 3D3V_SB VSS R11
VSS R12
VSS R13
1 ? 6 of 6
A
Place near B27 R284 D12

10 Dummy
+/-5%
Place near D28 LS4148-F REF5V_SUS 3D3V_SB
C
B PCI-E decoupling caps. C392 REF5V_SUS

B
0.1uF
* 25V, X7R, +/-10% 1D5V_CORE 1D05V_SYS
C354
0.1uF
place cap. near pin F6 C244

*
Dummy
16V, Y5V, +80%/-20%
within 40 mils
Dummy
*
1D5V_CORE 1D5V_CORE
V5REF_SUS / 3D3V_SB Power Sequencing
0.1uF
Place near V1
25V, X7R, +/-10%
C324 C325
* 0.1uF
16V, Y5V, +80%/-20% * 10nF
25V, X7R, +/-10%
LAN decoupling caps. VCCRTC
FSB_VTT FSB_VTT
double check in new CRB or DG
Place near A1 Place near C1 C393 C395
*
C380
0.1uF
*
C381
0.1uF C387 * 0.1uF
25V, X7R, +/-10% * 1uF
10V, X5R, +/-10%
1
5V_SYS 3D3V_SYS
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

3D3V_SB
Dummy * 4.7uF
6.3V, X5R, +/-10%
3D3V_SYS
A
2
D16
R351 1D5V_CORE 1D5V_CORE
3D3V_SB 1K
Need to Check Change to Dummy
+/-1% LS4148-F
C
C433 C413 C396 Place near W5
* C352
*
C341
0.1uF
* C390 REF5V REF5V
* 0.1uF
16V, Y5V, +80%/-20% * 1uF
10V, Y5V, +80%/-20% * 0.1uF
25V, X7R, +/-10% Near AE23 and AE26 Place near AH26
0.1uF 10nF Dummy
16V, Y5V, +80%/-20%
Dummy 16V, Y5V, +80%/-20% 25V, X7R, +/-10% C415

RTC decoupling caps.
* 0.1uF
CPU decoupling caps.
16V, Y5V, +80%/-20% Place near AH5 Place near AH9 Place near U6
place cap. near pin AD17/G10
Near L1 and K3 within 40 mils
Place near E3
V5REF / 3D3V_SYS Power Sequencing Audio decoupling caps. 3D3V_SYS
3D3V_SYS 1D5V_CORE
A USB decoupling caps. A
3D3V_SYS
VCCDMIPLL C418 C416

* 0.1uF
* 0.1uF
Dummy
16V, Y5V, +80%/-20%
*
C313
0.1uF
*
C314
0.1uF
*
C315
0.1uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

Dummy
16V, Y5V, +80%/-20%
C384 C386
* 10nF
25V, X7R, +/-10% * 0.1uF Dummy
Dummy Place near AH11 Place near AD2 25V, X7R, +/-10%
FOXCONN PCEG
Place near AG28
Place near AG15/AB12 Place near A5, B7, C10 Title
ICH7 -3
DMI decoupling caps. SATA decoupling caps. PCI decoupling caps. Size Document Number Rev
IDE decoupling caps. Custom G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
Rear Dual USB Connector

D D
美
SVCC2
U3
USBN3 1 6 USBP3
SVCC2
2 5
C31 EC13
* 0.1uF *
16V, Y5V, +80%/-20%
1000uF
+/-20%
USBN0 3 4 USBP0
商
IP4220CZ6
C C
USB
RN6 1 V0
22 USBP3
USBP3
USBN3
2
4
* 13 2
3
-D0 5 6 7 8
22 USBN3 USBP0 +D0
22 USBP0 6 5 4 G0
USBN0 8 7 5V_SYS
22 USBN0
5 V1 1 2 3 4
匯
0 6 -D1
7 +D1
+/-5% 8 5V_DUAL
CG1
CG2
CG3
CG4
L4
S
G1
1 5 G Q11
11 PWOK+
CONN-USBx2
9
10
11
12
2 6 Reserved
AOD452AL
3 7
D
4 8
B B
Filter 100MHz
Dummy
A A
FOXCONN PCEG
Title
REAR USB
Custom G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
5V_DUAL
U14
5V_SYS F4
FUSB_PWR Fuse 2.6A USBN2 1 6 USBP2 FUSB_PWR
*
C282 2 5
0.1uF
D * 16V, Y5V, +80%/-20%
Dummy USBN1 3 4 USBP1
D
EC38 C294 R292 IP4220CZ6
*
美
* 1000uF
+/-20% * 0.1uF 10K
+/-5%
USB_OCJ_FRONT 22
16V, Y5V, +80%/-20%
1
R293 C329
FOR EMI ISSUE 15K 0.1uF
+/-1% *
Dummy
16V, Y5V, +80%/-20%
2
+/-5%
0
USBN2 8 7
22 USBN2 USBP2 F_USB1
22 USBP2 6 5
USBP1 4 3 1 2
22 USBP1 USBN1 * USBN1_R USBN2_R USBN1_R
22 USBN1 2 1 3 4
USBP1_R 5 6 USBP2_R USBP1_R
RN22 7 8 USBN2_R
Dummy X 10 USBP2_R
Filter 100MHz
商
Header_2X5_K9
4 8 C299 C305 C311 C309
47pF 47pF 47pF 47pF
C 3 7
* *
50V, NPO, +/-5% *
50V, NPO, +/-5% *
50V, NPO, +/-5% 50V, NPO, +/-5% C
Dummy Dummy Dummy Dummy
2 6 USB Front Header I
1 5
L30
匯
FUSB_PWR U16
USBN6 1 6 USBP6 FUSB_PWR
2 5
C320 USBN4 3 4 USBP4

0.1uF
* IP4220CZ6
16V, Y5V, +80%/-20%
B B
USBN4_R
USBP4_R
USBN6_R
USBP6_R
+/-5%
0
C333 C338 C343 C348
USBP6 47pF 47pF 47pF 47pF
22
22
USBP6
USBN6
USBN6
8
6
7
5 F_USB2 * *
50V, NPO, +/-5% *
50V, NPO, +/-5% *
50V, NPO, +/-5% 50V, NPO, +/-5%
USBP4 4 3 1 2 Dummy Dummy Dummy Dummy
22 USBP4 USBN4 * USBN4_R USBN6_R
22 USBN4 2 1 3 4
USBP4_R 5 6 USBP6_R
RN32 7 8
Dummy X 10
Filter 100MHz
Header_2X5_K9
4 8
3 7
2 6 USB Front Header II
A 1 5 A
L32
FOXCONN PCEG
Title
FRONT USB
Custom G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
D D
美
商
3D3V_SB 3D3V_SYS 12V_SYS
12V_SYS 3D3V_SYS
12V_SYS 3D3V_SYS 3D3V_SB
C C
PCI-E1_1X C346 C371 C130

B1
B2
12V
12V
PRSNT1#
12V
A1
A2
* 0.1uF
25V, X7R, +/-10% * 0.1uF
16V, Y5V, +80%/-20% * 0.1uF
16V, Y5V, +80%/-20%
B3 RSVD 12V A3 Dummy
B4 GND GND A4
7,18,19,20,22,31,36 SMB_CLK_MAIN B5 SMCLK JTAG2 A5
7,18,19,20,22,31,36 SMB_DATA_MAIN B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9
B10 3.3VAUX 3.3V A10
20,22 WAKEJ B11 WAKE# PWRGD A11 PLTRSTJ 14,20,22,30
KEY
B12 RSVD_B12 GND A12

B13 GND REFCLK+ A13 CK_PE_100M_P_1PORT 7
22 HSO_P1_SLOT B14 HSOP0 REFCLK- A14 CK_PE_100M_N_1PORT 7
22 HSO_N1_SLOT B15 HSON0 GND A15
B16 GND HSIP0 A16 HSI_P1_SLOT 22
B17 A17
匯
PRSNT2# HSIN0 HSI_N1_SLOT 22
B18 GND GND A18
Slot-PCIE-1X
PCI-E x1 Slot
B B
A A
FOXCONN PCEG
Title
PCI Express x1Slot
C
G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
Remove R5 and R6 for RTL8102EL/8103EL application.

EC1 is only for RTL8111DL.
For RTL8111DL, use this block For RTL8102EL/8103EL, use this block. R5 and R6 are used in the RTL8111DL application.
VDD33 Remove R6 if switching regulator is enabled. Remove R5 if* C1 to C4 are for 8111DL VDD33 pins-- 1, 29, 37, 40.
DVDD12 C23 VDD33external
R17 power 1.2V is used.
1
R5
* 0.1uF
* C14
* C19 * C1 to C3 are for 8102EL/8103EL VDD33 pins-- 1, 29, 37.
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

*
0 CTRL12/VDD CTRL12/VDD 10uF 10uF VDD33
+/-5%
2
@8102EL 3D3V_SB FB14 +/-5%
0 R18
@8111DL +/-5% *
@8111DL @8111DL 0 0 C55 C76 C17 C73
+/-5%
@8111DL * *
0.1uF 0.1uF
* 0.1uF
* 0.1uF
@8111DL
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

D C51 R7 value should be 2.49K (1%) for *R30
2.49K
D
+/-1% U36 U34
XTAL1 all application.
CTRL15/VDD33
*
GND
CTRL12/VDD
CTRL12/VDD
1
27pF RTL8102EL-VB-GR RTL8111DL
DVDD12
美
X4
CTRL12A
+/-5%
VDD33
VDD33
XTAL2
XTAL1
LED0
XTAL-25MHz
GND
RSET
C41
2
XTAL2 U2 @8102EL @8111DL

*
L1 0 @8102EL
27pF +/-5%
* C6 and C7 are for U2 EVDD12 pin 19.
48
47
46
45
44
43
42
41
40
39
38
37
+/-5%
R27
RSET
VCTRL12A/SROUT12
GND_47
NC/ENSWREG
VCTR12DVDDSR
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
NC/VDDSR
VDD33_37
*
CTRL12A L2 EVDD12
4.7uH
U28 @8111DL C4
0 * *
1
MDI2+ MDI2+
U25 1 Dummy 8
* C2
* C3
* 0.1uF C44 C56
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

1 8
MDI0+ 1 Dummy
1 8 8 MDI0+ VDD33 1 AVDD33 DVDD12_36 36 DVDD12 3D3V_SYS * EC5 10uF 10uF +/-5% 1uF 1uF
16V, Y5V, +80%/-20%

MDI2- 2 7 MDI2- MDI0+ 2 35 LED1/EESK Change L1 to 0 ohm in @8111DL 10V, X5R,10V,
+/-10%
X5R, +/-10%
2
MDI0- MDI0- 2 7 MDI0- MDIP0 LED1/EESK LED2/EEDI @8111DL @8111DL
2 7 3 34 Dummy
100uF
2 7 MDI3+ 3 6 MDI3+ DVDD12 4
MDIN0 LED2/EEDI
33 LED3/EEDO R66
RTL8102EL/8103EL +/-20% Remove R1 & R2 in
MDI1+ MDI1+ 3 6 MDI1+ NC/FB12 LED3/EEDO EECS GND
3 3 6 6
MDI3- MDI3- MDI1-
5 MDIP1 EECS 32
GND * 1K application. RTL8102EL/8103EL
4 4 5 5 6 MDIN1 GND_31 31
MDI1- MDI1- GND RTL8102EL/8103EL/8111DL DVDD12 +/-5% GND
4 4 5 5
BACK
7 GND_7 DVDD12_30 30 R55 application.
SLVU2.8-4.TBT MDI2+ 8 29 VDD33
BACK SLVU2.8-4.TBT MDI2- NC/MDIP2 VDD33_29 ISOLATEB
9 NC/MDIN2 ISOLATEB 28 1 2 15K +/-1% EC2 is only for RTL8111DL.
DVDD12 10 27 PERSTB ICH_LAN_PLTRSTJ 30
MDI3+ DVDD12/AVDD12 PERSTB LANWAKEB
11 26 LAN_PMEJ 22 * C9 to C13 are for 8111DL DVDD12 pins-- 10, 13, 30, 36, 39.
VDDTX/EVDD12
MDI3- NC/MDIP3 LANWAKEB
12 NC/MDIN3 CLKREQB 25
R28
U20 and U21 are ESD protection array.Reserve for cable discharge.
DVDD12_13
REFCLK_N
REFCLK_P
* 0 * C9 to C12 are for 8102EL/8103EL DVDD12 pins-- 10, 13, 30, 36.
NC/GPO
GND_14
商
+/-5%
NC/NC
HSON
EGND
HSOP
ICH_LAN_PLTRSTJ
HSIN
HSIP
@8111DL
C75
DVDD12
R13 is only required by RTL8102EL and RTL8103EL. * 180pF C77 C67 C78 C27 C15
13
14
15
16
17
18
19
20
21
22
23
24
+/-5%
C
* 0.1uF
* *
0.1uF 0.1uF
* 0.1uF
* 0.1uF
@8111DL
C
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

REFCLK+
REFCLK-
EVDD12
DVDD12
*
R56 1K +/-5%
Pin 23 is GPO pin for
HSON
HSOP
HSIP
GND
HSIN
@8102EL
GND
8111DL. It is used for
EECS
#U36#U34 DSM function. GND
LED2/EEDI
7 CK_PE_100M_P_LAN REFCLK+
REFCLK-
7 CK_PE_100M_N_LAN
HSIP
22 HSO_P2_LAN
HSIN
22 HSO_N2_LAN
R57 3.6K +/-1%
VDD33
**
16V, X7R, +/-10% HSOP0.1uF C71
22 HSI_P2_LAN
U5, R15 are only used as an 16V, X7R, +/-10% HSON0.1uF C72
22 HSI_N2_LAN
independent power source for
DVDD12 when switching Note 1: The Trace length
匯
regulator is disabled. between L1 and 8111DL's Pin
For RTL8102EL/8103EL, remove 1 must be within 0.5 cm. C5
R15 and U5. and C8 to L1 must be within
0.5cm. Refer to Layout guide
for more detail. 5V_DUAL
DEL U5,R15---hilary20090309
C82 C81 RESERVED
0.1uF
* 470pF
* F3
16V, Y5V, +80%/-20% 3D3V_SB Fuse 2.6A
*
B B
Reserved 50V, X7R, +/-10%
SVCC2
R69 R68
BACK PANEL ( LAN + 2 USB Connector )
*
150 150 R59 10K Reserved
R75 22 USB_OCJ_BACK
+/-5% +/-5% +/-5%
*
LED1/EESK 1
Dummy @8102EL C88 R62
R74
0 * C83
470pF NIC_USB
U5 * 0.1uF 15K
+/-1%
*
LED2/EEDI +/-5%Dummy 50V, X7R, +/-10% USBN7 1 6 USBP7 16V, Y5V, +80%/-20%
5V_DUAL 2
27 SVCC2 2 5
*
LED3/EEDO 0 R61 0 22 28
+/-5% +/-5% @8111DL
YLW_LED
* C80
470pF
21 29 USBN5 3 4 USBP5
USB-2
USB-1
30
50V, X7R, +/-10% IP4220CZ6
9 1
MDI0+ 10 5
MDI0- 11 RN9
* 13
RJ45-MJ2
MDI1+ 12 2 2 USBP5
MDI1- USBN5 USBP5 22
13 6 4 USBN5 22
MDI2+ 14 6 5 USBP7
DVDD12 MDI2- USBN7 USBP7 22
15 3 8 7 USBN7 22
MDI3+ 16 7
MDI3- 17 L12
*
R65 0 0
18 4
+/-5% Dummy C85 8 1 +/-5% 5
R60 470pF
*
GRN_LED
0
+/-5% * 50V, X7R, +/-10% 20 23
2 6
Reserved C84 19 24 3 7
0.1uF 25
* 26 4 8
16V, Y5V, +80%/-20%
A
CONN-USBx2_RJ45 * C87
0.1uF Filter 100MHz
A
Dummy
R64 150 +/-5%
16V, Y5V, +80%/-20%
3D3V_SB #NIC_USB3#NIC_USB5
LED0
NIC_USB3
NIC_USB5
FOXCONN PCEG
JFM24U13-21U5-4F RU1-250ARWGF Title
38U1A-2NK1-4F
* C86
0.1uF LAN-RTL8101E/8111B/8111C
16V, Y5V, +80%/-20% Size Document Number Rev
CONN-USBx2_RJ45 CONN-USBx2_RJ45
C G41M05 A
@8102EL @8111DL Date: Friday, August 28, 2009 Sheet 28 of 34

5 4 3 2 1
亞
5 4 3 2 1
EC19
100uF
*
SURRBACK_L +/-20%
R67 75 SURRBACK_L_MFB2 @6JACK FB 600 Ohm SURRBACK_L_C
Jack Detect *
*
5V_DUAL @6JACK +/-5%
5V_AUDIO EC20
100uF
*
SENSE_A R70 39.2K +/-1% SURR_JD SURRBACK_R +/-20% R83 75 SURRBACK_R_M FB9 @6JACK FB 600 Ohm SURRBACK_R_C
@6JACK
*
*
D4 12V_SYS @6JACK @6JACK +/-5% C32 C57
SD103AW 1 1 150pF 150pF
50V, NPO, +/-5%
50V, NPO, +/-5%

R72 5.1KOhm +/-1% F_JD
@6JACK
@6JACK
1
1
@6JACK R63 R80
* *
C
U7 H78L05AA FB15 D6 22K 22K
* *
1 3 2 @6621 C A R71 10K +/-1% L1_JD +/-5% 2 +/-5%
2
OUT IN 2
FB 300 Ohm LS4148-F @6JACK @6JACK
GND
R73 20K +/-1% MIC1_JD GND_AUDIO
EC12 * C93 100uFEC51 R41 GND_AUDIO
****
D
* C68
Dummy * 100uF +80/-20% SURR_L 100uF
@6JACKEC50 +/-20% R42 75 SURR_L_M
FB8
* @6JACK FB 600 Ohm SURR_L_C D
**
+80/-20% +/-20% 4.7uF SURR_R EC9
@6JACK +/-20% 100uFEC6 @6JACK
R26 75
+/-5%
*
4.7uF R76 CEN 100uF @6JACK R46
+/-20% @6JACK 75
+/-5% SURR_R_M
FB7 @6JACK FB 600 Ohm SURR_R_C
10 LFE @6JACK +/-20% @6JACK 75
+/-5% *
*
@888 +/-5% @6JACK +/-5% CEN_M FB13 @6JACK FB 600 Ohm CEN_C
*
美
Filtering Power
@888 Noise(Improve Jack Detect LFE_M FB3 @6JACK FB 600 Ohm LFE_C
GND_AUDIO
background noise caused by MIC-boost) SENSE_B R37 5.1KOhm +/-1% SURRBACK_JD R32 *
@6JACK @6JACK 1 1 1 1 R33
GND_AUDIO @6JACK R25 BCN1
* * *
R36 10K +/-1% CEN_JD @6JACK R44 150pF
@6JACK @6JACK 50V, NPO, +/-10%
3D3V_SYS 5V_AUDIO
22K22K22K22K
2 +/-5%
2 2 +/-5%
2 +/-5% +/-5%
*
R35 20K +/-1% MIC2_JD
@6JACK
R58
*
JDREF 20K +/-1% R34 39.2K +/-1% LINE2_JD
C96 C99 C50 C54 GND_AUDIO
ICH_BCLK
* 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF GND_AUDIO
**
C98 * C100
Dummy MIC1_VREFO_L R40 2.2K +/-5%
* 0.1uF +80/-20%
4.7uF Near to Codec GND_AUDIO All of JD resistors should be placed as MIC1_VREFO_R R39 2.2K +/-5%
Dummy +/-5%
close as possible to Codec. EC11 75 MIC-IN
GND_AUDIO 100uF EC15
25
38
U4 1
9 MIC1_R +/-20% 100uF
EC14
*1 FB10 FB 600 Ohm M_R_A
2 *
**
MIC1_L 100uF EC10
+/-20%
DVdd1
DVdd2
AVdd1
AVdd2
3 4
**
LINE1_L +/-20% 100uF FB11 FB 600 Ohm M_L_A
LINE1_R +/-20% 5
7
6
8
*
3
FIO_PRESENCEJ 2
GPIO1
GPIO0 RN2
LINE-IN
ALC662-GR
商
LINE_OUT_L FB5 FB 600 Ohm L_IL_A
22 ICH_RSTJ 11
6
RESET# FRONT_L 35
36 LINE_OUT_R C5 0.1uF *
*
22 ICH_BCLK BCLK FRONT_R 16V, Y5V, +80%/-20% FB6 FB 600 Ohm L_IR_A
10 37
*
*
*
22 ICH_SYNC R79 22 +/-5% SYNC LINE1-VREFO-R R38 10K +/-1%@883
22 ICH_SDIN2 8 SDATA_IN DCVOL 33 5V_AUDIO
5 34 SENSE_B
22 ICH_SDOUT SDATA_OUT Sense B (JD2) SURR_L C1 0.1uF
C 39 Dummy C
* *
SURR-OUT-L JDREF 16V, Y5V, +80%/-20% Reserved BCN2
40
2
4
6
8
JDREF (or NC) SURR_R +/-5% 150pF
12 PC_BEEP SURR-OUT-R 41
SENSE_A CEN C109 0.1uF 22K 50V, NPO, +/-10%
13 Sense A (JD1) CEN-OUT 43
RN1 *
* 13
5
7
AUX_L 14 44 LFE Dummy 16V, Y5V, +80%/-20%
AUX_R LINE2-L LFE-OUT SURRBACK_L
15 LINE2-R SIDESURR-L 45
MIC2_L 16 46 SURRBACK_R CP4
MIC2_R MIC2-L SIDESURR-R
17 MIC2-R
CD_L 18 28 MIC1_VREFO_L X_COPPER
CD_GND 19
CD_L
CD_GND
MIC1-VREFO-L
VREF 27
* GND_AUDIO EC4 GND_AUDIO Front_OUT
CD_R 20 29 C34 10uF+/-10% CP18 100uF GND_AUDIO
* *
MIC1_L CD_R LINE1-VREFO MIC2_VREFO LINE_OUT_R AUD_FIO_R
+/-20% R4 75 +/-5% FB12 FB 600 Ohm L_OR_A
21 MIC1-L MIC2-VREFO 30
*
* *
MIC1_R 22 31 LINE2_VREFO X_COPPER EC7
MIC1-R LINE2-VREFO CP1
LINE1_L 23 32 MIC1_VREFO_R 100uF
LINE1_R LINE_L MIC1-VREFO-R LINE_OUT_L AUD_FIO_L
+/-20% R1 75 +/-5% FB4 FB 600 Ohm L_OL_A
24 LINE_R *
DVss1
DVss2
AVss1
AVss2
47 SPDIFI(EAPD)
SPDIF_OUT 48 X_COPPER 1 1 C58 C60
SPDIFO U23 U24 R2 R3 150pF 150pF
50V, NPO, +/-5%
50V, NPO, +/-5%

#U23#U24 ALC662-GR 22K 22K
4
7
26
42
1
Add CD-IN Eric
ALC662-GR
ALC888-GR GND_AUDIO +/-5%
2 Reserved 2 Reserved
+/-5%
* *
2
匯
GND_AUDIO GND_AUDIO
ALC662-GR ALC888-GR
@662 @888
GND_AUDIO
LINE2_VREFO
MIC2_VREFO
3
CONN-6 Ports Audio

D2 D1 AUDIO1A AUDIO1D CONN-6 Ports Audio GND_AUDIO 1 AUDIOA audio
B B
BAT54A BAT54A @6JACK @6JACK M_R_A 5
M_S_A 4
MIC1_JD 3
M_L_A 2
2
1
2
AUDIO1B CONN-6 Ports Audio

AUDIO1E CONN-6 Ports Audio GND_AUDIO #AUDIO1#AUDIO2
@6JACK @6JACK GND_AUDIO 21 AUDIOB audio 26
L_OR_A 25
RN3 L_OS_A 24
3D3V_SYS F_JD 23
8
6
4
2
AUDIO1C CONN-6 Ports Audio

AUDIO1F CONN-6 Ports Audio L_OL_A 22
@6JACK @6JACK GND_AUDIO #AUDIO1#AUDIO2
7
5
3
1
31 AUDIOC audio
*
GND_AUDIO 36
R98 L_IR_A 35
EC1 2.2K
RN10
*
GND_AUDIO 10K L_IS_A 34
100uF +/-5% F_AUDIO +/-5% L1_JD 33
MIC2_L +/-20%
EC3 1 2 Dummy AUDIO2 INSULATOR L_IL_A 32
7 8
****
100uF 3 4 FIO_PRESENCEJ GND_AUDIO #AUDIO1#AUDIO2

MIC2_R EC8
+/-20% 8p4r0603h7 5 6 MIC2_JD
100uF 3 4 5 6 Silk Screen
AUX_R +/-20%
EC2
* 1 2 7 X
LINE2_JD
AUDIO
9 10 GND_AUDIO 41 AUDIOD audio
100uF SURRBACK_R_C 45
AUX_L +/-20% 75 Header_2X5_8 SURRBACK_GND 44
+/-5% SURRBACK_JD 43
SURRBACK_L_C 42
*
for ALC880 RN4 GND_AUDIO #AUDIO1#AUDIO2

1
3
5
7
22K GND_AUDIO 51 AUDIOE audio

+/-5% LFE_C 55
2
4
6
8
CEN_GND 54
CEN_JD 53
CEN_C 52
GND_AUDIO #AUDIO1#AUDIO2
GND_AUDIO 61 AUDIOF audio
SURR_R_C 65
SURR_GND 64
SURR_JD 63
GND_AUDIO GND_AUDIO CONN - Audio jack SURR_L_C 62
@3JACK GND_AUDIO #AUDIO1#AUDIO2
A A
SPDIF_OUT
5V_SYS 1 1
SPDIF_OUT 3 RN7 CD_IN

3
4 CD_L C74 1uF 10V, X5R, +/-10%
*1 1
* **
C113 4 CD_GND C70 1uF 10V, X5R, +/-10% 2

2
* 22pF
50V, NPO, +/-5%
Header_1X4_K2
CD_R C63 1uF 10V, X5R, +/-10%
3
5
4
6 3 FOXCONN PCEG
7 8 4
Dummy Title
1K Header_1X4
For EMI +/-5% Reserved AUDIO 655/861
C
G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
3D3V_SYS
RTSBJ
SOUTB For the temperature sensor circuits,

* *R96 *R97 1)Please don't remove the 1uF capacitor(C620)
*
R94
Dummy TMPIN2 R122 10K
Dummy SIOVREF
10K 10K 10K between Vref and AGND. +/-1%
2)Place R568 close to IT8720F.
C
A20GATE 3)Keep the trace away from +12V, fast data bus, C141
1
KBRSTJ
If without use these pins, Please pull-up to VCC.
Don't let it floating L_DRQ0J
and CRTs.
4)Recommended trace 10mils widths and 12 mils spacings.
* 2.2nF B Q16
50V. X7R, +/-10% MMBT3904-7-F
Close to pin
1.Pin 30:RESETCON#
E
2
5)Isolate AGND and DGND. placed near SIO
2.Pin 95:VIN3/ATXPG
D
3.Pin 71:SUSB# D
4..Power On Strapping Options pin
GND_IO
5.Please don't remove the pull-up resistor (R108) 3D3V_SYS System temperature sensing
of pin38/LDRQ#.
6.Please don't remove any components in the TPM
美
VINx circuits and the FANx control circuits. 5V_SYS 5V_SYS
7.Please don't change the sequence of 7 CK_33M_TPM 1 LCLK GND 2
VIN0~VIN6. L_FRAMEJ 3 KEY
LFRAMEn R354
8.If without use these pins,please pull-up to VCC, @TCM
*
Don't let it floating ,pin 3,pin 30,pin 38,pin 46, PLTRSTJ 5 6 0 +/-5% C106 C107 C108
LRESETn NC_3
1
pin 95,pin 122,pin 124,pin 126. L_AD3 7 LAD3 LAD2 8 L_AD2 * 0.1uF
* 0.1uF
* 0.1uF
16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
2
9 10 L_AD1
VDD LAD1
L_AD0 11 12
3D3V_SYS R77 LAD0 GND @TCM R78 3D3V_SYS placed near pin4,35,99 TMPIN1 #REFDE3
2 1 THERMDA 12
*
1K 13 14 1K C138 COPPER
NC_1 NC_4 5V_SYS
3D3V_SB
@TCM +/-5%
15 NC_2 SERIRQ 16
+/-5%
SERIRQ 5V_SB * 3.3nF
+/-10%
L16 FB 80Ohm TS_D- #REFDE2

VCCP R119 10K VIN0
17 GND CLKRUNin 18
* Close to pin
2
COPPER
1 THERMDC 12
+/-5% 19 20
22 LPCPDJ LPCPDn NC_5
1
C136
*
Dummy0.1uF * C128 C147
10uFDummy
1uF * * C137 *
EC31
100uF CPU temperature sensing
Header_2X10_4 (TPM) Note: 0.1uF +/-20%
2
16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20% Place C441,C442 close
to Pin99
GND_IO
R126 10K VIN1
35
99
67
1D5V_STR
4
C140
商
+/-5% U8
1
* 0.1uF
VCC
VCC
AVCC
VCCH
Dummy
16V, Y5V, +80%/-20%
PD[7..0] 32
2
DCDBJ 127 116 PD7

32 DCDBJ DCD1# PD7/GP77/BUSSO2
C RIBJ 128 115 PD6 C
32 RIBJ RI1# PD6/GP76/BUSSO1
GND_IO CTSBJ 1 114 PD5
32 CTSBJ CTS1# PD5/GP75/BUSSO0
DTRBJ 126 113 PD4
32 DTRBJ DTR1#/JP4 PD4/GP74/BUSSI2
Parallel Port
3D3V_SYS R123 10K VIN4 RTSBJ 122 112 PD3
32 RTSBJ RTS1#/JP2 PD3/GP73/BUSSI1
Serial Port 1/2

+/-5% DSRBJ 123 111 PD2
32 DSRBJ DSR1# PD2/GP72/BUSSI0
1
C135
*
Dummy0.1uF
32
32
SOUTB
SINB
SOUTB
SINB
124
125
SOUT1/JP3
SIN1
PD1/GP71
PD0/GP70
110
109
PD1
PD0 3D3V_SYS 5V_SYS
DCDAJ 26 108 STBJ 32
2
16V, Y5V, +80%/-20% SOUTA RIAJ VIDO1/GP21/DCD2# STB#/GP87/SMBC_M

32 SOUTA 28 VIDO6/GP17/RI2# AFD#/GP86/SMBC_R 107 AFDJ 32
SINA CTSAJ 27 106 R92
32 SINA ERRJ 32
*
GND_IO RTSAJ DTRAJ VIDO0/GP20/CTS2# ERR#/GP83 ICH_LAN_PLTRSTJ 330
32 RTSAJ 29 VDIO7/DTR2#/JP6 INIT#/GP85/SMBD_M 105 INIT 32
DTRAJ RTSAJ 23 104 +/-5%
32 DTRAJ SLINJ 32
*
R125 30K VIN2 DCDAJ DSRAJ VIDO2/FAN_TAC5/GP24/RTS2# SLIN#/GP84/SMBD_R R88

12V_SYS 32 DCDAJ 22 VIDO3/FAN_TAC4/GP25/DSR2# ACK#/GP82 103 ACKJ 32
+/-1% R124 RIAJ SOUTA 21 102 IDE_RSTJ 330
* * 32 RIAJ VIDO4/GP26/SOUT2 BUSY/GP81 BUSY 32
1
C139
*
10K CTSAJ SINA 20 101 +/-5%
32 CTSAJ VIDO5/GP27/SIN2 PE/GP80 PE 32
+/-1% 0.1uF DSRAJ 100
32 DSRAJ SLCT SLCT 32
16V, Y5V, +80%/-20%
2
12,22 ICH_THRM_UP 48 GP50/SO
SPI
25
**
GND_IO GND_IO 8 SIO_BEEP GP22/SCK R116 10K
8 PWR_LED 24 GP23/SI PWROK2/GP41 78 5V_SB
Control
Power-on
5V_SYS R91 10K
Dummy DTRAJ 77 SUSCJ R115 10K
SUSC#/GP53
*
Note: 76 Follow ITE 8720 DEMO SCH

PS_ONJ 8
*
Recommend Vin4,Vin5,Vin6 monitor the PSON#/GP42 R114 33
75
匯
voltage signals of less than 4.096V. PANSWH#/GP43 PBTNJ_SIO 8
72 +/-5% C143
Gary 011108 PWRON#GP44 PWRBTNJ 22 power button input
TP31
121
2
FAN_CTL4/VID_TURBO
PSI_L/FAN_CTL5/CIRRX2/GP16
SUSB# 71 SLP_S3J
CIRTX
22
32
* 1uF
10V, Y5V, +80%/-20%
5V_SYS R93 4.7K 3
*
PCIRSTIN#/CIRTX2/SVD R90 10K
31 PECI_RQT/SVC/GP14 RESETCON#/CIRTX1/CE_N 30 5V_SYS
6 VCORE_GOOD/VID6/GP63 RSMRST#/CIRRX1/GP55 85 RSMRSTJ 22
5 VCORE_EN/VID7/GP64 IRTX/GP47 66 IRTX 32
120 70 Note:
IRRX 32
*
5V_SYS VDDA_EN/GP65 IRRX/GP46
MISC.
119 68 COPENJ R117 1K COPEN# should be connected to GND
RN13 VLDT_EN/GP66 COPEN# +/-5% when the function is not be used.
118 CPU_PG/GP67 3VSBSW#/GP40 79
DSKCHGJ
WPJ
*1 2
3D3V_SYS
PCIRST4#/GP10/VDIMM_STR_EN 84
34
CIRRX 32
ICH_LAN_PLTRSTJ 28
INDEXJ 3 4 FLOPPY PCIRST2#/GP11 IDE_RSTJ 3D3V_SYS
5 6 PCIRST1#/GP12 33 IDE_RSTJ 23
TRAK0J 1 2 DENSELJ 32
B
7 8 *R95 1
X
2
4 4
PWROK1/GP13
B
150 10K 5 6 51 R89
+/-5% 5 6 INDEXJ DENSEL# 1K
7 7 8 8 63 INDEX#
SERIRQ 9 10 MOAJ 52
*
RDATAJ R106 150 9 10 MTRA#

11 11 12 12 12 PECI 55 PECI/AMDSI_C/DRVB# PWRGD_3V 14,22
13 14 DSAJ 54 98 VIN0
13 14 DRVA# VIN0 VIN1
15 16 53 97
Floppy I/F
15 16 DIRJ SST/PECI_AVA/AMDSI_D/MTRB# VIN1 VIN2
17 17 18 18 57 DIR# VIN2 96
L_AD3 19 20 STEPJ 58 95
19 20 STEP# VIN3/ATXPG PWRG_ATX 8,11
L_AD2 21 22 WDJ 56 94 VIN4
L_AD[3..0] L_AD1 21 22 WEJ WDATA# VIN4/VLDT_12
22 L_AD[3..0] 23 23 24 24 60 WGATE# VIN5/VDDA_25 93
Hardware Monitoring
L_AD0 25 26 TRAK0J 62 92
25 26 WPJ TRK0# VIN6/VDIMM_STR SIOVREF
27 27 28 28 64 WPT# VREF 91
29 30 RDATAJ 61 90 TMPIN1 C144
29 30 HEADJ RDATA# TMPIN1 TMPIN2
31
33
31
33
32
34
32
34 DSKCHGJ
59
65
HDSEL#
DSKCHG#
TMPIN2
TMPIN3
89
88
* 1uF
10V, Y5V, +80%/-20%
87 TS_D-
Header_2X17_K3 TS_D- closed to pin 91
14,20,22,27 PLTRSTJ 37 LRESET#
L_DRQ0J 38 12 GND_IO
22 L_DRQ0J LDRQ#/JP1 FAN_CTL3/GP36
IT8720 Power On Strapping Options 23 SERIRQ 39 SERIRQ FAN_TAC3/GP37 11
22 L_FRAMEJ 40 LFRAME# FAN_CTL2/GP51 10 FANOUT1 31
Symbol value Description L_AD0 41 LAD0 FAN_TAC2/GP52 9 FANIN1 31
LPC I/F
L_AD1 42 8
LAD1 FAN_CTL1 FANOUT2 31
JP1 1 Disabled. L_AD2 43 LAD2 FAN_TAC1 7 FANIN2 31
Flashseg1_EN L_AD3 44 LAD3 VID0/GP30 19
Pin 38 0 Flash I/F Address Segment 1 is enabled 7 CK_33M_SIO 47 PCICLK VID1/GP31 18
7 CK_48M_SIO 49 CLKIN VID2/GP32 17
JP2 1 Disable VID output pins 22 L_PMEJ 73 PME#/GP54 VID3/GP33 16
VIDO_EN VID4/GP34 14
Pin 122 0 Enable VID output pins VID5/GP35 13
3D3V_SYS
JP3 Use for chip 1 when two IT8718F exit in the
23 KBRSTJ
KBRSTJ 45 KRST#/GP62
VBAT 1.Closed to pin 69, Vbat should be routed
CHIP_SEL same system. Chip is selected in conjunction
23 A20GATE
A20GATE 46 GA20/JP5
with a minimum trace width of 12 mils.
Pin 124 with "Global Configuration Register - Index 22, bit 7
31 KBDATA
KBDATA 80 KDAT/GP61
2.Isolate the pin69/Vbat of IT8720F and
pin VCCRTC of ICH.
KB/MS
KBCLK 81 69
31 KBCLK KCLK/GP60 VBAT
JP4 1 K8 power sequence function is disabled 31 MSDATA
MSDATA 82 MDAT/GP57 VIDVCC 36 C142
K8PWR_EN 31 MSCLK
MSCLK 83 MCLK/GP56 * 1uF
A Pin 126 0 K8 power sequence function is enabled 10V, X5R, +/-10% A
11 The default value of EC Index 15h/16h/17h is 40h(Fan half speed)

GNDD
GNDD
GNDD
GNDD
GNDA
JP3 &
JP5 10 The default value of EC Index 15h/16h/17h is 7Fh(Fan off )
FAN_CTL_SEL
Pin 124 01 The default value of EC Index 15h/16h/17h is 00h(Fan full speed ) IT8720F/FX-L
15
50
74
117
86
& 46 00 The default value of EC Index 15h/16h/17h is 20h #REFDE1

JP5 1 Disable WDT to rest PWROK 2 1 FOXCONN PCEG
WDT_EN
Pin46 0 Enable WDT to rest PWROK COPPER Title
Super I/O IT8720H
JP6 1 Disable SVID Function GND_IO
SVID_EN Size Document Number Rev
Pin29 0 Enable SVID Function C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
Peak fan current draw: 1.5A
Average fan current draw: 1.1A
Fan start-up current draw: 2.2A
Fan start-up current draw maximum duration: 1.0 second
Fan header voltage: 12V +/- 10%
5V_SYS
SM Bus Bridge
*R298
4.7K
+/-5%
3D3V_SYS R297 100

30 FANOUT1 +/-1%
D D
R327 2.7K +/-5% SMB_DATA_MAIN 12V_SYS
SMB_DATA_MAIN 7,18,19,20,22,27,36
R322 2.7K +/-5% SMB_CLK_MAIN
SMB_CLK_MAIN 7,18,19,20,22,27,36
12V_SYS
C
R301
* 4.7K D14
CPU_FAN +/-5% LS4148-F
2
A
+12V
CMD 4
Max. output current = 3A 1 R300
*
GND 27KOhm
TACH 3 FANIN1 30
C345 +/-5% 2
C339
10uF
* Header_1X4 FAN4P * 47pF
50V, NPO, +/-5%
R299
22K
16V, Y5V,+80%~-20% +/-5%
Dummy
1
CPU FAN
商
C C
KB\MS
5V_SB
F2 5V_SB
Fuse 1.5A
C79
*
*
Dummy
0.1uF
5V_SYS
匯
1
L7
FB 300 Ohm
*R108
2
4.7K
+/-5%
8
6
4
2
RN8 KB/MS R109 100

4.7K 30 FANOUT2 +/-1% 12V_SYS
+/-5%
*
16
7
5
3
1
B
13 B
12V_SYS
30 KBCLK CLK_NET03 5 11
C
3 9 R99
30 KBDATA 1 7 * 4.7K D7
2 17 SYS_FAN +/-5% LS4148-F
4 8 +12V 2
6 10 4
A
CMD R102
12 1
*
GND 27KOhm
14 TACH 3 FANIN2 30
+/-5% 2
15 Header_1X4 FAN4P C115 R103
UP
PS2X2
DOWN
SYS_FAN * 47pF
50V, NPO, +/-5%
22K
+/-5%
PWR_NET02
1
CLK_NET02
30 MSCLK
30 MSDATA
C46
* * 0.1uF
16V, Y5V, +80%/-20%
50V, NPO, +/-10%
180pF
CN1
A A
FOXCONN PCEG
Title
Keyboard / Mouse / Fan
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
5V_SYS
IR/CIR CONNECTOR
5V_SB
C290
D
0.1uF
16V, Y5V, +80%/-20% *
Dummy
D
IR/CIR
1 2
-12V_SYS 5V_SYS 12V_SYS IR CIR 4
X CIRRX 30
16V, Y5V, +80%/-20%

C65
16V, Y5V, +80%/-20%

C40
16V, Y5V, +80%/-20%

C101 0.1uF
1 30 IRRX 5 6
美
X 7 8 CIRTX 30
* * * 3 30 IRTX 9 X
0.1uF
0.1uF
4
X Header_2X5_K3K10
5
Header_1X5_K2 Header_2X5_K3K10 C95 C94 #IR#CIR
@IR @CIR
*
Dummy *
470pF 470pF
U20 D10 LS4148-F Dummy

5V_SYS 20 1 C A 12V_SYS
VCC +12V
16 5 NRTSA
30 RTSAJ DA1 DY1 NDTRA
30 DTRAJ 15 DA2 DY2 6
13 8 NSOUTA
30 SOUTA DA3 DY3 NRIA
30 RIAJ 19 RY1 RA1 2
18 3 NCTSA
30 CTSAJ RY2 RA2 NDSRA
30 DSRAJ 17 RY3 RA3 4
14 7 NSINA 5V_SYS
30 SINA RY4 RA4 NDCDA
30 DCDAJ 12 RY5 RA9 9
11 GND -12V 10 A C -12V_SYS
A
GD75232 D11 LS4148-F RN33 RN34 D9 C91
@COM2
* 0.1uF
8
6
4
2
8
6
4
2
RS232 Drivers and Receivers 16V, Y5V, +80%/-20%
LS4148-F
7
5
3
1
7
5
3
1
placed near GD75232 Reserved
C
商
2.2K 2.2K RN39
+/-5% +/-5%
*1 2
STB1-
AFD1-
3 4 INIT1-
8p4r0603h7 8p4r0603h7 5 6 SLIN1-
C C
7 8
2.7K
+/-5%
RN35
NDCDA 1
COM2
2 NSINA 30 PD[7..0]
PD[7..0]
*1 RN37
*
1
3
2
4
ACK-
BUSY
NSOUTA NDTRA PD0 2 33 PE
3 4 3 4 +/-5% 5 6
5 6 NDSRA PD1 7 8 SLCT
NRTSA NCTSA PD2 5 6
7 8 7 8
NRIA 9 PD3 10K
11 NRIA PD4 +/-5%
*
Header_2X5_K10
@COM2
PD5
PD6
*1 RN36
2 33
R45
+/-5%
10K ERR-
PD7 3 4 +/-5%
5 6
NDTRA NRTSA 7 8
NSINA NDSRA
NSOUTA NCTSA
NDCDA NRIA
*1 RN38 STB1-
匯
30 STBJ 2 33 AFD1-
* * 30 AFDJ 3 4 +/-5% INIT1-
50V, NPO, +/-10% 50V, NPO, +/-10% 30 INIT 5 6 SLIN1-
180pF 180pF 30 SLINJ 7 8
CN8 CN9
@COM2 @COM2 PRT
placed near header STB1- 1

placed near header AFD1- 14
P_D0 2
ERR- 15
COM 2 Header 30 ERRJ
INIT1-
P_D1
P_D2
3
16
B
4 B
SLIN1- 17
P_D3 5
18
P_D4 6
19
P_D5 7 28
20 27
U6 D22 LS4148-F P_D6 8 26
5V_SYS 20 1 C A 12V_SYS 21
VCC +12V P_D7 9
16 5 NRTSB 12V_SYS 5V_SYS -12V_SYS 22
30 RTSBJ DA1 DY1
16V, Y5V, +80%/-20%
C435 0.1uF
15 6 NDTRB ACK- 10
30 DTRBJ DA2 DY2 NSOUTB 30 ACKJ
30 SOUTB 13 DA3 DY3 8 23
2
NRIB BUSY
30
30
RIBJ
CTSBJ
19
18
RY1
RY2
RA1
RA2
2
3 NCTSB * C403 * * C404 30 BUSY 11
24
17 4 NDSRB 0.1uF 0.1uF PE 12
1
30 DSRBJ RY3 RA3 NSINB 30 PE

30 SINB 14 RY4 RA4 7 25
12 9 NDCDB SLCT 13
30 DCDBJ RY5 RA9 D21 25V, X7R, +/-10% 25V, X7R, +/-10% 30 SLCT
11 GND -12V 10 A C -12V_SYS
CONN - PrinterPort
GD75232 CN5
Reserved LS4148-F CN4 CN7 CN6 220pF
220pF 220pF 220pF 50V, NPO, +/-10%
50V, NPO, +/-10% 50V, NPO, +/-10% 50V, NPO, +/-10%
COM1
* * * *
11
NDCDB 1
NDSRB 6
NSINB 2
NRTSB
NSOUTB
NCTSB
7
3
COM 1 Header
8
NDTRB 4
NRIB 9
A 11 NRIB 5 A
* *
50V, NPO, +/-10% 50V, NPO, +/-10% 10
180pF 180pF
CN2 CN3
Reserved Reserved CONN-COM PORT
Update by Steven 053107
FOXCONN PCEG
Title
Serial Port
C
G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
3D3V_SYS
*R346
1K *R307
1K 3D3V_SYS MH3 MH1 MH5 MH6
+/-5% +/-5% Mounting Hole Mounting Hole Mounting Hole Mounting Hole
@8102EL
6
5
6
5
6
5
6
5
D D
7 4 7 4 7 4 7 4
C448 8 3 8 3 8 3 8 3
Board_ID2 10nF
Board_ID2 22 * 9 2 9 2 9 2 9 2
美
Board_ID1 Board_ID1 22 25V, X7R, +/-10%
1
Dummy
mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8
*R347
1K
Dummy *R309
1K GND_AUDIO
GND_AUDIO
+/-5% +/-5% MH7

@8111DL Mounting Hole
6
5
J1 J2 7 4
1 1 8 3
2 2 9 2
1
T1 T1
mh40x80_8
商
MH8
C Mounting Hole C
6
5
7 4
8 3
J3 J4 9 2
1 1
1
2 2
mh40x80_8
T1 T1
匯
FD3 FD2 FD6 FD1 FD4 FD5
FMARK FMARK FMARK FMARK FMARK FMARK
FD40 FD40 FD40 FD40 FD40 FD40
B B
1
A A
FOXCONN PCEG
Title
BOARD ID
Custom G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
change C23 to 10uF follow Realtek advice. 11/28

change EC5,EC12,EC14 to 6.3v/1000uF. 11/28
D D
美
商
C C
匯
B B
A A
FOXCONN PCEG
Title
CHANGE LIST
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
D D
美
商
C C
匯
B B
A A
FOXCONN PCEG
Title
Keyboard / Mouse / Fan
C G41M05 A

5 4 3 2 1
亞
5 4 3 2 1
5V_SYS 5V_SYS
3D3V_SYS 3D3V_SYS 3D3V_SYS 3D3V_SYS
-12V_SYS 5V_SYS 12V_SYS -12V_SYS 5V_SYS 12V_SYS
Note: 20-24 mils PCI1 Note: 20-24 mils PCI2

B1 -12V TRST# A1 B1 -12V TRST# A1
B2 TCK +12V A2 B2 TCK +12V A2
B3 GND1 TMS A3 B3 GND1 TMS A3
B4 TDO TDI A4 B4 TDO TDI A4
B5 +5V1 +5V2 A5 B5 +5V1 +5V2 A5
B6 A6 INTBJ INTBJ 24 B6 A6 INTCJ INTCJ 24
INTCJ +5V3 INTA# INTDJ INTDJ +5V3 INTA# INTAJ
24 INTCJ B7 INTB# INTC# A7 INTDJ 24 24 INTDJ B7 INTB# INTC# A7 INTAJ 24
24 INTAJ INTAJ B8 A8 24 INTBJ INTBJ B8 A8
INTD# +5V4 INTD# +5V4
D
B9 PRSNT1# RSV1 A9 B9 PRSNT1# RSV1 A9 D
B10 RSV2 +5V5 A10 B10 RSV2 +5V5 A10
B11 PRSNT2# RSV3 A11 B11 PRSNT2# RSV3 A11
B12 GND2 GND3 A12 B12 GND2 GND3 A12
B13 A13 3D3V_SB B13 A13 3D3V_SB
GND4 GND5 GND4 GND5
B14 A14 B14 A14
美
RSV4 SB3V RSV4 SB3V
B15 GND6 RESET# A15 PCIRSTJ 24 B15 GND6 RESET# A15 PCIRSTJ 24
7 CK_33M_PCI1 B16 CLK +5V6 A16 7 CK_33M_PCI2 B16 CLK +5V6 A16
B17 GND7 GNT# A17 GNT0J 24 B17 GND7 GNT# A17 GNT1J 24
PREQ0J B18 A18 PREQ1J B18 A18
REQ# GND8 REQ# GND8
B19 +5V7 PCI_PME# A19 PMEJ 24 B19 +5V7 PCI_PME# A19 PMEJ 24
AD31 B20 A20 AD30 AD31 B20 A20 AD30
AD29 AD(31) AD(30) AD29 AD(31) AD(30)
B21 AD(29) +3.3V1 A21 B21 AD(29) +3.3V1 A21
B22 A22 AD28 B22 A22 AD28
AD27 GND9 AD(28) AD26 AD27 GND9 AD(28) AD26
B23 AD(27) AD(26) A23 B23 AD(27) AD(26) A23
AD25 B24 A24 AD25 B24 A24
AD(25) GND10 AD24 AD(25) GND10 AD24
B25 +3.3V2 AD(24) A25 B25 +3.3V2 AD(24) A25
CBEJ3 B26 A26 IDSEL0 CBEJ3 B26 A26 IDSEL3
24 CBEJ3 C/BE#(3) IDSEL 24 CBEJ3 C/BE#(3) IDSEL
AD23 B27 A27 AD23 B27 A27
AD(23) +3.3V3 AD22 AD(23) +3.3V3 AD22
B28 GND11 AD(22) A28 B28 GND11 AD(22) A28
AD21 B29 A29 AD20 AD21 B29 A29 AD20
AD19 AD(21) AD(20) AD19 AD(21) AD(20)
B30 AD(19) GND12 A30 B30 AD(19) GND12 A30
B31 A31 AD18 B31 A31 AD18
AD17 +3.3V4 AD(18) AD16 AD17 +3.3V4 AD(18) AD16
B32 AD(17) AD(16) A32 B32 AD(17) AD(16) A32
B33 C/BE#(2) +3.3V5 A33 B33 C/BE#(2) +3.3V5 A33
24 CBEJ2 B34 A34 FRAMEJ 24 CBEJ2 B34 A34 FRAMEJ
GND13 FRAME# FRAMEJ 24 GND13 FRAME# FRAMEJ 24
IRDYJ B35 A35 IRDYJ B35 A35
24 IRDYJ IRDY# GND14 24 IRDYJ IRDY# GND14
B36 A36 TRDYJ B36 A36 TRDYJ
+3.3V6 TRDY# TRDYJ 24 +3.3V6 TRDY# TRDYJ 24
DEVSELJ B37 A37 DEVSELJ B37 A37
24 DEVSELJ DEVSEL# GND15 24 DEVSELJ DEVSEL# GND15
B38 A38 STOPJ B38 A38 STOPJ
GND16 STOP# STOPJ 24 GND16 STOP# STOPJ 24
LOCKJ B39 A39 LOCKJ B39 A39
24 LOCKJ LOCK# +3.3V7 24 LOCKJ LOCK# +3.3V7
PERRJ B40 A40 PSCLK PERRJ B40 A40 PSCLK
24 PERRJ PERR# SDONE PSDATA 24 PERRJ PERR# SDONE PSDATA
B41 +3.3V8 SBO# A41 B41 +3.3V8 SBO# A41
商
SERRJ B42 A42 SERRJ B42 A42
24 SERRJ SERR# GND17 24 SERRJ SERR# GND17
B43 A43 PAR B43 A43 PAR
+3.3V9 PAR PAR 24 +3.3V9 PAR PAR 24
CBEJ1 B44 A44 AD15 CBEJ1 B44 A44 AD15
24 CBEJ1 AD14 C/BE#(1) AD(15) 24 CBEJ1 AD14 C/BE#(1) AD(15)
B45 AD(14) +3.3V10 A45 B45 AD(14) +3.3V10 A45
B46 A46 AD13 B46 A46 AD13
C B47 AD(12) AD(11) A47 B47 AD(12) AD(11) A47 C
AD10 B48 A48 AD10 B48 A48
AD(10) GND19 AD9 AD(10) GND19 AD9
B49 GND20 AD(9) A49 B49 GND20 AD(9) A49
AD8 B52 A52 CBEJ0 AD8 B52 A52 CBEJ0

AD(8) C/BE#(0) CBEJ0 24 AD(8) C/BE#(0) CBEJ0 24
AD7 B53 A53 AD7 B53 A53
AD(7) +3.3V11 AD6 AD(7) +3.3V11 AD6
B54 +3.3V12 AD(6) A54 B54 +3.3V12 AD(6) A54
AD5 B55 A55 AD4 AD5 B55 A55 AD4
AD3 AD(5) AD(4) AD3 AD(5) AD(4)
B56 AD(3) GND21 A56 B56 AD(3) GND21 A56
B57 A57 AD2 B57 A57 AD2
B58 AD(1) AD(0) A58 B58 AD(1) AD(0) A58
B59 +5V8 +5V9 A59 B59 +5V8 +5V9 A59
ACK64J B60 A60 REQ64_1J ACK64J B60 A60 REQ64_2J
ACK64# REQ64# ACK64# REQ64#
B61 +5V10 +5V11 A61 B61 +5V10 +5V11 A61
B62 +5V12 +5V13 A62 B62 +5V12 +5V13 A62
Slot,PCI CONN Slot,PCI CONN
AD[31..0] AD[31..0]
AD[31..0] 24 AD[31..0] 24
匯
R145
*
IDSEL0 330 AD18

+/-5%
5V_SYS 3D3V_SYS -12V_SYS R148
*
IDSEL3 330 AD17
+/-5%
C111 C210
B CP8 B
0.1uF EC47 0.1uF
2
*
EC22
470uF * 16V, Y5V, +80%/-20%
* 1000uF
+/-20%
Dummy * 16V, Y5V, +80%/-20%
Dummy * C110
PSCLK 2 1 SMB_CLK_MAIN 7,18,19,20,22,27,31
16V, +/-20% 0.1uF Del R351,R352
1
X_COPPER
Dummy CP9
25V, X7R, +/-10% PSDATA 2 1 SMB_DATA_MAIN 7,18,19,20,22,27,31
X_COPPER
5V_SYS
3D3V_SYS
RN19
*1
RN11
INTBJ
INTBJ 24
*1 2 REQ64_2J
2 INTCJ 3 4 ACK64J
3 4 INTCJ 24 5 6
INTDJ REQ64_1J
5 6 INTDJ 24 7 8
INTAJ
7 8 INTAJ 24
2.7K
8.2K +/-5%
+/-5%
RN23
*1 2 PREQ1J
PREQ2J
24
24
PCI Slot
3 4 3D3V_SYS
5 6 PREQ3J 24
7 8 PREQ0J 24
RN18
8.2K
+/-5%
*1 2
STOPJ
LOCKJ
RN21 3 4 PERRJ
5 6
*1 2
INTGJ
INTHJ
INTGJ
INTHJ
24
24
1394a
7 8
SERRJ
3 4 INTFJ IT8211 8.2K
A A
5 6 INTFJ 24
INTEJ +/-5%
7 8 INTEJ 24
8.2K
+/-5% RN17
Reserved
*1 2
FRAMEJ
IRDYJ
**
R267 8.2K +/-5% 3 4 TRDYJ

PREQ4J 24 5 6
R274 8.2K +/-5% DEVSELJ
PREQ5J 24 7 8
8.2K FOXCONN PCEG
+/-5%
Title
PCI Slot
C
G41M05 A

5 4 3 2 1

G41M05 Schematic Foxconn Precision Co. Inc.: Fab.A Data: 2008/7/30 Page Index

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G41M05 Schematic Foxconn Precision Co. Inc.: Fab.A Data: 2008/7/30 Page Index

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亞

Foxconn Precision Co. Inc.

06. Power Sequence 30. PCI Express x1Slot

15. Eaglelake -GMCH -2 B

16. Eaglelake -GMCH -3

Date: Thursday, October 22, 2009 Sheet 1 of 34

PCI Express x 16 Channel A DDR2

GMCH DDR2 667/800/1066 Channel B DDR2

SPI Flash SATA Connector 3

Date: Friday, August 28, 2009 Sheet 2 of 34

Front Panel PWROK ACZ_RST#

RSMRST circuit FOXCONN PCEG

Date: Friday, August 28, 2009 Sheet 3 of 34

PCI Express/DMI 100 MHz Diff Pair

TPM 33 MHz TPM

SIO 33 MHz Super I/O

SATA 100 MHz Diff Pair

Date: Friday, August 28, 2009 Sheet 4 of 34

3.3V Super I/O

1.2V FSB 5VSB

GMCH 1.25 V Vcore (Core Logic) PCI Express X16

Nineveh GbE Lan

1.8V ANALOG 418.2mA BJT

Date: Friday, August 28, 2009 Sheet 5 of 34

+5V_SYS +5V_DUAL +5V_DUAL +5V_SYS

+3D3V_SYS +3D3V_DUAL +3D3V_DUAL +3D3V_SYS

+1D8V_STR +1D8V_STR +1D8V_STR +1D8V_STR

Date: Friday, August 28, 2009 Sheet 6 of 34

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

VRMPWRGD VRMPWRGD 9,22

50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

50V, NPO, +/-5%

FS_C FS_B FS_A FSB Frequency

Date: Friday, August 28, 2009 Sheet 7 of 34

3D3V_SYS 3D3V_SYS 5V_SYS 5V_SB -12V_SYS 12V_SYS

25V, X7R, +/-10%

25V, X7R, +/-10%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

5V_SYS 3D3V_SB 5V_SYS 5V_SB

16V, Y5V, +80%/-20%

25V, X7R, +/-10%

25V, X7R, +/-10%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

25V, X7R, +/-10%

3 R367 2.2K B Q46

+/-5% MMBT3904-7-F 0.1uF

Date: Friday, August 28, 2009 Sheet 8 of 34

R139 * C184 R158 C206 +/-1%

R228 C289 R229