The synthesis of finite state machines by using a combined

Meely and Moore model

Introductions
Digital system designers have long been interested in the problem of applying the input and/or
output vectors as the part of the code of internal states [1–6] of finite state machines (FSMs). In a
number of cases, approaches of this kind can substantially reduce the implementation cost of FSMs and
enhance their speed. With the advent of programmable logic devices (PLDs), such as complex
programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), and system on one
programmable chips (SOPCs) the development of efficient methods for FSM synthesizing becomes a
burning issue. For this purpose, six structural models of FSMs, which were called class A, B, C, D, E,
and F machines have been proposed in [7].
The class A machine is a classical Mealy FSM [9], in which an output vector depends on the
input vector and the internal state of an FSM. The class B machine is a classical Moore FSM [10],
where each output vector depends only on the FSM’s internal state. Class C, D, E, and F FSMs are the
modifications of class A and B machines. In the class C machine, each output vector of the Moore FSM
is identical to the code of the present internal state. In the class D machine, each output vector of the
Mealy FSM corresponds to the code of the next internal state. In the class E machine, each input vector
of the Mealy machine coincides with the code of the next state. By analogy with the previous situation,
in the class F machine, each input vector of the Moore machine coincides with the code of the next
state.
The class C and D machines allow to use the flip-flops of macrocells (for CPLDs) and logic
elements (for FPGAs), on which output functions are implemented, as elements of FSM memory. The
class E and F machines allow to use the flip-flops of input buffers as elements of FSM memory.
In [7], the time analysis of structural models of the class A-F machines for cases of the
minimum clock cycle and maximum speed FSM functioning was performed. On a basis of the time
analysis, four combined models ADE, AD, AE, and BF of FSMs have been proposed.
The main condition according to which different classes of machines can be combined into one
model is a complete coincidence of time diagrams of output signals in the combined models. This
condition is considerably reduces the possibility for combining of different models. In practice, FSMs
have only partially properties of some models C-F. Therefore because of specified above restriction, it
is necessary to employ the most general FSM models: Mealy machines [9] and Moore machines [10].
In this paper, FSMs are implemented under the assumption of violation of an absolute similarity
between the time diagrams of the output signals in the combined models. The sufficient condition is
that output signals of combined models must be formed within the same FSM clock cycle. Such
slacking of the model combining condition (in comparison with [7]) makes it possible to combine class
A and C machines. As a result, the implementation cost can be decreased without any reduction of
FSM speed.

Basic structural models

In practice, sequential circuits are designed using two widespread types of FSMs: Mealy and
Moore machines. The Mealy FSM behavior can be described by the equations
at+1 = (zt, at); (1)
wt = (zt, at);
where  is the transition function,  is the output function, zt is the input vector at instant t (t = 1, 2, 3,
…), wt is the generated output vector, at is the present state of an FSM, and at+1 is the next state of an
FSM. The Moore FSM behavior is described by the equations
at+1 = (zt, at); (2)
wt = (at).
A distinctive feature of the Mealy FSM is the dependence of output vector wt on both input vector zt
and internal state at. The output vector wt of the Moore FSM is determined only by internal state at. The
structural models of Mealy and Moore machines are presented in Figs. 1a and 1b, where combinational
circuit CL implement the transition functions, CL implement the output functions, and controlled by
clock signal CLK the register RG implement an FSM memory. If each output vector wt of a Moore
machine coincides with the code of internal state at, the FSM behavior can be defined as
at+1 = (zt, at); (3)
wt = at.
The given type of an FSM is called a class C machine [11]. By analogy, Mealy and Moore FSMs (Figs.
1a, 1b) are called class A and B machines, respectively. The structure of class C machine is depicted in
Fig. 1c. Its distinctive features are that such a machine has no combinational circuit CL  and all output
functions are formed at the outputs of register RG. Note that the above structure is easily implemented
on CPLD (FPGA) because their macrocells (logic elements) can be configured so as to have register
outputs and feedback circuits.
Let the initial point of a FSM clock period is time moment when an FSM transits in a stable
state, i.e. when the reliable values will set up on the outputs of memory elements. The time diagrams of
functioning of classes A, B, and C machines are shown on fig. 2, where t and t+1 are the FSM clock
periods (automata times); at and at+1 are the FSM states during the moments of automata time t and
t+1; zt and zt+1 are the input vectors that arriving on FSM inputs during the moments of automata time t
and t+1; wt and wt+1 are the output vectors that forming on FSM outputs during the moments of
automata time t and t+1; tS is the signal setup time on the input PLD flip-flops; tCO is the signal setup
time on the output PLD flip-flops; tH is the signal hold time on the input PLD flip-flops; tPD is time
delay on combinational part of PLD.
The analysis of fig. 2 shows that the output vectors of class C machine are formed on time t PD
earlier then the output vectors of class A machine. In the most cases of a practical FSM using such
forming of output signals is quite admissible.

Preliminaries
Let X={x1,…,xL} be a set of the FSM input variables, Y={y1,…,yN} be a set of the FSM output
variables, and A={a1,…,aM} be a set of the FSM internal states.
A main idea of proposed method is that often same FSM encloses the FSM properties of
different types: the Mealy automata and the Moore automata. Let, for example, the FSM Mealy has
state ai, ai  A, on all transitions from which the same output vector wi is formed. The output vector wi
does not depend from any input variables (as it is formed on all transitions from state ai), but it depend
only from internal state ai. So the output vector wi can be described to state ai and the itself state ai can
be assigned to the FSM of Moore type. The set of all such states make up subset AB of Moore FSM
states, AB  A. The remaining FSM states make up subset AA of FSM Mealy states, AA = A \AB. By this
means the same FSM can include both the states of the Mealy FSM, and the states of the Moore FSM,
with AA  AB = A and AA  AB = , where  is an empty set.
Let y(ai) be a set of the output variables whose unit values are formed on transitions from the
state ai, ai  A. The output variables whose unit values are formed on transitions from the states of the
subset AA will be called the output variables of Mealy FSM and ones will be denoted by YA:
YA = { y(ai) | ai  AA }. (4)
It is similarly possible to define a set YB of the output variables of the Moore FSM:
YB = { y(ai) | ai  AB }. (5)
Notice that subsets of the output variables of the FSM Mealy and of the Moore FSM can be intersected,
i.e. YA  YB ≠ . It is obvious that YA  YB = Y.
The output variables of the Moore FSM of the set YB cannot be used directly as functions of
excitation of memory elements, it follows from the following theorem.
Theorem 1. Let the output vector wi is formed on transitions from the state ai, ai  A. The
output vector wi can be used as the code (or part of the code) of the state ai if the following necessary
conditions be met:
(1) output vector wi must not be formed on others FSM transitions, except transitions from state ai;
(2) all output variables, which are equal to unities in vector wi, must be the output variables of a
Moore FSM, i.e., independent from input variables.
Proof. The violation of condition (1) can lead to an unforeseen FSM transition to state ai, i.e.,
the degradation of deterministic FSM behavior. The violation of condition (2) makes it impossible to
vary the Mealy FSM’s output variables by changing input variables, i.e., it leads to a violation of the
FSM functioning. 
Output variable of the set YB satisfy only to the condition (2) of the theorem 1. For sufficing to
the condition (1) of the theorems 1, it is necessary to exclude from the set YB the output variables which
unit values are formed on transitions from the Mealy FSM states of the subset AA. So set YC of output
variables of class C machine is defined from following expression:
YC = Y B \ YA = Y \ YA. (6)
The output variables of the Mealy FSM of the set YA directly depend from input variables and
its are asynchronous in relation to the input variables, i.e. the values of output variables of set YA can
vary at a modification of the values of the input variables. Therefore, the output variables of the Mealy
FSM of the set YA are always realized on combinational outputs of PLD.
The output variables of class C machine of set YC directly do not depend from the input
variables, i.e., its values vary together with a change of the FSM internal states. So the values of output
variables of class C machine can represent as the code (or a part of the code) of the FSM state. For an
implementation of the output variables of class C machine of set YC, the configuration with registered
output of the macrocells (for CPLD) or the logic elements (for FPGA) is used. Thus feedbacks of the
macrocells or the logic elements are used for the transmission of the values of feedback variables on an
input of the combinational part of an FSM.
The main idea of the offered method consists in a finding of such sets of the output variable
values that its are formed on all transitions from some states and its satisfy to conditions of the theorem
1, and also in a special encoding of the FSM states at which found earlier the sets of output variable
values are used as a code (or a part of a code) of the FSM states.
Let us note differences of the considered approach from similar methods of FSM synthesis. In
[7], the method of synthesis of the class C machine is offered, but in [7] it is inadmissible the
combination of the machines of classes A and C as for machines of classes A and C the time diagrams
of formed output signals do not coincide. In the offered approach the combined model of the class A
machines and of the class C machine is used. In [7], for a syntheses of the class C machine, a
transformation of a Mealy FSM to a Moore FSM [Mealy_to_Moore] is obligatory, as a rule, it is
connected with an increase of the number of the FSM states and the number of the FSM transitions. In
the offered approach the initial FSM is not exposed to any transformations connected with the increase
of the number of the FSM states and the number of the FSM transitions.
 The method for synthesis of a combined model AC
Let D = {d1,…,dR} be a set of the transition functions, E = {e1,…,eR} be a set of the feedback
variables, where R is a number of bits required to encode FSM states (R  intlog2M). A block diagram
of the combined model AC of the class A and the class C machines is shown on fig. 3, where CL is a
combinational part of an FSM (it combine the combinational circuits CL and CL of the class A
machine and the combinational circuit CL of the class C machine), RGC is a part of FSM memory that
defined by the output variable values of the set YC, RGA is a part of FSM memory that defined by the
values of the added transition functions, YA is a set of the output variables of the class A machine, YC is
a set of the output variables of the class C machine, DC is a set of the transition functions corresponding
to output variables of the set YC, DA is a set of the added transition functions (its are necessary for
distinction of the FSM codes), EC and EA are the feedback variables that correspond to the transition
functions of sets DC and DA.
A FSM behavior is described by the transition list. The transition list is a table with four
columns: am, as, X(am,as), and Y(am,as). Each row of the transition list corresponds to one FSM
transition. The column am contains the state where the transition begins (a present state), the column as
contains the state where the transition ends (a next state), the column X(am,as) contains the set of values
of the input variables that initiates this transition (a transition condition or an input vector), and the
column Y(am,as) contains the set of values of the output variables that is generated by FSM at this
transition (an output vector). An ISFSM output vector is represented by ternary vector. For example,
Y(am,as)=”01-0”, where 0 denotes zero value, 1 denotes unity value, and dash (“-“) denotes a don’t
care value of the corresponding output variable.
Taking into account the above-stated the FSM synthesis algorithm of the combined model AC
on fig. 3 looks as follows.
Algorithm 1 (FSM synthesis of the combined model AC).
1. According to (6) the set YC of output variables of the class C machine is found. If YC = , the
method [7] for synthesizing the FSM must be used and go to Step 6.
2. Triple matrix G is constructed. The rows of matrix G correspond to the FSM internal states of
the set A, and the columns correspond to the output variables of the class C machine of the set
YC. For the Moore FSM states of set AB, the values of the output variables defined by set YC,
which are formed at transitions from the corresponding states, are written in the corresponding
rows of matrix G. For the Mealy FSM states of set AA, the indefinite values (hyphens) are
written in the corresponding rows of matrix G.
3. The following problem is solved.
Problem 1. To add in matrix G the minimum number R* of the columns corresponding to
additional feedback variables eN+1, …, eN+R* so that all rows of the matrixes G were mutually
orthogonal.
4. The codes of the FSM states are found. For this each state ai, (ai ∈ A) is associated a code K(ai)
that equal to contents of the row i of matrix G.
5. Logic equations for the transition and output functions of an FSM are constructed.
6. End.
For a solution of the problem 1 the following algorithm can be used.
Algorithm 2 (orthogonalization of the matrixes G rows).
1. A graph H of orthogonality of the matrixes G rows is built. The vertices of graph H correspond
to the rows of the matrixes G. Two vertices i and j of graph H are connected by edge, if the
rows i and j of the matrixes G are orthogonal among themselves (have various meaning values
at least in one position).
 Now the problem 1 is reduced to finding in the graph H of the minimum number T of the full
subgraphs H1, …, HT which vertices are not crossed, and assigning to the subgraphs H1, …, HT
of binary codes defined by values of variables eN+1, …, eN+R*.
2. The vertices, which connected with all other vertices, are deleted from the graph H (the rows of
a matrixes G corresponding to it vertices are orthogonal to all other rows); setting t := 0.
3. Setting t := t + 1; in the graph H the full subgpraph Ht with of the maximum number of vertices
is found.
4. The vertices of the subgpraph Ht are deleted from the graph H. If a set of the vertices of the
graph H is empty, then go to Step 5, else go to Step 3.
5. Setting R* = intlog2T. The subgraphs H1, …, HT are encoded of binary codes which defined by
values of the variables eN+1, …, eN+R*.
6. In the matrix G the columns corresponding to variables eN+1,…,eN+R* are added. The contents of
these columns are defined by codes of corresponding subgraphs.
7. End.
Example 1. Let us consider synthesis of the merged model AC of an FSM with the graph
shown in Fig. 2. The given FSM is characterized by input variables x1, x2, and x3, output variables y1,
y2, and y3, and five internal states (a1, …, a5). The list of FSM transitions is illustrated in Table 1. Note
that unity in column X(am,as) designates an unconditional transition and hyphen in column Y(am,as)
corresponds to zero output set. According to the given FSM, we obtain AA = {a1} and AB = {a2, a3, a4,
a5}, because only transitions from state a1 generate the different output variables (y1 = 1 if x1 = 1, and
the output vector is zero if x1 = 0).
In the case of state a1, we obtain y(a1) = {y1}. Hence, the set YA ={y1} is found from (4). The set
YC = {y2,y3} is determined from (6). Thus, output variables y2 and y3 are the ones of the class C machine
and their values can be used as a code (a part code) of the FSM states.
Matrix G obtained in step 3 of the algorithm 1 is presented in the first two columns of Table 2. Output
variables y2 and y3 correspond to transition functions d1 and d2. The graph H of orthogonality of the
matrixes G rows and its partition on the subgraphs H 1 and H2 is shown on fig. 5. To orthogonalize all
rows of matrix G, it will suffice to employ one binary variable corresponding to transition function d3
(the third column in Table 2). The values of rows from matrix G make it possible to determine the
following codes of FSM’s internal states:
K(a1) = (--1);
K(a2) = (110);
K(a3) = (100);
K(a4) = (010);
K(a5) = (000).
The expanded transition table of the combined model AC for our example is provided in table 3,
where the columns am, X(am,as), and as have the previous values; the column Y(am,as) contains the
values of the output variables of FSM Mealy of a set YA; the column Y(am) contains the values of the
output variables of FSM Moore of a set YB; the column K(am) contains a code of the state am (it is
defined by values of the feedback variables e1, e2, and e3); and the column K(as) contains a code of the
state as (it is defined by values of the functions d1, d2, and d3). Note that in table 3 the values of the
FSM Moore output variables (a column Y(am)) completely are defined by the code K(am) of the FSM
state am.
Now on the basis of the Table 3 it is possible to construct the following logical equations for the
functions realized by the combinational circuit CL:
y1 = e3x1;
d1 = e3 + e1e2 e 3 x 2;
d2 = e3x1 + e1e2 e 3 + e1 e 2 e 3 x 3;
 d3 = e 1 e 2 e 3.
Realization of the final machine gun on COTTON VELVET is shown in fig. 6. The output y1
variable of the machine gun of Mile is realized at the combinational exit COTTON VELVET. The
output y2 and y3 variables of the machine gun of a class C are realized at the register exits COTTON
VELVET, and feedback of the corresponding output macrocells COTTON VELVET are used for
transfer of values of variables of feedback of e1 and e2. Actually, values of the output y2 and y3
functions act as values of variables of feedback of e1 and e2. Besides, one macrocell COTTON
VELVET with a register exit is used for realization of additional function of transitions of d3. Let's
note that for realization of additional functions of transitions hidden (buried) of a macrocell COTTON
VELVET, i.e. such macrocells which have no communication with external conclusions can be used.

Реализация конечного автомата на ПЛИС показана на рис.6. Выходная переменная y1

автомата Мили реализуется на комбинационном выходе ПЛИС. Выходные переменные y2 и y3
автомата класса C реализуются на регистровых выходах ПЛИС, причем обратные связи
соответствующих выходных макроячеек ПЛИС используются для передачи значений
переменных обратной связи e1 и e2. Фактически, в качестве значений переменных обратной
связи e1 и e2 выступают значения выходных функций y2 и y3. Кроме того, одна макроячейка
ПЛИС с регистровым выходом используется для реализации дополнительной функции
переходов d3. Отметим, что для реализации дополнительных функций переходов могут
использоваться скрытые (buried) макроячейки ПЛИС, т.е. такие макроячейки, которые не имеют
связи с внешними выводами.