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Datapath Functional Units

Contents

• Comparator

• Funnel Shifter

• Multi Input Adder

• Multiplier

• Divider

2
Introduction
• Data path
• Consists of functional units where all computations are carried out
• Ex: Registers, multiplexers, bus, adders, multipliers, counter
• Control path
• Consists of FSM and provide control signals to the data path in proper sequence
• With the help of control signals various operations are carried out by the data
path
• Also takes inputs from the data path regarding status information

3
Introduction
• Illustrate data and control path
• P=Q+R

• S=P-R

4
Multiplication by repeated addition
Start

• Illustrate P * Q by repeated addition


Read P, Q
• Assumption, B not zero
F=0
• Identify the functional blocks
F=F+P
• Design the FSM to implement the
algorithm with the help of data path Q=Q-1
No
Yes
Q = 0? Stop

5
Multiplication by repeated addition
• Data Path bus

loadQ loadF
decQ Q loadP P F clrF

Comparator Adder

zero Z

in_data

6
Multiplication by repeated addition
• Block Diagram
loadP
in_data
loadQ
start loadF

done Control clrF Data


Path decQ Path

zero

clock

7
Multiplication by repeated addition
Start S0
• Control Path S0
start
P = in_data S1
S1
Q = in_data
F=0 S2
S2

!zero F=Z S3
S3 Q=Q-1
zero

No
S4 Yes
Q = 0? done = 1

S4
8
Multiplication by repeated addition
• Write HDLs and simulate
testbench

top_dut
shift_reg counter

testbench comparator

adder controller

9
Comparators

• 0’s detector: A = 00…000

• 1’s detector: A = 11…111

• Equality comparator: A=B

• Magnitude comparator: A<B

Datapath Slide 10
1’s & 0’s Detectors
• 1’s detector: N-input AND gate
• 0’s detector: NOTs + 1’s detector (N-input NOR)
A7
A6 A3
A5 A2
A4 allzeros
allones A1
A3
A2 A0
A1
A0

A7
A6
A5
A4
A3 allones
A2
A1
A0

Datapath Slide 11
Equality Comparator

• Check if each bit is equal (XNOR, an equality detector gate)

• 1’s detect on bitwise equality


B[3]
A[3]
B[2]
A[2] A=B
B[1]
A[1]
B[0]
A[0]

Datapath Slide 12
Magnitude Comparator
• Compute B-A and look at sign
• B-A = B + ~A + 1
• For unsigned numbers, carry out is sign bit
A B
C
B3
N A B
A3
B2

A2 Z
A=B
B1

A1
B0

A0

Datapath Slide 13
Signed vs. Unsigned
• For signed numbers, comparison is harder
• C: carry out
• Z: zero (all bits of A-B are 0)
• N: negative (MSB of result)
• V: overflow (inputs had different signs, output sign  B)

Considering B - A

Datapath Slide 14
Shifters
• Logical Shift:
• Shifts number left or right and fills with 0’s
• 1011 LSR 1 = 0101 1011 LSL1 = 0110
• Arithmetic Shift:
• Shifts number left or right. Rt shift sign extends
• 1011 ASR1 = 1101 1011 ASL1 = 0110
• Rotate:
• Shifts number left or right and fills with lost bits
• 1011 ROR1 = 1101 1011 ROL1 = 0111

Datapath Slide 15
Funnel Shifter
• A funnel shifter creates a 2N – 1-bit input word Z from A then selects an N-bit
field from this input word
• Selects N-bit field Y from 2N-bit input
• Shift by k bits (0  k < N)
2N-1 N-1 0
B C

offset + N-1 offset

Datapath Slide 16
k1 k0
Funnel Shifter Design left

• Log N stages of 2-input muxes


Z0
Y0
Z1
Y1
Z2
Y2
Z3
Y3
Z4

Z5

Datapath Slide 17
Z6
Multi-input Adders
• Suppose we want to add k N-bit words
• Ex: 0001 + 0111 + 1101 + 0010 = 10111

Datapath Slide 18
Multi-input Adders
• Suppose we want to add k N-bit words
• Ex: 0001 + 0111 + 1101 + 0010 = 10111
• Straightforward solution: k-1 N-input CPAs
• Large and slow
0001 0111 1101 0010

+
10101

+
10111

Datapath Slide 19
Carry Save Addition
• A full adder sums 3 inputs and produces 2 outputs
• Carry output has twice weight of sum output
• N full adders in parallel are called carry save adder
• Produce N sums and N carry outs
X4 Y4 Z4 X3 Y3 Z3 X2 Y2 Z2 X1 Y 1 Z1

C4 S4 C3 S3 C2 S2 C1 S1
XN...1 YN...1 ZN...1

n-bit CSA

CN...1 SN...1

Datapath Slide 20
CSA Application 0001 X
• Use k-2 stages of CSAs
0001 0111 1101 0010 0111 Y
• Keep result in carry-save redundant form +1101 Z
• Final CPA computes actual result 4-bit CSA 1011 S
0101_ C
0101_ 1011
0101_ X
5-bit CSA 1011 Y
+0010 Z
01010_ 00011 00011 S
01010_ C
+
01010_ A
10111 + 00011 B
10111 S
Datapath Slide 21

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