Lab Manual Digital Logic Design 3rd Semester

EXPERIMAENT NO.02
Implementation of Boolean Functions using Universal Logic Gates

Name: Muhammad Amir Roll No : 20TC1016

Instructor Signature:.----------------------------- Date:. 11- 22- 2021

Aim:
To implement the Boolean Functions using universal Logic Gates.

Equipment & Components Required:-

Digital breadboard Kit, IC 7400, IC 7410, IC7420, IC 7402, IC 7427,
IC 7425.

IC Details:

IC 7400 - Quad 2-Input NAND Gate

IC 7410 - Triple 3-Input NAND Gate

IC 7420 - Dual 4-Input NAND Gate

IC 7402 - Quad 2-Input NOR Gate

IC 7427 - Triple 2-Input NOR Gate

IC 7425 - Dual 2-Input NOR Gate

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 Lab Manual Digital Logic Design 3rd Semester

Procedure:-

I. To implement a Boolean function in terms of product-of-sums, use

NAND gates.
II. To implement a Boolean function in terms of Sum-of-products, use
NOR gates.
III. Minimize the Boolean function using K-Maps.
IV. Derive the Truth Table for each Boolean function.

V. Implement the minimized Boolean function using NAND gates and

NOR gates.

F1(A,B,C,D) = Σ (0,1,4,5,8,9,10,12,13)
F2(A,B,C,D) = Π (1,3,5,7,9,12,14,15)

Minimization Using K-Maps:-

F1(A,B,C,D)= Σ(0,1,4,5,8,9,10,12,13)

F1 CD

AB 00 01 11 10

00 1 1

01 1 1

11 1 1

10 1 1 1

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 Lab Manual Digital Logic Design 3rd Semester

F(A,B,C,D)= Cꞌ +ABꞌDꞌ

Circuit Diagram:-

F2(A,B,C,D) = Π (1,3,5,7,9,12,14,15)
F2 BC

AB 00 01 11 10

0 0
00

01
0 0

11 0 0
0
10 0

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 Lab Manual Digital Logic Design 3rd Semester

F2 (A,B,C,D) = A’D + ABC + ABD’ +B’C’D

Circuit Diagram:-

Truth Table of F1, F2 :

W X Y Z F1 F2

0 0 0 0 1 0

0 0 0 1 1 1

0 0 1 0 0 0

0 0 1 1 0 1

0 1 0 0 1 0

0 1 0 1 1 1

0 1 1 0 0 0

0 1 1 1 0 1

1 0 0 0 1 0

1 0 0 1 1 1

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 Lab Manual Digital Logic Design 3rd Semester

Conclusion:-
By using logical sets in this way, the various laws and theorems of Boolean Algebra can
be implemented with a complete set of logic gates.

Preparation for the lab:

Questions:
Q.1: What are K-maps? What are the application of K-maps?

Ans: Karnaugh maps are used to simplify real-world logic requirements so that
they can be implemented using a minimum number of logic gates. A sum-of-
products expression (SOP) can always be implemented using AND gates feeding
into an OR gate, and a product-of-sums expression (POS) leads to OR gates
feeding an AND gate.

Q.2: Which cells in a K-map can be said to be adjacent?

Ans: In this K-map, cells 0 and 4 are considered adjacent as well as cells 3 and 7.
For the group involving cells 0 and 4, changes, therefore it is dropped from the
expression.
Q.3: How can you explain SOP and POS?

Ans: The main difference between SOP and POS is that the SOP is a way of
representing a Boolean expression using min terms or product terms while the
POS is a way of representing a Boolean expression using max terms or sum terms.
... Boolean algebra helps to describe the binary numbers and binary variables.
Q.4: What do you mean by a „min term‟ and „max term‟?

Ans: The maxterm is a 0, not a 1 in the Karnaugh map. A maxterm is a sum term,
(A+B+C) in our example, not a product term. ... Thus we place our sole 0 for
minterm (A+B+C) in cell A.B.C=000 in the K-map, where the inputs are all 0.
Q.5: Which binary code is used in K-maps?
Ans: The use of binary code in K-map is 0,1,00,01,11,10.

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