Power Electronics EECE 473

Chapter 4

Gate and Base Drive Circuits


4.1 Introduction - 1
• Drive circuit requirements depend on
the switching device used. For example a
BJT requires enough base current to
keep in saturation to minimize voltage
drop across it and on-state losses.
• A MOSFET drive must provide an initial
current pulse to charge the gate-source
capacitance 𝐶𝐺𝑆 to quickly turn on the
device, and to turn off the device we
must remove the charge of 𝐶𝐺𝑆 as
quickly as possible.
• An SCR drive should provide a current
pulse, strong enough to start the
regenerative process to latch the device
on. The gate current pulse should be
synchronized with the anode to cathode
voltage being positive 𝑣𝐴𝐾 > 0.
• The gate or base drive, consists of two
stages.
2
• A signal processing stage consisting of
logic gates, op amps, comparators, or
micro-processors, to create the desired
timing and wave shapes.
• An power output stage that receives the
low power signals and amplifies them to
provide enough power to the main
device as a voltage or current be it
pulsed or continuous for the duration of
the on-state.
• A frequently encountered complication
in the design of gate and base drive
circuits is that power devices to be
turned on synchronously do not share a
common emitter or source. In this case
the drive signals must be electrically
isolated using opto-isolators or signal
transformers.
 3

4.2 BJT Base Drive Circuits - 1

• Consider the basic transistor drive circuit • Example 4.1: In the circuit of Fig. 4.1, 𝑉𝑑 =
of Fig. 3.1. In the on-state the transistor 50 V, 𝑅𝐿 = 10 Ω, the transistor is a 2N6292
has to be in the saturation region with with a dc current gain ℎ𝐹𝐸 or 𝛽= 30, typical
𝑣𝐶𝐸 = 𝑣𝐶𝐸(SAT) , then the load or 𝑣𝐶𝐸(SAT) = 1 V, and 𝑣𝐵𝐸(on) = 0.8 V. If 𝑣𝐵 = 5
collector current is given by:
V, design the base drive circuit for an 𝑂𝐷𝐹=
𝑉𝑑 −𝑣𝐶𝐸(SAT)
𝐼𝐶 = (4.1) 120%.
𝑅𝐿
If the transistor is driven at the edge of • Solution: 𝐼𝐶 = (50-1)/10= 4.9 A. The base
the saturation region, or active region, current at the edge of saturation is 𝐼𝐵𝑆 =
then 4.9/30= 0.163 A. for 𝑂𝐷𝐹= 120%, the base
𝐼𝐶 current is 𝐼𝐵 = 0.163×1.2= 0.196 A.
𝐼𝐵𝑠 = (4.2)
𝛽 If 𝑣𝐵 = 5 V, then
• Normally the base circuit is designed to 𝑅𝐵 = (5-0.8)/0.196
provide a base current 𝐼𝐵 > 𝐼𝐵𝑆 . The = 21.4 Ω. A
ratio 𝐼𝐵 /𝐼𝐵𝑆 is the overdrive factor (ODF): standard value of
𝐼
𝑂𝐷𝐹 = 𝐼 𝐵 (4.3) 22 Ω may be
𝐵𝑆
selected.
• The forced current gain 𝛽𝑓 is defined by:
𝐼
𝛽𝑓 = 𝐼 𝐶 (4.4)
𝐵 Fig. 4.1: Basic drive of a BJT.
 4

4.2 BJT Base Drive Circuits - 2

• Base Drive Control: There is usually a • Capacitor 𝐶1 is initially uncharged. When

time delay when turning on a BJT 𝑄1 is turned on, base current 𝑖𝐵 will flow
required to charge the base-emitter into 𝑄 with an initial value 𝐼𝐵0
junction capacitance before any current 𝑉𝐵 −𝑣𝐵𝐸(on)
can flow in the collector. 𝐼𝐵0 = (4.7)
𝑅1
• This saturating charge 𝑄𝑠 is proportional • Capacitor 𝐶1 will eventually charge and
to the excess base current flowing 𝑖𝐵 will eventually drop to a lower value
𝐼𝐶 𝑉𝐵 −𝑣𝐵𝐸(on)
𝐼𝐵𝑒 = 𝐼𝐵 − = 𝑂𝐷𝐹 𝐼𝐵𝑆 − 𝐼𝐵𝑆 𝐼𝐵1 = (4.8)
𝑅1 +𝑅2
𝛽
= 𝐼𝐵𝑆 (𝑂𝐷𝐹 − 1) (4.5)
The saturating charge 𝑄𝑠 is given by
𝑄𝑠 = 𝜏𝑠 𝐼𝐵𝑒 = 𝜏𝑠 𝐼𝐵𝑆 𝑂𝐷𝐹 − 1 (4.6)
where 𝜏𝑠 is the storage time constant of Q
the transistor obtained from its data
sheet.
• Base current peaking can be provided to
speed up the turn on process of a BJT
using a circuit as shown in Fig. 4.2 (a).
Fig. 4.2: Practical base drive for current peaking
 5

4.2 BJT Base Drive Circuits - 3

• Capacitor 𝐶1 charges to a voltage 𝑉𝐶1 • This time should be much smaller than
given by: the period of switching 𝑇 = 1/𝑓:
𝑅2 1 1
𝑉𝐶1 = 𝑉𝐵 − 𝑣𝐵𝐸(on) (4.9) 2𝑡1 ≪ 𝑇 = 𝑓 ⇒ 𝑓 ≪ 6𝜏 (4.11)
𝑅1 +𝑅2 1
• The charging circuit time constant 𝜏1 is So 𝜏1 should be such that
𝐶1 𝑅1 𝑅2 1 1
𝜏1 = (4.10) 𝑓 = 0.1 6𝜏 ⇒ 𝜏1 = 60𝑓 (4.12)
𝑅1 +𝑅2 1
• The voltage waveform used to turn on
and off 𝑄1 and 𝑄2 alternately is shown in
Fig. 4.2 (a), and the resulting base current
waveform is shown in Fig. 4.2 (b). (a)
• When 𝑄1 is off and 𝑄2 is on, the voltage
at the base is negative due to the charge
on capacitor 𝐶1 and 𝑉𝐵2 = 𝑉𝐶1 . This
causes a pulsed reverse of current at the
base, which speeds up the turn-off of Q
as it forcibly removes the base charge. (b)
• Let 𝑡1 = 3𝜏1 be the time needed to charge
the capacitor. A similar time is needed to
discharge.
Fig. 4.3: Voltage (a) and current (b) waveforms.

4.2 BJT Base Drive Circuits - 4
• Example 4.2: It is required to design a
base current peaking drive, similar to that a) We will design at the minimum gain of
of Fig. 4.2 for the Darlington BJT MJ10023.
Its characteristics were picked from its
data sheet: 𝛽min = 50 and 𝛽max = 600,
𝑣𝐶𝐸(sat) = 2.0 V, 𝑣𝐵𝐸(on) = 2.0 V, and its
storage time 𝜏𝑠 varies from 0.9 to 2.5 s.
The MJ10023 is being operated at a
frequency of 10 kHz. The device is serving
a load with current 𝐼𝐿 = 20 A, and supplied
from a voltage 𝑉𝑑 = 120 V. The base supply
voltage is 15 V.
a) Design the base circuit, i.e. find 𝑅1 , 𝑅2 ,
and 𝐶1 , to have a base current peaking
waveform that decays within the device
storage time.
b) Select appropriate transistors for Q1 and
Q2.
6
• Solution:
𝛽min = 50 to insure that any device
selected will work properly. So the base
current 𝐼𝐵𝑆 = 20/50= 0.4 A. The time
constant of the base circuit is given by Eq.
(4.12) 𝜏1 = 1/(60×104)= 1.67×10-6 s.
We will select a capacitance 𝐶1 = 0.5 F.
Then from Eq. (4.8), with 𝐼𝐵1 = 𝐼𝐵𝑆 , we get
𝑅1 +𝑅2 = (15-2)/0.4= 33 Ω, and from Eq.
(4.10) we get 𝑅1 𝑅2 /(𝑅1 +𝑅2 )= 3.34 Ω.
Then from the two previous equations we
obtain a quadratic that has as solutions
3.72 and 29.3 Ω. We will select 𝑅1 to be
3.72 rather than 29.3 because it will give
a larger pulse as predicted by Eq. (4.7).
We will select standard values for the
resistances: 𝑅1 = 3.9 Ω and 𝑅2 = 27Ω.
 7

4.2 BJT Base Drive Circuits - 5

b) To select transistors for Q1 and Q 2 , let us • By writing KVL in the loop collector-base
calculate the currents 𝐼𝐵0 and 𝐼𝐵1 as (CB), D1 , and D2 we get
given Eq. (4.7) and (4.8). 𝐼𝐵0 = (15-2)/3.9= 𝑣𝐶𝐵 = 𝑣𝐷1 − 𝑣𝐷2 (4.13)
3.33 A, and 𝐼𝐵1 = (15-2)/(3.9+27)= 0.42 A. So to prevent the transistor from going
So perhaps the TIP31 with continuous deep into saturation, 𝑣𝐶𝐵 > 0 or
voltage and current ratings of 60 V and 3
𝑣𝐷1 − 𝑣𝐷2 > 0 (4.14)
A is appropriate for both Q1 and Q 2 .
• For the clamp to work (i.e. D2 on) we
• When a transistor is driven hard into must have 𝐼𝐶 > 𝐼𝐿 .
saturation, its saturation charge increases
and switching speed is thus reduced. By
clamping the collector-emitter voltage to
a predetermined level it is prevented
from going negative. A anti-saturation
clamp circuit is shown in Fig. 4.4.
• The load current is obtained by writing
KVL of the output loop, while noting that
𝑣𝐶𝐸 = −𝑣𝐷2 + 𝑣𝐷1 + 𝑣𝐵𝐸 :
𝑉𝑑 −𝑣𝐵𝐸 +𝑣𝐷2 −𝑣𝐷1
𝐼𝐿 = (4.12)
𝑅𝐿
Fig. 4.4: BJT with anti-saturation clamp.
 8

4.2 BJT Base Drive Circuits - 6

• The clamp will keep the transistor in the • Example 4.2:

active region at the edge of saturation, so
For the circuit of Fig. 4.4, the dc supply
𝐼𝐶 = 𝛽𝐼𝐵 and thus
voltage is 𝑉𝑑 = 100 V, the load resistance
𝛽𝐼𝐵 > 𝐼𝐿 (4.15) 𝑅𝐿 = 2 Ω, 𝑣𝐷1 = 1.4 V, 𝑣𝐷2 = 0.7 V, 𝑣𝐵𝐸 = 0.8
Since 𝐼1 > 𝐼𝐵 , then V, and 𝛽= 16. Design the base circuit, i.e.
𝛽𝐼1 > 𝐼𝐿 (4.16) find 𝑅𝐵 and 𝑉𝐵 for the clamp circuit to
But operate.
𝑉𝐵 −𝑣𝐵𝐸 −𝑣𝐷1
𝐼1 = (4.17) • Solution:
𝑅𝐵
• By combining inequality (4.16) with Eq. The load current is given by Eq. (4.12):
(4.17) we obtain: 𝐼𝐿 = (100-0.8+0.7-1.4)/ 2= 49.25 A.
𝛽(𝑉𝐵 −𝑣𝐵𝐸 −𝑣𝐷1 ) Using Inequality (4.18) we get
𝑅𝐵 < (4.18)
𝐼𝐿 16(𝑉𝐵 − 0.8 − 1.4)
• Thus for the clamp to work we must have 𝑅𝐵 < ⇒
49.25
𝑣𝐷1 > 𝑣𝐷2 and 𝑅𝐵 must smaller that the (𝑉𝐵 − 2.2)
value given in (4.18) to allow enough base 𝑅𝐵 <
3.08
current to turn on the transistor and
If we select 𝑉𝐵 = 10 V, then 𝑅𝐵 < 2.5 Ω.
provide enough current to keep the two
Select 𝑅𝐵 = 2.2 Ω.
diodes conducting.
 9
4.3 MOSFET Gate Drive Circuits - 1

• MOSFET gate drives require the transfer • So, if the gate drive is able to source 1 A,
of charge to and from the gate to turn the then from the gate characteristic we read
channel on and off. that for the MOSFET to turn on, we need a
• MOSFET can switch with rise and fall time charge of about 60 nC between gate and
of 10 ns or less. But achievable times are source. This will yield a fall time of the
limited by the resistances and device that is nearly given by:
inductances in the drive circuit. 𝑄 60
𝑡𝑓 = = = 60 ns
• The MOSFET gate characteristics is a 𝐼 1
graph of the gate charge versus the gate-
to-source voltage as shown in Fig. 4.5.
• The gate characteristic specifies the
threshold voltage to be applied between
gate and source and the amount of
charge needed to turn on the device.
• For example, the IRF 150 has a threshold
voltage of about 7 V and a gate-to-source
charge of about 60 nC.
Fig. 4.5: Gate characteristic of the IRF 150 MOSFET.
 10
4.3 MOSFET Gate Drive Circuits - 2

• Example 4.3: A complementary emitter • So, we equate one time constant to 100 ns:
follower driving an IRF 150 MOSFET is 100
𝑅1 𝐶𝐺𝑆 = 100 ⇒ 𝑅1 = = 10 Ω
shown in Fig 4.6. (a) Determine 𝑅1 and 10
𝑅2 to achieve a rise and fall time of • When the MOSFET is turning off, the
about 100 ns. (b) Determine the power equivalent circuit consists of the gate-source
dissipated in the drive circuit if the capacitance with an initial voltage of 12 V
frequency is 500 kHz. and the resistance 𝑅2 .
• Solution: (a) The gate characteristic
show that the IRF 150 is fully on when
the gate charge is about 70 nC, which at
𝑉𝐺𝑆 = 7 V gives an average gate-source
capacitance 𝐶𝐺𝑆 = 70/7= 10 nF.
When charging from a 12 V source, we
should be able to reach a voltage of 7 V
in a time 𝑡1 calculated as follows:
𝑡1
𝑣 𝑡1 = 7 = 12 1 − 𝑒 𝜏 ⇒
𝑡1 7
= − ln 1 − 12 = 0.875 ≈ 1
𝜏 Fig. 4.6: Gate characteristic of the IRF 150 MOSFET.
 11
4.3 MOSFET Gate Drive Circuits - 3

• The MOSFET turns off when the voltage • As such may be easily connected in parallel.
𝑣𝐺𝑆 reaches 10% of its original value, However, they tend to oscillate due at
which takes 2 time constants: frequencies in excess of 100 MHz during the
100 switching transient when the device are in
2𝑅2 𝐶𝐺𝑆 = 100 ⇒ 𝑅2 = 2×10 = 5 (4.7Ω)
their active gain region.
• Power dissipated in the drive circuit is • These oscillations may cause the breakdown
1 2 of the gate dielectric. But oscillations are
𝑃𝐷 = 2 × 𝐶𝐺𝑆 𝑉𝐺𝑆 𝑓
2 damped using small resistors (5 – 10 Ω) in
= 10×10-9× 122× 500×103 = 1.44 W series with gates as shown in Fig. 4.7.
• The switching losses and their drives may
also be calculated, but are an order of
magnitude lower than 𝑃𝐷 . Note that
diode 𝐷 provides a path for the
discharge of the base-emitter junction
capacitance of transistor Q1.
• MOSFETS in Parallel: MOSFETs are
devices with a positive temperature
coefficients of the on-state resistances. Fig. 4.7: MOSFETs connected in parallel.
 12
4.4 Thyristor Gate Drive Circuits - 1

• The turn-on process of a thyristor • 𝑅𝐺𝐾 is usually selected such that:

requires that sufficient charge is supplied
𝑅𝐺𝐾 ≫ 𝑉𝐺𝑇 Τ𝐼𝐺𝑇 (4.19)
at the gate to start the regenerative
process. Two parameters are used to
characterize the gates of thyristors,
which are 𝑉𝐺𝑇 and 𝐼𝐺𝑇 . These are the
minimum gate voltage and current
guaranteed to trigger a thyristor.
• A straightforward gate drive is shown in
Fig. 4.8, which provides gate current To
thyristor 𝑇 when transistor 𝑄 is turned
on. The resistors 𝑅𝑃 and 𝑅𝐺 control the Fig. 4.8: Thyristor drive circuit.
gate current and the capacitance 𝐶
creates a current peaking to enhance
turn-on as shown in Fig. 4.9.
• The resistance 𝑅𝐺𝐾 , in the range 10 Ω to
1 kΩ is to reduce the sensitivity of the
device to noise and avoid turning it on
inadvertently. Fig. 4.9: Shaped thyristor pulse at gate.

4.4 Thyristor Gate Drive Circuits - 2
• Example 4.4: The 2N6508 SCR is rated at
an anode-cathode voltage 𝑉𝐴𝐾 = 600 V
and an anode current 𝐼𝐴 = 25 A. The gate
current pulse to start the regenerative
process is 𝐼𝐺𝑇 = 75 mA at -40C and 30 mA
at 25C. The gate-cathode voltage is 𝑉𝐺𝑇 =
1.0 typical and 1.5 V maximum. The turn-
on time is 𝑡𝑜𝑛 = 2 s. The voltage 𝑉𝐺 = 5 V,
and the drive transistor is a 2N2222A.
Determine the values of 𝑅𝑃 , 𝑅𝐺 , 𝐶 and
𝑅𝐺𝐾 for the drive circuit of Fig. 4.8.
Determine the energy and power
needed to drive the gate.
• Solution:
We will design for the larger gate current
to allow correct operation for a wide
range of conditions. At 𝑉𝐺𝑇 = 1.5 V and
𝐼𝐺𝑇 = 75 mA the gate-cathode presents a
resistance of 20 Ω (= 1.5/ 0.075).
13
and 𝑅𝐺𝐾 is selected to be much larger
than 20 Ω, as per Eq. (4.19), so 𝑅𝐺𝐾 =
220 Ω. The current flowing into 𝑅𝐺𝐾 is
1.5/220= 6.8 mA and so the total current
from the 5 V supply through the
2N2222A is:
𝐼𝐺1 = 75 + 6.8 = 82 mA;
But 𝑉𝐺 = 𝐼𝐺1 𝑅𝑃 +𝑅𝐺 − 𝑉𝐶𝐸 sat − 𝑉𝐺𝑇
So 𝑅𝑃 +𝑅𝐺 = (5-0.3-1.5)/ 0.082= 39 Ω;
𝑅𝑃 will be selected to allow a current
peaking double of the 75 mA required,
or 𝐼𝐺0 = 150 mA. So using Eq. of 𝐼𝐺0 in Fig.
4.9, we get 𝑅𝑃 as
𝑅𝑃 = (5 –0.3 –1.5)/ 0.15= 21 Ω (22 Ω)
So 𝑅𝐺 = 39 – 22= 17 Ω (18 Ω)
The capacitor is selected such that:
3𝑅𝐺 𝐶 = 𝑡𝑜𝑛 ⇒ 𝐶= 2/ (3×18)= 0.04 F.
 14
4.5 Transformer-Coupled Drive Circuits - 1

The energy to control the gate is the • However, the emitters of Q1 and Q 2 do
integral of 𝑉𝐺 𝑖𝐺 over time given by: not have a common point. One way to
𝑡 deliver two synchronous signals to 𝐸1 -𝐵1
𝑊𝐺 = ‫׬‬0 𝑜𝑛 𝑉𝐺 𝑖𝐺 𝑑𝑡 ⇒
𝑡𝑜𝑛 and 𝐸2 -𝐵2 is through an isolating
𝑊𝐺 ≅ 𝑉𝐺 𝐼𝐺0 − 𝐼𝐺1 + 𝐼𝐺1 𝑡𝑜𝑛 transformer with one input coil and two
4 electrically isolated output coils as
= 1 J. shown in Fig. 4.10 (b).
The gate power at 𝑓= 50 Hz is:
𝑃𝐺 = 𝑊𝐺 𝑓= 50 W.
• A transformer coupled drive may be
used to deliver synchronized triggering
signals to devices that do not share a
common ground as is the case of an
inverter bridge shown in Fig. 4.10 (a).
• To obtain a positive half cycle for the
output voltage 𝑣0 we need to trigger, i.e.
turn-on, Q1 and Q 2 simultaneously so
that 𝑣0 = 𝑉𝑑 , and to obtain a negative (a) (b)
half cycle we need to trigger Q 3 and Q 4 Fig. 4.10: Bridge inverter topology (a),
so that 𝑣0 = −𝑉𝑑 . isolating transformer (b).
 15
4.5 Transformer-Coupled Drive Circuits - 2

• A transformer coupled drive is shown in 𝑁𝑠 is the number of turns on the

Fig. 4.11 delivering a triggering signal secondary, and 𝐴𝑐 is the area of the
through its secondary coils to a BJT. magnetic core. The transistor Q A is on
• Two concerns should be addressed in the for a time 𝑡𝑜𝑛 during which the flux
drive design. First, the transformer density changes from −𝐵𝑠 to 𝐵𝑠 making
magnetizing inductance is in series with ∆𝐵 𝑡𝑜𝑛 = 2𝐵𝑠 , then from Eq. (4.20)
the drive transistors limiting the rate of 2𝐵𝑠 𝑁𝑠 𝐴𝑐
𝑡𝑜𝑛 = (4.21)
𝑣𝐵𝐸
rise and fall of base current. Second, the
transformer magnetizing current must
be reset after each pulse to prevent core
saturation.
• Consider that the transformer core have
saturation flux densities of ±𝐵𝑠 . When
Q A is on, the voltage across the
secondary is 𝑣𝐵𝐸 and the flux density
change, as a function of time, is given by:
1 𝑡 𝑣 𝑡
∆𝐵 𝑡 = 𝑁 𝐴 ‫׬‬0 𝑣𝐵𝐸 𝑑𝑡 = 𝑁𝐵𝐸𝐴 (4.20)
𝑠 𝑐 𝑠 𝑐 Fig. 4.11: Transformer coupled drive for a BJT.
 16
4.5 Transformer-Coupled Drive Circuits - 3

• When Q B is turned on, a negative For transistor Q, we have 𝛽 ≥ 15, 𝑣𝐵𝐸 =

voltage appears across the primary and 0.8 V, and 𝑣𝐵𝐸(𝑅𝐵𝑂) = 10 V. The collector
is reflected onto the secondary. Hence Q current is 𝐼𝐶 = 20 A, 𝑂𝐷𝐹= 1.5, the
is turned off, and a small magnetizing maximum duty ratio is 0.85, and the
current flows in the primary and the permeability of the core is 𝜇= 2500 𝜇0 .
transformer primary voltage is nearly Design the drive circuit by determining
equal to –𝑉2 . So, 𝑁𝑠 , 𝑁𝑝 , 𝐴𝑐 , the magnetizing inductance
2𝐵𝑠 𝑁𝑝 𝐴𝑐
𝑡𝑜𝑓𝑓 = (4.22) 𝐿𝜇 , and the resistances 𝑅1 and 𝑅2 .
𝑉2
Taking the ratio of Eq. (4.21) and Eq. • Solution:
(4.22), we obtain: First select a transformer ratio of 𝑁= 2
𝑡𝑜𝑛 𝑁𝑠 𝑉2 𝑉 that results in a reverse base-emitter
=𝑁 = 𝑁 𝑣2 (4.23)
𝑡𝑜𝑓𝑓 𝑝 𝑣𝐵𝐸 𝐵𝐸 voltage less than 10V. For 𝑁= 2 the
Note that 𝑉2 /𝑁 should smaller than the maximum reverse voltage that will
reverse breakdown of the base-emitter appear on the secondary side is 𝑉2 /𝑁=
voltage. 15/2= 7.5 V (<10 V). We will then select a
rather small number of turns on the
• Example 4.5: The transformer coupled secondary, 𝑁𝑠 = 10. From (4.20):
drive of Fig. 4.11 has the following data: 𝑣𝐵𝐸 𝑡𝑜𝑛 0.8×0.85×10−3
𝑉1 =5 V, 𝑉2 =15 V, 𝑓𝑠 =1 kHz, and 𝐵𝑠 = 1.2 T. 𝑁𝑠 𝐴𝑐 = 2𝐵𝑠
= 2×1.2
= 2.83×10-4 m2.
 17
4.5 Transformer-Coupled Drive Circuits - 4

Then 𝐴𝑐 = 2.83×10-4/ 10≅ 0.3 cm2. The 𝑣𝑝 𝑡𝑜𝑛

𝑖𝜇 = ≅ 0.25 A
dimensions of the core are usually given 2𝐿𝜇
as 3 distances: A, C, and D, as shown in The base current with an ODF= 1.5 is
Fig. 4.12. given by:
From the 2nd table of ferrite cores we 𝐼𝐶 20
𝑖𝐵 = 𝑂𝐷𝐹 = 1.5 × =2A
may select the core with A×C×D= 𝛽 15
17.5×9.5×17 mm. So area 𝐴𝑐 = D (A-C)/2= The current 𝑖𝐵′ = 𝑖𝐵 /𝑁= 1 A and the total
68 mm2= 0.68 cm2 (> 0.3 cm2), hence primary current 𝑖𝑝 = 𝑖𝐵′ +𝑖𝜇 = 1 + 0.25=
there will be no saturation in the core. 1.25 A. Then
The Ampere loop length is 𝑙𝑐 = (A+C)/2= 𝑉1 −(𝑉𝑝 +𝑣𝐶𝐸 )
4.6 cm. 𝑅1 = = 2.4 Ω (2.2 Ω)
𝑖𝑝
The magnetizing inductance referred, to A
the primary, and its current are given by:
lc C
𝜇 𝐴𝑐 𝑁𝑝2
𝐿𝜇 = = 2675 μH
𝑙𝑐
Ao
During 𝑡𝑜𝑛 , the primary voltage is 𝑣𝑝 =
D Ac
𝑁𝑣𝐵𝐸 = 2×0.8= 1.6 V, the flux density
changes from −𝐵𝑠 to 𝐵𝑠 and thus the
magnetizing current changes by 2𝑖𝜇 . So,
Fig. 4.12: Standard dimensions of transformer core.
 18
4.5 Transformer-Coupled Drive Circuits - 5

The value of 𝑅2 should be such that the The value of 𝐼𝜇 is given by

voltage across it is relatively small to 𝑉2 , 𝑣𝑝 𝑡𝑜𝑛
𝐼𝜇 = (4.24)
𝐿𝜇
𝑅2 𝑖𝜇 ≪ 𝑉2 ⇒ 𝑅2 𝑖𝜇 = 0.2 𝑉2 ⇒
• The voltage appearing across 𝑅2 as 𝑣𝐺𝑆
𝑅2 = 0.2 × 15/0.25= (12 Ω)
should be greater than the MOSFET (M)
Note that if 𝑅2 is made too small, high threshold.
drive dissipation could result.
Exercise: Try a second go at the design
attempting to use a larger number of
turns to end up with a smaller core and
magnetizing current. Select a wire for
the primary and secondary coils.
• A MOSFET Transformer-Coupled Drive is
considered next, as shown in Fig. 4.13.
When transistor Q is turned on, for a
time 𝑡𝑜𝑛 , the magnetizing current, 𝑖𝜇 ,
increases in 𝐿𝜇 almost linearly, from 0 to
a value 𝐼𝜇 creating a voltage 𝑣𝑝 across Fig. 4.13: MOSFET
the primary of the coupling transformer. transformer-coupled drive.

4.5 Transformer-Coupled Drive Circuits - 6
• When Q is turned off, the magnetizing
current 𝑖𝜇 decays from 𝐼𝜇 down to zero
through diode D, with diode Dz giving a
negative voltage for 𝑣𝑝 to enhance this
decay. This negative voltage is reflected
onto the secondary, which turns off M.
• In this circuit the magnetic flux density is
• Solution:
varying between 0 and 𝐵𝑠 .
• Example 4.6: Design the transformer
coupled drive of Fig. 4.13 for an IRF 150
MOSFET working at a 𝑉𝐷𝑆 =80 V, and a
current 𝐼𝐿 = 30 A. Its gate characteristic is
shown in Fig. 4.5.
The driving transistor Q is a 2N2222A
with a maximum collector current 𝐼𝐶 =
600 mA working with a supply voltage
𝑉𝐶𝐶 = 12 and receiving a pulsating base
voltage of a maximum duty ratio of 0.85
and a switching frequency 𝑓𝑠 =100 kHz.
19
The core of the transformer is a 48% Ni
alloy with 𝜇= 4×104 𝜇0 and 𝐵𝑠 = 1.5 T.
Carry out the design for 𝑉𝐺𝑆 = 8 V with a
rise and fall of about 120 ns. Determine
𝑁𝑠 , 𝑁𝑝 , 𝐴𝑐 , the magnetizing inductance
𝐿𝜇 , and the resistances 𝑅1 , 𝑅2 and 𝑅𝐶 .
The transformer secondary voltage
during 𝑡𝑜𝑛 is selected higher than the
threshold voltage of 𝑉𝐺𝑆 =8V. So for 𝑉𝑆 =
9V we have 𝑅1 <<𝑅2 . Now, at 𝑉𝐺𝑆 =8V,
from the gate characteristic we estimate
a charge of about 80 nC and an average
gate-source capacitance of 𝐶𝐺𝑆 = 10 nF.
The time constant of the secondary
circuits is nearly 𝑅1 𝐶𝐺𝑆 , and for a rise-
time of 120 ns we have
3𝑅1 𝐶𝐺𝑆 = 120 ns ⇒ 𝑅1 =120/(3×10) 3.9 Ω.

4.5 Transformer-Coupled Drive Circuits - 7
The value of 𝑅2 will be selected to
control the current on the secondary,
once the secondary current is fixed.
When Q is on, let us select a turns ratio
is of 𝑁𝑝 /𝑁𝑠 = 1/2, which gives a primary
voltage 𝑣𝑝 = 4.5 V (=9/ 2) thus allowing
for some voltage drop through 𝑅𝐶 and
the 2N22222A, as 𝑉𝐶𝐸(sat) .
The transformer core area 𝐴𝑐 is obtained
by applying Faraday’s law during turn-on:
𝑣𝑝 𝑡𝑜𝑛
𝐴𝑐 =
𝑁𝑝 𝐵𝑠
For 𝑁𝑝 = 10 and 𝑡𝑜𝑛 = 𝐷max / 𝑓𝑠 ⇒ 𝐴𝑐 = 2.6
mm2. Why is it so small? From the ferrite
cores we may select the one with
A×C×D= 8×4×4 mm, having an area 𝐴𝑐 =
D(A-C)/2= 8 mm2 (> 2.6 mm2), and hence
no saturation in the core. The length is
𝑙𝑐 = (A+C)/2= 18.8 mm, on average.
20
So 𝐿𝜇 is given by
𝜇 𝐴𝑐 𝑁𝑝2
𝐿𝜇 = = 2139 μH
𝑙𝑐
The magnetizing current referred to the
primary, at the end of the on-period is:
𝐼𝜇 =
𝑣𝑝 𝑡𝑜𝑛
≅ 0.18 A
𝐿𝜇
So if 𝐼𝜇 = 0.5𝐼𝐶 , then 𝐼𝐶 = 0.36 A, which is
within the capability of the 2N2222A of
0.6 A. KVL in the collector circuit of Q
yields
𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 +𝑣𝑝 +𝑉𝐶𝐸(sat) ⇒ 𝑅𝐶 ≅ 20 Ω
So with 𝑁𝑠 = 20, 𝐼𝑠 = 0.36/2= 0.18 A. Thus
𝑅1 +𝑅2 = 𝑉𝑠 /𝐼𝑠 = 9/ 0.18= 50 Ω. With 𝑅1 =
3.9 ⇒ 𝑅2 ≅ 47 Ω.
Exercise: Select one wire for the primary
and secondary coils to get 100% skin
depth at the selected frequency. It must
be able to carry the primary current.
 21
4.5 Transformer-Coupled Drive Circuits - 8

• We will consider next a Thyristor • Exercise 4.7: Design the drive shown in
Transformer-Coupled Drive, which is Fig. 4.14. the thyristor is a 2n6509.
shown in Fig. 4.13. The topology is quite Determine the values of 𝑁𝑠 , 𝑁𝑝 , 𝐴𝑐 , the
similar to that of the MOSFET drive, but magnetizing inductance 𝐿𝜇 , and the
now, Q is turned on, for 𝑡𝑜𝑛 , that is equal resistances 𝑅𝐺 , 𝑅𝐺𝐾 and 𝑅1 . Specify a
to the turn-on time of thyristor T. Then capacitance to give an initial peak of the
we turn off Q, thyristor T remains on. pulse double the required current. Let
• Thyristor T will later turn off naturally 𝑉𝐶𝐶 = 12 V and 𝐼𝐿 = 20 A rms.
when it its voltage is negative and its
current get diverted to another devices
as we will study in Chapter 7.
• As seen earlier, the zener diode Dz is to
accelerate the demagnetization of the
transformer, (𝑑𝑖𝜇 /𝑑𝑡= -𝑉𝑧 /𝐿), and diode
D2 is to prevent negative gate current
when Q is turned off and 𝑖𝜇 is decaying.
Capacitance 𝐶 will current peaking and
enhance the turn-on process. Fig. 4.14: Thyristor transformer-
coupled drive.
 22
4.6 Optically Isolated Drive Circuits - 1

• Figure 4.15 illustrates two ways of
providing optically isolated drives. The
diode-transistor optocoupler (a) requires
additional gain provided by transistor
Q2, externally connected in a Darlington
configuration. A practical way of creating
a supply for the optocoupler and
transistor Q2 is shown in the figure.
• Note that optically coupled drives have
capacitance between the input and output
of the SCR coupler. This may cause
unexpected turn on of the SCR. This is
avoided by a faraday shield between input
and output as shown in the figure.

• An optically coupled SCR

shown in Fig. 4.15 (b) has the
advantage of eliminating the
need for the additional
supply. Note that the optically
coupled SCR must have the
same voltage rating as the
main device.
(a) (b)

Fig. 4.15: Two optically coupled drives: (a) diode-transistor, (b) diode-thyristor.
 23
4.7 GTO Drive Circuits - 1

• A typical GTO drive is shown in Fig. 4.16.

When 𝑣𝑖 > 1.09 V the comparator A1
saturates to 12 volts and M1 (n-channel)
turns on sending a large gate pulse to
the gate. When 𝑣𝑖 < -1.09 V A2 saturates
to zero volts and M2 (p-channel) turns
on thus drawing a large current from the
gate of the GTO. 2.2k

• The GTO requires a high power, low

energy, gate current pulse to turn it off.
(a)
The peak value of the negative gate
current pulse could reach on third of the
anode’s current value. The rate of rise of
reverse gate current must be below some
specified value to reduce the effect of
current focusing and prevent the
occurrence of hot spots in the device. (b)
Thus the inductance 𝐿𝐺 is included in
series with the gate lead to limit 𝑑𝑖𝐺 /𝑑𝑡. Fig. 4.16: GTO drive: (a) Drive circuit, (b) input voltage.

4.7 GTO Drive Circuits - 2
• Note also that a turn off snubber is
always included across the GTO and the
negative gate current must not rise at a
rate that exceeds the rate at which
commutates to the snubber.
• The GTO has a large gate area to allow its
turn off by a negative gate current pulse.
Thus it is more prone to noise and a
continuous, but small, gate current is
usually supplied when the GTO is on to
prevent it from dropping out of
conduction at low anode currents.
• Diode DG is a clamping diode that will
conduct in case M1 turns off and there is
still some current circulating in the
inductance 𝐿𝐺 .
24
• Exercise 4.8: In the circuit of Fig. 4.16,
determine 𝑅𝐺1 , 𝑅𝐺2 , 𝐶𝐺 , 𝐿𝐺 for a GTO
working with a load voltage of 400 V and
a current of 60 A average.
The characteristics of the GTO are as
follows: the rate of rise of reverse gate
current 𝑑𝑖𝐺𝑄 /𝑑𝑡= 40A/s, 𝑉𝐺𝑇 = 1 V and
𝐼𝐺𝑇 = 0.3 A, on-state voltage drop 𝑉𝑇𝑀 = 2
V, gate-controlled turn-off time 𝑡𝐺𝑄 = 16
s, maximum peak reverse gate current
𝐼𝐺𝑄𝑀 = 25 A, continuous gate current
𝐼𝐺(on) = 50 mA.
To determine 𝑅𝑠 and 𝐶𝑠 we need to look
at the rate of rise of off-state voltage
𝑑𝑉𝐷 / 𝑑𝑡= 500 V/ s and rate of rise of
on-state current 𝑑𝐼𝑇 / 𝑑𝑡= 250 A/ s.
Select MOSFETS for this circuit.