Gate Leakage in ultrasmall MOSFET Devices

and use of high 𝜅 dielectrics

Siddhant Gangwal, Graduate Student, Arizona State University

Abstract—This paper discusses different gate

leakage mechanisms. The use of ultrathin gate oxide
due to incessant scaling leads increased possibility of
electron tunneling through the gate terminal and
subsequently increased power dissipation. The
leakage current consists of Gate Induced Drain
Leakage (GIDL) for low and at high gate bias as
direct conduction through gate oxide. These currents
are simulated for different state-of-the-art MOS
devices using TCAD Silvaco. The impact of Gate and
Drain bias, oxide thickness and permittivity of oxide
on leakage currents is studied.

Index Terms— Gate oxide, high k dielectric, GIDL, leakage,

TCAD Silvaco, quantum tunneling
Fig. 1. Gate leakage current against gate voltage for different
drain bias conditions. Gate current decreases with decrease in
I. INTRODUCTION VGS but further increase at 0V gate voltage.

As MOS Devices are scaled incessantly, several

effects start influencing the operation of the devices. Hot
carrier effects, reliability, effect of mechanical stress and
strain are a few effects that influence the fabrication of
ultrathin MOS Devices. Further scaling of MOS
Devices, leads to generation of different leakage
currents. Subthreshold conduction, drain induced barrier
lowering (DIBL), Gate induced Drain Leakage (GIDL)
are a few such mechanisms. This paper studies the role
and mechanism of gate leakage currents.
GIDL is important for low-leakage, low power high
threshold voltage devices and can greatly reduce their
performance [1]. The high electric field at the gate to
drain overlap, leads to a high tunnelling current from
gate oxide to drain. This can be attributed to both band
to band tunneling (BTBT) or Trap assisted (TA)
tunneling [2].
High 𝜅 dielectric materials reduce the electric field in
the gate drain region. With this concept, high 𝜅 material
have been extensively used as replacement to SiO2
below the 45nm node.
).
II. IMPACT OF DRAIN BIAS
The paper explores the behavior of gate leakage for
different state of arts MOSFET structure. The gate
leakage current becomes more important as low gate
bias. The results at VDS = 50mV, 100mV, 500mV, 1V
and 2V for 22nm MOS structure having an oxide
thickness (𝑡𝑜𝑥 ) of 1nm. The current is influenced by
oxide to semiconductor tunneling. BBT.NONLOCAL and
BBT.NLDERIVS is used in the model statement to
account for non-local BTBT. These models are
applicable for tunneling in p-n regions. To account for
tunneling from insulator (oxide) to semiconductor, direct
tunneling models QTUNN.EL and QTUNN.HO need to be
indicated in the model statement [3]. Further, an
auxiliary quantum mesh has been defined for both x and
y directions. Newton-Gummel method is used to solve
semiclassical drift diffusion model as the region of
interest has low gate bias.
As observed in Figure (1), gate leakage current (𝐼𝐺 )
decreases with decreasing 𝑉𝑔𝑠 . The high current at 0 gate
voltage contributes to high GIDL and higher stand-by
power consumption.
 TABLE I
DIFFERENT MOS TECHNOLOGY SPECIFICATIONS
Length of Gate Doping concentrations
𝑡𝑜𝑥 (𝑛𝑚) 𝑉𝑑𝑑
(𝐿𝑔 ) (𝑁𝐷 , 𝑁𝐴 )

0.5 7 0.7 5E10, 1E19

0.9 10 0.9 1E20, 5E18

1 22 1.5 1E19, 1E19

2 45 3.3 5E18, 1E17

Figure (3) 𝐼𝐺 − 𝑉𝑔𝑠 for different dielectrics. It is observed that

Figure (2) 𝐼𝐺 − 𝑉𝑔𝑠 for different 𝑡𝑜𝑥 . It is observed that as 𝑡𝑜𝑥
decreasesm there is higher 𝐼𝐺 and hence, higher leakage.
III. IMPACT OF OXIDE THICKNESS
On observation that 𝐼𝐺 increases with increased drain
bias, the impact of oxide thickness on is studied for high
drain bias conditions (𝑉𝑑𝑠 = 𝑉𝑑𝑑 ). Simulations for
different oxide thickness is done using the parameters
specified in table 1. The probability of tunneling
increases with decrease in 𝑡𝑜𝑥 as it becomes easier for
Units
IV. MODELLING AND IMPACT OF HIGH 𝜅 DIELECTRICS
Atlas has a list of few recognized materials. User
defined material properties need to be used to model
high-𝜅 oxides in Silvaco. The oxide is specified as a
semiconductor as the ‘insulators’ type material in
Silvaco can only solve Poisson and Lattice heat
equations. Basic parameters namely,
PERMITTIVITY, EG300, MUN, MUP, NC300, NV300
need to be specified to include material properties along
with user.group=semiconductor directive in the
material statement. These properties for considered
dielectrics are taken from [4].
It is observed in figure 3, that for HfO2 and ZrO2, we
as dielectric constant increases, the leakage current decreases
with the excpetion of Al2O3 which has a lower bandgap.
get significantly lower gate leakage current. However,
Al2O3 (sapphire) gives higher leakage current than SiO2.
This is attributed to lower band gap (𝐸𝑔 ) which leads to
increased tunneling probability. In general, higher 𝜅
materials show lower 𝐸𝑔 . But for most cases, the effect
of increased 𝜅 dominates and leakage currents are
reduced. TiO2 (𝜅 ~ 80) and SrTiO3 (𝜅 ~ 2000) give zero
gate leakage currents under the given conditions.
Very high 𝜅 dielectrics also lead to higher on currents
which are directly related to Oxide capacitance (𝐶𝑜𝑥 )
value. This important effect needs to be considered when
using high- 𝜅 in place of SiO2.
V. CONCLUSION
The gate leakage current increases with increasing drain
bias (𝑉𝑑𝑠 ) for small gate voltages. It also increases with
decreasing oxide thickness. As oxide thickness reduces,
high 𝜅 dielectrics are used to reduce leakage currents.
The dielectric material needs to be carefully chosen, as
high 𝜅 leads to higher on currents. Alternate materials
can also lead to excessive trap states at the Si-oxide
interface which should be accounted for in modelling.
REFERENCES
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Analysis of Gate-Induced Drain Leakage Mechanisms in Silicon-
Germanium Channel pFET, IEEE TRANSACTIONS ON ELECTRON
DEVICES. volume (61)
[2] V. Nathan and N. C. Das, “Gate-induced drain leakage current in MOS
devices,” IEEE Trans. Electron Devices, vol. 40, no. 10, pp. 1888–1890,
Oct. 1993.
[3] Silvaco user manual
[4] DOI: https://doi.org/10.1016/j.mser.2014.11.001
[5] E.P. Gusev , E. Cartier , D.A. Buchanan , M. Gribelyuk , M. Copel , * a
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