You are on page 1of 4

Proceedings of IEEE International Conference on Innovations in Electrical, Electronics, Instrumentation and Media Technology

ICIEEIMT 17

FPGA Implementation of Variable Bit Rate


OFDM Transceiver System for Wireless
Applications
Dhanasekar Subramaniyam¹ Ramesh Jayabalan²
¹ Research Scholar, ²Assistant Professor (SG),
Anna University, Department of ECE, PSG college of Technology,
Chennai- 600 025 Coimbatore-641004
1 2
Email: dhanasekar.sm@gmail.com Email: jramesh60@yahoo.com

Abstract- OFDM has developed into a popular scheme for OFDM transceiver system. Each subcarrier is modulated by
wideband digital communication in both wired and wireless means of orthogonal frequencies. The variable Bit rate OFDM
communications. The next generation communication schemes system can be used for Wireless Personal Area Network
incline to use OFDM systems in order to provide high baud rates, (WPAN) system to achieve high throughput. FPGA can
reduced Inter-carrier interference (IC) and less Inter-symbol
provide the End to end solutions for reprogramming,
interference (ISI). In this paper a Variable Bit rate 16 subcarrier
OFDM Transceiver system is implemented by FPGA and it is networking linear card packet processing, RF, Baseband,
used for high speed WPAN applications. The proposed design has connectivity in wired and wireless communication. The FPGA
been designed using various Bit Pattern generations and Technology offers more flexible, reliable and accurate in
Modulation Techniques like 16 QAM, BPSK, OQPSK, QPSK, simulating, testing, validating and implementing the
BPSK with orthogonal frequencies and synthesized using high designs[5]. The OFDM Transceiver system is coded using
level design tools. The Variable Bit rate OFDM system is coded Verilog HDL, simulated and synthesized using Modelsim and
using Verilog HDL and it is synthesized and simulated using Xilinx tool and it is implemented using a Spartan 2 FPGA
Xilinx ISE and Modelsim tool. Xilinx Spartan2 xc2s200 -6 PQ208 Board. The paper is organized as follows. First, a brief review
FPGA board will be used for testing and demonstration of the
of OFDM Transceiver Design is described in Section II. The
implemented system. The design spends about 33.7 K gates and
consumed Power is about 13mW with the operating frequency of Results for OFDM Transceiver system are discussed in section
49.08MHz. III. Finally, conclusion remarks are presented in section IV.
Keywords – OFDM, BPSK, QAM, QPSK, OQPSK
II. OFDM TRANSCEIVER DESIGN
1. INTRODUCTION
The Digital Data Generator is provided with Variable
data length and it will flow through serially as an input to
Orthogonal frequency division multiplexing (OFDM) is OFDM transmitter. There are 16 subcarriers used in the
able to accomplish a highly efficient form of multi-carrier OFDM system and its Input Data’s X0(t), X1(t),....X15(t),
modulation which is widely used in broadcasting, ADSL and vector modulate these onto sub carriers of frequencies: 0,fd,
wireless technology. OFDM is becoming the preferred 2fd, 3fd,….15 fd, The Discrete Fourier Transform (DFT) of
modulation technique for wireless communications [1]. It is an length N is given by :
efficient data transmission technique that can provide large data
rates depends on the requirement [2]. Various research centers Stage 1 :
in the world are working towards the optimization of OFDM
for countless applications. The attraction of OFDM is mainly 15
due to how the system handles the multipath interference at the X(t) = ∑ Xm(t) exp (2пjmfdt) with fd = 1/T (1)
receiver.
In an OFDM system, more number of orthogonal, m=0
overlapping subcarriers are transmitted in parallel and it is
modulated using several modulation techniques [4]. The input Where,
serial bit pattern generator (128 Bits, 64 Bits) is encoded by Xm - Input Data
linear feedback shift register and encoded bits are modulated
using several modulation schemes like 16 QAM, QPSK, fd – Frequency for first sub carrier
OQPSK and BPSK. There are 16 subcarriers used in the T – Pulse Duration

Department of Electrical Technology, Karunya University IEEE ISBN No.978-1-5090-4527-3


343
Proceedings of IEEE International Conference on Innovations in Electrical, Electronics, Instrumentation and Media Technology
ICIEEIMT 17

Assume, t = nґ QPSK) used in symbol mapper and it flows to the streams of


Inphase (I) & Quadrature (Q). The results from the Inphase (I)
Take 16 subcarrier of the pulse x(t) which is of duration T.
and Quadrature (Q) components are sent to Gray Encoder
Let ґ = T/16 and denote x(nґ) by x(n) for n = 0,1,.. 15 Block to minimizing the Bit Error Rate (BER) for a given
symbol error rate Then the Inphase (I) and Quadrature (Q)
Let us consider, Xm(nґ) = Xm : constant for 0 < n < 15. Then, components are multiplied with orthogonal frequencies of sine
15 and cosine carriers to get I Modulation and Q Modulation.
Final summation of these entire signals gives OFDM Signal.
X(nґ) = x(n) = ∑ Xm(t) exp (2пjmnґ/T) (2)
m= 0
Therefore,
15
x(n) = ∑ Xm exp (jm(2п/16)n) for 0 < n < 15 (3)
m= 0
let = ґ/T = 1/16

= 16 * IFFT ({Xm}0,15 )
15
x(t) = ∑ Xm (t) exp (2пjmfdt) (4) Fig.1.OFDM Transmitter Design

m= 0 B. OFDM Receiver Design


This is an output from IFFT The OFDM Receiver design performs the inverse process of
transmitter, to demodulate the signals from transmitter. The
Stage 2 : OFDM transmitter signal is taken as input to the OFDM
The output of IFFT is to modulate the high frequency Receiver and it is multiplied with NCO generated sine and
carrier with the result of performing stage 1 cosine carriers to get I Demodulation and Q Demodulation
signals.The Results from the I Demodulator and Q
15 Demodulator signals are sent to Low pass filter to attenuate the
x(t) = ∑ Xm (t) exp [2пj(fc + mfd)t] (5) high frequencies and pass them into low frequencies. When the
data gets filtered in the Demodulator, it will flow through
m= 0 Symbol Demapper to the group data range and obtain
This is the Output of OFDM Signal transmitted data. Hence, the results from the signal Demapper
will flow through the Gray Decoder. The results from the Gray
T – Pulse Duration between subcarriers Decoder block are used to Decode I & Q Bits into serial data.
1 / T – no of pulses per second on each subcarrier
fd = 1 / T
T = 1 / fd
= 1/14.285 KHz
= 70 µs on each sub carrier
A. OFDM Transmitter Design

The OFDM transmitter with orthogonal frequencies is


shown in Fig.1. The proposed architecture had been designed
using Variable Bit Patterns (64 & 128 bit patterns) will flow
through serially as an input to OFDM transmitter. The serial
data is encoded by four, two bits and single bit according to the
different modulation techniques (16QAM, BPSK, OQPSK,

Department of Electrical Technology, Karunya University IEEE ISBN No.978-1-5090-4527-3


344
Proceedings of IEEE International Conference on Innovations in Electrical, Electronics, Instrumentation and Media Technology
ICIEEIMT 17

Fig.2. OFDM Receiver Design C. QPSK Modulation outputs


Table 1
Specifications of OFDM Transceiver Design The serial data is encoded by two bits will flows to the
QPSK Modulation. It consists of one bit of I component and
Master clock 48 MHz
Variable Clock Generator 14.285 KHz, 28.571KHz…
228.571 KHz one bit of Q component. The I Channel and Q Channel is used
Variable Data Generator 128, 64 Bits to modulate respectively by sine and cosine carrier signals.
Sub carriers 16 There are eight QPSK Modulations used in the OFDM
Modulation Techniques 2 - 16QAM Transmitter.
8 - QPSK
2 - OQPSK
4 - BPSK

III. RESULTS AND DISCUSSIONS QPSK


Signal
A.128 Bit Pattern output:
The Pattern Generator or Data Generator is also a basic
requirement for digital circuit analysis. It is used in Digital
Fig.5. QPSK Modulated signal
Communication as a data source. Data Generator is provided
with Variable data length (64 and 128 Bit) Pattern of different D.OQPSK Modulation output
length and it can be selected using DIP switches in FPGA .
There are two OQPSK Modulations used in the OFDM
128 Bit Transmitter. The OQPSK Modulation consists of one bit of I
pattern
component and one bit of Q component. The I Channel and Q
Channel is used to modulate respectively by sine and cosine
carrier signals.
Fig. 3. Variable Clock Generator

B. 16 QAM Modulation output:


OQPSK
The serial data is encoded by four, two bits and single bit Signal
according to the Modulation type used and it flows to the
streams of Inphase (I) & Quadrature (Q). The results from the
Inphase (I) and Quadrature (Q) components are sent to Gray
Encoder Block to minimizing the Bit Error Rate (BER). In 16
QAM, 16= 24, four bits per symbol can be sent. It consists of Fig. 6. OQPSK Modulated signal
two bits of I component and two bits of Q component. The I E. BPSK Modulation outputs
Channel and Q Channel are used to modulate respectively by
sine and cosine carrier signals. There are two 16 QAM There are Four BPSK Modulations used in the OFDM
Modulations used for OFDM Transmitter. Transmitter. The BPSK Modulation has two phases which are
separated by 180°. It is able to modulate at 1 bit/ symbol as
shown in Fig.7 and it is not suitable for high data-rate
applications.
BPSK
Signal
16 QAM
Signal

Fig. 4. 16 QAM Modulated signal Fig.7.BPSK Modulated signal


F. OFDM Modulated signal

There are 16 Sub- carriers used in OFDM Transmitter.


The added results of all 16 Modulation signal with orthogonal
frequencies will form an OFDM signal.

Department of Electrical Technology, Karunya University IEEE ISBN No.978-1-5090-4527-3


345
Proceedings of IEEE International Conference on Innovations in Electrical, Electronics, Instrumentation and Media Technology
ICIEEIMT 17

OFDM
Signal
REFERENCES
[1] Aanchal Jhingan, Lavish Kansal, “Performance Analysis of FFT-OFDM
and DWT-OFDM over AWGN Channel under the Effect of CFO”,
Indian journal of science and Technology, Vol9(6), Febuary 2016
Fig. 8. OFDM Transmitter signal [2] D.Kalaivai, S.karthikeyan, “VLSI Implementation of Area Efficient and
low power OFDM Transmitter and Receiver”, Indian journal of science
and Technology, Vol8(18), August 2015.
The Functional simulation of the proposed architecture has [3] Murtuza Jeeranwalal, Dr.Shruthi oza, “Implemetation of Efficient 64-
been justified by using Verilog HDL. The various parameters Point FFT/IFFT Block for OFDM Transceiver of IEEE 802.11a”,
obtained from OFDM Transceiver system are listed in Table 2. International Journal of Application or Innovation in Engineering &
Management (IJAIEM)” Volume 3, Issue 5, May 2014.
[4] M.A.Mohamed, J,“ FPGA Synthesis of VHDL OFDM System” Wireless
Table.2. Pers Commun, ) ISSN : 1885 – 1909 (2013) DOI 10.1007/s11277-012-
OFDM Transceiver Output 0786, 2013.
Gate Estimated Minimum Bandwidth of Maximum [5] Nasreen Mev, Brig.R.M. Khaire, “Implemenation of OFDM Transmitter
count for Power period OFDM signal combination and Receiver Using FPGA” International Journal of Soft Computing and
Design Consumption al path delay Engineering (IJSCE)ISSN: 2231- 2307, Volume-3, Issue-3, July 2013.
[6] Manjunath Lakkannavar, Ashwini Desai,G.,“Design and Implementation
33,720 13 mW 20.371ns 228.56 KHz 25.145ns of OFDM using VHDL and FPGA”, International Journal of Engg. And
Advanced Technology (IJEAT) ISSN : 2249 – 8958, Volume-1, Issue 6,
August 2012
The Proposed Architecture is synthesized and [7] Kirubanandasarathy. N & Karthikeyan, K. (2012), “VLSI design and
simulated using Xilinx ISE, Modelsim tool and Spartan2 implementation of MIMO OFDM system for wireless communications”,
xc2s200-6 pq208 FPGA device chip. The Device utilization European Journal of Scientific Research,73(2), 269–277. ISSN 1450-.
summary is listed in Table 3. 216X, 2012.
[8] Jayalakshmi, V., Reddy, T. K., & Shivakumar, K,“Design and
implementation of orthogonal frequency division multiplexing (OFDM)
Table.3. transmission using FPGA”,International Journal of Communications and
Device Utilization summary – Spartan2 2s 200 FPGA Board Engineering, 03(3, 03), 45–51, 2012.
[9] Schulze, H., & Luders, C, “Theory and applications of OFDM and
Logic Used Available Utilization CDMA: Wideband wireless communications. Wiley, ISBN-10:
utilization 04708950698, 2005.
Number of Slices 732 4704 15% [10] Prasad, R., “OFDM for wireless communications systems”, artech
Number of 4 4247 4704 90% house universal personal communications series, ISBN-10: 1580537
input LUTs 960, 2004.
Number of 94 140 67% [11] Loo Kah Cheng “Design of an OFDM Transmitter and Receiver using
bonded IOBs FPGA” UTM, 2004.
Number of 2203 2352 93% [12] Shousheng He and Mats Torkelson, "A New Approach to Pipeline FFT
occupied slices Processor”, IEEE Parallel Processing Symposium, pp.776 – 780, April.
1996.

IV. CONCLUSION:

This paper, describes the Variable Bit rate 16


subcarrier OFDM Transceiver system used for high speed
WPAN applications. The Proposed architecture is transmitted
by giving different input Bit patterns and transmitted through
various Modulation Techniques like 16 QAM, BPSK,OQPSK,
QPSK with different frequencies and synthesized using high
level design tools. The OFDM Transceiver design is coded
using Verilog HDL, Simulated and synthesized using
modelsim and Xilinx tool and implemented using Spartan 2
FPGA Board. As compared to other Techniques, OFDM
system are used in wired and wireless transmission in order to
provide less Bandwidth, reduced Inter-carrier Interference and
high data rate. In Future work, the novel multipliers and adders
circuits are used in FFT/IFFT block in the OFDM Transceiver
design to reduce computational calculations and to enhance
throughput in data transmissions.

Department of Electrical Technology, Karunya University IEEE ISBN No.978-1-5090-4527-3


346

You might also like