®

RT5041A

Multi-Output Integrated Chip (MOIC)

for Intel Braswell Platform
General Description Features
RT5041A integrates 2 buck converters, 3 LDOs and 2  2 Channels Low Power Consumption Step-Down
power switches in one package. This MOIC is designed DC/DC Converters
for Braswell M/D SOC. Braswell M/D SOC controls the  Low On-Resistance for DC/DC Converters
power sequence by simple I/O. RT5041A has UVLO, OVP, Ω of High Side MOSFET
 70mΩ

UVP, OTP and current limit protections. RT5041A is Ω of Low Side MOSFET
 50mΩ

available in WQFN-28L 4x4 package.  3 Channels LDO Voltage Regulators

 2 Channels Switches
Ordering Information  Input Voltage Range : 2.7V to 5.5V
RT5041A  Internal Soft-Start and Soft-Discharge
 Cycle-by-Cycle Current Limit and UVP
Package Type
QW : WQFN-28L 4x4 (W-Type)  Thermal Shutdown
Lead Plating System
G : Green (Halogen Free and Pb Free) Applications
Note :
 Ultra book and Tablet Computers
Richtek products are :
 RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
 Suitable for use in SnPb or Pb-free soldering processes.

Simplified Application Circuit

RT5041A
V1P8 IN_1P24A IN_1P8 VIN
IN_1P15A
IN_1P5S
V1P24A O_1P24A LX_1P8 V1P8

O_1P8
V1P15A O_1P15A IN_1P05A VIN

V1P5S O_1P5S
LX_1P05A V1P05A

V1P8 SWIN_1P8A O_1P05A

VCC VCC
V1P8A SWO_1P8A

EN_1P05A V1P05A Enable

V3P3 IN_3P3A SLP_S0iX_B S0iX
SUSPWRDNACK SUSPWRDNACK
SLP_S3_B S3
V3P3A O_3P3A
RSMRST PG for V3P3A
GND PGND

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RT5041A
Pin Configurations Marking Information
(TOP VIEW) 2Z= : Product Code

SUSPWRDNACK
2Z= YM YMDNN : Date Code
DNN

SLP_S0iX_B
EN_1P05A

LX_1P05A
LX_1P05A
LX_1P8
LX_1P8

28 27 26 25 24 23 22
IN_1P8 1 21 IN_1P05A
IN_1P8 2 20 IN_1P05A
O_1P8 3 19 O_1P05A
SLP_S3_B 4 PGND 18 O_3P3A
O_1P24A 5 17 IN_3P3A
29
O_1P15A 6 16 SWO_1P8A
IN_1P24A 7 15 PGND
8 9 10 11 12 13 14
IN_1P15A
IN_1P5S
O_1P5S

SWIN_1P8A
VCC
GND
RSMRST

WQFN-28L 4x4

Functional Pin Description

Pin No. Pin Name Pin Function
1, 2 IN_1P8 Input Voltage for V1P8 Buck Converter.
3 O_1P8 Output Voltage Feedback of V1P8 Buck Converter.
4 SLP_S3_B Enable Signal for V1P5S LDO.
5 O_1P24A LDO Output for V1P24A.
6 O_1P15A LDO Output for V1P15A.
7 IN_1P24A LDO Input for V1P24A.
8 IN_1P15A LDO Input for V1P15A.
9 IN_1P5S LDO Input for V1P5S.
10 O_1P5S LDO Output for V1P5S.
11 VCC Analog Power for Internal Circuit.
12 GND Analog Ground.
13 RSMRST Power Good Signal for V3P3A Switch.
14 SWIN_1P8A Switch Input for V1P8A.
15, Power Ground. The Exposed Pad must be soldered to a large PCB and
PGND
29 (Exposed Pad) connected to GND for maximum power dissipation.
16 SWO_1P8A Switch Output for V1P8A.
17 IN_3P3A Switch Input for V3P3A.
18 O_3P3A Switch Output for V3P3A.
19 O_1P05A Output Voltage Feedback for V1P05A Buck Converter.
20, 21 IN_1P05A Input Voltage for V1P05A Buck Converter.
22, 23 LX_1P05A Phase Node for V1P05A Buck Converter.
24 SUSPWRDNACK Disable Signal for All Power Rails.

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 RT5041A
Pin No. Pin Name Pin Function
Input Pin. LDO_V1P15A will recognize this first rising edge during power
up sequence to achieve SLP_S0iX_B function.
25 SLP_S0iX_B
When SLP_S0iX_B = High, LDO_V1P15A_VOUT = 1.15V.
When SLP_S0iX_B = Low, LDO_V1P15A_VOUT = 0.75V.
Enable Signal for RT5041A. Start to power up all voltage rails with a
26 EN_1P05A
sequence.
27, 28 LX_1P8 Phase Node for V1P8 Buck Converter.

Function Block Diagram

VCC
V1P05A + VNN V1P8
IN_1P05A IN_1P8

LX_1P05A PG_V1P8A LX_1P8

PG_V1P05A

PGND PGND
O_1P05A O_1P8
EN_1P05A

LDO
IN_1P24A SW
V1P24A
V3P3A IN_3P3A
PG_V1P24A
PG_V3P3A_S
O_1P24A

O_3P3A
LDO RSMRST
IN_1P15A
V1P15A
PG_V1P15A
SW
O_1P15A V1P8A SWIN_1P8A
SLP_S0iX_B
PG_V1P8A_S

LDO
IN_1P5S V1P5S SWO_1P8A
PG_V1P5S
SUSPWRDNACK
O_1P5S
SLP_S3_B GND

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RT5041A
Operation
RT5041A is a MOIC (Multi Output Integrated Circuit) and
is an integral part of the Braswell Platform focused on
power solution integration to minimize system board area.
It includes two DC to DC Buck converters, three Linear
Dropout regulators and two power switches.
Buck Converter
The two synchronous step-down buck converters with both
integrated a P-Channel high side MOSFET and a N-
Channel low-side MOSFET. The control scheme is based
on current mode Constant-On-Time (COT) architecture,
which has fast transient response and minimizes external
components. The buck converters have a full set of
protection.
Buck Over-Current Protection
The buck converters provides over current protection by
detecting low-side MOSFET valley inductor current. If the
sensed valley inductor current is over the current limit
threshold, the OCP will be triggered. When OCP is tripped,
the buck converter will keep the over current threshold
level until the over current condition is removed.
Buck Output Over -Voltage Protection & Under -
Voltage Protection
The two output voltages are continuously monitored for
over voltage and under voltage protection. When the output
voltage exceeds 120% of the reference, the high-side
MOSFET turns off and low-side MOSFET is forced on; If
the output voltage falls under 60% of the reference voltage,
under voltage protection is triggered and then the high-
side and low-side MOSFET will turn off. The OVP and
UVP circuit will shutdown all rails and latched. The way
to cannel the latched behavior is to re-enable RT5041A or
re-give VCC power of RT5041A.
Linear Dropout Regulator
The RT5041A includes three high performance linear
dropout regulators. The peak current rating is designed
for short period current, not for thermal design current.
The LDO contains an independent current limit and under
voltage protection circuit to prevent unexpected
applications.
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When the path current is over the current limit, the current
limit circuit fixes the gate voltage to limit the output current.
And if the output voltage is less than 60% of VOUT, the
UVP circuit will shutdown all rails and latched. The way
to cannel the latched behavior is to re-enable RT5041A or
re-give VCC power of RT5041A.
Power Switch
There are two power switches : SW_V3P3A is a P-Channel
power switch MOSFET, and SW_V1P8A is an N-Channel
power switch MOSFET. The power switch apply current
limit protection and under voltage protection function. The
current limit circuitry prevents damage to the power switch
MOSFET and the backend device but can deliver load
current up to the current limit threshold. And if the output
voltage is less than 2.7V for SW_V3P3A or 1.2V for
SW_V1P8A, the RT5041A will shutdown all rails and
latched. The way to cannel the latched behavior is to re-
enable RT5041A or re-give VCC power of RT5041A.
RSMRST
RSMRST is actually a power good output signal for
monitoring SW_V3P3A.
SUSPWRDNACK
SUSPWRDNACK is an active high dedicated input signal
that tells the RT5041A to turn off the power rails.
Over-Temperature Protection
If the temperature of the buck converter is over 150°C, the
OTP circuit acts and makes all power rails shutdown. They
recover back with power-up sequence when the
temperature of buck converters is low to 125°C.
is a registered trademark of Richtek Technology Corporation.
DS5041A-00 February 2015
 RT5041A
Absolute Maximum Ratings (Note 1)
 Supply Input Voltage, IN_1P8, IN_1P05A, IN_3P3A ---------------------------------------------------------- −0.3V to 6V
 Supply Input Voltage, IN_1P24A, IN_1P15A, IN_V1P5S, IN_V1P8A ------------------------------------- −0.3V to 6V
 Supply Voltage, VCC ------------------------------------------------------------------------------------------------- −0.3V to 6V
 Switch Node Voltage, LX_V1P05A, LX_V1P8 ------------------------------------------------------------------ −0.3V to 6V
 Other Pins --------------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C
WQFN-28L 4x4 -------------------------------------------------------------------------------------------------------- 3.5W
 Package Thermal Resistance (Note 2)
WQFN-28L 4x4, θJA --------------------------------------------------------------------------------------------------- 28.5°C/W
WQFN-28L 4x4, θJC -------------------------------------------------------------------------------------------------- 7°C/W
 Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
 Junction Temperature ------------------------------------------------------------------------------------------------- 150°C
 Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)
 HBM (Human Body Model) ------------------------------------------------------------------------------------------ 2kV

Recommended Operating Conditions (Note 4)

 Supply Input Voltage, IN_1P05A, IN_1P8 ----------------------------------------------------------------------- 2.7V to 5.5V
 Supply Input Voltage, IN_1P24A, IN_1P15A, IN_1P5S ------------------------------------------------------ 1.8V to 2V
 Supply Input Voltage, IN_3P3A ------------------------------------------------------------------------------------ 3.3V to (VCC − 2)V
 Supply Input Voltage, SWIN_1P8A ------------------------------------------------------------------------------- 1.8V to (VCC − 2)V
 Supply Voltage, VCC ------------------------------------------------------------------------------------------------- 4.5V to 5.5V
 Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C
 Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C

Electrical Characteristics
(VCC = 5V, TA = 25°C, No load, for every voltage rails unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

MOIC
Supply Voltage VCC 4.5 -- 5.5 V
Shutdown Current ISHDN VEN_1P05A = 0V -- -- 5 A
UVLO Threshold VUVLO -- -- 4 V
UVLO Hysteresis VUVLO_HYS -- 150 -- mV
Measured VEN_1P05A,
Enable Input High Voltage VEN_H VSUSPWRDNACK, 1 -- VCC V
VSLP_S3_B, VSLP_S0iX_B
Measured VEN_1P05A,
Enable Input Low Voltage VEN_L VSUSPWRDNACK, -- -- 0.4 V
VSLP_S3_B, VSLP_S0iX_B
Thermal Shutdown Threshold TSD -- 150 -- °C
Thermal Shutdown
TSD_HYS -- 25 -- °C
Hysteresis

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RT5041A
Parameter Symbol Test Conditions Min Typ Max Unit
CONVERTER_V1P8 (4.1A)
Supply Voltage VIN 2.7 -- 5.5 V
Supply Quiescent Current IQ Enabled, no switching. -- 20 -- A
Output Voltage VOUT CCM 1.799 1.818 1.836 V
Soft-Start Time TSS 10% to 90% VOUT -- 0.9 -- ms
Switch On Resistance RDS(ON),H VIN = 5V -- 70 -- m
Switch On Resistance RDS(ON),L VIN = 5V -- 50 -- m
Current Limit IOC Inductor valley current 4.7 6 -- A
Switching Frequency f SW -- 1.2 -- MHz
Minimum Off Time TOFF -- 120 -- ns
OVP Trip Threshold VOVP OVP detected 115 120 125 %
OVP Deglitch Time (Note 5) TOVD -- 5 -- s
UVP Trip Threshold VUVP UVP detected 55 60 65 %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 1 -- 
CONVERTER_V1P05A (4.6A)
Supply Voltage VIN 2.7 -- 5.5 V
Supply Quiescent Current IQ Enabled, no switching. -- 20 -- A
Output Voltage VOUT CCM 1.039 1.05 1.06 V
Soft-Start Time TSS 10% to 90% VOUT -- 0.9 -- ms
Switch On Resistance RDS(ON),H VIN = 5V -- 70 -- m
Switch On Resistance RDS(ON),L VIN = 5V -- 50 -- m
Current Limit IOC Inductor valley current 5.2 6 -- A
Switching Frequency f SW -- 1.2 -- MHz
Minimum Off Time TOFF -- 120 -- ns
OVP Trip Threshold VOVP OVP detected 115 120 125 %
OVP Deglitch Time (Note 5) TOVD -- 5 -- s
UVP Trip Threshold VUVP UVP detected 55 60 65 %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 1.8 -- 
LDO_V1P24A (1A)
Supply Voltage VIN 1.6 -- 2 V
Supply Current (Quiescent) IQ Enabled -- 20 -- A
Output Voltage VOUT VIN = 1.8V 1.227 1.24 1.252 V
Soft-Start Time TSS 10% to 90% VOUT -- 0.5 -- ms
Dropout Voltage VDROP IOUT = 0.9A -- 200 -- mV

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 RT5041A
Parameter Symbol Test Conditions Min Typ Max Unit
Current Limit IOC 1.1 1.5 -- A
UVP Trip Threshold VUVP UVP detected 55 60 65 %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 6 -- 
IOUT = 100mA, f = 100Hz -- 60 --
Power Supply Rejection Rate dB
IOUT = 100mA, f = 10kHz -- 30 --
LDO_V1P15A (1A)
Supply Voltage VIN 1.6 -- 2 V
Supply Quiescent Current IQ Enabled -- 20 -- A
VIN = 1.8V, VSLP_S0iX_B = 1 1.138 1.15 1.161
Output Voltage VOUT V
VIN = 1.8V, VSLP_S0iX_B = 0 0.735 0.75 0.765
Soft-Start Time TSS 10% to 90% VOUT -- 0.5 -- ms
Ramp up from 0.75V to
Slew Rate -- 42 -- V/ms
1.15V
Dropout Voltage VDROP IOUT = 1A -- 400 -- mV
Current Limit IOC 1.1 1.5 -- A
UVP Trip Threshold VUVP UVP detected 55 60 65 %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 6 -- 
IOUT = 100mA, f = 100Hz -- 60 --
Power Supply Rejection Rate dB
IOUT = 100mA, f = 10kHz -- 30 --
LDO_V1P5S (0.1A)
Supply Voltage VIN 1.6 -- 2 V
Supply Quiescent Current IQ Enabled -- 20 -- A
Output Voltage VOUT VIN = 1.8V 1.485 1.5 1.515 V
Soft-Start Time TSS 10% to 90% VOUT -- 0.5 -- ms
Dropout Voltage VDROP IOUT = 100mA -- 20 -- mV
Current Limit IOC 0.15 0.2 -- A
UVP Trip Threshold VUVP UVP detected 55 60 65 %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 6 -- 
IOUT = 100mA, f = 100Hz -- 60 --
Power Supply Rejection Rate dB
IOUT = 100mA, f = 10kHz -- 30 --

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RT5041A
Parameter Symbol Test Conditions Min Typ Max Unit
SW_V3P3A (450mA)
Supply Voltage VIN 2.7 3.3 VCC 2 V
Supply Quiescent Current IQ VEN_1P05A = 2V -- 30 -- A
On-state Resistance RDS(ON) VIN = 3.333V, IOUT = 100mA -- 90 -- m
Soft-Start Time TSS 10% to 90% VOUT -- 360 -- s
Dropout Voltage VDROP IOUT = 400mA -- 33 -- mV
Current Limit IOC 0.55 1 -- A
UVP Trip Threshold VUVP UVP detected -- 60 -- %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 6 -- 
SW_V1P8A (1A)
Supply Voltage VIN 1.6 1.8 VCC 2 V
Supply Current (Quiescent) IQC VEN_1P05A = 2V -- 30 -- A
On-state Resistance RDS(ON) VIN = 1.818V, IOUT = 100mA -- 60 -- m
Soft-Start Time TSS 10% to 90% VOUT -- 360 -- s
Dropout Voltage VDROP IOUT = 300mA -- 18 -- mV
Current Limit IOC 1.1 1.4 -- A
UVP Trip Threshold VUVP UVP detected -- 60 -- %
UVP Deglitch Time (Note 5) TUVD -- 5 -- s
Discharge Resistance RDIS EN = Low, VTEST = 1V -- 6 -- 

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design.

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 RT5041A
Typical Application Circuit

RT5041A
7 1, 2
V1P8 IN_1P24A IN_1P8 VIN
10µF x 3 8 10µF x 3
IN_1P15A
9
IN_1P5S
5 1µH
V1P24A O_1P24A 27, 28
LX_1P8 V1P8
22µF 22µF x 4 * Optional 1
3
O_1P8
V1P15A 6 O_1P15A
20, 21
22µF IN_1P05A VIN
10µF x 3
V1P5S 10 O_1P5S
4.7µF 0.47µH
22, 23
LX_1P05A V1P05A
14 SWIN_1P8A 19 22µF x 7 ** Optional 2
V1P8 O_1P05A
2.2µF
11
VCC VCC
16 1µF
V1P8A SWO_1P8A
2.2µF
26
EN_1P05A V1P05A Enable
17 IN_3P3A 25
V3P3 SLP_S0iX_B S0iX
2.2µF 24
SUSPWRDNACK SUSPWRDNACK
3
18 SLP_S3_B S3
V3P3A O_3P3A 10k
2.2µF 13
RSMRST PG for V3P3A
GND PGND
13 15, 29 (Exposed Pad)

* For Intel transient test condition, Loading = 2.6A to 4.1A, SR = 1.5A/µs.

** For Intel transient test condition, Loading = 2.35A to 4.6A, SR = 2.25A/µs.

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RT5041A
Typical Operating Characteristics
Power On from EN_1P05A Power On from EN_1P05A

EN_1P05A EN_1P05A
(5V/Div) (5V/Div)

V1P05A V1P24A
(1V/Div) (1V/Div)

V1P8 V1P8A
(1V/Div) (1V/Div)
V1P15A VIN = 5V, VCC = 5V, VIN = 5V, VCC = 5V,
(1V/Div) SUSPWRDNACK Low, No Load SUSPWRDNACK Low, No Load

Time (2ms/Div) Time (2ms/Div)

Power On from EN_1P05A Power On from V1P5S

EN_1P05A EN_1P05A
(5V/Div) (5V/Div)

SLP_S3_B
(5V/Div)
V3P3A
(2V/Div)
VIN = 5V, VCC = 5V, V1P5S
SUSPWRDNACK Low, No Load (1V/Div)
RSMRST VIN = 5V, VCC = 5V,
(5V/Div)
SUSPWRDNACK Low, No Load

Time (2ms/Div) Time (1ms/Div)

Power Off EN_1P05A Power Off EN_1P05A

EN_1P05A EN_1P05A
(5V/Div) (5V/Div)

V1P05A V1P24A
(1V/Div) (1V/Div)
V1P5S
V1P8 (1V/Div)
(1V/Div)
V1P15A V1P8A
(1V/Div) VIN = 5V, VCC = 5V, SUSPWRDNACK Low, No Load (1V/Div) V = 5V, V = 5V, SUSPWRDNACK Low, No Load
IN CC

Time (500μs/Div) Time (500μs/Div)

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 RT5041A

Power Off EN_1P05A Power On from SUSPWRNACK

EN_1P05A SUSPWRNACK
(5V/Div) (5V/Div)

V1P05A
(1V/Div)
V3P3A
(2V/Div)
V1P8
(1V/Div)
RSMRST
V1P15A
(5V/Div)
VIN = 5V, VCC = 5V, SUSPWRDNACK Low, No Load (1V/Div) VIN = 5V, VCC = 5V, EN_1P05A High, No Load

Time (500μs/Div) Time (2ms/Div)

Power On from SUSPWRNACK Power On from SUSPWRNACK

SUSPWRNACK SUSPWRNACK
(5V/Div) (5V/Div)

V1P24A
(1V/Div)
V3P3A
(2V/Div)
V1P8A
(1V/Div)
RSMRST
(5V/Div) VIN = 5V, VCC = 5V, EN_1P05A High, No Load
VIN = 5V, VCC = 5V, EN_1P05A High, No Load

Time (2ms/Div) Time (2ms/Div)

Power Off SUSPWRNACK Power Off SUSPWRNACK

SUSPWRNACK SUSPWRNACK
(5V/Div) (5V/Div)

V1P05A V1P24A
(1V/Div) (1V/Div)
V1P5S
(1V/Div)
V1P8
(1V/Div)
V1P15A V1P8A
(1V/Div) VIN = 5V, VCC = 5V, EN_1P05A High, No Load
(1V/Div) VIN = 5V, VCC = 5V, EN_1P05A High, No Load

Time (500μs/Div) Time (500μs/Div)

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 RT5041A

Power Off SUSPWRNACK S0iX Enter Sequence

SUSPWRNACK SLP_S0iX_B
(5V/Div) (5V/Div)

V1P15A
(1V/Div)
V3P3A SLP_S3_B
(2V/Div) (5V/Div)

RSMRST V1P5S
(5V/Div) (1V/Div)
VIN = 5V, VCC = 5V, EN_1P05A High, No Load VIN = 5V, VCC = 5V, V1P15A Load 1mA

Time (500μs/Div) Time (500μs/Div)

S0iX Exit Sequence S3 (S4/S5) Enter Sequence

SLP_S0iX_B SLP_S0iX_B
(5V/Div) (5V/Div)

V1P15A V1P15A
(1V/Div) (1V/Div)
SLP_S3_B SLP_S3_B
(5V/Div) (5V/Div)

V1P5S V1P5S
(1V/Div) (1V/Div)
VIN = 5V, VCC = 5V, V1P15A Load 1mA VIN = 5V, VCC = 5V, V1P15A Load 1mA

Time (500μs/Div) Time (500μs/Div)

S3 (S4/S5) Exit Sequence Shutdown Current vs. VCC

1.0
VIN = 5V, EN_1P05A = 0V
0.9
SLP_S0iX_B
Shutdown Current (μA)1

0.8
(5V/Div) 0.7
0.6
V1P15A
(1V/Div) 0.5

SLP_S3_B 0.4
(5V/Div) 0.3
0.2
V1P5S
(1V/Div) 0.1
VIN = 5V, VCC = 5V, V1P15A Load 1mA
0.0
Time (500μs/Div) 4.5 4.7 4.9 5.1 5.3 5.5
VCC (V)

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 RT5041A

Quiescent Current vs. VCC Input High/Low Voltage vs. Temperature

143 1.0
EN_1P05A
142 Rising

Input High/Low Voltage (V)

0.8
Quiescent Current (μA)

141
Falling
0.6
140

139
0.4

138
0.2
137
VIN = 5V, EN_1P05A = 2V VIN = 5V, VCC = 5V
136 0.0
4.5 4.7 4.9 5.1 5.3 5.5 -50 -25 0 25 50 75 100 125
VCC (V) Temperature (°C)

Input High/Low Voltage vs. Temperature Input High/Low Voltage vs. Temperature
1.0 1.0
SUSPWRDNACK SLP_S3_B
Rising Rising
Input High/Low Voltage (V)
Input High/Low Voltage (V)

0.8 0.8

Falling Falling
0.6 0.6

0.4 0.4

0.2 0.2

VIN = 5V, VCC = 5V VIN = 5V, VCC = 5V

0.0 0.0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Input High/Low Voltage vs. Temperature V1P05A Load Transient Response

1.0
SLP_S0iX_B Converter
Rising
Input High/Low Voltage (V)

0.8

Falling IOUT
0.6 (1A/Div)
VOUT
(20mV/Div)
0.4
VIN = 5V, VCC = 5V,
ILOAD = 1A to 1.9A, SR = 0.9A/μs,
COUT = 22μF/0603/6.3V x 3
0.2
LX
VIN = 5V, VCC = 5V (5V/Div)
0.0
-50 -25 0 25 50 75 100 125 Time (10μs/Div)
Temperature (°C)

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RT5041A

V1P05A Load Transient Response V1P05A Load Transient Response

Converter Converter

VIN = 5V, VCC = 5V,

ILOAD = 2.85A to 4.6A,
IOUT IOUT SR = 1.75A/μs,
(1A/Div) (2A/Div) COUT = 22μF/0603/6.3V x 5
VOUT VOUT
(20mV/Div) (20mV/Div)
VIN = 3.3V, VCC = 5V,
ILOAD = 1A to 1.9A, SR = 0.9A/μs,
COUT = 22μF/0603/6.3V x 3
LX LX
(5V/Div) (5V/Div)

Time (10μs/Div) Time (10μs/Div)

V1P05A Load Transient Response V1P05A Load Transient Response

Converter Converter

VIN = 3.3V, VCC = 5V, VIN = 5V, VCC = 5V,

ILOAD = 2.85A to 4.6A, ILOAD = 2.35A to 4.6A,
IOUT SR = 1.75A/μs, IOUT SR = 2.25A/μs,
(2A/Div) COUT = 22μF/0603/6.3V x 5 (2A/Div) COUT = 22μF/0603/6.3V x 6
VOUT VOUT
(20mV/Div) (20mV/Div)

LX LX
(5V/Div) (5V/Div)

Time (10μs/Div) Time (10μs/Div)

V1P05A Load Transient Response V1P8 Load Transient Response

Converter Converter

VIN = 3.3V, VCC = 5V

ILOAD = 2.35A to 4.6A, VIN = 5V, VCC = 5V,
IOUT SR = 2.25A/μs, IOUT ILOAD = 0.6A to 1.717A
(2A/Div) COUT = 22μF/0603/6.3V x 7 (1A/Div)
VOUT VOUT
(20mV/Div) (20mV/Div)
SR = 1.117A/μs,
COUT = 22μF/0603/6.3V x 3

LX LX
(5V/Div) (5V/Div)

Time (10μs/Div) Time (10μs/Div)

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 RT5041A

V1P8 Load Transient Response V1P8 Load Transient Response

Converter Converter

VIN = 5V, VCC = 5V,

VIN = 3.3V, VCC = 5V, ILOAD = 3.65A to 4.1A,
IOUT ILOAD = 0.6A to 1.717A IOUT SR = 0.45A/μs,
(1A/Div) (2A/Div) COUT = 22μF/0603/6.3V x 3
VOUT VOUT
(20mV/Div) (20mV/Div)
SR = 1.117A/μs,
COUT = 22μF/0603/6.3V x 3

LX LX
(5V/Div) (5V/Div)

Time (10μs/Div) Time (10μs/Div)

V1P8 Load Transient Response V1P8 Load Transient Response

Converter Converter

VIN = 3.3V, VCC = 5V, VIN = 5V, VCC = 5V,

ILOAD = 3.65A to 4.1A ILOAD = 2.6A to 4.1A,
IOUT SR = 0.45A/μs,
IOUT SR = 1.5A/μs,
(2A/Div) (2A/Div) COUT = 22μF/0603/6.3V x 3
COUT = 22μF/0603/6.3V x 3
VOUT VOUT
(20mV/Div) (20mV/Div)

LX LX
(5V/Div) (5V/Div)

Time (10μs/Div) Time (10μs/Div)

V1P8 Load Transient Response V1P05A OVP

Converter RSMRST Converter
(5V/Div)
VIN = 3.3V, VCC = 5V, LX
ILOAD = 2.6A to 4.1A (10V/Div)
IOUT SR = 1.5A/μs,
(2A/Div) COUT = 22μF/0603/6.3V x 4
VOUT
(20mV/Div)

VOUT
(500mV/Div)
LX
(5V/Div)
VIN = 5V, VCC = 5V, Load = 2A

Time (10μs/Div) Time (50μs/Div)

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RT5041A

V1P8 OVP V1P05A UVP

RSMRST Converter RSMRST Converter

(5V/Div) (5V/Div)
LX LX
(10V/Div) (10V/Div)

VOUT VOUT
1V/Div) (500mV/Div)

VIN = 5V, VCC = 5V, Load = 2A VIN = 5V, VCC = 5V

Time (50μs/Div) Time (10μs/Div)

V1P8 UVP V1P05A OCP

RSMRST Converter RSMRST Converter
(5V/Div) (5V/Div)
LX LX
(10V/Div) (10V/Div)

VOUT
(1V/Div)

VOUT
1V/Div)
IL
VIN = 5V, VCC = 5V (5A/Div) VIN = 5V, VCC = 5V

Time (10μs/Div) Time (10μs/Div)

V1P18 OCP Output Voltage vs. Load Current

1.060
Converter Converter V1P05A
RSMRST 1.058
(5V/Div)
LX 1.056
Output Voltage (V)

(10V/Div) 1.054
1.052
1.050
VIN = 5V
VOUT 1.048 VIN = 3.3V
(1V/Div)
1.046
1.044
IL
(5A/Div) 1.042
VIN = 5V, VCC = 5V VCC = 5V
1.040
Time (10μs/Div) 0 1 2 3 4 5
Load Current (A)

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 RT5041A

Output Voltage vs. Load Current Switch Frequency vs. Load Current
1.830 1160
Converter V1P8 Converter V1P05A
1140 VIN = 3.3V
1.825

Switch Frequency (kHz)1

1120
Output Voltage (V)

1.820
1100 VIN = 5V
VIN = 5V
1.815 1080
VIN = 3.3V
1060
1.810
1040
1.805
1020
VCC = 5V VCC = 5V
1.800 1000
0 1 2 3 4 5 1 2 3 4 5
Load Current (A) Load Current (A)

Switch Frequency vs. Load Current Efficiency vs. Load Current

1160 95
VIN = 3.3V Converter V1P8 Converter V1P05A
1140 90 VIN = 3.3V
Switch Frequency (kHz)1

85
1120
VIN = 5V VIN = 5V
80
Efficiency (%)

1100
75
1080
70
1060
65
1040
60
1020 55
VCC = 5V VCC = 5V
1000 50
1 2 3 4 5 0 1 2 3 4 5
Load Current (A) Load Current (A)

Efficiency vs. Load Current V1P15A Load Transient Response

100
Converter V1P8 LDO
95 VIN = 3.3V

90
VIN = 5V
IOUT
Efficiency (%)

85
(1A/Div)
80
VOUT
75
(20mV/Div)
70
VIN = V1P8, VCC = 5V,
65 ILOAD = 0.5A to 1A, SR = 0.5A/μs,
VCC = 5V COUT = 22μF x 1
60
0 1 2 3 4 5 Time (10μs/Div)
Load Current (A)

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RT5041A

V1P24A Load Transient Response V1P5S Load Transient Response

LDO LDO

IOUT
(100mA/Div)
IOUT
(1A/Div)

VOUT VOUT
(20mV/Div) (10mV/Div)

VIN = V1P8, VCC = 5V, VIN = V1P8, VCC = 5V, SLP_S3_B = High,
ILOAD = 0.5A to 1A, SR = 0.5A/μs, ILOAD = 83mA to 100mA, SR = 17mA/μs,
COUT = 22μF x 1 COUT = 4.7μF x 1

Time (10μs/Div) Time (10μs/Div)

Output Voltage vs. Load Current Output Voltage vs. Load Current
1.153 0.752
LDO V1P15A LDO V1P15A

1.149 0.750
Output Voltage (V)

Output Voltage (V)

1.145 0.748

1.141 0.746

1.137 0.744
VIN = V1P8, VCC = 5V, VIN = V1P8, VCC = 5V,
SLP_S0iX_B = High SLP_S0iX_B = Low
1.133 0.742
0 200 400 600 800 1000 0 100 200 300 400 500
Load Current (mA) Load Current (mA)

Output Voltage vs. Load Current Output Voltage vs. Load Current
1.244 1.4995
LDO V1P24A LDO V1P5S

1.240
1.4990
Output Voltage (V)
Output Voltage (V)

1.236
1.4985
1.232

1.4980
1.228

1.4975
1.224
VIN = V1P8, VCC = 5V,
VIN = V1P8, VCC = 5V SLP_S3_B = High
1.220 1.4970
0 200 400 600 800 1000 0 10 20 30 40 50 60 70 80 90 100
Load Current (mA) Load Current (mA)

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 RT5041A

Output Voltage vs. Temperature Output Voltage vs. Temperature

1.16 0.76
LDO V1P15A LDO V1P15A

1.15 0.75
Output Voltage (V)

Output Voltage (V)

0mA
1.14 0mA 0.74 100mA
100mA 500mA
500mA
1.13 0.73
1000mA

1.12 0.72

1.11 0.71
VIN = V1P8, VCC = 5V, SLP_S0iX_B = High VIN = V1P8, VCC = 5V, SLP_S0iX_B = Low
Temperature from −40°C to 125°C Temperature from −40°C to 125°C
1.10 0.70
-50 -40 -20 0 25 50 75 100 125 -50 -40 -20 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Output Voltage vs. Temperature Output Voltage vs. Temperature

1.26 1.52
LDO V1P24A LDO V1P5S

1.25
1.50
Output Voltage (V)
Output Voltage (V)

1.24 0mA
1.48 10mA
50mA
1.23 0mA 100mA
100mA 1.46
1.22 500mA
1000mA
1.44
1.21
VIN = V1P8, VCC = 5V, VIN = V1P8, VCC = 5V, SLP_S3_B = High
Temperature from −40°C to 125°C Temperature from −40°C to 125°C
1.20 1.42
-50 -40 -20 0 25 50 75 100 125 -50 -40 -20 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

V1P15A UVP V1P15A UVP

RSMRST LDO RSMRST LDO

(5V/Div) (5V/Div)

VOUT VOUT
(500mV/Div) (500mV/Div)

VIN = V1P8, VCC = 5V, SLP_S0iX_B = High VIN = V1P8, VCC = 5V, SLP_S0iX_B = Low

Time (10μs/Div) Time (10μs/Div)

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RT5041A

V1P24A UVP V1P5S UVP

RSMRST LDO RSMRST LDO

(5V/Div) (5V/Div)

VOUT VOUT
(500mV/Div) (500mV/Div)

VIN = V1P8, VCC = 5V VIN = V1P8, VCC = 5V, SLP_S3_B = High

Time (10μs/Div) Time (10μs/Div)

V1P15A OCP V1P15A OCP

RSMRST LDO RSMRST LDO

(5V/Div) (5V/Div)

VOUT VOUT
(500mV/Div) (500mV/Div)

IOUT IOUT
(1A/Div) (1A/Div)
VIN = V1P8, VCC = 5V, SLP_S0iX_B = High VIN = V1P8, VCC = 5V, SLP_S0iX_B = Low

Time (100μs/Div) Time (100μs/Div)

V1P24A OCP V1P5S OCP

RSMRST LDO RSMRST LDO

(5V/Div) (5V/Div)

VOUT VOUT
(500mV/Div) (500mV/Div)

IOUT IOUT
(1A/Div) (100mA/Div)
VIN = V1P8, VCC = 5V VIN = V1P8, VCC = 5V, SLP_S3_B = High

Time (100μs/Div) Time (100μs/Div)

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 RT5041A

RON vs. Load Current RON vs. Load Current

90 90
SW V1P8A SW V3P3A

80 80

70 70

RON (m Ω)
RON (m Ω)

60 60

50 50

40 40

VIN = V1P8, VCC = 5V VIN = 3.3V, VCC = 5V

30 30
0 200 400 600 800 1000 0 100 200 300 400 500 600
Load Current (mA) Load Current (mA)

RON vs. Temperature RON vs. Temperature

90 90
SW V1P8A SW V3P3A

80 80

70 70
RON (m Ω)

RON (m Ω)

60 60

50 50

40 40
VIN = V1P8, VCC = 5V, IOUT = 300mA, VIN = 3.3V, VCC = 5V, IOUT = 400mA,
Temperature from −40°C to 125°C Temperature from −40°C to 125°C
30 30
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

V1P8A UVP V3P3A UVP

RSMRST SW RSMRST SW
(5V/Div) (5V/Div)

VOUT VOUT
(500mV/Div) (1V/Div)

VIN = V1P8, VCC = 5V VIN = 3.3V, VCC = 5V

Time (10μs/Div) Time (10μs/Div)

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RT5041A

V1P8A OCP V3P3A OCP

RSMRST SW RSMRST SW
(5V/Div) (5V/Div)

VOUT VOUT
(1V/Div) (2V/Div)

IOUT IOUT
(1A/Div) (500mA/Div)
VIN = V1P8, VCC = 5V VIN = 3.3V, VCC = 5V

Time (50μs/Div) Time (50μs/Div)

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22

Application Information
RT5041A is a MOIC (Multi Output Integrated Circuit) and
is an integral part of the Braswell Platform focused on
power solution integration to minimize system board area.
The simplicity of MOIC allows easy adoption without any
system firmware changes and can be a direct replacement
of most of the SOC VR rails.
RT5041A
Power Path
The RT5041A is an integrated power solution for the
Braswell platform. It includes two DC to DC Buck
converters, three Linear Dropout regulators and two power
switches. Expect Core power, DDR power and System
3V/5V power, RT5041A package the rest power paths into
one.

System Power
Battery 3.3V/5V
Charger
(2SXP)

DDR Power

Core Power

RT5041A_MOIC
VIN V1P05A
V1P8
V1P5S SOC +
Platform Device
V1P24A
V1P15A
SW_V3P3A
SW_V1P8A

EN_V1P05A

SLP_S3_B

SLP_S0iX_B

SUSPWRDNACK

RSMRST(PG)

Figure 1. Simplified MOIC Power Rails Apply

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RT5041A
All data of the power paths provided by RT5041A device is listed as Table 1.
Table1. Power Path
Resource Name Type
V1P05A Buck Converter
V1P8 Buck Converter
V1P5S LDO
V1P24A LDO
V1P15A LDO
V3P3A Switch
V1P8A Switch
* VIN = 5V only
** VOUT @ 1.15V
Buck Converter
RT5041A applies two synchronous step-down buck
converters with both integrated a P-Channel high side
MOSFET and a N-Channel low side MOSFET. The
converter control scheme is based on current mode
constant-on-time (COT) architecture, which has fast
transient response and minimizes external components.
Based on the internal current ramp information, it can used
multi-layer ceramic capacitors (MLCC) as the output
capacitors without high-ESR bulk or virtual ESR network
required for the loop stability.
Buck converters of RT5041A applies Power-Saving feature
by automatic enabling diode emulation mode (DEM) as
load decrease. When the load makes converter work at
continuous current mode (CCM) the frequency is fixed at
1.2MHz.
A soft-start function is built inside. The internal current
source charges an internal capacitor to make the soft-
start ramp voltage. When buck converter powers up, the
output voltage will track the internal ramp voltage during
soft-start interval to prevent inrush current.
When EN_1P05A goes low to let buck converters
shutdown mode occur, or the output under-voltage fault
latch is set, the output discharge mode will be triggered.
During discharge mode, an internal switch creates a path
for discharging the output capacitors' residual charge to
GND.
The buck converters have a full set of protection.
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24
Voltage Range Peak Current Rating
1.05V 4600mA
1.8V 4100mA*
1.5V 100mA
1.24V 1000mA
0.75V / 1.15V 1000mA**
3.3V 450mA
1.8V 1000mA
Buck Over-Current Protection
The OCP is implemented using a cycle-by-cycle valley
detected control circuit. The switch current is monitored
by measuring the low-side voltage between the LX pin
and PGND. The voltage is proportional to the switch current
and the on-resistance of the low-side MOSFET. To improve
accuracy, the low-side voltage sensing is temperature
compensated.
When high side MOSFET turn-on, the high-side switch
current increases at a linear rate and determines by VIN,
VOUT, TON and inductance. And when low side MOSFET
turn-on, the low-side switch current decreases linearly.
The average value of the switch current is the output load
current. If the sensing voltage of the low-side MOSFET is
above the voltage proportional to the current limit, the
converter keeps the low-side turn on until the sensing
voltage falls below the voltage proportional to the current
limit and start a new switching cycle.
Buck Output Under-Voltage Protection
When the over current limit is active, the output voltage
falls. If the output voltage falls under 60% of the reference
voltage, the UVP comparator signal goes high and an
internal UVP counter start to count. If the counted timing
is over the UVP delay time, the high-side and low-side
MOSFET will turn off and latched. The way to cannel the
latched behavior is to re-enable RT5041A or re-give VCC
power of RT5041A.
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DS5041A-00 February 2015

Buck Output Over-Voltage Protection
When the output voltage exceeds 120% of the reference,
the OVP comparator signal goes high and an internal OVP
counter start to count. If the counted timing is over the
OVP delay time, the low-side MOSFET will continue to
turn on and latched.
Buck Over-Temperature Protection
RT5041A monitors the temperature of buck converters. If
the temperature of the buck converter is over 150°C the
OTP circuit acts and makes all power rails of RT5041A
shutdown. They recover back with power-up sequence
when the temperature of buck converters is low to 125°C.
Linear Dropout Regulator
The RT5041A includes three high performance linear
dropout regulators. The peak current rating is designed
for short period current, not for thermal design current.
LDOs of RT5041A also have soft-start function. An internal
current source charges an internal capacitor to make the
soft-start ramp voltage. When LDOs power up, the output
voltage will track the internal ramp voltage during soft-
start interval to prevent inrush current.
When enable signals go low to let LDOs shutdown mode
occur, or the output under-voltage fault latch is set, the
output discharge mode will be triggered. During
discharge mode, an internal switch creates a path for
discharging the output capacitors' residual charge to GND.
RT5041A has two enable signals SLP_S3_B and
SLP_S0iX_B to control LDO_V1P5S and LDO_V1P15A
respectively to meet the S3/S4 and S0iX power saving
mode status of Braswell platform. If SLP_S3_B signal goes
high, LDO_V1P5S powers on; otherwise, the LDO_V1P5S
keeps off. When RT5041A powers up from internal power
up sequence, LDO_V1P15A will raise up to 1.15V with
ignoring SLP_S0iX_B signal until device detecting the first
rising edge of the signal. After detecting the first rising
edge of the SLP_S0iX_B if the SLP_S0iX_B signal goes
high, LDO_V1P15A keeps 1.15V. And if it goes low,
LDO_V1P15A changes to 0.75V.
The LDO contains an independent current limit and under
voltage protection circuit to prevent unexpected
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RT5041A
applications. The current limit circuit monitors the current
of the path from input to output by a current sensing circuit
and controls the pass transistor's gate voltage. When the
path current is over the current limit, the current limit circuit
fixes the gate voltage to limit the output current. And if
the output voltage is less than 60% of VOUT, the UVP
circuit will shutdown the LDO and latched. Re-enable
RT5041A device to disable the latched status.
Power Switch
There are also two power switches within RT5041A.
SW_V3P3A is a P-Channel power switch MOSFET, and
SW_V1P8A is a N-Channel power switch MOSFET.
Power switches of RT5041A have soft-start function, too.
An internal current source charges an internal capacitor
to make the soft-start ramp voltage. When power switches
turn on, the output voltage will track the internal ramp
voltage during soft-start interval to prevent inrush current.
When EN_1P05A goes low to let power switches shutdown
mode occur, the output discharge mode will be triggered.
During discharge mode, an internal switch creates a path
for discharging the output capacitors’ residual charge to
GND.
SW_V3P3A and SW_1P8A also apply current limit
protection and under voltage protection function. The
current limit circuitry prevents damage to the power switch
MOSFET and the backend device but can deliver load
current up to the current limit threshold. And if the output
voltage is less than 2.7V for SW_V3P3A or 1.2V for
SW_V1P8A, the RT5041A will shutdown and latched.
RSMRST
RSMRST is an open-drain output and requires a pull-up
resistor. RSMRST is actually a power good output signal
for monitoring SW_V3P3A. RSMRST pulls up if
SW_V3P3A is above 90% of its nominal voltage; otherwise
the RSMRST goes low.
SUSPWRDNACK
SUSPWRDNACK is an active high dedicated input signal
that tells the RT5041A to turn off the power rails. If pull up
SUSPWRDNACK signal high to turn off power rails and
pull low again, the all power rails will raise up with the
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RT5041A
power up sequence. This signal will work when EN_1P05A RT5041A MOIC has three controlled enable pins
goes high. EN_1P05A, SLP_S0iX_B and SLP_S3_B for changing the
voltage rails (VR) status to match the different power saving
MOIC VR STATUS mode In the Braswell platform. The VR power status is
shown directly as the Table 2.

Table2. MOIC Voltage Rails Power Status

Voltage Rails S0 S0iX S3 S4/S5

V1P05A ON ON ON ON
V1P8 ON ON ON ON
V1P5S ON ON OFF OFF
V1P24A ON ON ON ON
V1P15A ON @ 1.15V ON @ 0.75V ON @ 0.75V ON @ 0.75V
V3P3A ON ON ON ON
V1P8A ON ON ON ON
 
According to Table 2, set three control signals to high for S4/S5 status, set SLP_S0iX_B and SLP_S3_B to low to
satisfying S0 mode; for case S0iX mode, give a low level make the action. The relations of the control signals and
voltage to SLP_S0iX_B to change LDO_V1P15A voltage the VR power status are shown in the Table 3.
from 1.15V to 0.75V. If the system need move into S3 or

Table3. Control Pin Truth Table for VR Power Status

Status EN_1P05A SLP_S0iX_B SLP_S3_B

S0 High High High
S0iX High Low High
S3 High Low Low
S4/S5 High Low Low
OFF Low X X
 

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26

MOIC Sequencing
Power-Up Sequence
When EN_1P05A comes to high RT5041A starts an
internal power-up-sequence to enable most voltage rails.
After RSMRST signal going to high, the power-up-
sequence completes. Note that LDO_V1P5S is not
included in the internal power up sequence.
SLP_S0iX_B signal should come after V1P8, if use V1P8
power rail as the input of LDO_V1P5S. MOIC will monitor
LDO_V1P5S internal power good signal when SLP_S3_B
goes high. If MOIC detects fault of any internal power good
during the power up sequence, RT5041A will be latched.
RT5041A
Power-Off Sequence
There are two signals, EN_1P05A and SUSPWRDNACK,
can make all power rails of RT5041A go to off mode. When
use EN_1P05A to disable RT5041A, all the output signals
and power rails will be off at the same time. If use
SUSPWRDNACK signal to power off all VRs, the RSMRST
will fall down after SW_V3P3A being under 85% of its
output voltage.
S0iX Mode and S3 (S4/S5) Mode Power Status
RT5041A is able to meet power saving requirement of the
sleep mode on the Braswell platform.
From S0 mode to S0iX mode, SLP_S0iX_B goes low;
from S0 mode to S3 (S4/S5) mode, SLP_S0iX_B and
SLP_S3_B both go to low.

SUSPWRDNACK

EN_1P05A <1ms
90%
330µs
V1P05A <1ms
90%

V1P8 800µs
90%
1.15V
V1P15A 1ms
90%

V1P24A 710µs
90%

V1P8A 260µs
90%

V3P3A 1ms

RSMRST 760µs

Sys to MOIC
SLP_S3_B
90%

V1P5S
V1P15A Start to monitor the signal

SLP_S0iX_B
Sys to MOIC

Figure 2. Power-Up Sequence

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27
RT5041A
SUSPWRDNACK

EN_1P05A

V1P05A

V1P8

V1P15A

V1P24A

V1P5S

V1P8A

V3P3A

RSMRST

Figure 3. Power-Off Sequence with EN_V1P05A Going Low

SUSPWRDNACK

EN_1P05A

V1P05A

V1P8
1.15V
V1P15A

V1P24A

V1P8A

85% 90%
V3P3A

RSMRST

system go low
SLP_S3_B

V1P5S

Figure 4. Power Off and Up Sequence with SUSPWRDNACK Going Low and then High

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28
 RT5041A
S0 S0iX S0 S3 (S4/S5) S0

SLP_S0iX_B

SLP_S3_B

80µs* 5µs*
V1P15A 1.15V 1.15V 1.15V
0.75V 0.75V

V1P5S 1µs 330µs

* Loading = 5mA

Figure 5. S0iX, S3 (S4/S5) Enter/Exit Sequence

Thermal Considerations
For continuous operation, do not exceed absolute 4.0
Four-Layer PCB
maximum junction temperature. The maximum power Maximum Power Dissipation (W)1 3.5
dissipation depends on the thermal resistance of the IC 3.0
package, PCB layout, rate of surrounding airflow, and
2.5
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the 2.0

following formula : 1.5

PD(MAX) = (TJ(MAX) − TA) / θJA 1.0

where TJ(MAX) is the maximum junction temperature, TA is 0.5

the ambient temperature, and θJA is the junction to ambient 0.0
thermal resistance. 0 25 50 75 100 125
Ambient Temperature (°C)
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
Figure 6. Derating Curve of Maximum Power Dissipation
ambient thermal resistance, θJA, is layout dependent. For
WQFN-28L 4x4 package, the thermal resistance, θJA, is
28.5°C/W on a standard four-layer thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by the following formula :
PD(MAX) = (125°C − 25°C) / (28.5°C/W) = 3.5W for
WQFN-28L 4x4 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 6 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.

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29
RT5041A
Layout Considerations
Layout is very important in high frequency switching
converter design. The PCB can radiate excessive noise
and contribute to converter instability with improper layout.
Power components should be placed on the same side of
board, with power traces routed on the same layer. If it is
necessary to route a power trace to another layer, choose
a trace in low di/dt paths and use multiple vias for
interconnection. When vias are used to connect PCB
layers in the high current loop, multiple vias should be
used to minimize via impedance.
 Place the inductors close LX_1P05A and LX_1P8 to
minimize the radiation noise, and the copper area should
be minimized. However, the copper area is provided a
heat sink to the internal MOSFET. Don’t make the area
of the node small by using narrow traces, using wide
and short traces instead.
 For feedback signals O_1P05A and O_1P8, the sensing
point which detects the output voltage must be
connected after output capacitor and keep the trace far
away from the switching node or inductor. Place the
feedback network as close to the chip as possible.

Certain points must be considered before starting a layout  Place the bypass capacitor close to IN_1P24A,
using the RT5041A. IN_1P15A, IN_1P5S, IN_1P8A, and IN_3P3A.

 Make the traces of the main current paths as short and
wide as possible.
 Place input decoupling capacitors as close as possible
as to IN_1P8 and IN_1P05A. This cap provide the instant
current into this pin when the internal MOSFET
switching. It is preferable to connect the decoupling
capacitors directly to the pins without using vias.
 Place the filter capacitor close to O_1P24A, O_1P15A,
O_1P5S, O_1P8A, and O_3P3A to minimize trace
inductance.
 The GND pin and Exposed Pad should be connected to
a strong ground plane for heat sinking and noise
protection.
 An example of PCB layout guide is shown in Figure 7.
for reference.

LX should be connected to inductor by wide and short

trace. Keep sensitive components away from this trace.
V1P8' V1P05A
SUSPWRDNACK
SLP_S0iX_B
EN_1P05A

LX_1P05A
LX_1P05A
LX_1P8
LX_1P8

GND GND
Input capacitor The voltage divider must
28 27 26 25 24 23 22
must be placed be connected as close to
5Vin IN_1P8 1 21 IN_1P05A 5Vin
as close to the the device as possible.
IN_1P8 2 20 IN_1P05A
IC as possible. GND
O_1P8 3 19 O_1P05A
SLP_S3_B 4 PGND 18 O_3P3A SWO_V3P3A
O_1P24S O_1P24A 5 17 IN_3P3A IN_V3P3A
O_1P15A 6 29 16 SWO_1P8A SWO_V1P8A
O_1P5S GND
IN_1P24A 7 15 PGND
GND
8 9 10 11 12 13 14
IN_1P15A
IN_1P5S
O_1P5S

SWIN_1P8A
RSMRST
VCC
GND

V1P8'
O_1P5S

IN_V1P8A

The output capacitor

must be placed near
the IC. GND

Figure 7. PCB Layout Guide

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30
 RT5041A
Outline Dimension

D D2 SEE DETAIL A

L
1

E E2

1 1

2 2

e b
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 3.900 4.100 0.154 0.161
D2 2.350 2.450 0.093 0.096
E 3.900 4.100 0.154 0.161
E2 2.350 2.450 0.093 0.096
e 0.400 0.016
L 0.350 0.450 0.014 0.018

W-Type 28L QFN 4x4 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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