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JEDEC TO-251AA JEDEC TO-252AA
SOURCE
DRAIN
GATE GATE DRAIN
(FLANGE)
4-395 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRFR320, IRFU320
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Thermal Resistance, Junction to Ambient RθJA Typical Solder Mount - - 110 oC/W
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IRFR320, IRFU320
S
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 3.1A, VGS = 0V, - - 1.6 V
(Figure 13)
Reverse Recovery Time trr TJ = 25oC, ISD = 3.1A, dISD/dt = 100A/µs 120 270 600 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 3.1A, dISD/dt = 100A/µs 0.64 1.4 3.0 µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 3.1mH, RGS = 25Ω, peak IAS = 3.1A.
1.2 4.0
POWER DISSIPATION MULTIPLIER
1.0
3.2
ID, DRAIN CURRENT (A)
0.8
2.4
0.6
1.6
0.4
0.8
0.2
0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150
TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
10
ZθJC, TRANSIENT THERMAL IMPEDANCE
0.5
1
0.2
0.1 PDM
0.05
0.1 0.02
t1
0.01
t2
SINGLE PULSE NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
10-2
10-5 10-4 10-3 10-2 0.1 1 10
t1, RECTANGULAR PULSE DURATION (s)
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IRFR320, IRFU320
100 5
OPERATION IN THIS VGS = 10V
VGS = 6.0V
AREA IS LIMITED
BY rDS(ON)
4
ID, DRAIN CURRENT (A)
10ms 1
TJ = MAX RATED VGS = 4.0V VGS = 4.5V
TC = 25oC
SINGLE PULSE DC
0.1 0
1 10 100 1000 0 40 80 120 160 200
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)
5 10
PULSE DURATION = 80µs VGS = 10V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS ≥ 350V
4
VGS = 6.0V
ID, DRAIN CURRENT (A)
1
3
VGS = 5.5V
TJ = 150oC TJ = 25oC
2
0.1
VGS = 5.0V
1
VGS = 4.0V VGS = 4.5V
0 10-2
0 3 6 9 12 15 0 2 4 6 8 10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)
10 3.0
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE
8 2.4
VGS = 10V
ON RESISTANCE
ON RESISTANCE
6 1.8
VGS = 20V
4 1.2
2 0.6
0 0
0 3 6 9 12 15 -40 0 40 80 120 160
ID, DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)
4-398
IRFR320, IRFU320
1.25 750
ID = 250µA VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE
C, CAPACITANCE (pF)
CISS
1.05 450
COSS
0.95 300
0.75 0
-40 0 40 80 120 160 1 2 5 10 2 5 102
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE
5 100
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX ISD, SOURCE TO DRAIN CURRENT (A) DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)
VGS = 0V
4
TJ = 25oC 10
3
0 0.1
0 1 2 3 4 5 0 0.3 0.6 0.9 1.2 1.5
ID, DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 3.1A
VDS = 320V
16
VGS, GATE TO SOURCE (V)
VDS = 200V
VDS = 80V
12
0
0 4 8 12 16 20
QG(TOT) , TOTAL GATE CHARGE (nC)
4-399
IRFR320, IRFU320
VDS
BVDSS
L tP
VDS
tP
0V IAS
0
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON tOFF
td(ON) td(OFF)
tr tf
RL VDS
90% 90%
+
VDD 10% 10%
RG
- 0
DUT 90%
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
VDD
D
VDS
G DUT
0
IG(REF) S
0
VDS IG(REF)
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
4-400
IRFR320, IRFU320
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out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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