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LAB MANUAL
SUBJECT: [ DSP- ]
Branch: ECE
Vision:
To be among the renowned institutions providing engineering and management education of
excellence, empowered with research, innovation and entrepreneurship with high ethical values,
catering to the needs of industry and society.
Mission:
1. To offer state of the art undergraduate and postgraduate program.
2. To be a learner centric institute imbibing experimental innovation and lifelong learning
skills, addressing societal problems with high ethical values for nation building.
3. To deliver changing demands of industry and academia through our stakeholders.
4. To contribute as a professional leader in the growing field of entrepreneurship and research.
Vision:
To impart knowledge and skill of Electronics and Communication to develop and sustain a culture of research
while promoting values, innovation, entrepreneurship, ethics and professionalism to meet the needs of
industry and society.
Mission:
Find the stability of system using pole-zero diagrams and bode diagram.
CO 4:
PSO-1: Graduates of the programme will be able to analyse real world engineering problems and
provides its solution in the field of electronics and communication engineering
PSO-2: Graduates of the programme will be able to design and test systems in the field of embedded
system and ICT.
CO-PO Mapping:
CO1 3 2 2 1 2 - - 1 2 - 2 1 1
CO2 2 2 2 1 2 - - 1 2 - 2 1 1
CO3 2 2 1 1 2 - - - 1 - 1 1 1
CO4 2 2 1 1 2 - - 1 1 - 1 1 1
CO5 2 2 2 1 2 - - - 1 - 1 1 1
3 – High; 2 – Medium; 1 – Low
Aim: To study about DSP Processors and architecture of TMS320C6713 DSP Processor
1.1 Architecture
The C6713 DSK is a low-cost standalone development platform that enables users to evaluate and
develop applications for the TI C67xx DSP family. The DSK also serves as a hardware reference
design for the TMS320C6713 DSP. Schematics, logic equations and application notes are available
to ease hardware development and reduce time to market.
The DSP on the 6713 DSK interfaces to on-board peripherals through a 32-bit wide EMIF (External
Memory Interface). The SDRAM, Flash and CPLD are all connected to the bus. EMIF signals are
also connected daughter card expansion connectors which are used for third party add-in boards. The
DSP interfaces to analog audio signals through an on-board AIC23 codec and four3.5 mm audio
jacks (microphone input, line input, line output, and headphone output).The codec can select the
microphone or the line input as the active input. The analog output is driven to both the line out
(fixed gain) and headphone (adjustable gain) connectors. McBSP0 is used to send commands to the
codec control interface whileMcBSP1 are used for digital audio data. McBSP0 and McBSP1 can be
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
re-routed to the expansion connector in software programmable logic device called a CPLD is used
to implement glue logic that ties the board components together. The CPLD has a register based user
interface that lets the user configure the board by reading and writing to its registers. The DSK
includes 4 LEDs and a 4 position DIP switch as a simple way to provide the user with interactive
feedback. Both are accessed by reading and writing to the CPLD registers. An included 5V external
power supply is used to power the board. On-board switching voltage regulators provide the +1.26V
DSP core voltage and +3.3V I/O supplies. The board is held in reset until these supplies are within
operating specifications. Code Composer communicates with the DSK through an embedded JTAG
emulator with a USB host interface. The DSK can also be used with an external emulator through
the external JTAG connector.
The DSK is designed to work with TI’s Code Composer Studio development environment and ships
with a version specifically tailored to work with the board. Code Composer communicates with the
board through the on-board JTAG emulator. To start, follow the instructions in the Quick Start
Guide to install Code Composer. This process will install all of the necessary development tools,
documentation and
Drivers. After the install is complete, follow these steps to run Code Composer. The DSK must be
fully connected to launch the DSK version of Code Composer.
1) Connect the included power supply to the DSK.
2) Connect the DSK to your PC with a standard USB cable (also included).
3) Launch Code Composer from its icon on your desktop.
The C67xx family of DSPs has a large byte addressable address space. Program code and data can
be placed anywhere in the unified address space. Addresses are always32-bits wide. The memory
map shows the address space of a generic 6713 processor on the left with specific details of how
each region is used on the right. By default, the internal memory sits at the beginning of the address
space. Portions of the internal memory can be reconfigured in software as L2 cache rather than fixed
RAM. The EMIF has 4 separate addressable regions called chip enable spaces (CE0-CE3).The
SDRAM occupies CE0 while the Flash and CPLD share CE1. CE2 and CE3 are generally reserved
for daughter cards.
The DSK has 4 configuration switches that allows users to control the operational stateof the DSP
when it is released from reset. The configuration switch block is labelled SW3 on the DSK board,
next to the reset switch.Configuration switch 1 controls the endianness of the DSP while switches 2
and 3configure theboot mode that will be used when the DSP starts executing.Configuration switch
4 controls the on-chip multiplexing of HPI and McASP signalsbrought out to the HPI expansion
connector. By default all switches are off whichcorresponds to EMIF boot (out of 8-bit Flash) in
little endian mode and HPI signals onthe HPI expansion connector.
1. 6 Power Supply
The DSK operates from a single +5V external power supply connected to the mainpower input
(J5).Internally, the +5V input is converted into +1.26V and +3.3V usingseparate voltage regulators.
The +1.26V supply is used for the DSP core while the+3.3V supply is used for the DSP's I/O buffers
and all other chips on the board. Thepower connector is a 2.5mm barrel-type plug.There are three
power test points on the DSK at JP1, JP2 and JP4. All I/O currentpasses through JP2 while all core
current passes through JP1. All system currentpasses through JP4. Normally these jumpers are
closed. To measure the currentpassing through remove the jumpers and connect the pins with a
current measuringdevice such as a multimeter orcurrent probe.It is possible to provide the daughter
card with +12V and -12V when the external powerconnector (J6) is used.
RESULT: Study the architecture, Functional Overview, Basic Operation, Memory Mapof
TMS320C6713 DSP Processor
EQUIPMENTS:
Operating System - Windows XP
Software – SciLab 6.1.1 &ode Composer Studio. Introduction to Scilab: Basics
SciLab is a programming language that can be used for a wide array of numerical and computing
applications. SciLab has a quite astonishing array of built in functions which allow the user to
perform many needed operations. By making use of SciLab’s built in functions complicated
programs can be written quickly and efficiently.
SciLab is used primarily for numerical computing, as opposed to symbolic computations performed
by MathCad and Mathematica. For example, you cannot add x + x and get 2x unless you have
already defined a value for x, say 2, in which case x + x will return 4.
The following document will step you through basic SciLab functionality. The goal of this tutorial is
to give you an overview of SciLab command line structure, and to expose you to some basic
commands. As you enter the commands, ask yourself, “What should the result be?” Then see if you
were right or not. If you weren’t, figure out what happened.
Starting SciLab
Begin by starting SciLab. You will see a window with multiple insets. On the right hand inset you
will see the command line symbol, “>>”. When entering commands directly, type all commands
here.
Basic Syntax
The basic SciLab syntax has the following form
>> [assignment] [command] [termination]
[Termination] is the end of a SciLab line. Use; to suppress output to the screen and leave it blank to
write output to the screen.
[Commands] are the built-in or user-defined functions or operators that SciLab understands.
[Assignment] statements place the returned value of the command into a variable for storage; these
may be omitted.
Each of these will be discussed.
>> 1+1;
>>1+1
>>3*2
>>2^4
>>16.6-3/6
The preceding lines used basic SciLab operators, +,-,^,*, and / or calculations. Next, try out some
basic SciLab functions by typing the lines below, each followed by the ‘enter’ key. The argument is
in the parentheses.
Notice that the reserved word ‘pi’ is employed and that the basic trig function require radians though
there are trig functions available that work in degrees. Also, in general you may pass anything that
would return a numerical value to any basic function, e.g the use of round.
Basic Assignment of Variables
Try out the following lines at your command line.
>> a = 1
>> b = 2
>> c = a + b
>> C = A + B
>> h = ‘me’
>> k = ‘oh’
>> l = ‘my’
>> m = ‘ ‘
>> [h, k, l]
>> [h,,m,k,m,l]
>>h+m+k+l
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
Why were i andj skipped? Type i and j on your command line.
Useful Matrix Functions
The command ‘sort’ sorts within columns in ascending order by default. If this is not possible, it
defaults to a row-wise sort in ascending order.
>> sort(f)
>> sort(g)
For a quick description of how sort operates, type ‘help sort’. This will work with any command for
which SciLab has a definition.
Now try these commands, max, min, mean, std, operating on f and g.. What are they doing on f and
g? Also try typing f’ (note the apostrophe).
Matrix Operations
You can perform basic operations on matrices as long as the indices agree.
>> f+2*f
>> g*g
>> g^2
>>f+g
>> f*f’
SciLab will try to operate on all elements of a matrix with an operator or a function.
>> g-1
>> sin(f)
>> 2*f
You may also operate on all elements explicitly.
>>f.^2
Now
>> f^2
>>f.f
>>f.f’
Note that the for loop is closed by an end statement. It also runs from 1 by 1 to 4 using the colons to
delimit the index definitions ( i=1:4 will produce the same result since the default increment is 1).
The pause is inserted so that you can see the results.
CCS is a software integrated development environment (IDE) for building and debugging programs
for the DSK (Dsp Starter Kit), i.e. the dsp board. The software is used for three phases in the overall
DSP system design process:
1) Coding and building: writing code using the editor, creating a ‘project’, and compiling and
linking.
2) Debugging: syntax checking, probe points, break points
3) Analysis: statistics, benchmarking, real-time debugging
We will go through some elements of all three phases during this lab.
This lab is to get you familiar with the software, to give you a ‘feel’ of where things are located.
You are NOT expected to understand what you are doing. The ‘what is …’ questions will be
answered during the course of the semester.
I. CREATING PROJECTS
Create a ‘Project’
Create a Source File
Create a Command File
Add Files to a Project
Create the Executable File
Resets
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
During the course of this exercise, you may need to reset the board. There are several ways to do
this at different levels:
- Debug> Reset CPU
- Close CCS. Start Button of Windows > Programs > Texas Instruments > Code Composer Studio
DSK Tools > Hardware Resets > Reset
- Close CCS. Unplug the board and turn it back on. Wait for the LED lights to quit flashing before
trying to use the board/open CCS again.
I. CREATING PROJECTS
Create a ‘Project’
.sect “.mydata”
.short 0
.short 7
.short 10
.short 7
.short 0
.short -7
.short -10
.short -7
.short 0
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
.short 7
Let’s create another source file, a C program. This program will do nothing at the beginning, but we
can develop it later on. Do as you did above, but this time for a C file which you should save as
main.c. The C code is:
#include <stdio.h>
void main()
{
printf(“Begin\n”);
printf(“End\n”);
}
Often times you can use an existing .cmd file. But let’s put our data in a certain part of memory so
that we can access it.
Although the files you have created are in your project folder, they have not been put in the folders
which will be used for assembling and linking. We have to add these files to the project for this
purpose.
Add Files to a Project
Before we compile, assemble, and link, there are a number of options we can choose to determine
the amount of optimization done. There are four levels (Opt Level) of optimization: 0, 1, 2, and 3.
The lowest level is 0. However, sometimes, debugging can not be done when we use optimization.
So we will start out using no optimization to get things working.
Project > Options
Compiler, Basic – Check that Target Version: 671x and Opt Level: None
Linker, Basic – You can change the name of the executable file which will be produced.
Project > Build compiles, assembles, and links all of the files in the project and produce the
executable file lab1.out.
A window at the bottom shows if there are errors.
Project > Rebuild can be used when you have made a change to only a few files and now wish to
compile, assemble, and link with the changed files.
There are shortcut buttons on the window to do Project Build and Rebuild. FIND them. They will
be useful in the future.
You should have gotten a lot of errors upon building. Scroll up until you reach the first red line with
ERROR! in it. Double click on the line. The file initmem.asm opens at the line where the error
occurred. Assembly code required that all of the lines in this file NOT start in the first column. So
enter a space at the beginning of each line in the file and then save the file.
Since we didn’t change every file in the project, we can do a Project > Rebuild (you can also use the
shortcut button).
Now we can load the program into the DSP memory and execute the program.
File > Load Program and open the Lab1.out program which is in the Debug folder of your Lab1
project folder.
Debug > Run to run the program or use the shortcut button on the left. Find this button! It will be
useful in the future.
Let’s see if the values of our initmem file are in the memory location we established in the .cmd file.
**************************************
Before we look at additional debugging and analysis features, let’s modify our main.c program. We
will assign a pointer to the beginning of our data in memory. In this way, we can bring data into our
c program and print the data out.
#include <stdio.h>
void main()
{
int i;
short *point;
point= (short *) 0x80000000;
printf(“Begin\n”);
for (i=0;i<10;i++)
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
{
printf(“[%d] %d\n”,i, point[i]);
}
printf(“End\n”);
}
Save it, Rebuild (shortcut button on the top or Debug > Rebuild), and Load it into the DSP memory.
Run it.
**************************************
We use ‘breakpoints’ and ‘watch’ windows to watch variables while a program runs.
We will look at the values of the variable pointer in main.c before and after the pointer assignment
as well as the value of variable i.
File > Reload to reload the program (we loaded and ran it in the step before).
Short questions:
1) What is difference between CLC and close all?
2) What is command window?
3) What is editor file?
4) How to create m file?
5) What command is used for discrete signal?
Aim:
Write a SCILAB TOOL program for generation of basic signals such as unit impulse, unit step,
ramp, exponential sinusoidal and cosine.
Theory:
Continuous time and Discrete time signals
Continuous time signals:
A continuous signal or a continuous-time signal is a varying quantity (a signal) whose domain,
which is often time, is a continuum (e.g., a connected interval of the reals). That is, the function's
domain is an uncountable set.
Output:
EQUIPMENTS:
Operating System - Windows XP
Software - Code Composer Studio.
Program:
#include <stdio.h>
int main()
{
int a[10][10], b[10][10], result[10][10], r1, c1, r2, c2, i, j, k;
Output Matrix:
24 29
6 25
clc;
clear all;
close all;
t=-2:1:2;
y=[zeros(1,2), ones(1,1), zeros(1,2)];
subplot(2,2,1);
plot(t,y);
ylabel('Amplitude -- >');
xlabel('(a) n -- >');
clc;
clear;
close all;
n1=input('Enter the length of Ramp sequence');
t= 0:n1;
subplot(2,2,3);
plot(t,t);
ylabel('Amplitude -- >');
xlabel('(c) n -- >');
clc;
clear;
close all;
n2=input('enter the length of exponential sequence');
t=0:n2;
a=input('Enter the a value');
y2= exp(a*t);
subplot(2,2,4);
plot(t, y2);
ylabel('Amplitude -- >');
xlabel('(d) n -- >')
clc;
clear;
close all;
pi=3.14;
t=0:.01:pi;
y=sin(2*pi*t);
figure(2);
subplot(2,1,1);
plot(t,y);
ylabel('Amplitude -- >');
xlabel('(a) n -- >');
Output:
THEORY: The DFT produces a sequence of N (typically complex) numbers, X0 … XN-1, via the
following:
N−1 k
−i2 π N n
X k = ∑ xn e
n=0
The IDFT (Inverse DFT) is defined as follows
N −1 k
1 +i2 π N n
xk =
N
∑ Xk e
k=0
PROGRAM
clear all;
clc ;
close ;
//Computing DFT
X = dft (x , -1)
//Computing IDFT
x_inv = real (dft(X ,1) )
n = 0:L -1;
K = 500;
k = 0:1: K;
w = 2* %pi*k/K;
X_W = x * exp(- sqrt ( -1)*n '*w);
Mag_X = abs (X_W);
Phase_X = atan( imag (X_W),real (X_W))
subplot (2 ,1 ,1)
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
plot2d (w, Mag_X )
xlabel( ' Fr equency in Radians ' )
ylabel( ' abs (X) ' )
title ( 'Magnitude Response' )
subplot (2 ,1 ,2)
plot2d (w, Phase_X )
xlabel( ' Fr equencyi n Radians ' )
ylabel( '<(X) ' )
title ( ' Phase Response' )
OUTPUT:
Enter the sequence for which DFT is to be calculated [1 1 1 1]
Enter the the value of N(Value of N in N-Point DFT ) 4
DFT of input sequence is
4 0 0 0
IDFT of input sequence is
1 0 0 0
RESULT: Evaluate a 4 – point DFT AND IDFT of x[n] = 1, 0<= n <= 3; 0 otherwise and result
show in figures.
Experiment No. -6
AIM: Write the SCILAB program to implement FFT algorithm.
EQUIPMENTS:
Operating System - Windows XP
Software - SCILAB
THEORY: The FFT is an efficient algorithm for computing the DFT. The FFT is based on the
divide-and-conquer paradigm. Take advantage of the symmetry and periodicity of the complex
exponential (let WN=e-j2p/N)
Signal System Lab, Deptt. of
k [N −n]
ECE kn ¿
−kn
IIMT, Gr. NOIDA
WN =W N =(W N )
Symmetry
Periodicity W kn k [n+N ]
=W [k+ N ]n
N =W N N
Note that two length N/2 DFTs take less computation than one length N DFT: 2(N/2)2<N2
Algorithms that exploit computational savings are collectively called Fast Fourier Transforms
Decimation-in-Time Algorithm: Consider expressing DFT with even and odd input samples:
N −1
X [ k ]= ∑ x [ n ]W nk
N
n=0
¿ ∑ N + ∑ x [n ]W N
x [ n ]W nk nk
n even n odd
N N
−1 −1
2 2
= ∑ x [2 r ]W N / 2 +W N ∑ x [ 2 r+ 1]W N /2
rk k rk
X[k]=G[k]underbracealignc N/⏟
2 DFT ¿ +W N⋅H[k]underbracealignc N/⏟
k
2 DFT ¿ ¿¿
of even samples ¿ of odd samples ¿
Then repeat decomposition of N/2 to N/4 DFTs, etc.
PROGRAM
clear all;
clc;
close ;
N = 1024;
SQNR = 30; //SQNR = 30 dB
v = log2 (N); // number o f s t a g e s
b = ( log2 (10^( SQNR /10) ) +2* v)/2;
b = ceil (b)
disp(b, 'The number o f b i t s r e q u i r e d rounded to : ' )
x = [1 ,1 ,1 ,1 ,1 ,1 ,1 ,1];
X = fft(x , -1)
// I n v e r s e FFT
OUTPUT:
Enter the sequence x[n]= [1 1 1 1 1 1 1 1 ]
Enter the value N point= 8
N point DFT is X[k] =
36.0000
-4.0000 + 9.6569i
-4.0000 + 4.0000i
-4.0000 + 1.6569i
-4.0000 - 0.0000i
-4.0000 - 1.6569i
-4.0000 - 4.0000i
-4.0000 - 9.6569i
RESULT: Evaluate a 8 – point fft of given sequence x[n] and result show in figures.
THEORY:
Finite Impulse Response (FIR) Filter
FIR filters are digital filters with finite impulse response. They are also known as non-recursive
digital filters as they do not have the feedback (a recursive part of a filter), even though recursive
algorithms can be used for FIR filter realization. Hence it is an all zero filter. Therefore input and
output difference equation for FIR filter is given by
y(n)=b0x(n)+b1x(n−1)+b2x(n−2)+...+bM−1x(n−N+1)
Where b0, b1, b2 ... b(M-1) are filter coefficients. FIR filters are particularly useful for applications
where exact linear phase response is required. The FIR filter is generally implemented in a non-
recursive way which guarantees a stable filter.
The ideal filter frequency response is used when designing FIR filters using window functions. The
objective is to compute the ideal filter samples. FIR filters have finite impulse response, which
PROGRAM
clc ;
close ;
clear ;
RESULT: Thus FIR - LPF, HPF, BPF, BSF using Blackman AND Hamming Window Technique
was implemented using SCILAB.
AIM:Write a SCILAB Program to implementButterworth IIRanalog low pass filter for a 4KHz cut-
off frequency.
EQUIPMENTS:
Operating System - Windows 10
Software - SCILAB
THEORY:
The Butterworth filter provides a maximally flat response. However, this also has the advantage that
the calculations are somewhat simpler than those for other forms of filter.
This simplicity combined with a level of performance that is more than adequate for many
applications means that the Butterworth filter is widely used in many areas of electronics from RF to
audio active filters.
Using the equations for the Butterworth filter, it is relatively easy to calculate and plot the frequency
response as well as working out the values needed.
PROGRAM:
clc;
close ;
clear ;
mtlb_axis ([ -1 1 -1 1]) ;
xgrid();
plot ( pole_real , pole_imag , ' cya+' , ' marker ' , ' d ' , 'markerfac ' , ' r ed ' , ' markeredg ' , ' red ' );
title ( ' Pol e Lo c a t i o n ' , ' c o l o r ' , ' r ed ' , ' f o n t s i z e ' , 4);
xlabel ("Real Axi s " , " f o n t s i z e " , 2," c o l o r " , " blue ");
ylabel (" Imaginary Axi s " , " f o n t s i z e " , 2, " c o l o r " , "blue ");
Signal System Lab, Deptt. of ECE IIMT, Gr. NOIDA
As an Example, Value
RESULT: Thus, the Butterworth IIR analog low pass filter for a 4KHz cut-off frequency.
was designed using SCILAB.
Experiment No.-9
EQUIPMENTS:
Operating System - Windows 10
Constructor - Simulator
Software - Code Composer Studio
Theory: For DFT, time domain circular convolution implies frequency domain multiplication, and
vice versa.Consider a periodic sequence. Its DTFT is both periodic and discrete in frequency.
Multiplication in the frequency domain results in a convolution of the two corresponding periodic
sequences in the time domain. Now let’s consider a single period of the resulted sequence. Since the
two sequences are both periodic, the convolution appears as ‘folding’ the rear of a sequence to the
front one by one, and superimposing the inner products so obtained, in a single period.
Symbol for representing circular convolution: or N.If the DFT of x1[n], x2[n], and x3[n] are X1[k],
X2[k], and X3[k], respectively.Time domain circular convolution implies frequency domain
multiplication:
x 3 [ n ]=x 1 [n ]⊗ x 2 [ n]↔ X 3 [ k ]= X 1 [ k ] X 2 [ k ]
Program:
RESULT: - Thus the Circular Convolution was implemented using code composer studio.
EQUIPMENTS:
Operating System - Windows 10
Constructor - Simulator
Software - Code Composer Studio
Theory:
Program: