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System (CIPOS™)
IKCM15F60GA
Datasheet
Table of Contents
CIPOS™ Control Integrated POwer System ........................................................................................................ 3
Features .............................................................................................................................................................. 3
Target Applications ........................................................................................................................................... 3
Description ......................................................................................................................................................... 3
System Configuration ....................................................................................................................................... 3
Pin Configuration .................................................................................................................................................... 4
Internal Electrical Schematic ................................................................................................................................. 4
Pin Assignment ....................................................................................................................................................... 5
Pin Description .................................................................................................................................................. 5
HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) ................................................ 5
VFO (Fault-output and NTC, Pin 14) ................................................................................................................. 6
ITRIP (Over current detection function, Pin 15) ................................................................................................ 6
VDD, VSS (Low side control supply and reference, Pin 13, 16) ....................................................................... 6
VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) ............................................................................... 6
NW, NV, NU (Low side emitter, Pin 17 - 19) ..................................................................................................... 6
W, V, U (High side emitter and low side collector, Pin 20 - 22) ........................................................................ 6
P (Positive bus input voltage, Pin 23)................................................................................................................ 6
Absolute Maximum Ratings................................................................................................................................... 7
Module Section .................................................................................................................................................. 7
Inverter Section.................................................................................................................................................. 7
Control Section .................................................................................................................................................. 7
Recommended Operation Conditions .................................................................................................................. 8
Static Parameters ................................................................................................................................................... 9
Dynamic Parameters ............................................................................................................................................ 10
Bootstrap Parameters .......................................................................................................................................... 10
Thermistor ............................................................................................................................................................. 11
Mechanical Characteristics and Ratings............................................................................................................ 11
Circuit of a Typical Application ........................................................................................................................... 12
Switching Times Definition .................................................................................................................................. 12
Electrical characteristic ....................................................................................................................................... 13
Package Outline .................................................................................................................................................... 14
CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ-bridge 600V / 15A
Features Description
Fully isolated Dual In-Line molded module The CIPOS™ module family offers the chance for
integrating various power and control components
TrenchStop® IGBTs
to increase reliability, optimize PCB size and system
Rugged SOI gate driver technology with stability costs.
against transient and negative voltage It is designed to control three phase AC motors and
Allowable negative VS potential up to -11V for permanent magnet motors in variable speed drives
signal transmission at VBS=15V for applications like an air conditioning, a
refrigerator and a washing machine. The package
Integrated bootstrap functionality
concept is specially adapted to power applications,
Over current shutdown which need good thermal conduction and electrical
Temperature monitor isolation, but also EMI-save control and overload
protection.
Under-voltage lockout at all channels
Low side emitter pins accessible for all phase TrenchStop® IGBTs and anti parallel diodes are
combined with an optimized SOI gate driver for
current monitoring (open emitter)
excellent electrical performance.
Cross-conduction prevention
All of 6 switches turn off during protection
Lead-free terminal plating; RoHS compliant System Configuration
3 half bridges with TrenchStop® IGBTs and anti
parallel diodes
Target Applications
3Φ SOI gate driver
Dish washers
Thermistor
Refrigerators
Pin-to-heasink creepage distance typ. 1.6mm
Washing machines
Air-conditioners
Fans
Low power motor drives
Pin Configuration
Bottom View
Pin Assignment
Pin Number Pin Name Pin Description
1 VS(U) U-phase high side floating IC supply offset voltage
2 VB(U) U-phase high side floating IC supply voltage
3 VS(V) V-phase high side floating IC supply offset voltage
4 VB(V) V-phase high side floating IC supply voltage
5 VS(W) W-phase high side floating IC supply offset voltage
6 VB(W) W-phase high side floating IC supply voltage
7 HIN(U) U-phase high side gate driver input
8 HIN(V) V-phase high side gate driver input
9 HIN(W) W-phase high side gate driver input
10 LIN(U) U-phase low side gate driver input
11 LIN(V) V-phase low side gate driver input
12 LIN(W) W-phase low side gate driver input
13 VDD Low side control supply
14 VFO Fault output / Temperature monitor
15 ITRIP Over current shutdown input
16 VSS Low side control negative supply
17 NW W-phase low side emitter
18 NV V-phase low side emitter
19 NU U-phase low side emitter
20 W Motor W-phase output
21 V Motor V-phase output
22 U Motor U-phase output
23 P Positive bus input voltage
24 NC No Connection
Pin Description
HIN(U,V,W) and LIN(U,V,W) (Low side and high
side control pins, Pin 7 - 12) 5k
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility Figure 3: Input pin structure
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias inputs
during supply start-up and a zener clamp is
provided for pin protection purposes. Input Schmitt-
trigger and noise filter provide beneficial noise
rejection to short input pulses.
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according to
Figure 4. Figure 4: Input filter timing diagram
It is recommended for proper work of CIPOS™ not The IC shuts down all the gate drivers’ power
to provide input pulse-width lower than 1us. outputs, when the VDD supply voltage is below
VDDUV- = 10.4V. This prevents the external power
The integrated gate drive provides additionally a
switches from critically low gate voltage levels
shoot through prevention capability which avoids
during on-state and therefore from excessive power
the simultaneous on-state of two gate drivers of the
dissipation.
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3
and LO3). When two inputs of a same leg are VB(U,V,W) and VS(U,V,W) (High side supplies,
activated, only former activated one is activated so
Pin 1 - 6)
that the leg is kept steadily in a safe state.
VB to VS is the high side supply voltage. The high
A minimum deadtime insertion of typically 380ns is side circuit can float with respect to VSS following
also provided by driver IC, in order to reduce cross- the external high side power device emitter voltage.
conduction of the external power switches.
Due to the low power consumption, the floating
VFO (Fault-output and NTC, Pin 14) driver stage is supplied by integrated bootstrap
The VFO pin indicates a module failure in case of circuit.
under voltage at pin VDD or in case of triggered The under-voltage detection operates with a rising
over current detection at ITRIP. A pull-up resistor is supply threshold of typical VBSUV+ = 12.1V and a
externally required to bias the NTC. falling threshold of VBSUV- = 10.4V.
VS(U,V,W) provide a high robustness against
VDD negative voltage in respect of VSS of -50V
RON ,FLT
transiently. This ensures very stable designs even
VFO from ITRIP -Latch under rough conditions.
>1
from uv -detection NW, NV, NU (Low side emitter, Pin 17 - 19)
VSS
Thermistor The low side emitters are available for current
CIPOS™ measurements of each phase leg. It is
recommended to keep the connection to pin VSS as
Figure 5: Internal circuit at pin VFO short as possible in order to avoid unnecessary
inductive voltage drops.
The same pin provides direct access to the NTC,
which is referenced to VSS. An external pull-up W, V, U (High side emitter and low side collector,
resistor connected to +5V ensures, that the resulting Pin 20 - 22)
voltage can be directly connected to the These pins are motor U, V, W input pins
microcontroller.
P (Positive bus input voltage, Pin 23)
ITRIP (Over current detection function, Pin 15) The high side IGBT are connected to the bus
CIPOS™ provides an over current detection voltage. It is noted that the bus voltage does not
function by connecting the ITRIP input with the exceed 450 V.
motor current feedback. The ITRIP comparator
threshold (typ. 0.47V) is referenced to VSS ground.
An input noise filter (typ: tITRIPMIN = 530ns) prevents
the driver to detect false over-current events.
Over current detection generates a shut down of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
The fault-clear time is set to typical 65us.
Module Section
Value
Description Condition Symbol Unit
min max
Storage temperature range Tstg -40 125 °C
Insulation test voltage RMS, f = 60Hz, t =1min VISOL 2000 - V
Operating case temperature range Refer to Figure 6 TC -40 100 °C
Inverter Section
Value
Description Condition Symbol Unit
min max
Max. blocking voltage IC = 250µA VCES 600 - V
DC link supply voltage of P-N Applied between P-N VPN - 450 V
DC link supply voltage (surge) of P-N Applied between P-N VPN(surge) - 500 V
TC = 25°C, TJ < 150°C -15 15
Output current IC A
TC = 80°C, TJ < 150°C -10 10
Maximum peak output current less than 1ms IC -30 30 A
Short circuit withstand time1 VDC ≤400V, TJ = 150°C tSC - 5 µs
Power dissipation per IGBT Ptot - 27.4 W
Operating junction temperature range TJ -40 150 °C
Single IGBT thermal resistance,
RthJC - 4.57 K/W
junction-case
Single diode thermal resistance,
RthJCD - 4.96 K/W
junction-case
Control Section
Value
Description Condition Symbol Unit
min max
Module supply voltage VDD -1 20 V
High side floating supply voltage
VBS -1 20 V
(VB vs. VS)
VIN -1 10
Input voltage LIN, HIN, ITRIP V
VITRIP -1 10
Switching frequency fPWM - 20 kHz
1
Allowed number of short circuits: <1000; time between short circuits: >1s.
Value
Description Symbol min typ max Unit
ΔVBS, -1 1
Control supply variation - V/µs
ΔVDD -1 1
VIN 0 5
Logic input voltages LIN,HIN,ITRIP - V
VITRIP 0 5
Between VSS - N (including surge) VSS -5 - 5 V
2
Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.
Static Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
Description Condition Symbol Unit
min typ max
Iout = 10A
- 1.55 2.05
Collector-Emitter saturation voltage TJ = 25°C VCE(sat) V
- 1.85 -
150°C
Iout = -10A
- 1.55 2.05
Emitter-Collector forward voltage TJ = 25°C VF V
- 1.6
150°C
Dynamic Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
Description Condition Symbol Unit
min typ max
Turn-on propagation delay time ton - 560 - ns
Turn-on rise time VLIN,HIN = 5V; Iout = 10A, tr - 25 - ns
Turn-on switching time VDC = 300V tc(on) 100 ns
Reverse recovery time trr 150 ns
Turn-off propagation delay time toff - 800 - ns
VLIN,HIN = 0V; Iout = 10A,
Turn-off fall time tf - 70 - ns
VDC = 300V
Turn-off switching time tc(off) 120 ns
Short circuit propagation delay time From VIT,TH+ to 10% ISC tSCP - 1200 - ns
Input filter time ITRIP VITRIP = 1V tITRIPmin 530 ns
Input filter time at LIN, HIN for turn
VLIN,HIN = 0V & 5V tFILIN 290 - ns
on and off
Fault clear time after ITRIP-fault VITRIP = 1V tFLTCLR 40 65 200 µs
Deadtime between low side and high
DTPWM 1.5 - - µs
side
Deadtime of gate drive circuit DTIC 380 ns
VDC = 300V, IC = 10A,
IGBT turn-on energy (includes - 205 -
TJ = 25°C Eon µJ
reverse recovery of diode) - 295 -
150°C
VDC = 300V, IC = 10A,
- 180 -
IGBT turn-off energy TJ = 25°C Eoff µJ
- 270 -
150°C
VDC = 300V, IC = 10A,
- 70 -
Diode recovery energy TJ = 25°C Erec µJ
- 120 -
150°C
Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)
Value
Description Condition Symbol Unit
min typ max
Repetitive peak reverse
VRRM 600 V
voltage
VS2 or VS3 = 300V, TJ = 25°C 35
Bootstrap resistance of VS2 and VS3 = 0V, TJ = 25°C 40
RBS1
U-phase1 VS2 or VS3 = 300V, TJ = 125°C 50
VS2 and VS3 = 0V, TJ = 125°C 65
Reverse recovery time IF = 0.6A, di/dt = 80A/µs trr_BS 50 ns
Forward voltage drop IF= 20mA, VS2 and VS3 = 0V VF_BS 2.6 V
1
RBS2 and RBS3 have same values to RBS1.
Thermistor
Value
Description Condition Symbol Unit
min typ max
Resistor TNTC = 25°C RNTC - 85 - k
B-constant of NTC
B(25/100) - 4092 - K
(Negative temperature coefficient)
3500
35
Thermistor resistance [kΩ ]
3000 Min.
30
Typ.
Thermistor resistance [kΩ ]
Max.
25
2500
20
2000 15
10
1500
5
1000 0
50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
Thermistor temperature [℃]
500
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Thermistor temperature [℃]
HINx
2.1V
LINx
0.9V
trr
toff ton
10%
iCx
90% 90%
tf tr
10% 10%
10% 10%
vCEx
tc(off) tc(on)
Electrical characteristic
30 30 30
TJ=25 ℃ V DD =15V
27 27 27
Ic, Collector - Emitter current [A]
21 21 21
18 18 18 TJ=25 ℃
TJ=150℃
15 15 15
12 V DD =15V 12 12
V DD =20V
9 9 TJ=25℃ 9
6 6 TJ=150 ℃ 6
3 3 3
0 0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
V CE(sat), Collector - Emitter voltage [V] V CE(sat), Collector - Emitter voltage [V] V F, Emitter - Collector voltage [V]
Typ. Collector – Emitter saturation voltage Typ. Collector – Emitter saturation voltage Typ. Emitter – Collector forward voltage
2.0 1.0 40 0
Eoff, Turn off switching energy loss [mJ]
Eon, Turn on switching energy loss [mJ]
0.8 0.4
15 0
0.6 0.3
10 0
0.4 0.2
50
0.2 0.1 V D C =300V
V D D =15V
0.0 0.0 0
0 3 6 9 12 15 18 21 24 27 30 0 3 6 9 12 15 18 21 24 27 30 0 3 6 9 12 15 18 21 24 27 30
Ic, C ollector current [A] Ic, C ollector current [A] Ic, C ollector current [A]
Typ. Turn on switching energy loss Typ. Turn off switching energy loss Typ. Reverse recovery energy loss
80 0 40 0 140 0
toff, Turn off propagation delay time [ns]
ton, Turn on propagation delay time [ns]
V D D =15V 35 0
V D D =15V 130 0 V D D =15V
75 0
High side @ T J =25 ℃ H igh side @ T J=25 ℃
High side @ T J =150 ℃ 30 0 H igh side @ T J=150 ℃ 120 0
High side @ T J =25 ℃
70 0
Low side @ T J =25 ℃ Low side @ T J=25 ℃ High side @ T J =150 ℃
Low side @ T J =150 ℃ 25 0 110 0
Low side @ T J=150 ℃ Low side @ T J =25 ℃
65 0
Low side @ T J =150 ℃
20 0 100 0
60 0
15 0 90 0
55 0
10 0 80 0
50 0
50 70 0
45 0 0 60 0
0 3 6 9 12 15 18 21 24 27 30 0 3 6 9 12 15 18 21 24 27 30 0 3 6 9 12 15 18 21 24 27 30
Ic, C ollector current [A] Ic, C ollector current [A] Ic, C ollector current [A]
Typ. Turn on propagation delay time Typ. Turn on switching time Typ. Turn off propagation delay time
50 0 55 0 10
V D C =300V
50 0
tc(off), Turn off switching time [ns]
V D C =300V
, transient thermal resistance [K/W]
45 0 V D D =15V
V D D =15V
trr, Reverse recovery time [ns]
45 0 1
High side @ T J =25 ℃
40 0
40 0 High side @ T J =150 ℃
35 0 Low side @ T J =25 ℃
35 0
High side @ T J=25 ℃ Low side @ T J =150 ℃ 0 .1
30 0 High side @ T J=150 ℃ 30 0
D : d u ty ratio
Low side @ T J =25 ℃ D = 50%
25 0 25 0 D = 20%
Low side @ T J =150 ℃ 0 .0 1 D = 10%
20 0
20 0 D = 5%
15 0 D = 2%
15 0 S in g le p ulse
1 E -3
thJC
10 0
Z
10 0
50
50 0 1 E -4
0 3 6 9 12 15 18 21 24 27 30 0 3 6 9 12 15 18 21 24 27 30 1 E -7 1 E -6 1 E -5 1 E -4 1 E -3 0 .0 1 0 .1 1 10 100
Ic, C ollector current [A] Ic, C ollector current [A] t P , P u ls e w id th [s e c .]
Typ. Turn off switching time Typ. Reverse recovery time IGBT transient thermal resistance at all six
IGBTs operation
Package Outline
Revision History
Previous Version: Datasheet Ver. 1.1
Major changes since the last revision
Page or Reference Description of change
8 Figure 6 updated
14 Package Outline updated
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