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The RGB LED (D2) will turn on green, indicating that The USB charge current is set to 51mA. This allows charg-
the demo is running. The on-board microphone starts ing from both powered and unpowered USB hubs with no
listening for the keyword GO. When the keyword GO is port communication required. Refer to the MAX20303
detected, RGB LED (D2) will turn on yellow. In this mode, data sheet and the data sheet for your battery to ensure
when one of nine keywords is detected, the RGB LED compatibility.
(D1) starts to blink blue one to nine times based on the Programming and Debugging
number detected by the convolutional neural network.
The MAX32625 microcontroller on the board is pre-
The STOP command exits number keyword detection,
programmed with DAPLink firmware. It allows debugging
and the RGB LED (D2) turns on green again, and RGB
and programming of the MAX78000 Arm core over USB.
LED (D1) turns off.
A standard 10-pin JTAG header J1 allows debugging and
PMIC and Battery Charger programming the RISC-V core of the MAX78000.
The MAX20303 wearable PMIC powers the
MAX78000FTHR board and is also capable of charging a
Pushbuttons
Li-Ion battery (not included). The MAX20303 has an inter- There are five pushbuttons on the MAX78000FTHR
nal MOSFET that connects the battery to system output board:
when no voltage source is available on the charge input SW1 User-programmable function button connected to
(USB). When an external source is detected at the charge the MAX78000 Port 0.2 through a debouncer IC.
input (USB), this switch opens and the system output is SW2 User-programmable function button connected to
powered from the input source through the input current the MAX78000 Port 1.7 through a debouncer IC.
limiter. The system output to battery switch also prevents
the system output voltage from falling below battery volt- SW3 PMIC Power Button
age when the system load exceeds the input current limit. When the board is in a powered-on state, press-
The smart power selector unit inside the PMIC seamlessly ing this button for 12 seconds performs a hard
distributes power from the charge input (USB) to the bat- power-down.
tery and system output. With both the USB and battery When the board is in a powered-off state, pressing
connected, the smart power switch's basic functions are: this button powers on the board.
This button can also be read by the MAX78000
●● When the system load requirements are less than firmware, PMIC_PFN2 signal connected to the
the input current limit, the battery is charged with Port 3.1 is a buffered input of the button status.
residual power from the input. When the button is pressed, this signal goes to a
●● When the system load requirements exceed the input logic-low state.
current limit, the battery supplies supplemental cur- SW4 Resets the MAX78000 through RSTN input of the
rent to the load. MAX78000.
●● When the battery is connected, and there is no exter- SW5 DAPLink adapter button. Keep this button
nal power input (USB), the system is powered from pressed while applying power to the board to
the battery. put the MAX32625 DAPLink adapter on board
●● When the MAX20303 thermal limits are reached, the to MAINTENANCE mode for DAPLink firmware
charger does not shut down, but attempts to limit a updates.
temperature increase by reducing the input current
from charge input. In this condition, the system load LEDs
has priority over the charger current, so the input cur- There are three RGB LEDs on the MAX78000FTHR
rent is first reduced by lowering the charge current. If board.
D1 Connected to the MAX78000 GPIO ports. This D3 DAPLink adapter MAX32625 status LED.
LED can be controlled by user firmware. Controlled by the DAPLink adapter and cannot be
Port 2.0 : Red color used as a user LED.
Port 2.1 : Green color
Port 2.2 : Blue color
D2 Connected to MAX20303 PMIC LEDx outputs.
These LEDs can be controlled through I2C com-
mands. They also can be configured as charge
status indicators by issuing I2C commands.
Expansion Headers
Table 1. J8 Pinout
PIN NAME DESCRIPTION
1 RST Master Reset Signal
2 3V3 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers
3 1V8 1.8V Output. Typically used to provide 1.8V to peripherals connected to the expansion headers
4 GND Ground
5 P2_3 GPIO or Analog Input (AIN3 channel)
6 P2_4 GPIO or Analog Input (AIN4 channel)
7 P1_1 GPIO or UART2 Tx signal
8 P1_0 GPIO or UART2 Rx signal
9 MPC1 GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable
10 MPC2 GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable
11 P0_7 GPIO or QSPI0 clock signal. Shared with SD card and on-board QSPI SRAM
12 P0_5 GPIO or QSPI0 MOSI signal. Shared with SD card and on-board QSPI SRAM
13 P0_6 GPIO or QSPI0 MISO signal. Shared with SD card and on-board QSPI SRAM
14 P2_6 GPIO or LPUART Rx signal
15 P2_7 GPIO or LPUART Tx signal
16 GND Ground
Table 2. J4 Pinout
PIN NAME DESCRIPTION
SYS Switched Connection to the Battery. This is the primary system power supply and automatically
1 SYS
switches between the battery voltage and the USB supply when available.
2 PWR Turns off the PMIC if shorted to Ground for 13 seconds. Hard power-down button.
USB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be
3 VBUS used as an input to power the board, but this should only be done when not using the USB connector
since there is no circuitry to prevent current from flowing back into the USB connector.
4 P1_6 GPIO
5 MPC3 GPIO controlled by PMIC through the I2C interface. Open drain or push-pull programmable.
6 P0_9 GPIO or QSPI0 SDIO3 signal. Shared with SD card and on-board QSPI SRAM.
7 P0_8 GPIO or QSPI0 SDIO2 signal. Shared with SD Card and on-board QSPI SRAM.
8 P0_11 GPIO or QSPI0 slave select signal.
9 P0_19 GPIO
10 P3_1 GPIO or Wake-up signal. This pin is 3.3V only.
GPIO or I2C1 SCL signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through
11 P0_16
R15 or R20 resistors. Do not populate both.
GPIO or I2C1 SDA signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through
12 P0_17
R15 or R20 resistors. Do not populate both.
Ordering Information
PART TYPE
MAX78000FTHR# Application Platform
#Denotes RoHS compliance.
I2 C
MAX9867
MAX32625 UART
MICRO USB-B CONNECTOR
MAX78000
ARM® CORTEX® M4F MCU SWD
N01S830HAT22I
1MB SRAM QSPI
SPH0645LM4H-B
I2 S
DIGITAL MICROPHONE
OVM7692-RYAA I2 C
IMAGE SENSOR
PCIF
SW3
EVP-AA102K
1V8
1
3
1V8
TEST POINT FOR
PMIC RST_N
5 74437324022
POWER BUTTON L8
R34 U7 R32 1 2
TP2
10K 10K
MAX20303BEWN+ 2.2UH
2
4
U8
PMIC_ALRT_N E6 ALRT RST F6 RST_N
MAX38642AELT+ VCOREA
D5 CTG PFN2 E2 PMIC_PFN2 SYS_OUT
2 LX OUT 5
D6 QSTRT PFN1 D2 PMIC_PFN1
1 IN
C6 CELL VDIG D4
GND 3
VBUS C60
0.1UF E4 6 4
CAP EN RSEL
H5 F4 R36
CHGIN TPU
F3 F5 10K
SET THM C69 C71 C73 C75
3V3_VUSB H3 0.1UF 22UF R37 0.1UF 22UF
BAT
383K
SYS_OUT
VBATT BATTERY CONNECTOR
1
F2 SFOUT SYS A4 J9
R35 1
H4 2V8
C58 39K C59 SYS C62 C66 RT1 C61 C67
1V8 2
1UF 22UF B6 22UF 2.2UF C68 10K 22UF 4.7UF
L2IN
2.2UF
I2C1_SCL B1 A5 C25
SCL L2OUT S2B-PH-K-S(LF)(SN)
22UF P2_5_BOOST_EN
I2C1_SDA B2 1V2
R30 SDA
2
L5
10K PMIC_INT G2 H71 2 1V2 CNN POWER BOOST FOR MAX78000
INT BK1LX
C5 2.2UH
SD_VDD_EN_N MPC0 BK1OUT G7
CHARGE CURRENT:51MA PMIC_MPC1 C4 1V8 1V8_MIC C64
MPC1
22UF
PMIC_MPC2 G4 MPC2 L1IN G6
CPP B3
1.2V CORE VOLTAGE FOR DAPLINK MCU U10
CPN B4 BUCK1 : MAX38643AELT+ 3V3_VREGI
D2 1.8V IO VOLTAGE FOR DAPLINK MCU SYS_OUT
MAX78000FTHR Application Platform Schematics
SYS_OUT BUCK2 : 2 5
SML-LX0404SIUPGUSB LX OUT
A2 DRP BSTLVLX H2
1 IN
PMIC_LED2 A1 DRN BSTHVLX H1 LDO2 LV : 2.8V 2.8V FOR THE IMAGE SENSOR GND 3
G 4
BSTOUT F1 DO NOT ENABLE BEFORE ADJUSTING
6 EN RSEL 4
PMIC_LED0 PMIC_LED0 E1 LED0 SET VOLTAGE TO 2.8V !!!
1 + B 3
PMIC_LED1 D1 LED1 BBLVLX F7
PMIC_LED1 PMIC_LED2 C1 E7 DO NOT SET ABOVE 2.8V !!! C70 C72 C74 C76
LED2 BBHVLX
0.1UF 22UF R38 0.1UF 22UF
R 2
BBOUT C7 56.2K
DGND
AGND
GSUB
HDGND
BK1GND
BK2GND
BSTGND
BBGND
E5
A3
A6
D3
C2
H6
D7
G1
PMIC RGB LED
Maxim Integrated │ 11
QSPI SRAM USER BUTTONS RGB LED
www.maximintegrated.com
1
3
MAX78000FTHR
5
3V3_VREGI
D1
Application Platform
SML-LX0404SIUPGUSB
2
4
3V3_VREGI U11
5
MAX6817EUT+ SW1
U9 EVP-AA102K 3V3_VREGI
8
P2_0_LED_R 2 R
N01S830HAT22I VCC
P0_2_BUTTON1 6 1 R8 2.7K
VCC OUT1 IN1
P2_2_LED_B 3 B + 1
SI/SIO0 5 SD_SPI_DI
SD_SPI_SCLK 6 SCK R9 1.4K
P1_7_BUTTON_2 4 OUT2 IN2 3
SO/SIO1 2 SD_SPI_DO
P2_1_LED_G 4 G
NC/SIO2 3 QSPI0_SDIO2 GND
SRAM_CS 1 CS R10 1K
HOLD/SIO3 7 QSPI0_SDIO3 3V3_VREGI
2
1
3
VSS
3V3_VREGI
C79
4
0.1UF
C87 5
0.1UF
2
4
SW2
EVP-AA102K
1V8 3V3_VREGI
J8
PBC16SAAN
J6
475710001
PACKOUT PACKOUT
SD_SPI_DO P7 DAT0
P8 DAT1
P1 DAT2
SD_SPI_CS P2 CD/DAT3
SD_SPI_DI P3 CMD
1V8 1V8 3V3_VREGI 1V8
SD_SPI_SCLK P5 CLK
R15
SD_VDD_EN_N P4 VDD
0
C51 C52
MAX78000FTHR Application Platform Schematics (continued)
1
10K G4 POL 0 DNI
SD_DET G5 DET
1
8
G
DO NOT POPULATE R15 AND R20 BOTH
D
2 3
S
U6
G1 GND VL VCC MAX14595ETA+
4 /TS
Q1 G2 GND
SSM3J327R,LF G3
C57 GND I2C1_SDA 3 6 I2C_SDA_FTHR
IOVL1 IOVCC1
0.1UF
GND
5
Maxim Integrated │ 12
IMAGE SENSOR
VREGO_A
MAX78000
U4
3V3_VREGI
R2
MAX78000EXG+
10K
PCIF_XVCLK TP5
www.maximintegrated.com
PCIF_IO0 C41 C11
VREGI : 3.3V
P0_3_CAM_PDOWN H8 P0.3/CLKEXT/TMR0_1/UART0_RTS
2V8 PCIF_IO1 1UF 47UF
SD_SPI_CS J7 P0.4/QSPI0_SS0/TMR0_0B/TMR0_CAPEVENT0
H7 A9
MAX78000FTHR
E5
E1
D3
D1
E3
C3
22UF 1UF 0.1UF QSPI0_SDIO2 G6 P0.8/QSPI0_SDIO2/TMR0_0
D0
D1
QSPI0_SDIO3 F6 P0.9/QSPI0_SDIO3/TMR0_1
E2 PCIF_IO2 L1
Application Platform
D2
PCLK
HREF
A2 AVDD
XVCLK
VSYNC
SRAM_CS E6 P0.10/I2C0_SCL/QSPI0_SS2 LXA B9 1 2
D3 D2 PCIF_IO3 MLP2012H2R2MT0S1
A1 NC 2.2UH
QSPI0_SS1 D6 P0.11/I2C0_SDA/QSPI0_SS1
D4/MCP D5 PCIF_IO4
B4 NC SD_DET H5 P0.12/UART1_RX/TMR1_0B/TMR1_CAPEVENT0
D5/MCN C5 PCIF_IO5
A4 VREF1 P0_13_INTCDC G5 P0.13/UART1_TX/TMR1_1B/TMR1_CAPEVENT1
D6/MDP A5 PCIF_IO6
B3 VREF2 AUD_CODEC_CLK F5 P0.14/TMR1_0/I2S_CLKEXT LXB A8
D7/MDN B5 PCIF_IO7
A3 AGND C16
PCIF_VSYNC E5 P0.15/TMR1_1/PCIF_VSYNC
EGND C4 3300PF
DOGND
DVDD
DOVDD
PWDN
SIOC
SIOD
1V8 1V8 I2C1_SCL D5 P0.16/I2C1_SCL/PT2 VBST C8
I2C1_SDA H4 P0.17/I2C1_SDA/PT3
E4
B1
B2
D4
C2
C1
PCIF_XVCLK G4 VCOREA
P0.18/PT0/OWM_IO VREGO_A VREGO_B
P0_19_GPIO F4 P0.19/PT1/OWM_PE
PCIF_IO0 E4 P0.20/QSPI1_SS0/PCIF_IO0
C15 C19 C20
1V8 R3 R12 PCIF_IO1 D4 P0.21/QSPI1_MOSI/PCIF_IO1 22UF 22UF 22UF
2.2K 2.2K PCIF_IO2 J3 P0.22/QSPI1_MISO/PCIF_IO2
PCIF_IO3 H3 P0.23/QSPI1_SCK/PCIF_IO3 VREGO_A B8
I2C2_SDA
C1 C3 C6 C7 PCIF_IO4 G3 P0.24/QSPI1_SDIO2/PCIF_IO4
I2C2_SCL
0.1UF 0.1UF 0.1UF 0.1UF PCIF_IO5 F3 A7
P0_3_CAM_PDOWN P0.25/QSPI1_SDIO3/PCIF_IO5 VREGO_B
PCIF_IO6 E3 P0.26/TMR2_0/PCIF_IO6
PCIF_IO7 J2 P0.27/TMR2_1/PCIF_IO7 VREGO_C B7
I2C ADDRESS : 0X78 - 0X79 SWDIO H2 P0.28/SWDIO VREGO_C >> VCOREA
SWDCLK J1 P0.29/SWCLK
I2C2_SCL H1 P0.30/I2C2_SCL/PCIF_IO8
I2C2_SDA G2 P0.31/I2C2_SDA/PCIF_IO9
VCOREA
P1_0_RV_TCK G1 P1.0/UART2_RX/RV_TCK
P1_1_RV_TMS F1 P1.1/UART2_TX/RV_TMS
I2S_SCK/RV_TDI F2 P1.2/I2S_SCK/RV_TDI
I2S_WS/RV_TDO E2 C9 C17 C53 C55
ARM SWD P1.3/I2S_WS/RV_TDO
0.1UF 1UF 0.1UF 1UF
I2S_SDI D2 P1.4/I2S_SDI/TMR3_0
I2S_SDO D3 P1.5/I2S_SDO/TMR3_1 VCOREA D9
R29
100K
J2 PCIF_HSYNC A2 VREGO_B
SWDIO P1.8/PCIF_HSYNC/RXEV0
FTSH-105-01-L-DV-K
PCIF_XCLK B2 P1.9/PCIF_XCLK/TXEV0
1 2 SWDCLK P2_0_LED_R D7 P2.0/AIN0 / AIN0N VCOREB D8 C12 C18
3 4
5 6 P0_1_UART0_TX P2_1_LED_G E8 0.1UF 1UF VCOREB = VREGO_B
P2.1/AIN1 / AIN0P
7 8
P2_2_LED_B E7 P2.2/AIN2 / AIN1N
9 10 P0_0_UART0_RX
P2_3_AIN F9 P2.3/AIN3 / AIN1P
EXTERNAL_RST P2_4_AIN F8 P2.4/AIN4 / AIN2N/LPTMR0
DNI VREGO_A
P2_5_BOOST_EN F7 P2.5/AIN5 / AIN2P/LPTMR1
P2_6_UART_RX G8 P2.6/LPTMR0_CLK/AIN6 / AIN3N/LPUART_RX VDDA C7
RISC-V JTAG
VREGO_A J4
VDDIOH
A3 3V3_VREGI
VDDIOH
VDDIOH C1
5
SIGNAL SN74LVC1G07DCK
VSS A6 VDDIO = VREGO_A = 1V8
VCC
VSS J6
1
3
MAX78000FTHR Application Platform Schematics (continued)
GND NC
3
1
RSTN IS INTERNALLY PULLED UP TO VDDIOH
5
APPROX 25KOHM
TEST POINTS
2
4
SW4
EVP-AA102K
I2S_SDO TP1
P0_0_UART0_RX TP3
P0_1_UART0_TX TP4
Maxim Integrated │ 13
AUDIO - LOW-POWER STEREO AUDIO CODEC - STEREO LINE IN AND LINE OUT AUDIO - DIGITAL MICROPHONE
www.maximintegrated.com
MAX78000FTHR
1V8
12.288MHZ CLOCK IS
SHARED BY THE CODEC
AND AUDIO MAX78000
Application Platform
Y1
4
12.2880MHZ
VCC
C24
0.1UF GND 1V8
R17
2
2.2K
1V8
1V8
R18
2.2K
1V8
1V8
R13
10K
P0_13_INTCDC
I2C1_SDA
I2C1_SCL
I2S_SCK/RV_TDI
I2S_WS/RV_TDO
I2S_SDO
I2S_SDI
J7 VDD
SJ-3523-SMT WS 1 I2S_WS/RV_TDO
E1
C3
A3
B3
B2
B1
C1
C2
D1
A1
A4
A5
E2
BCLK 4 I2S_SCK/RV_TDI
1 SLEEVE
U5
IRQ
SCL
SDA
6 I2S_SDI
SDIN
DATA
BCLK
MCLK
AVDD
PVDD
RING
DVDD
PREG
3
LRCLK
SDOUT
MAX9867EWV+
DVDDIO
B4 REF SEL 2
C34 GND
220UF
B5 E3 2 TIP
3
REG LOUTP
C5 MICLN/DIGMICCLK ROUTN E4
C32 C37
1UF 220UF
C4 MICRP WS OPERATION
D6 MICRN JACKSNS/AUX D4
0 DRIVES DATA
E6 LINR
DGND
AGND
PGND
A2
A6
E5
GND REF NEAR I2C ADDRESS: 0X30 - 0X31
AUDIO JACK I2S IS BY DEFAULT :SLAVE
C48 C49
1UF 1UF LRCLK AND BCLK ARE INPUTS
J5
SJ-3523-SMT
1 SLEEVE
LINE_IN_RIGHT 3 RING
MAX78000FTHR Application Platform Schematics (continued)
LINE_IN_LEFT 2 TIP
STEREO LINE IN
3.5MM AUDIO JACK
Evaluates: MAX78000
Maxim Integrated │ 14
TAG-CONNECT CABLE PADS
www.maximintegrated.com
FOR MAX3262 SWD
1V8
MAX78000FTHR
J3
TC2050-IDC-NL
1 10 DBG_SRST
DBG_SWD 2 9
3 8 DBG_RX
Application Platform
SHIELD
P0.1 B2
10 C4
GND 5
1.0UF P0.2 A1
11
1
P0.3 C4
P0.5 B1 D3 3V3_VUSB
3 I/O1 I/O2 4
DBG_SRST A3 SRSTN SML-LX0404SIUPGUSB
P0.6 D4
R1 U3 P0.7 C2
GND NC NC
MAX13202EALT+ R_LED R4 2.7K 2 R
6
2
5
1M DBG_SWC B4 TCK/SWCLK
P1.0 D3
L3 DBG_SWD B5 TMS/SWDIO/IO R5 1.4K +
P1.1 E4 B_LED 3 B 1
220 B6
1 2 TDO D2
P1.2
B7 TDI R6 1K
P1.3 E3 G_LED 4 G
P1.4 E2
P1.5 F2
P1.6 F1
P1.7 F3
P2.0 G1 DBG_RX
RST_N B3 RSTN
P2.1 G2 DBG_TX
G3 DAPLINK FIRMWARE UPDATE BUTTON
P2.2
F4 SW5
P2.3
EVP-AA102K
1V8 P2.4 G4 R_LED
1
3
P2.5 E5 G_LED
C9 VRTC
P2.6 F5 B_LED
A8 VDD18
P2.7 G5 5
E1 VDD12
D8 VDDIO
1V8 P3.0 E6 P0_1_UART0_TX
C1
2
4
P3.5 G7
C39 C43 C44 C47 C50 F7
P3.6
1UF 1UF 1UF 1UF 1UF
Y2 P3.7 G8 EXTERNAL_RST
1 2 B9 32KOUT
32.768KHZ A9 32KIN
P4.0 G9
P4.1 E7
P4.2 F8
P4.3 F9
3V3_VUSB DP E8 DP D7
P4.4
DM E9 DM
P4.5 C5
D9 VDDB
P4.6 C6
P4.7 C7 VREGO_A
C38
MAX78000FTHR Application Platform Schematics (continued)
1UF A4
AIN0
AIN1 A5
AIN2 A6
AIN3 A7
Evaluates: MAX78000
Maxim Integrated │ 15
MAX78000FTHR Evaluates: MAX78000
Application Platform
Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
0 11/20 Release for market intro —
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2020 Maxim Integrated Products, Inc. │ 16