Introduction to Mechatronics

Chapter 5

Digital Logic
Digital versus Analog
▪ Digital System recognizes, processes and outputs only a finite or discrete
number of values (say, 0, 1, 3, 5) of some parameter.
✓E.g.: A digital watch recognizes, processes and displays only some discrete
time values (say, up to a precision of 1 second) between 0:00 and 24:00
hours, for example, 2:32:44 pm
▪ An Analog System recognizes, processes and outputs a continuum
(infinite number) of values of some parameter within a specified range.
✓E.g.: An analog watch "displays" all times between 0:00 and 24:00 hours,
for example, 2:32:44.375 pm (though you may not be able to detect it!)
Digital control
▪ There are two input signals which are either yes or no signals and an output
signal which is a yes or no signal.
▪ For example, with the domestic washing machine, the heater is only switched
on when there is water in the drum and it is to the prescribed level.
▪ Such an operation is said to be controlled by a logic gate
Logic gates
▪ Are the basic building blocks for digital electronic circuits
▪ Can be classified into:
✓Basic logic gates
✓Combinational logic gate: combining of two or more basic logic gates to
form a required function.
✓Sequential logic gates:
 1. Basic logic gates

There 3 basic logic gates

➢AND Gate
➢OR Gate
➢NOT Gate
AND gate
❖Is a logic circuit having two or more inputs and one output.
❖The output of an AND gate is HIGH (1) only when all of its inputs are in the
HIGH state. In all other cases, the output is LOW (0).
❖Representation is given as follow:

(a) represented by switches (b) US symbols (c) new standardized symbols.

AND gate Truth table
Inputs Output Example: an interlock control system for a
A B Q machine tool such that if the safety guard is in
0 0 0 place (gives a 1 signal) and the power is on
0 1 0 (giving a 1 signal), then there can be an
1 0 0
output ( a 1 signal), and the machine
operates.
1 1 1
OR Gate
➢An OR gate is a logic circuit with two or more inputs and one output.
➢The output of an OR gate is LOW (0) only when all of its inputs are LOW (0).
➢For all other possible input combinations, the output is HIGH (1).
OR Gate representation

(a) representation by switches (b) symbols (c) timing diagram.

OR Gate Truth table
Inputs Output Example
A B Q ❖ Conveyor belt transporting bottled
0 0 0
products to packaging where a deflector
plate is activated to deflect bottles into a
0 1 1
reject bin if either the weight is not within
1 0 1
certain tolerances or there is no cap on the
1 1 1
bottle.
NOT Gate
➢ A NOT gate is a one-input, one-output logic circuit whose output is always
the complement of the input.
➢ i.e. LOW (0) input produces a HIGH (1) output, and vice versa.
NOT Gate Representation

NOT Gate Truth table

Example
Input Output ❖ A light that comes on when it becomes dark, i.e.
A Q when there is no light input to the light sensor
0 1 there is an output.
1 0
2. Combinational logics
▪ NAND gate: a combination of an AND gate followed by a NOT gate
➢The NAND gate is just the AND gate truth table with the outputs inverted.
➢The symbol used for NAND gate is AND symbol followed by the circle to indicate
inversion.
NAND gate Truth table
Inputs Output
A B Q
0 0 1
0 1 1
1 0 1
1 1 0
Example
❖ Warning light that comes on, with a machine tool, if the safety guard switch has
not been activated and the limit switch signaling the presence of the workpiece has
not been activated.
Cont..
▪ NOR gate: Is a combination of an OR gate followed by a NOT gate
➢It is just the OR gate with the outputs inverted.
➢An alternative way of considering the gate is as an OR gate with a NOT
gate applied to invert both the inputs before they reach the AND gate.
NOR Gate Truth table
Inputs Output
A B Q
0 0 1
0 1 0
1 0 0
NOR gate symbol 1 1 0

Example: the actuator open the gate when COVID 19 signals

detectors either fever or coughing and both are deactivated.
Cont..
▪ XOR gate: also known as EXCLUSIVE-OR gate
• It is the combination of the three basic logic gates (AND, OR & NOT) as
shown in the following figure.
XOR Gate Truth table
Inputs Output
A B Q
0 0 0
0 1 1
1 0 1
1 1 0
Figure
✓ The output of an EX-OR gate is a logic ‘1’ when the inputs are
unlike and a logic ‘0’ when the inputs are like.
3. Sequential logic
▪ Requires an output which depends on earlier values of the inputs.
▪ The main difference between a combinational logic system and a sequential
logic system is that the sequential logic system must have some form of
memory.
Working Principle
✓ The combinational part of the system accepts
logic signals from external inputs and from
the memory.
✓ The combinational system then operates on
these inputs to produce its outputs.
✓ The outputs are thus a function of both its
external inputs and the information stored in
Fig: Sequential logic system. its memory.
 Cont..
❑Flip-flop: is a basic memory element which is made up of an assembly of
logic gates and is a sequential logic device.
• From the different forms of flip-flop SR (set–reset) is the one which involves
NOR gates. ✓ If initially we have both outputs 0 and S = 0 and R = 0, then
when we set and have S change from 0 to 1, the output from
NOR gate 2 will become 0.
✓ This will then result in both the inputs to NOR gate 1
becoming 0 and so its output becomes 1.
✓ This feedback acts as an input to NOR gate 2 which then has
both its inputs at 1 and results in no further change.
✓ There is no change in the outputs when the input S changes
Fig: SR flip-flop. from 1 to 0.
❖ Note that if S and R are ✓ If we change R from 0 to 1 when S is 0, the output from
NOR gate 1 changes to 0 and hence the output from NOR
simultaneously made equal to 1, no
gate 2 changes to 1.
stable state can occur and so this input ✓ The flip-flop has been reset.
condition is not allowed.
Cont..
• Synchronous systems: the exact times at which any output can change state
are determined by a signal termed the clock signal.
✓ The set and clock signal are supplied through an
AND gate to the S input of the flip-flop.
✓ Thus, the set signal only arrives at the flip-flop
when both it and the clock signal are 1.
✓ Likewise, the reset signal is supplied with the
clock signal to the R input via another AND gate.
✓ Consequently, setting and resetting can only occur
at the time determined by the clock.
Thank you!!!