Fast and Configurable Architectures for Direct and Inverse

Discrete Wavelet Packed Transform

Mouhamad CHEHAITLY1, Mohamed TABAA2, Fabrice MONTEIRO1, Abbas DANDACHE1
1 Laboratoire de Génie Industriel de Production et Maintenance (LGIPM)
Université de Lorraine, Metz, France
2 Laboratoire Pluridisciplinaire de Recherche et Innovation (LPRI),
École Marocaine des Sciences de l’Ingénieur (EMSI), Casablanca, Moroco
{mouhamad.chehaitly,fabrice.monteiro,abbas.dandache}@univ-lorraine.fr, med.tabaa@gmail.com

Introduction  Figure 1. Mallat [1] tree of DWPT with data rates.  Figure 4. DWPT buffer structure.
 Objective:
 New impulse modulation/ multiplexing technique can
applied in Wireless Sensor Network (WSN), this technique
is based of wavelet packet transform (WPT).
 Design a high speed and configurable architecture of
WPT.
 Issues :
 Low power consummation of hardware to implement in
WSN environment..  Figure 2. Mallat [1] tree of IDWPT with data rates.  Figure 5. DWPT/IDWPT filter in stage 1.
 Increase computing speed with decrease hardware
resource
 Finding a configurable architecture independent of
different wavelet functions.
 Our work :
 Present WPT proposed by Mallat [] and used the concept
of bank filter.
 Presentation of new proposed architecture of direct and
inverse variants of the Discrete Wavelet Packed
Transform (DWPT).
�
where 𝐻𝐻(𝑍𝑍) ̅
and 𝐺𝐺(𝑍𝑍) are the reciprocal filters to 𝐻𝐻(𝑍𝑍) and 𝐺𝐺(𝑍𝑍),
 Modeled this architecture in VHDL-RTL modeling level  Table 1. DWPT implementation results.
and present the implementation results. respectively

Wavelet Packet Transform (WPT) Proposed architecture and

Features results
 Basic Concepts :
 DWPT decomposition operation called : “Analysis”
 IDWPT reconstruction operation called : “Synthesis”
 Signal passes through two complementary low-pass and
high-pass filters designated as H and G (L and H are the
corresponding filters length), and the corresponding
transfer functions can be represented presented as:
[1] S. G. Mallat. Multiresolution approximations and wavelet orthonormal
bases of L2(R). Transactions of the American mathematical society,
315(1):69–87, 1989
 The proposed architecture takes advantage of the amount that
process in each branch of the input (respectively, output) of
the DWPT (respectively, IDWPT).
 We use an appropriate buffering/interleaving policy, the data
flowing into a DWPT/IDWPT stage is processed by a single
modified filter whose architecture can handle multiplexed
dataflows. The block architecture for the DWPT and IDWPT is
given in figure 3, the filter structure in figure 5 , and the Conclusion
implementation results of DWPT architecture summarizes in
table 1.  Our proposed DWPT/IDWPT architecture achieve excellent
performance: when increase order of quantification from 4 to 16, the
 Figure 3. Block architecture. frequency decrease to the half.
 Our proposed DWPT/IDWPT architecture are full configurable and the
effect of wavelet change are present in filters size.
 Future work: implement this new architecture in real WSN case, test
transmission with different noise, deep learning model.