PEAK-gridARM HWMan Eng

PEAK-gridARM Eval Board
Linux-based Development Platform for

the gridARM™ Microcontroller
Hardware Manual
Document version 1.1.1 (2014-03-03)

PEAK-gridARM Eval Board – Hardware Manual
Products taken into account

Product Name Model Part number
PEAK-gridARM Evaluation Board IPEH-004051
CANopen® and CiA® are registered community trade marks of CAN in Automation
e.V. gridARM™ is a trademark of Grid Connect, Inc. SD™ and microSD™ are trade-
marks or registered trademarks of SD-3C in the United States, other countries, or
both. ARM® and ARM7TDMI® are registered trademarks of ARM Limited (or its
subsidiaries) in the EU and/or in other countries.
All other product names mentioned in this document may be the trademarks or
registered trademarks of their respective companies. They are not explicitly marked
by “™” and “®”.
© 2014 PEAK-System Technik GmbH
PEAK-System Technik GmbH

Otto-Roehm-Strasse 69
64293 Darmstadt
Germany
Phone: +49 (0)6151 8173-20

Fax: +49 (0)6151 8173-29
www.peak-system.com
info@peak-system.com
Document version 1.1.1 (2014-03-03)
2
Contents
1 Introduction 5
1.1 Properties at a Glance 6
1.2 Prerequisites for Operation 7
1.3 Scope of Supply 7
2 Startup Procedure 9
2.1 Starting the Board 9
2.2 Setting Date and Time 13
2.3 Demo Scripts 14
2.3.1 LEDs at the Digital Outputs (led_demo,
led_switch) 14
2.3.2 Push Buttons at the Digital Inputs
(btn_demo) 15
2.3.3 CAN Communication (can_demo) 15
3 Elements on the Board 16

3.1 Supply Socket 16
3.2 USB 17
3.3 Gigabit Ethernet 17
3.4 CAN 18
3.5 RS-232 Terminal 20
3.6 RS-232 Debug 21
3.7 JTAG 22
3.8 microSD™ Slot 23
3.9 Text Display Connector 24
3.10 I²C/SPI 26
3.11 Digital inputs and outputs 27
3.12 Analog Inputs 28
3.13 Status LED Microcontroller 29
3.14 Real-Time Clock 30
3.15 Reset Push Button 30
3
4 Configuration 31
4.1 Selecting the Boot Flash 31
4.2 Activating the Write Protection for the
System EEPROM 32
4.3 Using I/O Interrupt or microSD™ Card
Detection 33
4.4 Using Microcontroller LED or USB Detection 34
4.5 Assigning Traffic LEDs 35
4.6 Replacing the Button Cell for the Real-Time
Clock 37
5 Technical Specifications 38
Appendix A Dimension Drawing 40
Appendix B Jumpers Overview 41
Appendix C Circuit Diagrams 45

C.1 Microcontroller 46
C.2 Memory 47
C.3 Ethernet 48
C.4 I/O 49
C.5 Serial 50
C.6 Power Supply 51
4
1 Introduction
Grid Connect 1 has developed the ARM7™ microcontroller gridARM™

as SoC solution aiming for embedded applications in the field of
industrial communication. The PEAK-gridARM evaluation board is a
Linux-based development platform for the gridARM microcontroller.
It has connectors for Gigabit Ethernet, High-speed CAN, USB 2.0,
RS-232, SPI, and I²C. Digital and analog inputs of the evaluation
board are manipulated by push buttons and potentiometers. The
microcontroller state as well as the states for supply and data traffic
are indicated by LEDs. A Board Support Package (BSP) for Linux
gives access to the hardware resources of the PEAK-gridARM
evaluation board.
The gridARM™ microcontroller by the U.S. company Grid Connect

is distributed in Europe exclusively by PEAK-System.
This manual describes the evaluation board's hardware and first

steps with it. Please refer to the following documents for further
information:
PEAK-gridARM Evaluation Board - Linux BSP - User’s Guide:
developer documentation of the Board Support Package for
Linux
gridARM - Hardware Data Sheet 2:
documentation about the microcontroller
1
http://gridconnect.com
2
http://gridconnect.com/media/documentation/grid_connect/gridARM_Hardware_DS.pdf
5
1.1 Properties at a Glance

ARM7 gridARM microcontroller (80 MHz)
Linux operating system (version 2.6.36)
4 MByte NOR flash with 16-bit data bus access
8 MByte NOR flash with 32-bit data bus access
64 MByte SDRAM with 32-bit data bus access
I²C EEPROM for device configuration
4 MByte SPI flash
Memory card slot for additional memory capacity
Real-time clock (RTC) with battery
Two alternative JTAG sockets
Push button for hardware reset
Voltage supply via USB or an external power supply unit
(8 - 30 V)
Dimensions: 110 x 110 mm
Additional HD44780-compatible text display can be connected,
availability on request
Communication
Gigabit Ethernet (10/100/1000 Mbit/s)
High-speed CAN channel (ISO 11898-2) with bit rates up to
1 Mbit/s
Connection via D-Sub, 9-pin (in accordance with CiA® 102)
NXP CAN transceiver PCA82C251
USB 2.0 Full-speed (USB Device Port)
Two RS-232 ports for debugging and terminal access
6
SPI bus (1 MHz) for two external extensions

I²C bus (400 kHz) for external extensions
Inputs and outputs

8 digital inputs, occupied with 6 push buttons, an RTC alarm,
and memory card detection
8 digital outputs, occupied with 7 LEDs and a buzzer
5 analog inputs, occupied with 4 potentiometers
Optional use of I/O ports with external wiring via jumpers
LEDs for μC status, supply, CAN, and RS-232
1.2 Prerequisites for Operation

PC with USB port for the power supply, alternatively, DC source
8 to 30 V with barrel connector
Optionally for development:
RS-232 port at the PC and null-modem cable (D-Sub 9 f-f) for
terminal access
Linux operating system recommended for the PC
1.3 Scope of Supply

PEAK-gridARM Evaluation Board
USB connection cable (type B)
Flat ribbon cable for RS-232 debugging port to D-Sub 9 m
7
Software and documentation

• μClinux-dist development environment and toolchain
• Board Support Package (BSP) for Linux with sources and
binaries
• Hardware manual with circuit diagrams, BSP user guide
(both PDF)
8
2 Startup Procedure
The chapter describes the startup of the PEAK-gridARM Evaluation

Board by applying a supply voltage. The startup process can be
observed on a PC via a serial connection.
Afterwards, the setup of the date and time is described.
Note: This startup procedure is referring to the Linux image

being present in the memory at delivery of the evaluation
board.
In addition to the scope of supply you need:

PC with USB port for the voltage supply
RS-232 port at the PC
null-modem cable (D-Sub 9 f-f)
terminal emulation program
2.1 Starting the Board
Attention! Electrostatic discharge (ESD) can damage or destroy

components on the PEAK-gridARM Evaluation Board. Take
precautions to avoid ESD when handling the board.
Do the following to start the evaluation board and to observe the

startup process:
1. Place the board on a flat, clean, and dry surface.
2. Plug the supplied flat ribbon cable onto the double pin
header “J501 Debug” on the board. The strand marked red
9
must be on the side of pins 1 and 2 of the double pin

header.
RS-232 Debug (J501, left), USB (J401, right)
3. Use a null-modem cable (not included in the scope of

supply) in order to connect the RS-232 port of the PC with
the flat ribbon cable.
4. On your PC, start a terminal emulation program that
establishes a connection to the evaluation board via the RS-
232 interface (e.g. COM1 in Windows or ttyS0 in Linux). For
this use the following connection parameters:
38,400 bit/s
8 data bits, no parity, 1 stop bit (8N1)
No hardware or software handshake
5. Use the supplied USB cable to make a connection between
the powered-on PC and the “J401 USB” connector on the
board.
This establishes the voltage supply of the board.
Note: If you use another USB cable instead of the supplied one,
it may happen that a cheap version doesn't have an appropriate
wire cross section for proper voltage supply. Possibly, the
evaluation board does not start then.
10
Startup Sequence
At delivery, the PEAK-gridARM Evaluation Board is supplied with
the U-Boot bootloader and with a Linux image with Kernel 2.6.36,
both being started in succession.
U-Boot bootloader with 3-second countdown

until the automatic Linux boot sequence
11
Start of the Linux boot sequence
Bottom: Linux prompt after the finished boot sequence
12
After a successful boot sequence, the μC status LED on the evalu-

ation board blinks with the rhythm of a heartbeat signal (blink -
blink - pause).
Tip: The pre-installed Linux image is provided with several

demo scripts. One starts automatically after the boot sequence
and activates the seven LEDs at the digital outputs one after
another. More information about the scripts in section 2.3 on
page 14.
At the Linux prompt (current path with number sign #), you can now
enter and execute commands.
2.2 Setting Date and Time

We recommend to check the system date and time and to correct it
if needed after the first start.
Check the date and time by entering the following command at the
Linux prompt:
date
Note the time zone in the output. The default is UTC (Coordinated
Universal Time). Accordingly, you must then specify the new time
for this time zone.
If required, enter a new time with the following two commands.

This sets the system time in a first step and then applies the set
time to the real-time clock.
date YYYY-MM-DD hh:mm 3

hwclock --systohc
3
YYYY: year, MM: month, DD: day, hh: hour, mm: minute
Alternatively, you can enter only the time with hh:mm.
13
Even after disconnecting the supply voltage, the real-time clock

stays in function, because it is supplied by the button cell.
2.3 Demo Scripts

At delivery, the Linux image is provided with several demo scripts
that illustrate the access possibilities to the periphery.
The scripts are located in the /home/peak/demo/ directory.
2.3.1 LEDs at the Digital Outputs (led_demo,

led_switch)
During boot, the led_demo script is started automatically. It acti-
vates the seven LEDs at the digital outputs one after another.
Do the following to stop the script:

1. Enter the following command:
ps
All currently running processes are listed.
2. Note the PID (process number) of the
/bin/sh demo/led_demo entry.
3. Enter the following command:
kill -9 PID
Replace PID with the previously noted number.
Using the led_switch script, you can influence each LED. It is
called with parameters:
led_switch led [on|off]
led: cpu, yellow:1, yellow:2, yellow:3, yellow:4, green:5, green:6, red:7
14
Example (activating the yellow LED 3):
/home/peak/demo # ./led_switch yellow:3 on
2.3.2 Push Buttons at the Digital Inputs

(btn_demo)
During boot, the btn_demo script is started automatically. On pres-
sing button 1 or 2, it reacts with the transmission of a CAN message
onto a connected CAN bus.
In the demo script, no function is assigned to the other four buttons.
You can stop the execution of the script according to the instruc-
tions in the previous subsection 2.3.1.
2.3.3 CAN Communication (can_demo)

During boot, the can_demo script is started automatically. It shows
incoming CAN messages from a connected CAN bus in the debug
terminal.
You can stop the execution of the script according to the instruc-
tions in the previous subsection 2.3.1.
To transmit single CAN messages manually, use the following

command:
cansend can0 ID#Data
Example (CAN ID 12F, data bytes 45 67 89 AB):
/ # cansend can0 12F#456789AB
The Data Length Code (DLC, here: 4) is automatically determined

from the number of given data bytes.
15
3 Elements on the Board
Attention! Electrostatic discharge (ESD) can damage or destroy

components on the PEAK-gridARM Evaluation Board. Take
precautions to avoid ESD when handling the board.
3.1 Supply Socket

The PEAK-gridARM Evaluation Board can either be supplied via the
USB port (setting at delivery) or the supply socket. The supply path
is determined by the jumper JP600.
Supply socket J600 (left), USB port J401 (top),

jumper JP600 (center) for selection
Jumper position JP600 Supply Eval Board via…

2-1* USB port
3-2 Supply socket
* Setting at delivery
16
Important note: Never connect all three pins of the JP600

jumper together. The microcontroller and the USB interface of
a connected PC can otherwise be destroyed by overvoltage.
For the supply socket, a DC source with barrel connector is needed

(not part of the scope of supply), e.g. an AC adaptor.
Supply voltage: Diameter of barrel connector:

12 V DC (8 - 30 V possible) a = 5.5 mm, b = 2.1 mm;
minimum length: 11 mm
3.2 USB
The USB interface supports the USB 2.0 standard (UDP) with bit
rates up to 12 Mbit/s (Full Speed).
With a USB connection to a PC, the power supply of the evaluation

board can be taken on (setting at delivery). Alternatively, it is
possible to use the separate supply socket (see section 3.1 on page
16).
3.3 Gigabit Ethernet

The Ethernet interface can be operated with 10 Mbit/s, 100 Mbit/s,
and 1 Gbit/s. On the connector housing, there are two LEDs that
indicate an established connection and transfer activity.
17
Ethernet connector
Besides basic communication purposes, the Ethernet interface can

also be used for a firmware update.
3.4 CAN
The CAN interface supports the two CAN formats 2.0A (Standard)
and 2.0B (Extended). The NXP PCA82C251 transceiver leads out a
High-speed CAN bus (ISO 11898-2), that allows bit rates up to
1 Mbit/s.
18
D-Sub CAN port J500 and switch block for the CAN termination
The bus is connected to the 9-pin D-Sub port. The pin assignment
for CAN corresponds to the specification CiA® 102.
Assignment of the D-Sub port for CAN,

GND and CAN_GND are connected at delivery.
If the evaluation board is connected to the end of a CAN bus and

this end isn't yet terminated, the CAN termination (120 Ω) available
on the board can be activated. This is done by setting both switches
of the switch block J500 to ON.
19
3.5 RS-232 Terminal

Via RS-232 (V.24 levels), the D-Sub port J502 provides a terminal
access for administrative purposes. With a D-Sub extension cable
(9-pin m-f, 1:1), a connection to a PC can be established. Alterna-
tively, the RS-232 signals can be accessed via the pin header field
J503 (not equipped).
RS-232 port J502 (D-Sub 9-pin),

J503 (pin header field not equipped) alternatively
Assignment of the D-Sub connector for RS-232 Terminal
20
Function Pin at J503

RxD 3
RtS 4
TxD 5
CtS 6
GND 9
3.6 RS-232 Debug

Via RS-232 (V.24 levels), the double pin header J501 provides de-
bugging access. At delivery, the evaluation board is configured to
route output of the bootloader and of the Linux environment and to
receive input via this interface (see also 2.1 Starting the Board on
page 9). For further information about debugging, see the Hardware
Data Sheet of the gridARM microcontroller.
For a connection, the provided flat cable can be used. The connec-
tion to the PC is then done with a null modem cable (D-Sub 9 f-f).
Two LEDs can be used for the traffic indication for RxD and TxD. For
the corresponding configuration, see 4.5 Assigning Traffic LEDs on
page 35.
21
RS-232 port for debugging purposes.
Function Pin at J501

RxD 3
TxD 5
GND 9
3.7 JTAG
For the development at the microcontroller, a JTAG interface with
two connection possibilities is available. J100 is a 10-pin double pin
header, J101 a 10-pin header socket with 1.27-mm grid.
22
JTAG ports J100 (double pin header) and J101 (header socket)
Function Pin at J100 Pin at J101

GND 1, 2 3, 5, 9
μC Reset 3 none
3.3 V 4 1
TCK 5 4
TMS 6 2
TDO 7 6
TDI 8 8
RTCK 9 none
TRST 10 10
3.8 microSD™ Slot

Among others, the microSD card can be used for system updates. It
is connected to the gridARM microcontroller via the SPI bus.
23
microSD slot J400
Note: A plugged-in microSD card blocks the communication

with further devices that are connected to the SPI bus (e.g.
internally connected: 4 MB Flash-ROM). Remove the microSD
card in order to allow the communication with further devices
again.
3.9 Text Display Connector

At P400 and P401, a HD44780-compatible LC text display can be
connected. The pin assignment of such a display fits to the one on
the evaluation board.
The LCD contrast can be adjusted with the corresponding

potentiometer.
24
Pin headers P400 and P401 for a text display

and potentiometer for contrast adjustment
Connector pins of a text display
Pin at text Pin at Name Level Function

display P400/P401
1 P401-1 Vss GND Ground
2 P401-2 Vdd 5 V or 3.3 V Supply
3 P401-3 Vo 0 - 1.5 V Contrast voltage
4 P401-4 RS High/Low Register Select
5 P401-5 R/W High/Low High: read, Low: write
6 P401-6 E High Enable
7 P401-7 D0 High/Low Data 0 (LSB)
8 P401-8 D1 High/Low Data 1
14 P401-14 D7 High/Low Data 7 (MSB)
15 P400-1 LED+ 5 V or 3.3 V LED background light +
16 P400-2 LED- GND LED background light -
25
3.10 I²C/SPI
Via the pin header H400, the signals of the communication busses
I²C and SPI can be accessed directly. The pin header is not equipped
at delivery. The pins have the following functions:
3.3 V
GND
I²C SCL
I²C SDA
μC Reset
SPI CS3
SPI CS2
SPI SCK
SPI MOSI
SPI MISO
Assignment of the connector H400 for I²C and SPI
Attention! The pins are directly connected to the

microcontroller and not protected. Incorrect use can cause
damage to the microcontroller.
On the evaluation board, the I²C bus internally connects the

following peripherals with 400 kbit/s:
System EEPROM (256 byte)
Buzzer
microSD card detection
Real-time clock (RTC)
RTC alarm input
7 freely available LEDs (see 3.11 on page 27)
6 freely available push buttons (see 3.11 on page 27)
26
On the evaluation board, the SPI bus internally connects the

following peripherals:
microSD card
4 MByte flash ROM
3.11 Digital inputs and outputs

The I²C bus connects six push buttons, the detection of a microSD
card, and the RTC alarm as digital inputs, and furthermore, seven
LEDs and a buzzer as digital outputs. They can be disconnected
separately from the inputs and outputs by opening the
interconnected jumpers.
The inputs can be directly accessed via the pin header field H402,
the outputs via H401.
Push buttons for digital inputs, LEDs for digital outputs,

jumpers for disconnection,
pin header fields H401 and H402 for direct access
27
3.12 Analog Inputs

Five analog inputs are directly led out from the gridARM microcon-
troller. The reference voltage is 3.3 V. Four of the analog inputs are
equipped with potentiometers.
A direct access to the analog inputs is provided by the pin header

field H403. To do this, the potentiometers must be separated from
the inputs by opening the interconnected jumpers.
Analog input 5 can optionally be used for measuring the VddBU

voltage (button cell). To do this, the solder field R454 (see figure
below) must be shortened by a solder jumper.
Solder field R454

for connection
μC AD4 to VddBU
Potentiometers for four analog inputs,

jumpers for disconnection, solder field R454,
pin header field H403 for direct access
Pin at H403 Function

1 Analog input 1 (μC AD0)
6 Not used
7 Not used
8 Not used
28
Pin at H403 Function

9 GND analog
(at delivery connected to GND)
10 3.3 V analog
Attention! The pins are directly connected to the microcon-

troller and not protected. Incorrect use can cause damage to
the microcontroller.
Note: The gridARM microcontroller is also available in a BGA

package with eight analog inputs.
3.13 Status LED Microcontroller

At delivery, the “μC status” LED is connected to port PA15 of the
gridARM microcontroller and it is freely programmable. For
example, it can be used as heartbeat indicator.
Microcontroller status LED
If the LED doesn't react when controlled by Port PA15, this may be
due to the jumper configuration (see 4.4 Using Microcontroller LED
or USB Detection on page 34).
29
3.14 Real-Time Clock

The real-time clock is connected to the gridARM microcontroller via
the I²C bus. It is buffered by the button cell if no supply voltage is
applied (JP429 set to 3-2).
The alarm signal of the real-time clock can be read via the I/O
module at the I²C bus (IO_B7).
3.15 Reset Push Button

Pressing the reset push button initiates a reboot of the PEAK-
gridARM Evaluation Board.
Reset push button
30
4 Configuration
On the PEAK-gridARM Evaluation Board, several hardware

functions can be configured:
Selecting the Boot Flash (below)
Activating the Write Protection for the System EEPROM (on
page 32)
Using I/O Interrupt or microSD™ Card Detection (on page 33)
Using Microcontroller LED or USB Detection (on page 34)
Assigning Traffic LEDs (on page 35)
Replacing the Button Cell for the Real-Time Clock (on page 37)
4.1 Selecting the Boot Flash

On start of the microcontroller a bootloader is loaded from either
the 16-bit or the 32-bit NOR flash. This is determined by the jumpers
JP200 and JP201.
The U-Boot bootloader can only be loaded from the 16-bit NOR
flash.
If jumper JP104 is open (port BMS receives High signal), the

bootloader contained in the gridARM microcontroller is started
instead of an external one.
31
Jumpers JP200, JP201, and JP104
Jumper setting JP200 and JP201 NOR flash selection

closed*
16-bit at CS0 and 32-bit at CS2
3-2*
open
32-bit at CS0
2-1
Jumper setting JP104 Bootloader

open Internal of the gridARM μC
closed* From external flash (CS0)
4.2 Activating the Write Protection for

the System EEPROM
The system EEPROM (256 Byte, I²C connection) can be write-
protected with jumper JP430. In case of a microcontroller-internal
boot, it contains the boot order in the first 128 bytes. If using the U-
32
Boot bootloader (setting at delivery), the system EEPROM is not

needed and therefore completely available to the user.
Jumper JP430
Jumper setting Write protection

open* deactivated
closed activated
4.3 Using I/O Interrupt or microSD™ Card

Detection
Usually, the detection of a inserted microSD card is done via the I/O
module at the I²C bus (IO_B6). If required, the PA02 port at the
gridARM microcontroller can be used alternatively for this purpose.
To do so, jumper JP431 must be set over. In that case, the interrupt
33
line is disconnected from the I/O module and an interrupt signal is

not available anymore.
Jumper JP431
Jumper setting Port PA02 connected to

1-2* Interrupt I²C I/O
2-3 microSD card detection
4.4 Using Microcontroller LED or USB

Detection
Port PA15 of the gridARM microcontroller is assigned to the
“μC Status” LED (D407) at delivery. Alternatively, port PA15 can be
used as input for detection of a plugged USB cable at the evaluation
board (not useful if supply is done via the USB port). To do so,
jumper JP432 must be set over.
34
Jumper JP432
Jumper setting Port PA15 connected to

1-2* “μC Status” LED
2-3 USB detection
4.5 Assigning Traffic LEDs

Two of the four traffic LEDs can be assigned either to the CAN
communication or to the communication via RS-232 Debug. This is
done with the jumpers JP505 and JP506.
The remaining two traffic LEDs are permanently assigned to the

communication via RS-232 Terminal.
35
Transmit LED
CAN or Debug
Receive LED
CAN or Debug
Jumpers JP505 and JP506 and traffic LEDs
Jumper setting Traffic indication for…
2-1* CAN Tx
2-1* CAN Rx
3-2 RS-232 Debug TxD

3-2 RS-232 Debug RxD
36
4.6 Replacing the Button Cell for the

Real-Time Clock
The real-time clock (RTC) used by the evaluation board or the timer
as part of the gridARM microcontroller are supplied by a button cell
of the IEC type CR 2032 (3 V), as long as the evaluation board is
turned off.
Button cell for the real-time clock
A new button cell lasts several years. If the real-time clock indicates
an unexpected time, take out the button cell and measure its vol-
tage. This should be around the nominal 3.0 Volts. If the measured
voltage is lower than 2.5 Volts, you should replace the button cell
with a fresh one.
Afterwards, the real-time clock must be set again.
37
5 Technical Specifications
Power supply
Supply voltage 12 V DC nominal, 8 - 30 V possible
Current consumption (at 12 U-Boot idling: 100 mA
V) Linux kernel idling: 150 - 180 mA
Buffer battery for the real- Button cell CR 2032, 3 V
time clock or VddBU
gridARM microcontroller
Processor ARM7TDMI® 32-Bit
Voltages Core: 1.3 V; I/O: 3.0 V
Clock frequency 80 MHz
On-chip memory 256 KByte masked ROM (Grid BIOS, boot code)
160 KByte SRAM
Interrupt handling Advanced Interrupt Controller (AIC)
Manufacturing 130-nm technology
Packages QFP 208-pin or BGA 225-pin, RoHS
Further technical See data sheets for the gridARM microcontroller 4
specifications
Gigabit Ethernet
Bit rates 10 Mbit/s, 100 Mbit/s, 1 Gbit/s
Phy Micrel KSZ9021RLI (RGMII, MDIO/MDC)
CAN
Specification ISO 11898-2, High-speed CAN
2.0A (Standard format) and 2.0B (Extended format)
Bit rates up to 1 Mbit/s
Transceiver NXP PCA82C251
Termination 120 Ω, switchable on board
4
http://gridconnect.com/media/documentation/grid_connect/GRIDARM_DS_01.pdf
http://gridconnect.com/media/documentation/grid_connect/gridARM_Hardware_DS.pdf
38
SPI Serial Flash ROM

Size 4 MByte
SPI modes 0 and 3
Chip Erase Time 35 ms (typical)
Sector/Block Erase Time 18 ms (typical)
Byte Program Time 7 μs (typical)
Parallel Flash ROM

Size 4 MByte, 16-bit
8 MByte, 32-bit
Interface Common Flash Interface (CFI)
Access time 70 ns
SDRAM
Size 64 MByte, 32-bit
Organization 4 Mbit x 16 I/O x 4 bank
Timing 166 MHz 3-3-3 PC166
Cycle 6 ns
I/O
Digital inputs (via I²C) 8: 6 push buttons, microSD card detection, RTC alarm
Digital outputs (via I²C) 8: 7 LEDs, 1 buzzer
Analog inputs 5: 5 potentiometers, 1 alternative for voltage
measurement of the button cell
All I/Os Also direct access possible
Measures
Size 110 x 110 mm (L x W)
See also dimension drawing Appendix A on page 40
Weight 125 g
Environment
Operating temperature -40 - +85 °C (-40 - +185 °F)
Temperature for storage -40 - +100 °C (-40 - +212 °F)
and transport
Relative humidity 15 - 90 %, not condensing
39
Appendix A Dimension Drawing
The figure does not show the original size.
40
Appendix B Jumpers Overview
Jumpers on the top side
41
Jumpers on the bottom side
42
Jumper Setting Function

JP100 1-2* VddBU 1.2 V from the supply
2-3 VddBU 1.2 V from the LDO/button cell (see JP429)
JP101 open*
Wake-up by switching between the two states
closed
JP104 open Internal bootloader of the gridARM μC
closed* Boot from external flash (CS0)
JP200 + open + 1-
32-bit NOR flash at CS0
JP201 2
closed +
16-bit NOR flash at CS0 and 32 bit NOR flash at CS2
2-3*
JP202 open* Boot block of 16-bit NOR flash writable
closed Boot block of 16-bit NOR flash write-protected
JP203 open* Boot block of 32-bit NOR flash writable
closed Boot block of 32-bit NOR flash write-protected
JP400 - open Analog inputs: external voltages on H403 pins 1 - 5 (0 - 3.3 V)
JP404 Analog inputs: pots RV401 - RV404
closed*
(Do not apply external voltages!)
JP405 - open Digital outputs A1 - A7: forwarding to H401 pins 1 - 7
JP411 Digital outputs A1 - A7: LEDs D400 - D406
closed*
JP412 open Digital output A8: forwarding to H401 pin 8
Digital output A8: beeper SP400
closed*
JP413 - Digital inputs B1 - B6: external voltages on H403 pins 1 - 6 (0
open
JP418 - 3.3 V)
Digital inputs B1 - B6: push buttons PB400 - PB405
closed*
JP419 Digital input B7: external voltage on H402 pin 7 (0 - 3.3 V);
open
tip: set JP431 to 2-3
closed* Digital input B7: microSD card detection via I²C I/O module
JP420 open Digital input B8: RTC cannot trigger alarm
closed* Digital input B8: RTC alarm via I²C I/O module
JP427 1-2 Supply LC display 3.3 V
2-3* Supply LC display 5 V
43
Jumper Setting Function

JP429 Real-time counter in the microcontroller is supplied by the
1-2
button cell (only useful with JP100 on 2-3)
2-3* RTC at the I²C bus is supplied by the button cell
JP430 open* System EEPROM writable
closed System EEPROM write-protected
JP431 1-2* PA02: interrupt from I²C I/O module
2-3 PA02: microSD card detection
JP432 1-2* PA15: output for μC status LED
2-3 PA15: input for USB detection
JP500 1-2 CAN transceiver supply 3.3 V (e.g. TI SN56HVD230)
2-3* CAN transceiver supply 5 V (e.g. NXP 82C251)
JP505 + 1-2 + 1-2 LEDs: CAN bus
JP506 2-3 + 2-3* LEDs: RS-232 Debug
JP600 1-2* Board supply from USB
2-3 Board supply via supply socket (8 - 30 V DC)
44
Appendix C Circuit Diagrams
On the following pages, the circuit diagrams of the PEAK-gridARM

Evaluation Board are enlisted, split up in the following sections:
Microcontroller
Memory
Ethernet
I/O
Serial
Power Supply
45
1 2 3 4 5 6 7 8
VddBU VddBU IO Serial

IO.SchDoc Serial.SchDoc
PIR10 02 1M to reduce bat current in SHDN mode PIR10102 3V3 GND
COR100
R100 COTP100 COTP101 COR101
R101 CAN_Tx CAN_Tx
TP100 TP101 PIR13702
wake up CAN_Rx CAN_Rx
GND PIJP10102 PIJP10101 PIR10 01 1M PITP10001 TP TP PITP10101 PIR10101 1M COR137
R137
COJP101
JP101
WakeUp SHDN
JTAG 0R
PIR13701 Dbg_TxDi Dbg_TxDi
PIJ10 1 PIJ10 3 PIJ10 5 PIJ10 7 PIJ10 9
edge triggered
Dbg_RxDi Dbg_RxDi
3V3
Board sleep mode not supported
10k
10k
10k
10k
1
3
5
7
9
PIR10302 PIR10402 PIR10502 PIR10602 COJ101
J101
SHF-105-01-L-D-TH Term_TxDi Term_TxDi
A
uC clock COU100B
U100B
alternative socket
A
163 162 PIR10301 PIR10401 PIR10501 PIR10601
PIJ10 2 PIJ10 4 PIJ10 6 PIJ10 8 PIJ10 Term_RxDi Term_RxDi
2
4
6
8
10
COR126
R103
R104
R105
R106
MUST be 12MHz for internal BOOT ROM and USB COR109
COC100 R109 33R
PIU1000163 WKUP0 SHDN PIU1000162
JTAG
COR103COR104COR105COR106 R126
0R COR107
COJ100
J100
uC-Reset
Term_RtSi
Term_CtSi
Term_RtSi
Term_CtSi
C100 XIN 202
PIR10902PIU1000202 XIN
1 TRST R107 100R 10
PIC10001PIC10002
PIXT10 1 XT100 PIR10901 TRST PIU10001 PIR12602 PIR12601 PIR10701
COR108 PIR10702 PIJ100010
18pF COXT100 PIR1 202 2 TDI RTCK R108 100R 9
COR112 TDI PIU10002 PIR10801
COR110
PIR10802 PIJ10009
R112 6 TMS TDI R110 100R 8
GND PIXT10002
PIXT10004
12 MHz GND
PIR1 201 1M
TMS PIU10006
8
TCK PIU10008
TCK TDO
PIR11001
COR111
R111PIR11101
PIR11002
100R
PIR11102
PIJ10008
7
PIJ10007
Memory PowerSupply
COC101
C101 PIC10101PIC10102
PIXT10 3 XOUT PIU1000203
203
XOUT
4
TDO PIU10004
TDO TMS COR113
R113PIR11301
100R
PIR11302
6
PIJ10006
Memory.SchDoc PowerSupply.SchDoc
18pF COR118 COR115 RTCK TCK COR114
R114 100R 5
COC102 R118 33R R115 1k PIR11401 PIR11402 PIJ10005
C102PIC10201PIC10202 XIN32 PIR11801 158
PIR11802PIU1000158 164 PIR11501 PIR11502
PIU1000164 PIR1 602 PIR1 702 PIR13802 4
PIJ10004
PIR13801
PIXT10 2 XIN32 JTAGSEL VddBU Note 1 JTAG 3V3
12pF PIR120 2 COR119
R119 1k
COR116
R116 R117 COR117 3
PIJ10003
COXT101
XT101 COR120
R120 165 COR138
R138 2
PIR1 60110k PIR1 701 10k
TRST
GND 32.768KHz TST PIU1000165PIR11901 PIR11902 VddBU Note 1 GND PIJ10002
0R 1
COC103
C103 PIXT10 1 XOUT32
PIR120 1 1M 159 104
COR121
R121 1k GND PIJ10001
PIC10301PIC10302 PIU1000159
XOUT32 BMS PIU1000104PIR12101 PIR12102 PIJP10401 PIJP10402 GND GND GND
12pF COJP104 CON2X5_S
COC104 JP104
C104 PLLRCA 207 14
PIC10401PIC10402 PIR12201 PIR12202 PIU1000207 PLLRCA RST PIU100014 PIR13302 PIR13301
100nF COR122 300R COR133
R122 R133 0R
COC105 GRIDARM-208 JTAGSEL:
C105PIC10501PIC10502 PIR12302 PIR12402
high for Boundary Scan
1nF COR123
R123 COR124
R124 uC-Reset
(has int. 100k pulldown)
PIR12501 PIR12502 PIR1230110k PIR12401 100R
GND
COR125
R125 1M
BMS: 1GB-Ethernet
low for external BOOT via CS0 1GB-Ethernet.SchDoc
(SPI-flash or 16bit wide NOR flash)
Reset (has int. 100k pullup)
Note 1:
B 3V3 3V3 3V3 In harsh environments it is strongly B
COC106
C106 recommended to tie this pin to GNDBU
GND PIC10602 PIC10601
COU101
U101
PIU10 5 if unused or to add an external lowvalue
5
PIR13602 100nF TPS3838K33DBVT PIR13402 resistor (such as 1 kOhm).

COR136
R136 COR134
R134
GND VDD
10k
Reset PIR13601 1
PIU10101 CT PIR13401 2k2
4 uC-Reset uC-Reset
RST PIU10104 uC-Reset
2 1 GND 3
PIPB10002 PIPB10001 PIU10103 MR COC107
C107 PIC10702
3
PIPB10004
PIPB10003
COPB100 470p PIC10701
PB100
GND
PIU10 2
2
GND
GND COTP102
TP102
COR135
R135 Bypass (default)
PIR13502 PIR13501 PITP10201 TP
0R
Reset uC
uC Power Reserved uC pins COM100

M100
COU100A
U100A COU100D
U100D
12 10 19
COTP103
TP103 3V3dly PIU100012 VDDIO
30
GND PIU100010
24 current consumption CPU,
PIU100019
21
Reserved 6 Layer Stack
PIU100030 VDDIO GND PIU100024 PIU100021 Reserved
44 37 worst case: 23
TP
PIU100044 VDDIO GND PIU100037 PIU100023 Reserved

55
PIU100055 VDDIO
38 3,3V: 36mA 25 Marking for Copper Layers
GND PIU100038 PIU100025 Reserved
C
3V3 DELAY PIT1031 3,3V delayed
68
PIU100068 VDDIO
77
PIU100077 VDDIO
GND
GND
50
PIU100050
56
PIU100056 GND
R127
COR127
PIR12701 PIR12702 GNDa
1,2V: 100mA 60
PIU100060 Reserved
62
PIU100062 Reserved
C
94 65 0R 64
Delay = 133 usec PIU100094 VDDIO GND PIU100065 PIU100064 Reserved
107
PIU1000107 VDDIO
66 69
GND PIU100066 PIU100069 Reserved
COR132 120 79 71
R132 PIU1000120 VDDIO GND PIU100079 PIU100071 Reserved
S D 137 88 73
3V3 PIQ1000S D
S PIQ1000D PIR13202 PIR13201 3V3dly PIU1000137 VDDIO GND PIU100088 PIU100073 Reserved
151 100 75
G
0R PIU1000151 VDDIO GND PIU1000100 PIU100075 Reserved

COC123
C123 PIC12301 177
PIU1000177 VDDIO GND
106
PIU1000106
95
PIU100095 Reserved
100nF PIC12302
PPIIQR110310G2 Q100
COQ100 198
PIU1000198 VDDIO GND
114
PIU1000114 COL101
L101
97
PIU100097 Reserved
G
SI2333 124 111

GND PIU1000124 3V3dly PIL10101 PIL10102 3V3a PIU1000111 Reserved
22 135 113
COR131
R131 1V2uC PIU100022 VDDCORE GND PIU1000135 BLM21P331SN1D PIC1 101 C111 COC111 PIU1000113 Reserved
36 140 PIC1 102 100nF 123
PIU100036 VDDCORE GND PIU1000140 PIU1000123 Reserved
PIR13101 1M 76
PIU100076 VDDCORE GND
146
PIU1000146
139
PIU1000139 Reserved
COM101
M101 COM102
M102
96 175 GND 141
PIU100096 VDDCORE GND PIU1000175 PIU1000141 Reserved PIM1010Bx PIM1020Bx
GND 110 179 142
144 193 143
AP M3
183 195 145 AP M3
194 147
PIU1000194 VDDCORE 1V2uC PIU1000147 Reserved COM103
M103 COM104
M104
PICCOC112
1C112
201 PICCOC113
1C113
301 PIC11401COC114
C114 PIC1 C115 5COC115
01 6COC116
PIC1 C116
01 7COC117
PIC1C117
01 PICCOC118
1C118
801 150
PIU1000150 Reserved
204 201 PIC1 202 100nFPIC1 302 100nFPIC11402 100nFPIC1 502 100nFPIC1 602 100nFPIC1 702 100nFPIC1 802 100nF PIM1030Bx PIM1040Bx
1V2uC PIU1000204 VDDOSC GNDOSC PIU1000201
1V2uC COC120
C120
100nF PIU1000157
157 160 AP M3 AP M3
PIJP10 01 VddBU 1V2uC VDDOSC32
GNDOSC32 PIU1000160
1-2 default
COR139 C121
COC121 GND GND
R139 GND PIC12102 PIC12101
JP100
COJP10 PIJP10002 PIR13902

0R
PIR13901
100nF PIU1000161
COC122
C122
161
VDDBU GNDBU
166
PIU1000166
PIJP10 03 100nF PIU1000205

205 206
3V3dly VDDPLLA GNDPLLA PIU1000206
C124
COC124 208
GND PIC12402 PIC12401 GNDPLLA PIU1000208
1V2bat 100nF
3V3dly
D 199 200 PICCOC125
1C125 PICCOC126
1C126 PIC12701COC127 8COC128
C127 PIC12C128 9COC129
PIC12C129 0COC130
PIC13C130 PICCOC131
1C131 PICCOC132
1C132 COC133 PIC13401C134
C133 COC134 D
1V2uC
C135
COC135
PIU1000199 VDDPLLB GNDPLLB PIU1000200 GND 2501 2601 01 01 1 3101 3201 PIC13301
PIC12502 100nFPIC12602 100nFPIC12702 100nFPIC12802 100nFPIC12902 100nFPIC130 2 100nFPIC13102 100nFPIC13202 100nFPIC13302 100nFPIC13402 100nF
C PEAK-System Technik GmbH
100nF PIU1000173
173 174 Title:
3V3a AVDD AGND PIU1000174 GNDa
1V2bat from I/O sheet, I2C-RTC's coin cell GND PEAK-gridARM-EVB
GRIDARM-208 GRIDARM-208
Sheet:
R139+C122 optionally form a lowpass for delaying the VddBU-Reset Cell. PEAK-System Technik GmbH uController
This will -not- work with VddBU coming from a coin cell (JP100 pos 2-3). Otto-Röhm-Str. 69
Customer: Version: 1.2
D-64293 Darmstadt
Variant:
Engineer: StS *
*
Date: 30.05.2012
File: uController.SchDoc Page 1 of 6
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
COU100C
U100C 32bit wide SDRAM
D0 PIU1000156
156
D1 PIU1000155
155
D0
D1
125 DQM0_A0
DQM0_A0 PIU1000125
122 DQM2_A1
NWR2_DQM2_A1 PIU1000122 SDRAM x 16 SDRAM x 16
D2 PIU1000154
154 118 A2
D2 A2 PIU1000118 COU200A COU201A
D3 PIU1000153
153 116 A3 U200A U201A
D3 A3 PIU1000116
D4 PIU1000152
152 112 A4 A2 23 2 D16 A2 23 2 D0
D4 A4 PIU1000112 PIU200023 A0 DQ0 PIU20002 PIU201023 A0 DQ0 PIU20102
D5 PIU1000138
138 109 A5 A3 24 4 D17 A3 24 4 D1
D6 PIU1000136
136 108 A6 A4 25 5 D18 A4 25 5 D2
A D6 A6 PIU1000108 PIU200025 A2 DQ2 PIU20005 PIU201025 A2 DQ2 PIU20105 A
D7 PIU1000134
134 105 A7 A5 26 7 D19 A5 26 7 D3
D8 PIU1000133
133 28 A8 A6 29 8 D20 A6 29 8 D4
D9 PIU1000132
132 29 A9 A7 30 10 D21 A7 30 10 D5
D9 A9 PIU100029 PIU200030
A5 DQ5 PIU200010 PIU201030
A5 DQ5 PIU201010
D10 PIU1000131
131 31 A10 A8 31 11 D22 A8 31 11 D6
D11 PIU1000130
130 32 A11 A9 32 13 D23 A9 32 13 D7
D12 PIU1000129
129 33 A12 A10 33 42 D24 A10 33 42 D8
D13 PIU1000128
128 34 A13
PIU100034 A11 34
PIU200034 44
PIU200044 D25 A11 34
PIU201034 44
PIU201044 D9
D13 A13 A9 DQ9 A9 DQ9
D14 PIU1000127
127 35 A14 A10_SDRAM 22 45 D26 A10_SDRAM 22 45 D10
D15 PIU1000126
126 40 A15 A13 35 47 D27 A13 35 47 D11
D16 PIU1000187
187 42 A16_BA0
PIU100042 A14 36
PIU200036 48
PIU200048 D28 A14 36
PIU201036 48
PIU201048 D12
PCK2_PA16 BA0_A16 A12 DQ12 A12 DQ12
D17 PIU1000186
186 45 A17_BA1 50 D29 50 D13
PCK3_PA17 BA1_A17 PIU100045 DQ13 PIU200050 DQ13 PIU201050
D18 PIU1000185
185 46 A18 A16_BA0 20 51 D30 A16_BA0 20 51 D14
SCK1_PA18 A18 PIU100046 PIU200020 BA0 DQ14 PIU200051 PIU201020 BA0 DQ14 PIU201051
D19 PIU1000184
184 47 A19 A17_BA1 21 53 D31 A17_BA1 21 53 D15
RTS1_PA19 A19 PIU100047 PIU200021 BA1 DQ15 PIU200053 PIU201021 BA1 DQ15 PIU201053
D20 PIU1000182
182 48 A20
CTS1_PA20 A20 PIU100048
D21 PIU1000180
180 49 A21 DQM3 39 DQM1 39
TXD1_PA21 NAND_ALE_A21 PIU100049 PIU200039 DQMH PIU201039 DQMH
D22 PIU1000178
178 51 A22 DQM2_A1 15 DQM0_A0 PIU201015
15
RXD1_PA22 NAND_CLE_A22 PIU100051 PIU200015 DQML DQML
D23 PIU1000176
176 189 A23
TCLK0_PA23 PCK0_A23_PA14 PIU1000189
D24 PIU100017
17 CKE_SDRAM 37
PIU200037 CKE_SDRAM 37
PIU201037
TCLK1_PA24 CKE CKE
D25 PIU100015
15 CLK_SDRAM 38 CLK_SDRAM 38
TCLK2_PA25 PIU200038 CLK PIU201038 CLK
D26 PIU100013
13 39 CAS
TIOA0_PA26 CAS PIU100039
D27 PIU100011
11 41 RAS NCS1_SDRAM 19 NCS1_SDRAM 19
TIOB0_PA27 RAS PIU100041 PIU200019 CS PIU201019 CS
D28 PIU10009
9 43 A10_SDRAM RAS 18 RAS 18
TIOA1_PA28 SDA10 PIU100043 PIU200018 RAS PIU201018 RAS
D29 PIU10007
7 117 CKE_SDRAM CAS 17 CAS 17
TIOB1_PA29 SDRAMCKE PIU1000117 PIU200017 CAS PIU201017 CAS
D30 PIU10005
5 119 WE_SDRAM WE_SDRAM 16 WE_SDRAM 16
TIOA2_PA30 SDWE PIU1000119COR207 PIU200016 WE PIU201016 WE
D31 PIU10003
3 121 R207 33R CLK_SDRAM
TIOB2_PA31 SDRAMCLK PIU1000121 PIR20701 PIR20702
MT48LC32M16A2 MT48LC32M16A2
197 OE_NORflash
NRD PIU1000197
16 WE_NORflash COU200B
U200B COU201B
U201B
B NWR0 PIU100016
B
196 DQM1 28 1 28 1
DQM1_NWR1 PIU1000196 PIU200028 VSS VCC PIU20001 PIU201028 VSS VCC PIU20101
85 DQM3 41 14 41 14
DQM3_NWR3 PIU100085 PIU200041 VSS VCC PIU200014 PIU201041 VSS VCC PIU201014
54 27 3V3 54 27 3V3
PIU200054 VSS VCC PIU200027 PIU201054 VSS VCC PIU201027
103 NCS0_NORflash
NCS0 PIU1000103
181 NCS1_SDRAM 6 3 6 3
SDCS_NCS1 PIU1000181 PIU20006 VSSQ VCCQ PIU20003 PIC20 02 COC201
C201 PIU20106 VSSQ VCCQ PIU20103 COC203
C203
115 NCS2_NORflash32
NCS2 PIU1000115
12
PIU200012 VSSQ
9
VCCQ PIU20009 COC200 PPIICC2200110021
PIC20 01 C200
12
PIU201012 VSSQ
9
VCCQ PIU20109
PIC20202
COC202 PPIICC2200330021
PIC20201 C202
102 46 43 100nF 2.2uF 46 43 100nF 2.2uF
NAND_CS_NCS3 PIU1000102 PIU200046 VSSQ VCCQ PIU200043 PIU201046 VSSQ VCCQ PIU201043
52
PIU200052 VSSQ 49 52 49
VCCQ PIU200049 PIU201052 VSSQ VCCQ PIU201049
GRIDARM-208
GND MT48LC32M16A2 GND GND MT48LC32M16A2 GND
COR204 1k
R204
PIR20401 3V3
PIR20402
16bit wide NOR flash 32bit wide NOR flash hi=16bit mode
uC CONSTRAINT:
NOR flash x 16 With BMS=0, NOR access at startup is 16bit only.
NOR flash x 16 NOR flash x 16
COU204
U204 COU202
U202 COU203
U203
AVOIDANCE#1:
Accepted because cheap !
DQM2_A1 25 29 D0 BMS=0, 16bit wide NOR flash only (starting with A1). A2 25 29 D16 A2 25 29 D0
PIU204025 A0 DQ0 PIU204029 PIU202025 A0 DQ0 PIU202029 PIU203025 A0 DQ0 PIU203029
A2 24 31 D1 Probably too slow for X-I-P. A3 24 31 D17 A3 24 31 D1
A3 23 33 D2 A4 23 33 D18 A4 23 33 D2
A4 22 35 D3 AVOIDANCE#2: A5 22 35 D19 A5 22 35 D3
A5 21 38 D4 BMS=1, starts a "micro loader" from SPI flash, A6 21 38 D20 A6 21 38 D4
PIU204021 A4 DQ4 PIU204038
which in turn sets the registers to 32 bit access
PIU202021 A4 DQ4 PIU202038 PIU203021 A4 DQ4 PIU203038
A6 20 40 D5 A7 20 40 D21 A7 20 40 D5
PIU204020 A5 DQ5 PIU204040
and then loads UBOOT from the 32bit wide NOR flash
PIU202020 A5 DQ5 PIU202040 PIU203020 A5 DQ5 PIU203040
A7 19 42 D6 A8 19 42 D22 A8 19 42 D6
PIU204019 A6 DQ6 PIU204042
(and all the rest, maybe X-I-P). PIU202019 A6 DQ6 PIU202042 PIU203019 A6 DQ6 PIU203042
C A8 18 44 D7 A9 18 44 D23 A9 18 44 D7 C
PIU204018 A7 DQ7 PIU204044
Slow start, but X-I-P lateron possible... PIU202018 A7 DQ7 PIU202044 PIU203018 A7 DQ7 PIU203044
A9 8 30 D8 A10 8 30 D24 A10 8 30 D8
A10 7 32 D9 A11 7 32 D25 A11 7 32 D9
PIU20407 A9 DQ9 PIU204032 AVOIDANCE#3: PIU20207 A9 DQ9 PIU202032 PIU20307 A9 DQ9 PIU203032
A11 6 34 D10 BMS=0, all three NOR chips populated, A12 6 34 D26 A12 6 34 D10
A12 5 36 D11 a small 16 bit NOR on "-CS0" to load UBOOT from, A13 5 36 D27 A13 5 36 D11
A13 4 39 D12 a large 32bit NOR on "-CS2" for all the other things. A14 4 39 D28 A14 4 39 D12
A14 3 41 D13 X-I-P possible... A15 3 41 D29 A15 3 41 D13
A15 2 43 D14 A16_BA0PIU20202
2 43 D30 A16_BA0PIU20302
2 43 D14
PIU20402 A14 DQ14 PIU204043 A14 DQ14 PIU202043 A14 DQ14 PIU203043
A16_BA0PIU20401
1 45 D15 A17_BA1PIU20201
1 45 D31 A17_BA1PIU20301
1 45 D15
A15 DQ15 PIU204045 A15 DQ15 PIU202045 A15 DQ15 PIU203045
Default open: no Bootblock protection
A17_BA1PIU204048
48 A18 48 A18 48
A16 R202 1k
COR202 PIU202048 A16 PIU203048 A16
A18 17 47 A19 17 47 hi=16bit mode A19 17 47 hi=16bit mode
PIU204017 A17 BYTE# PIU204047
PIR20202 PIR20201 3V3 PIU202017 A17 BYTE# PIU202047 PIU203017 A17 BYTE# PIU203047
Default open: no Bootblock protection
A19 16 A20 16 A20 16

PIU204016 A18 PIU202016 A18 PIU203016 A18
A20 9 37 hi=16bit mode A21 9 37 A21 9 37
PIU20409 A19 VCC PIU204037 3V3 PIU20209 A19 VCC PIU202037 3V3 PIU20309 A19 VCC PIU203037 3V3
3V3 A21 10 3V3 A22 10 A22 10
PIU204010 A20 PIC20402 C204 C205
COC204 PIC20502 COC205 PIU202010 A20 C206 PIC20702 COC207
PIC20602 COC206 C207 PIU203010 A20 PIC20802 C208
COC208 PIC20902 C209
COC209
A22 13 A23 13 A23 13
PIR20 02 PIU204013 A21 PIC20401 100nFPIC20501 2.2uF PIR20601 PIU202013 A21 PIC20601 100nFPIC20701 2.2uF PIU203013 A21 PIC20801 100nF PIC20901 2.2uF
15 15 15
COR200
R200
COC210
C210
RY/BY PIU204015 COR206
R206
COC211
C211
RY/BY PIU202015 RY/BY PIU203015
10k 10k
PIR20 01 100nF WProt_Bootblk_NOR16 14
PIU204014 ACC PIR20602 100nF WProt_Bootblk_NOR32 14
PIU202014 ACC
WProt_Bootblk_NOR32 14
PIU203014 ACC
PIJP20 2 uC-Reset 12 GND PIJP203 2 uC-Reset PIU202012
12 GND uC-Reset PIU203012
12 GND
JP202
JP203
COJP202 PIJP20 1 PIC210 1

PIC210 2
OE_NORflash PIU204028
WE_NORflash
PIU204012
28
11
RESET
OE
46
COJP203 PIJP2031 PIC21101
PIC21102
OE_NORflash 28
PIU202028
WE_NORflash 11
RESET
OE
46
OE_NORflash 28
PIU203028
WE_NORflash 11
RESET
OE
46
PIU204011 WE VSS PIU204046 PIU202011 WE VSS PIU202046 PIU203011 WE VSS PIU203046
26 27 CS_NORflash32 26 27 CS_NORflash32 26 27
PIU204026
PIJP20001 PIJP20002 CE VSS PIU204027 PIU202026 CE VSS PIU202027 PIU203026 CE VSS PIU203027
GND GND COJP200 GND GND
JP200
GND GND GND
Adjust together
NCS0_NORflash SST38VF64 SST38VF64 SST38VF64
JP201
COJP201
D NCS0_NORflash WProt_Bootblk_NOR32 D
PIJP20101 C PEAK-System Technik GmbH
PIJP20102
CS_NORflash32 CS_NORflash32 Title:
PIJP20103 NCS2_NORflash32 PEAK-gridARM-EVB

Sheet:
uC-Reset uC-Reset uC-Reset PEAK-System Technik GmbH Memory
uC-Reset
PO\UC0RESET Otto-Röhm-Str. 69
valid combinations: Customer: Version: 1.2
D-64293 Darmstadt
JP200 closed AND JP201 2-3 Variant:
Engineer: StS *
JP200 open AND JP201 1-2 *
Date: 30.05.2012
File: Memory.SchDoc Page 2 of 6
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
3V3
GEMAC 1GBit PHY RJ45 PIR30 01

COR300
R300
COU100E
U100E
RGMII
COU301A
U301A internal Termination WE-7499111440 (-40..+85°C) COJ300
J300 PIR30 02100R
80 COR332
R332 33R RGMII_TxClk 32 1 DA1_P 2 10 COC300
C300
TXCLK PIU100080 PIR33202 PIR33201 PIU301032 GTX_CLK TxRxP_A PIU30101 PIJ30002 DA_P Vcc PIJ300010 PIC30001PIC30002 GND
63 COR333
R333 PIR3330133R RGMII_TxCtl 33 2 DA1_N 3 100nF
TXCTL PIU100063 PIR33302 PIU301033 Tx_EN TxRxM_A PIU30102 PIJ30003 DA_N
70 COR334
R334 PIR3340133R RGMII_TXD0 24 4
TXD0 PIU100070 PIR33402 PIU301024 TxD0 PIJ30004 DB_P
72 COR335
R335 PIR3350133R RGMII_TXD1 25 7 DB1_P 7
A TXD1 PIU100072 PIR33502
COR336
PIU301025 TxD1 TxRxP_B PIU30107 PIJ30007 DB_N A
74 R336 33R RGMII_TXD2 26 8 DB1_N 5
TXD2 PIU100074 PIR33602
COR337
PIR33601 PIU301026 TxD2 TxRxM_B PIU30108 PIJ30005 DC_P
78 R337 PIR3370133R RGMII_TXD3 27 6 RJ45 Giga
TXD3 PIU100078 PIR33702 PIU301027 TxD3 PIJ30006 DC_N
10 DC1_P 8
COR338 TxRxP_C PIU301010 PIJ30008
DD_P
53 RGMII_RxClk R338 33R 46 11 DC1_N 9 1
RXCLK PIU100053 PIR33802
COR339 PIR33801PIU301046 Rx_CLK TxRxM_C PIU301011 PIJ30009 DD_N n.c. PIJ30001
54 RGMII_RxCtl R339 33R 43
RXCTL PIU100054 PIR33902
COR340
PIR33901PIU301043 Rx_DV yellow = activity
57 RGMII_RxD0 R340 33R 42 14 DD1_P 14
RXD0 PIU100057 PIR34002
COR341
PIR34001 PIU301042 RxD0 TxRxP_D PIU301014 COR301 3V3 PIJ300014 Aye
58
PIU100058 RGMII_RxD1 R341PIR34102 33R
PIR34101 41
PIU301041 15 DD1_N R301 220R 13
RXD1 RxD1 TcRxM_D PIU301015 PIR30101 PIR30102 PIJ300013 Cye
Shield
Shield
59 RGMII_RxD2 COR342
R342 33R 38 LED cathodes COR302
R302 220R 12
RXD2 PIU100059 PIR34202
COR343
PIR34201PIU301038 RxD2 PIR30201 PIR30202 PIJ300012 Cgn
61 RGMII_RxD3 R343 33R 36 21 Eth_LED1 11
RXD3 PIU100061 PIR34302 PIR34301 PIU301036 RxD3 LED1 PIU301021 3V3 PIJ300011 Agn
19 Eth_LED2
LED2 PIU301019 green = connect
CLK125
52
PIU100052
Clk125 COR344
R344PIR34402
33R 55
PIR34401PIU301055 CLK125_NDO when new layout, pls. swap pin13+14 !! COC301
C301 PIJ30 B3 PIJ30 B4 WE-7499111440
B3
B4
45
PIR30601 PIR30602 3V3 COR303 Rx_ER PIU301045 (here by accident = green+green) GND PIC30102 PIC30101
81 Phy_Int R303 0RPIU301051
51 31
PHY_INTR PIU100081
COR306
PIR30302 PIR30301 INT Tx_ER PIU301031 1nF
R306 3k3 PIR30401 PIR30402
3V3
82 MDIO 49 57 Shield
MDIO PIU100082
COR304 PIU301049 MDIO LDO_O PIU301057 5k1 maybe ?
83 MDC R304 3k3PIU301048
48 COR305
MDC PIU100083 MDC R305 4,99k
62
PIU301062 PIR30502 PIR30501
PHYconfig ISET GND
GRIDARM-208 COR307
R307 33R COC302 33pF
3V3 3V3 50 60 C302
PIU301050 COL XI PIU301060
PIR30702 PIR30701 PIC30201 PIC30202
PIR30802
47
PIU301047 CRS PIR30901 PIXT30 3
COR309
R309 PIXT30002
COXT300
XT300
PIXT30004
PID30 01 COR308
R308 GND GND
BAW56 1M 25MHz
PIR30902
PIR30801 10k Delay > 10msec after power stable 56 59 PIXT30 1
D300
COD30 PID30003
PIC30401 COC304
PIU301056 RESET XO PIU301059
COC303
C303
PIC30301 PIC30302
33pF
PO\UC0RESET PID30 02 C304 KSZ9021RLI E-LQFP-64
uC-Reset PIC30402 1uF
GND
B B
COR345
R345
PIR34502 PIR34501
0R Bypass (default=open)
PHY Strapping Options
Bootstrap Options
-----------------
PHY- Address (5bit):

0- 0- <pin46>- <pin19>- <pin21>
- > set to " 00001"
Mode (4bit):
<pin36>- <pin38>- <pin41>- <pin42>
- > set to " 1111" = RGMII Mode - advertise all capabilities
Clk125enable (1bit):
<pin43>
- > set to " 1" = Enable 125kHz Clock Output at Pin 55
LEDmode (1bit):
<pin55>
PHY Power
COU301B
U301B
PHY Strapping Options 1V2D1
54
PIU301054 1,2VD
52
1,2VA_PLL
58
PIU301058 1V2_PLL1 1V2phy
COL301
L301
PIL30101 PIL30102 1V2_PLL1
C PIU301052 1,2VD
PIC31 02+ C311
COC311 PICCOC312
C312
31201 C
40
PIU301040 1,2VD
13 BLM21P331SPT
COR314
R314 COR315
R315 1,2VA PIU301013 1V2A1 10uF PIC31202 100nF
Eth_LED1 35 12
3V3 PIR31401 PIR31402 PIR31501 PIR31502 GND Phy_Addr0 PIU301035 1,2VD 1,2VA PIU301012 PIC31 01
29 5
1,2V, current up to 0,6A

10k 1k PIU301029 1,2VD 1,2VA PIU30105 GND
22
PIU301022 1,2VD
4
COR316 1,2VA PIU30104
R316 Eth_LED2 PIR31701COR317
R317
3V3 PIR31601 PIR31602 PIR31702 GND Phy_Addr1
10k 1k 44 64
3V3D1 PIU301044 3,3VD 3,3VA PIU301064 3V3A1 COL302
L302
37 61
COR318
R318 RGMII_RxClk
COR319
R319 PIU301037 3,3VD
30
3,3VA PIU301061
16
1V2phy PIL30201 PIL30202 1V2A1
3V3 PIR31801 PIR31802 PIR31901 PIR31902 GND Phy_Addr2 PIU301030 3,3VD
20
3,3VA PIU301016
6 BLM31A601SPT PIC31302+ C313
COC313 14COC314
PIC3C314
01 PICCOC315
C315
31501
4k7 4k7 PIU301020 3,3VD 3,3VA PIU30106 10uF PIC31402 100nFPIC31502 10nF
53 63 PIC31301
PIU301053 GND AGNDH PIU301063 GND
39
PIU301039 GND
9
AGNDH PIU30109
34 3
COR320
R320 COR321
R321 PIU301034 GND AGNDH PIU30103
RGMII_RxD0 28
3V3 PIR32001 PIR32002 PIR32101 PIR32102 GND Mode 0 PIU301028
23
GND
GND COL303
L303
4k7 4k7 PIU301023 GND 1V2phy PIL30301 PIL30302 1V2D1
18 65
COR322
R322 COR323
R323 PIU301018 GND E_PAD PIU301065 PIC31602+ C316
COC316 PIC3C317
17COC317
01 PIC3C318
18COC318
01 C319
PICCOC319
31901
RGMII_RxD1 17 BLM21P331SPT
3V3 PIR32201 PIR32202 PIR32301 PIR32302 GND Mode 1 PIU301017 GND 10uF PIC31702 100nFPIC31802 100nFPIC31902 100nF
4k7 4k7 GND
GND KSZ9021RLI PIC31601
COR324
R324 COR325
R325 GND
RGMII_RxD2
3V3 PIR32401 PIR32402 PIR32501 PIR32502 GND Mode 2 current consumption PHY,
4k7 4k7 worst case:
R326
COR326 R327 3,3V: 133mA L304
RGMII_RxD3 PIR32701COR327 1,2V: 563mA
COL304
3V3 PIR32601 PIR32602 PIR32702 GND Mode 3 3V3 PIL30401 PIL30402 3V3A1
4k7 4k7 (1GBit duplex 100%) BLM21P331SPT PIC320 2+ C320
COC320 PIC3C322
2COC322
01 PIC3C323
23COC323
01 C324
PICCOC324
32401
47uF PIC32 02 100nFPIC32302 10nF PIC32402 10nF
PIC320 1
GND
D D
COR328
R328 RGMII_RxCtl COR329
R329 C PEAK-System Technik GmbH
3V3 PIR32801 PIR32802 PIR32901 PIR32902 GND Clk125-enable
Title:
4k7 4k7 COL305
L305
3V3 PIL30501 PIL30502 3V3D1 PEAK-gridARM-EVB
BLM21P331SPT PIC32502+ C325
COC325 PIC3260+ C326
2 COC326 28COC328
PIC3C328
01 29COC329
PIC3C329
01 PICCOC330
C330
301
47uF 47uF PIC32802 100nFPIC32902 10nF PIC10nF
302 Sheet:
PEAK-System Technik GmbH 1GBit Ethernet
COR330
R330 Clk125
COR331
R331 PIC32501 PIC32601 Otto-Röhm-Str. 69
3V3 PIR33001 PIR33002 PIR33101 PIR33102 GND LEDmode GND Customer: Version: 1.2
D-64293 Darmstadt
4k7 4k7 Variant:
Engineer: StS *
*
Date: 30.05.2012
File: 1GB-Ethernet.SchDoc Page 3 of 6
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
I2C
(These parts mandatory in own designs !)
I2C
(These parts optional in own designs)
LCD text display
GND PIJP42703 PIJP42701
EEPROM COC411 3V3 EEPROM 5V0aux 3V3
C411 COJP427PIJP42702 2-3 default
LED Backlight
3V3 3V3 JP427
COU406
U406
1k x 8 100nF PIJP430 1 COC400
C400 COU400
U400 PIT4061 COR401
R401
COP400
P400
JP430
1
PIU40601 A0 Vcc
8
PIU40608
PIC41102 PIC41101
GND
COR433
COJP430 PIJP4302 open=write enable
GND
100nF
PIC40002 PIC40001
8
PIU40008 Vcc A0
1
PIU40001 3V3 COT400PIT40 02
T400
PIR40102 PIR40101 PIP40001
100R
1
TP
PIP40002
In some devices, address lines internally not connected !! 2 7 PIR43302 R433 1k 7 2 GND GND 2
PIU40602 A1 WP PIU40607 PIR43301 GND PIU40007 WP A1 PIU40002 GND
BCR191
Carefully read eeprom's data sheet !! 3
PIU40603 6
PIU40606 SCL SCL 6
PIU40006 3
PIU40003
A2 SCL SCL A2 3V3 A2 -must- be log.1 (=CS) !! COTP406
TP406 Header 2
4
PIU40604 Vss
5 SDA SDA 5 4 PIT40001
SDA PIU40605 PIU40005 SDA Vss PIU40004
I2C PIR40402 I2C

A GND Atmel 24C02 COR404
R404 24LC1025I/SN GND COTP405 PIT40 03 COC401
C401 A
TP405
10k www.microchip.com PIR40201 PIC40102PIC40101 GND
PIR40401
TP
EEPROM necessary for gaLoader 2 x 64k x 8 LCD_switch PIT40103 COR402
R402 100nF
Must be Addr. = 0x50
PIR40202220R
GND
PIT4051
BCR112
PIT40101
PIRV40 01 COTP404
TP404
CORV400 PITP40401
RV400
Display_Pwr_Switch
PIRV40003 TP
COH400
H400 text display COT401
T401
1k lin
10 PIH400010 3V3
(optional) PIT40102 PIRV40 02 LCD_power
periph. buses
9 PIH40009 GND 3V3 C404
COC404
SCL GND GND COP401
(unprotected)
8 PIH40008 P401
I2C SDA PIC40401PIC40402 GND
PIU401 6
Hitachi HD44780 compat. display

7 PIH40007
16
uC-Reset GND 1 PIP40101
6 PIH40006 PO\UC0RESET
uC-Reset COU401
U401 100nF
CS3_SPI HD44780-Display, optional PIP40102 2
5 PIH40005 from uC sheet 13 4 Contrast PIP40103
CS2_SPI INT P0 PIU40104 3
Vcc
PIU401013
PIH40004
4 5 RSel
SCK I2C P1 PIU40105 PIP40104 4
3 PIH40003 SCL 14
PIU401014 6 R/W
MOSI SCL P2 PIU40106 PIP40105 5
2 PIH40002 SDA 15 7 EN
PIH40001 MISO PIU401015 SDA P3 PIU40107 PIP40106 6
1 9 LCD-D0 PIP40107
ADC SPI SPI
3V3
1
PIU40101
2
A0
P4 PIU40109
10
P5 PIU401010
11 GND
LCD-D1 PIP40108
LCD-D2 PIP40109
7
8
GND
10R for current limit GND PIU40102 A1 P6 PIU401011 9
3V3a COR436 microSD card 3 12 LCD-D3 PIP401010
R436PIR43601 PIR43602 COJ400
J400 GND PIU40103 A2 P7 PIU401012 10
Clamp Diodes 3V3 COR453 LCD-D4 PIP401011
PID40802 PID40902 PID410 2 PID41 02 PID41202 0R R453 0R 11
COD408
D408 COD409
D409 COD410
D410 COD411
D411 COD412
D412 4 Micro-SD 7 PIR45301 MISO
PIU4018 PCA9554PW LCD-D5 PIP401012
BAT54S
BAT54S
BAT54S
BAT54S
BAT54S
PIJ40004 VCC DAT0 PIJ40007 PIR45302 12
8
Ain0i Ain1i Ain2i Ain3i Ain4i COC402 6 8 LCD-D6 PIP401013
PID40803 PID40903 PID41003 PID41103 PID41203 C402PIC40202 + PIC40302COC403
C403 PIJ40006 GND DAT1 PIJ40008 GND 13
B1 1 LCD-D7 PIP401014
PIC40301100nF PIJ4000B1 Case DAT2 PIJ40001 GND 14
PID40801 PID40901 PID410 1 PID41 01 PID41201 B2 2 CS1_SPI GND
47uFPIC40201 PIJ4000B2 Case CD/DAT3 PIJ40002
B3
PIJ4000B3 3
PIJ40003 MOSI Output register can't be read back ! Header 14
Case CMD COTP403
TP403
GNDa B4 5 SCK
GND PIJ4000B4 Case CLK PIJ40005
B 10 9 SDcard_detect SDcard_detect SDcard_detect SDcard_detect B
PIJ400010 Carddetect Carddetect PIJ40009 PITP40301 TP
4* analog in COR425 GND MicroSD
PIR40901
COR409 SD Drive attached
R425 R409 SDcard_detect
RV401 PIRV401 3
CORV401
PIR42501
3k3
PIR42502
PIR40902 10k via SPI to the gridARM uC
User controls
CS0_SPI
CS1_SPI
CS2_SPI
CS3_SPI
Relations: (These parts optional in own designs)
GNDa 3V3a
MOSI
MISO
PIRV40101 PIRV40102
3V3 user port A
SCK
1k lin COR426
R426 Dat0 MISO 3V3 3V3
PIR42601 PIR42602 Dat1 ------- COH401
H401 (unprotected)
PIRV402 3
SDcard_detect
CORV402
RV402 Dat2 -------
COR418
R418 270R COD400
D400 YE
3k3 PIR41801 PIR41802 PID4000K PID4000A
COR419
R419 270R COD401
D401 YE
10
GNDa PIRV40201 PIRV40202 3V3a Dat3 CS PIR41901 PIR41902 PID4010K PID4010A
1
2
3
4
5
6
7
8
9
CMD MOSI user & system I/O's COR420
R420 270R COD402
D402 YE COSP400
SP400
1k lin COR430
R430 PIR42001 PIR42002 PID4020K PID4020A
PIRV403
CORV403
RV403
PIR43001
3k3
PIR43002 CLK SCLK 3V3 3V3 C405
COC405 PIH401 PIH401 2 PIH401 3 PIH401 4 PIH401 5 PIH401 6 PIH401 7 PIH401 8 PIH401 9 PIH401 0 COR421
R421PIR42101
COR422
R422PIR42201
270R
PIR42102
270R
PIR42202
COD403
D403
PID4030K
COD404
D404
PID4040K
YE
PID4030A
GN
PID4040A
F/UCW-06 PISP40001+
PISP40002
PIJP43103 PIC40502PIC40501 GND COR423

R423 270R COD405
D405 GN COT402
T402 PIT40203
1-2 default
GNDa PIRV40301 PIRV40302 3V3a
PIU402 4 PIR42301 PIR42302 PID4050K PID4050A
24
PIR410 1 3V3 COR424
R424 270R COD406
D406 RD
serial flash 100nF
JP431
BCR112
1k lin COR431
R431
PIR43101 PIR43102 3V3 COU403
U403
PIJP43102 COJP431 COR410
R410 COU402
U402
4
GND
COJP405
JP405
R400
PIR42401
COR400
PIR40001
PIR42402
100R
PIR40002
PID4060K PID4060A
BeepPIT40201
I2C_INT
PIRV40 3
CORV404
RV404 PIR410 222k 1 IO_A0 PIU40204
Vcc
PIJP40501 PIJP40502
3k3 8 2 MISO PIJP43101 5 COJP406
JP406
PIU40308 VCC SO PIU40302 PIU40201 INT IO_A1 PIU40205 PIJP40601 PIJP40602
GNDa PIRV40401 PIRV40402 3V3a COC406
C406 PIC40602 PIU40303
3 5 MOSI 6 COJP407
JP407
1k lin 7
PIC40601 PIU40307
WP SI PIU40305
6 SCK
IO_A2 PIU40206
7
PIJP40701 PIJP40702
COJP408
JP408
Push Buttons PIT40202
100nF HOLD SCK PIU40306 IO_A3 PIU40207 PIJP40801 PIJP40802
4 1 CS0_SPI 8 COJP409
JP409 COR411
R411 COJP421PIPB40001
1k JP421 COPB400
PB400
PIU40304 GND CS PIU40301 I2C IO_A4 PIU40208 PIJP40901 PIJP40902 PIR41101 PIR41102 PIPB40002 PIPB40004
PIPB40003 GND
SCL 22 9 COJP410
JP410 PIJP42101 PIJP42102
VddBU PIR45401
COR454
R454
PIR45402 GND SST25VF032 SDA
PIU402022
23
SCL IO_A5 PIU40209
10
PIJP41001 PIJP41002
COJP411
JP411 COR412
R412 COJP422
1k JP422 COPB401
PB401
0R PIJP40 2 PIJP403 2 PIJP402 PIJP401 2 PIJP40 2 PIU402023 SDA IO_A6 PIU402010
11
PIJP41101 PIJP41102
COJP412
JP412
PIR41201 PIR41202 PIPB40102
PIPB40101
PIJP42201 PIJP42202
PIPB40104
PIPB40103
IO_A7 PIU402011 PIJP41201 PIJP41202
COD413
D413 COR413
R413 1k COJP423PIPB40201
JP423 COPB402
PIPB40204 PB402
PIJP40 1 PIJP403 1 PIJP402 1 PIJP401 PIJP40 1 BAT54S 21 13
internal pull up COJP413
JP413
PIR41301 PIR41302 PIPB40202
PIJP42301 PIJP42302
PIPB40203
JP404
JP403
JP402
JP401
JP400
COJP404 COJP403 COJP402 COJP401 COJP40 GND

COC413
C413PIC41302PIC41301100nF
3V3
3V3 PID41302
COR455 PID41303 R456

R455 COR456
PID41301
3V3
3V3
PIU402021
2
PIU40202
3
A0
A1
IO_B0 PIU402013
14
IO_B1 PIU402014
15
PIJP41301 PIJP41302
COJP414
JP414
PIJP41401 PIJP41402
COJP415
JP415
COR414
R414 PIR41401 PIR41402
COJP424
1k JP424 PIPB40302
PIPB40301
PIJP42401 PIJP42402
PIPB40304
PIPB40303
COPB403
PB403
3V3 PIU40203 A2 IO_B2 PIU402015 PIJP41501 PIJP41502
5V0_USBin PIR45502 PIR45501
PIR45602 PIR45601 16 COJP416
JP416 COR415
R415 COJP425PIPB40401
1k JP425 COPB404
PB404
C USB to power supply sheet 15k 22k
ca. 2.9V
GND
IO_B3 PIU402016
17
IO_B4 PIU402017
18
PIJP41601 PIJP41602
COJP417
JP417
PIJP41701 PIJP41702
COJP418
JP418
PIR41501
COR416
R416
PIR41502 PIPB40402
PIJP42501 PIJP42502
COJP426PIPB40501
1k JP426
PIPB40404
PIPB40403
COPB405
PB405
C
COJ401
J401 IO_B5 PIU402018 PIJP41801 PIJP41802 PIR41601 PIR41602 PIPB40502 PIPB40504
PIPB40503
USB (udp) 19 JP419
COJP419
GND
PIJP42601 PIJP42602
UI_N 3
COL400
L400
4 UA_N COR449
R449 18R PIJ40101 1
IO_B6 PIU402019
20
PIJP41901 PIJP41902
COJP420
JP420
PIL40003 PIL40004 IO_B7 PIU402020 PIJP42001 PIJP42002 GND
PIR44901 PIR44902 PIJ40102 2 M internal pull up GND
UI_P 2 1 UA_P PIR45101 PIR45102 PIJ40103 3 P
PIU4021 PCA9555PW when new layout, pls. correct PB's footprint !!
RTC_Alarm
PIL40002 PIL40001 COR450
R450 0R 3V3
12
COR451
R451 18R PIR45002 PIR45001
PIJ40104 4 (here by accident = shortcut, always pressed)
DLW31SN900SQ2 PIJ40100
PIJ40105 50
Digikey 490-1067-1-ND GND
GND PIH402 1 PIH402 PIH402 3 PIH402 4 PIH402 5 PIH402 6 PIH402 7 PIH402 8 PIH402 9 PIH40210
USB-B-THT
C412
COC412 Output register can't be read back !
1nF
1
2
3
4
5
6
7
8
9
10
ADC
Shield 3V3 COH402

H402 COU405
U405
H403
COH403 R447
COR447 U100F
COU100F R452
COR452 user port B TPS77012 to uC pin 161 (VddBU)
Ain0i COR448
R448 168 92 100R MISO COR429
R429 10k (unprotected)
1 PIH40301 PIU1000168 AD0 MISO_PA07 PIU100092 PIR42902 PIR42901 1PIU40501 5
2 PIH40302
Ain1i 169
PIU1000169 AD1
98
MOSI_PA08 PIU100098
MOSI COR428
R428PIR42802
10k
PIR42801
IN OUT PIU40505 1V2bat 5uA nom.
GND
Ain2i 170 99 SCK R427
COR427 10k C409
COC409PIC40901 PIC410 1 C410
COC410 TP400
COTP400
3 PIH40303 PIU1000170 AD2 SCK_PA09 PIU100099PIR45201 PIR45202 2 4
5* ADC in
PIR42702 PIR42701
Ain3i 171 101 CS0_SPI COR405
R405 10k EN FB PIU40504
1uF PIC40902 PIC410 2 4.7uF
(unprotected)
4 PIH40304 PIU1000171 AD3 SPICS0_PA10 PIU1000101 PIR40501

COR406
PIR40502
Ain4i 172 192 CS1_SPI R406 10k PITP40001 TP
5 PIH40305 PIU1000172 AD4
67
SPICS1_PA11 PIU1000192
191 CS2_SPI
PIR40601
COR407
R407
PIR40602
10k PIU40502
2
6 PIH40306 3V3a PIR44701 PIU100067 AD_EN
PIR44702 SPICS2_PA12 PIU1000191 PIR40701 PIR40702 VddBU
167 190 CS3_SPI R432
COR432 10k
7 PIH40307 3V3a PIR44801 PIU1000167 ADVREF
PIR44802 SPICS3_PA13 PIU1000190 PIR43201 PIR43202 GND
32.768 kHz
8 PIH40308 0R SPI
PIXTCOXT400
40 1
XT400
I2C_INT
9 PIH40309 GNDa 0R
149 89 CAN_Tx
COC407
C407
3V3
real time clock PIJP42901 COJP429
JP429
COTP401
TP401
10 PIH403010 3V3a PIU1000149 USB_DDP CANTX PIU100089 POCAN0TX
CAN_Tx 100nF RTC_Alarm
SDA
PIXT40003 PIXT40002
SCL
USB PIU1000148
148 87 CAN_Rx U404
COU404 2-3 default PITP40101 TP
USB_DDM CANRX PIU100087 POCAN0RX
CAN_Rx GND PIC40702 PIC40701
8 1 PIXT40 4 PIJP42902
+
Dbg_RxDi 18
CAN R437
COR437 PIU40408 Vcc
7
Xi PIU40401
2 PIBC40 2 RTC Alarm
PODBG0RXDI
Dbg_RxDi PIU100018 DBG_RXD_PA00 3V3 PIR43702 PIR43701 PIU40407 Out Xo PIU40402 PPIIJCP4402890013 COC408
C408
Dbg_TxDi Debug RS232 20 93 SCL 6 3 BC400
COBC400
D PODBG0TXDI
Dbg_TxDi PIU100020 DBG_TXD_PA01 I2C_SCL PIU100093 PIU40406 SCL Vbat PIU40403 PIR43801 PIR43802 PIBC40 1 CR2032 D
91
I2C_SDA PIU100091
SDA 400kHz max. 10k 5
PIU40405 SDA
4
Vss PIU40404 COR438
PIC40802 100nF
C PEAK-System Technik GmbH
Term_RtSi RS232 Terminal 27 R438
Term_RtSi
POTERM0RTSI PIU100027 RTS0_PA03 I2C I2C Title:
Term_CtSi 84 M41T81S 1k GND
POTERM0CTSI
Term_CtSi PIU100084 CTS0_PA04
POTERM0TXDI
Term_TxDi
Term_TxDi
Term_RxDi
86
PIU100086 TXD0_PA05
90
26
PA02 PIU100026PIR40301 PIR40302
188
R403 0R
COR403
COR457
R457 0R
I2C_INT PEAK-gridARM-EVB
Term_RxDi
POTERM0RXDI PIU100090 RXD0_PA06 PA15 PIU1000188PIR45701 PIR45702 PIR43502 PIR43402
PIR4 101 PIR4 201 PIR4 301 PIR4 401 PIR4 501 PIR4 601 COD407 COR440
D407 R440
COR435
R435 R434
COR434 RTC_Alarm
PEAK-System Technik GmbH
Sheet:
I/O
PIJP43202
R441
R442
R443
R444
R445
R446
GRIDARM-208 for "USB power detect" 2k2 2k2

COR441 COR442 COR443 COR4 4 COR4 5 COR4 6 3V3 PID4070A PID4070KPIR44002 PIR44001PIJP43201
GN 270R COJP432
JP432
PIJP43203
unnecessary when board powered from USB PIR43501 PIR43401 Otto-Röhm-Str. 69
3V3 PIR4 102 PIR4 202 PIR4 302 PIR4 402 PIR4 502 PIR4 602 D-64293 Darmstadt
Variant:
uC heartbeat LED 1-2 default Engineer: StS *
10k
10k
10k
10k
10k
10k
3V3 *
Date: 30.05.2012
File: IO.SchDoc Page 4 of 6
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
COTP502
TP502
PITP50201 TP
CAN Reset CAN
3V3 COU507
U507
MAX810L EUR+T
PIR50502 isolated
COU500 3
PIR50501 10k
COR505
R505 U500
PCA82C251T
COR525
R525PIR52501
0R
PIR52502
VCC PIU50703 5V0aux
RESET
2PIU50702
1
GNDiso
COJ500
J500
CAN
CAN_Tx CAN_Txi 1 8 PIR50001 GND PIU50701 GNDiso COC524 PIC52401
C524 COC525
PIC52501 C525
A
POCAN0TX
CAN_Tx PIU50001 TXD RS PIU50008
COR500
PIR50002 GNDiso
COL500 1
PIJ50001 0 COC526
C526 A
R500 0R L500 PIC52402 PIC52502 PIJ50000
47pF 47pF 6
PIJ50006 PIC52602PIC52601
POCAN0RX CAN_Rx CAN_Rxi 4 7 2PIL50002 3 CANH GND GNDiso
CAN_Rx PIU50004 RXD CANH PIU50007 In2 Out2 PIL50003 2
PIJ50002
5V0aux PIJP50003 PIJP50001
3V3 7 1nF
PIJP50 02 3 6 1PIL50001 4 CANL PIJ50007
male
PIU50003 VCC CANL In1 Out1 3
4
3
PIU50006 PIL50004
COJP500 COC500
JP500 C500 PIC50 02 PIS50 04 PIS50 03 GNDiso PIJ50003
8
CAN termination
COD500
optional assembly
2-3 default 2 5 D500 WE-SL1 51µH PIJ50008
100nFPIC50 01PIU50002 GND REF PIU50005 4 COC501
PESD24VL1BA
PESD24VL1BA
C501
COS500
S500
PESD1CAN PID51601 PID51701 PIJ50004
9
GNDiso 3.3V solution: 2PID50002 1 PIJ50009
10
PIC50102PIC50101 GND
PID50001 5
SN65HVD230 PPIISR55003012 PPIISR55004022 PIJ50005 PIJ500010
1nF
PID50 3
1
2
COR503
R503 COR504
R504 SUB-D 9
D516
D517
COR518
R518
PIR51802
0R
PIR51801
Using a 5V CAN transceiver (U500) like NXP's 82C251:
62R
PIR50301 PIR50401
62R COD516 COD517 Shield
Set jumper JP500 to pos 2-3 (=5V supply) GNDiso COR506 PID51602 PID51702
R506
PIR52402 PIR52401 --- PIR50601 PIR50602
Using a 3,3V CAN transceiver (U500) like TI's SN65HVD230: 0R PIC50202 COC502
COR524
R524 0R Set jumper JP500 to pos 1-2 (=3.3V supply) PIC50201 C502
10nF
Remark: CAN levels might be slightly reduced.
GNDiso GNDiso
ADuM-1201 bypass
CAN_Rx
CAN_Tx
B B
Activity LEDs
3V3
COU501
U501
PIJP50501 PIC50302 COC503 COD501
D501 COR501
R501
default: 1-2 (=CAN)
19 20 LED1
GND G
PIU501019 VCC PIU501020 PIC50301 C503 PID5010K PID5010A PIR50101 PIR50102 3V3 TxD
JP505
COJP505 PIJP50502 3V3 PIR53101
COR531
R531 1k
PIR53102
1
PIU50101 DIR GND
10
PIU501010 100nF YE 270R RS232 -
Debug
PIJP50503 PIJP50601 2 18 GND IN1
PIU50102 A1 B1 COD502
D502 COR502
R502 or CAN
JP506
PIU501018
COJP506 PIJP50602
alternative source for activity LED 1 + 2
Term_RxDi Term_RxDi
3
PIU50103 A2
4
PIU50104 A3
B2
B3
17
PIU501017
16
PIU501016
IN2
IN3
LED2 PID5020K PID5020A PIR50201
YE 270R
PIR50202 3V3 RxD
PIJP50603 Term_TxDi Term_TxDi 5
PIU50105 15 IN4
A4 B4 PIU501015
LED[1..4]
Dbg_RxDi
Dbg_TxDi
COR511
R511 0R CTL1 6 14 LED1
nullmodem cable f-f

PIR51101 PIR51102 PIU50106 A5 B5 PIU501014
Adjust R511 + R512 pads as square PIR51201 PIR51202
COJ503
J503 CTL2 7
PIU50107 A6 B6
13
PIU501013
LED2
COR512
R512 0R CTL3 8 12 LED3
1 2 PIU50108 A7 B7 PIU501012
DTE male
PIJ50301 PIJ50302 CTL4 9
PIU50109 11
PIU501011 LED4
COR509
R509PIR50901
0R
PIR50902
3 4
PIJ50303 PIJ50304
A8 B8
Adjust R509 + R510 pads as square 5 6 COD503
D503 COR507
R507
RS232 (TTY) COR510
R510
PIR51001 PIR51002PIJ50305
0R 7
PIJ50306
8
PIJ50307 PIJ50308
9 10
74VHC245 LED3 PID5030K PID5030A PIR50701
YE 270R
PIR50702 3V3 TxD RS232 -
PIJ50309 PIJ503010
3V3 COR513
R513 1M Terminal
Term_RxD
Term_TxD
COU502
U502 CTL1 IN1
Term_RtS
Term_CtS
PIC50402 COC504
C504 GND 10-89-1101 PIR51301 PIR51302 COD504
D504 COR508
R508
PIC50401 1 16 PIC50502 COC505
C505 LED4 RxD
100nFPIU50201 C1+
3
PIU50203 C1-
IVCC PIU502016
15
IGND PIU502015 PIC50501
100nF COC507
C507 1
COJ502
J502
0
RS232 COC506
C506 1PID50501 3
PID5040K PID5040A PIR50801
YE 270R
PIR50802 3V3
GND
PIC50701 PIC50702 PIJ50201 PIJ50200 Terminal GND PIC50601PIC50602
COD505
PID50503
4
PIC50802 COC508 PIU50204 2 100nF 6 220nF D505 BAT54
prolong cable m-f

C C2+ V+ PIU50202 PIJ50206 C
PIC50801 C508 PIU50205
5 6 Term_TxD 2
DCE female
100nF C2- V- PIU50206 COC509
PIC50901 PIC50902 GND PIJ50202
C509 100nF Term_CtS 7
PIJ50207 R514
COR514 1M
POTERM0TXDI Term_TxDi 11 14 Term_TxD Term_RxD 3 CTL2 IN2
Term_TxDi PIU502011 T1_IN T1_OUT PIU502014 PIR51501 PIR51502 PIJ50203 PIR51401 PIR51402
POTERM0RTSI Term_RtSi 10 7 R515
COR515 100R Term_RtS 8
Term_RtSi PIU502010 T2_IN T2_OUT PIU50207 PIJ50208
CTL[1..4]
Term_RtS 4
IN[1..4]
PIU502 TEXT1 TTL RS232 PIU502 TEXT2 PIR51601 PIR51602 PIJ50204
Term_RxDi 12 13 COR516
R516 100R 9 COC510
C510 1PID50601 3
POTERM0RXDI
Term_RxDi PIU502012 R1_OUT R1_IN PIU502013 PIJ50209
10 GND PIC51001PIC51002 PID50603
POTERM0CTSI
Term_CtSi
Term_CtSi 9
PIU50209 R2_OUT R2_IN PIU50208
8 PIR51701 PIR51702
Term_RxD 5
PIJ50205 PIJ502010 220nF COD506
D506 BAT54
R517
COR517 100R
MAX3232 Term_CtS GND SUB-D 9
PIR52001
COR520 PIR52002
COC511 R519
COR519 1M
R520 100R C511 CTL3 IN3
2
2
PIC51101PIC51102 PIR51901 PIR51902
Adjust R515 + R517 pads as square

PID507 2 COD507
D507
PID508 2 COD508
D508
PID509 2 COD509
D509
PID510 2 D510
COD510 1nF
GND
Adjust R516 + R520 pads as square Shield COC512
C512 1PID51101 3
GND PIC51201PIC51202 PID51103
RS232 (Debug) PESD15 PESD15 PESD15 PESD15

220nF COD511
D511 BAT54
3V3
PID50701 PID50801 PID50901 PID510 1 R521
COR521 1M
1
PIC51302 COU503
U503 CTL4 IN4
COC513 PIR52101 PIR52102
C513 1
PIC51301 100nFPIU50301 C1+
16
IVCC PIU503016 PIC51402 COC514
C514 GND GND GND GND
3
PIU50303 C1-
15 PIC51401
IGND PIU503015 100nF
PIC51702 COC517 4
C517 PIU50304 C2+ V+
2
PIU50302
GND
COC516
C516
PIC51601 PIC51602
100nF DEBUG GND PIC51501PIC51502
COC515
C515
220nF
1
PID51201
COD512
D512 BAT54
3
PID51203
PIC51701 5 6
nullmodem cable f-f
PIU50305 C2- V- PIU50306 PIC51801 PIC51802 GND
100nF COC518
C518 100nF COJ501
J501
opt. DTE male
Dbg_TxDi 11 14 1 2
Dbg_TxDi
PODBG0TXDI PIU503011 T1_IN T1_OUT PIU503014 PIR52201 PIR52202 PIJ50101 PIJ50102
GND
COJP502
JP502 10
PIJP50202 PIJP50201
PIU503010 T2_IN
COJP503
7 JP503
T2_OUT PIU50307PIJP50301 PIJP50302
COR522
R522 100R Dbg_RxD 3
PIJ50103
4
PIJ50104
Dbg_TxD 5 6
closed PIU503 TEXT1 TTL RS232 P I U 5 0 3 T E X T 2 closed PIJ50105 PIJ50106
Dbg_RxDi 12 13 7 8
Dbg_RxDi
PODBG0RXDI PIU503012 R1_OUT R1_IN PIU503013 PIR52301 PIR52302 PIJ50107 PIJ50108
D COJP504
JP504 9 8 COR523
R523 100R 9 10 D
TTL PIJP50402 PIJP50401
PIU50309 R2_OUT R2_IN PIU50308 C PEAK-System Technik GmbH
2
PIJ50109 PIJ501010
open Adjust R522 + R523 pads as square
PID51302 COD513
D513 PID51402 COD514
D514
MAX3232 GND 10-89-1101 Title:
PEAK-gridARM-EVB
PID51301 PESD15 PID51401 PESD15 PEAK-System Technik GmbH
Sheet:
Serial
1
Otto-Röhm-Str. 69
GND GND D-64293 Darmstadt
Variant:
Engineer: StS *
*
Date: 30.05.2012
File: Serial.SchDoc Page 5 of 6
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
JP600:
1-2: Supply from USB
2-3 Supply from ext. power
-NEVER- tie 1-2-3 together,

ext. power in as this will destroy your PC ! USB power in
COJ600
J600 Vsupply COF600 40V/3A COL600 COJP600 COL605 COR600
A F600 COD600 L600 JP600 L605 R600 A
Input CT1210K30 8...30V D600 5V 5V
8-30V
1 PIJ60001 PIF60001 PIF60002 PID6000A PID6000K
PIL60001 PIL60002 PIJP60003 PIJP60001
PIL60501 PIL60502 PIR60001 PIR60002 5V0_USBin
PIC601COC601
PIV60 2 PIC60202COC602
SK34B WE744772100 PIJP60 02 WE742792116 0R
SMCJ5.0
2 PIJ60002 GND C601
02 C602 3AT PID601 K
D604
1-2 default
PIC60101 1nF V600 PIC60201 100nF
COV600 COD601
D601 COC607
COD604 PID604 K
PHOENIX_MC_2 PIV60 01 PIC60702 C607 PIC60802 COC608
C608 COC600
C600 PIC60 02
SMDJ30CA
Vusb from I/O sheet
PIC60701 1nF PIC60801 1uF 1uF
PIC60 01
COJ601
J601 3 Shield PID6010A
PIJ60103 GND PID6040A
8-30V
2
PIJ60102 CT1210K30
1 Input GND
PIJ60101
PIC610COC610
C610
2
PIV601 2 PIC61102COC611
C611 digikey "SMDJ30CATR-ND"
NEB/J21R RS 448-382 GND GND GND
PIC610 1 COV601 PIC61101
1nF V601 100nF
9..12V/2A DC Wall Adaptor PIV60101
Shield
max. 29V here Vin
COTP600
TP600 COTP604
TP604 COTP601
TP601 COTP602
TP602
PITP60001 TP TP PITP60401 GND PITP60101 TP PITP60201 TP
B 3.3V Vin GND 3.3V

1.2V 1,2V
B
COC604 COL601
L601 populate R605 after test COL602
L602
C604 COC624 COC625
C624 C625 COU600
U600 4.5V to 36V nom. COR605 3V3 COU601
U601 COR607
nom. 2A, max. 3A R605 0R WE7447789001 R607 0R ca. 563 mA for PHY core
max. 29V here 15 7 PIL601023.3V 2 1 1.2V
Vin PIU600015 VIN SW PIU60007 PIL60101 PIR60501 PIR60502 PIU60102 Vin SW PIU60101 PIL60201 PIL60202
PIR60801 PIR60701 PIR60702 1V2phy
4.7uF 50V
4.7uF 50V
PIC60402 + 16
PIU600016 8 WE744770122 PIR61902 9 10 COR608 COC613
VIN SW PIU60008 COR622
R622 PIU60109 Vin SW PIU601010 R608 PIC61301 C613 populate R607 after test
33uF 50V
PIC62402 PIC62502 5 13 22uH 3A COR619

R619 6
PIC62401 PIC62501 PIU60005 VIN SW PIU600013 PIR62202 PIR62201 PIU60106 EN 10k PIC61302 82pF
6 14 5 PIR60802
PIC60401 PIU60006 VIN SW PIU600014
COD602
D602
PIR61901 1k2 PID6070A 100R PIU60107 Pgood
3
FB PIU60105 COR609
R609 0R ca. 100 mA for uC core
COC603 PIR60102 COD607
GND GND GND
19
PIU600019 EN Boost
17
PIU600017
C603
PIC60302PIC60301 PID6020K PID6020A GND
COR601
R601 PID605 K Power PID607 K GN D607 PIU60103
8
SGND
PIU601011 PGND
PIU60108 Bias
4
PIU60104 PID6030K
PIR60902 PIR60901 1V2uC
populate R609 after test
COD603
D603 PIR610 1
Thr. 1.25 V
20 2
100nF
CMMSH1-40-NST
PIR60101 30k PIC60502 COC605 COC614
C605 PIC61402 C614 PIR60602
COR606
R606
5COC615
PIC61C615
01 6COC616
PIC61C616
01 GND MIC4720YMME
COC617
PIC61701 C617 COR610
R610
PIU600020 SYNC FB PIU60002
Keep Feedback Wiring PIC60501 100uF PIC61401 100uF PIC6110uF
502 PIC61602 10uF 2MHz COR611 SSA33L PIC61702 4.7uF
PIR610 2 47k
200 kHz PIR60601 270R R611
BZV55C3V9
4 18 Away From Inductor Flux ! PIR60202 PIR61101 PIR61102 PID6030A
COD60P5ID605 A
D605
COR602 COC618
AGND
PIR60301 PIU60004 COMP Vcc PIU600018 R602 10R C618

PIC61801
GND
GND
GND
COR603
R603 COR604
R604
1 3 PIR60201 10k 1% PIC61802 100nF
EP
15k PIU60001 SS/Track PGOOD PIU60003 PIR60401 PIR60402

PIR60302 10k GND GND GND GND GND GND GND
COC626
C626 PIC62602 PIC60602 COC606
C606 PIC60902 COC609
C609
LM20333
PIU60 9 PIU60 10 PIU60 1 PIU60 12 PIU60 21 COC612
PIC61202 C612
9
10
11
12
21
10pF PIC62601 PIC60601 1.5nF PIC60901 6.8nF PIC61201 1uF
PIT60 02
GND GND GND GND GND
GND GND GND GND GND GND COT600
T600
BCR191
PIT60001
-no- SoftStart capacitor (C609): fastest startup when new layout, pls. add inverter transistor !! maybe some addtl. delay
(here by accident, PGOOD misinterpreted)
PIT60 3 1V2 on, when 3V3 good
COR621
R621
PIR62102 PIR62101
PIR620 2 10k
COC629
PIC62901 C629
COR620
R620
PIC62902 10nF
C PIR620 1 100k C
GND
GND
to SERIAL- and IO-sheet

CAN 5V iso supply 5V0aux
CAN 5V non-iso supply (for CAN transceiver and LCD text display)
COTP606
TP606 COTP605
TP605
PITP60601 TP TP PITP60501
COL603
L603
5V0iso 5V0non-iso COL604
L604
COU604
U604
WE742792022
R612
COR612 R613
COR613 5V / 250mA 8 3
PIR61201 PIR61202 PIR61301 PIR61302 PIL60401 PIL60402 PIU60408 OUT IN PIU60403 PIL60301 PIL60302 3V3
0R 0R WE742792022
populate either R612 or R613 after test PIR61402
PIC62802+ C628
COC628 C620 6 1 PIC6190+
2 C619
COC619
COTP603
TP603
COC620PIC620 2 C621
COC621PIC62102 C622
COC622PICPIU60406
62 01 CXN /SKIP PIU60401 R614 COC623
COR614 PIC62302C623
PIC62801 10uF 10uFPIC620 1 10uFPIC62101 1uFPICPIU60407
62 02 7 2 PIR61401120k PIC62301 2.2uF PIC61901 10uF
TP
GNDiso CXP /SHDN PIU60402
PIT6031 PIU60405
5
PGND GND
4
PIU60404
GND GND GND GND MAX682ESA GND GND GND

GNDiso
If 5V CAN transceiver is required:

Populate one of the shown 5V power supplies.
Depending on whether galvanic isolation is necessary or not. COR617
R617
GND PIR61702 PIR61701 GNDiso
D D
0R C PEAK-System Technik GmbH
default: shorten GNDs
Title:
PEAK-gridARM-EVB
Sheet:
PEAK-System Technik GmbH Power Supply
Otto-Röhm-Str. 69
D-64293 Darmstadt
Variant:
Engineer: StS *
*
Date: 30.05.2012
File: PowerSupply.SchDoc Page 6 of 6
1 2 3 4 5 6 7 8

PEAK-gridARM HWMan Eng

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PEAK-gridARM HWMan Eng

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PEAK-gridARM Eval Board

Linux-based Development Platform for

Document version 1.1.1 (2014-03-03)

Products taken into account

© 2014 PEAK-System Technik GmbH

PEAK-System Technik GmbH

Phone: +49 (0)6151 8173-20

Document version 1.1.1 (2014-03-03)

3 Elements on the Board 16

Appendix A Dimension Drawing 40

Appendix B Jumpers Overview 41

Appendix C Circuit Diagrams 45

Grid Connect 1 has developed the ARM7™ microcontroller gridARM™

The gridARM™ microcontroller by the U.S. company Grid Connect

This manual describes the evaluation board's hardware and first

1.1 Properties at a Glance

SPI bus (1 MHz) for two external extensions

Inputs and outputs

1.2 Prerequisites for Operation

Linux operating system recommended for the PC

1.3 Scope of Supply

Software and documentation

The chapter describes the startup of the PEAK-gridARM Evaluation

Afterwards, the setup of the date and time is described.

Note: This startup procedure is referring to the Linux image

In addition to the scope of supply you need:

2.1 Starting the Board

Attention! Electrostatic discharge (ESD) can damage or destroy

Do the following to start the evaluation board and to observe the

must be on the side of pins 1 and 2 of the double pin

RS-232 Debug (J501, left), USB (J401, right)

3. Use a null-modem cable (not included in the scope of

U-Boot bootloader with 3-second countdown

Start of the Linux boot sequence

Bottom: Linux prompt after the finished boot sequence

After a successful boot sequence, the μC status LED on the evalu-

Tip: The pre-installed Linux image is provided with several

2.2 Setting Date and Time

If required, enter a new time with the following two commands.

date YYYY-MM-DD hh:mm 3

Even after disconnecting the supply voltage, the real-time clock

2.3 Demo Scripts

The scripts are located in the /home/peak/demo/ directory.

2.3.1 LEDs at the Digital Outputs (led_demo,

Do the following to stop the script:

led_switch led [on|off]

led: cpu, yellow:1, yellow:2, yellow:3, yellow:4, green:5, green:6, red:7

Example (activating the yellow LED 3):

/home/peak/demo # ./led_switch yellow:3 on

2.3.2 Push Buttons at the Digital Inputs

In the demo script, no function is assigned to the other four buttons.

2.3.3 CAN Communication (can_demo)

To transmit single CAN messages manually, use the following

cansend can0 ID#Data

Example (CAN ID 12F, data bytes 45 67 89 AB):

/ # cansend can0 12F#456789AB

The Data Length Code (DLC, here: 4) is automatically determined

3 Elements on the Board

Attention! Electrostatic discharge (ESD) can damage or destroy

3.1 Supply Socket

Supply socket J600 (left), USB port J401 (top),

Jumper position JP600 Supply Eval Board via…

Important note: Never connect all three pins of the JP600