Question bank

Topic 1: Introduction to VLSI design and technology

1) Brief out merits of VLSI technology.
2) Explain VLSI design methodologies.
3) Explain VLSI design flow. (Y chart)
4) Define: Regularity, Modularity and Locality.

Topic 2: MOSFET Fabrication

1) Explain n-MOS fabrication process with neat and clean diagram.
2) What is a photo-resist? Explain types of photo-resist in detail.
3) Explain LOCOS method for MOS fabrication.
4) Describe CMOS n-well process with neat and clean diagram.

Topic 3: MOS Transistor

1) Describe MOS structure with energy band diagaram.
2) Why there is a voltage drop in a MOS system?
3) Explain MOS under external bias.
4) Explain operation of MOSFET.
5) Derive expression for threshold voltage of MOS transistor.
6) Draw and explain MOSFET V/I characteristic.
7) What is gradual channel approximation?
8) Write a note on MOSFET scaling.
9) Explain short-channel effect with expression10) Write a note on MOSFET capacitance.
NUMERICALS: Go through all the solved and unsolved numerical.

Topic 4: MOS Inverter: Static Characteristic

1) Explain Voltage Transfer Characteristc (VTC)
2) Explain noise margin with example.
3) Explain resistive load inverter. Derive expression for input and output voltage.
4) Explain depletion-load nMOS inverter. Derive expression for input and output voltage.
5) Explain CMOS inverter. Derive expression for input and output voltage.
6) Justify: Why W/L ratio of pMOS is three time that of nMOS.
NUMERICALS: Go through all the solved and unsolved numerical.

Topic 5: MOS Inverter: Switching Characteristic and interconnect

effect
1) Describe delay-time definitions with neat sketch.
2) Derive expression for delay times.
3) Write a note on CMOS ring oscillator.
4) Explain switching power dissipation of CMOS inverters.
5) What is power delay product?
Topic 6: Combitional MOS logic circuits
1) Write a short note on c-mos transmission gate.(pass gate).
2) Implement Boolean function by minimum number of c-mos transmission gates.
3) Explain &derive equation for c-mos NAND-2 gate.
4) Explain &derive equation for c-mos NOR-2 gate.

Topic 7: Sequntial MOS logic circuits

1) Explain c-mos SR latch circuit.
2) Explain c-mos D latch circuit.
3) Explain clocked SR latch circuit.

Topic 8: Dynamic logic circuits

1) Write a note on pass transistor circuit (what is logic 1 transfer & what is logic 0 transfer)
2) Explain what is voltage boot stripping.
3) Explain RATIOED logic circuit.
4) Explain RATIOLESS logic circuit.
5) Explain dynamic c-mos logic.
6) Write a note on DOMINO c-mos logic.
7) Write a note on NORA c-mos logic.
8) Numerical based on boot stripping.

Topic 9 & 10: Chip i/p and o/p circuits & design for testability
1) Explain on-chip clock generation & distribution.
2) Define what is latchup. Explain its causes & preveation.
3) Explain stuck at fault model.
4) Explain delay fault model.
5) Write a short note on AD_HOC TESTABLE design technique
6) Write a short note on BUILT-IN SELF TEST (BIST) technique.

Topic 11: Introduction to Programmable logic devices

1) Write a short note on FPGA.
2) Write a short note on CPLD.
3) Compare and list out difference between FPGAs & CPLDs.