5 4 3 2 1

D D

Latitude3000 Schematic
Haswell-ULT
C 2013-3-15 C

REV : X00

B B

A
DY : None Installed UM A

Wistron Corporation
UMA: UMA only installed 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

OPS: DISCRTE OPTIMUS installed Title

Cover Page
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 1 of 104
5 4 3 2 1
 5 4 3 2 1

CHARGER
BQ24717 44
Project code: 91.46O01.001 INPUTS OUTPUTS
PCB P/N : 13221-SA AD+
DCBATOUT
Revision: X00 Latitude3000 Block Diagram BT+
SYSTEM DC/DC
TPS51225 45
INPUTS OUTPUTS
3D3V_AUX_S5
D 5V_AUX_S5 D
DCBATOUT 5V_S5
3D3V_S5
DDR3L
1333/1600 CPU Core Power
Intel CPU DDR3L 1333/1600MHz Channel A ISL95813 46,47
33

GPU Haswell ULT SODIMM A

12
INPUTS OUTPUTS
DCBATOUT VCC_CORE
Nvidia 15W
VRAM(GDDR5) *8
PCIE x 4 DDR3L SUS
128M x 16b x 4(1GB) N14P-GV2 DDR3L
TPS51216 49
256M x 16b x 4(2GB) DDR3L 1333/1600
78,79,80,81 DDR3L 1333/1600MHz Channel B INPUTS OUTPUTS
73,74,75,76,77
SODIMM B
Lynx Point DCBATOUT 1D35V_S3
13
0D65V_S0
Switchable Graphic only 8 USB 2.0/1.1 ports
4 USB 3.0 ports CPU 1.05V
High Definition Audio 10/100 LAN RT8237 48
4 SATA ports PCIE x 1 RealTek RJ45 INPUTS OUTPUTS
8 PCIE ports 8111GUS Conn. 31
DCBATOUT 1D05V_S0
LPC I/F 30
R G B ACPI 4.0a CPU 1D5V_S0
C CRT TLV70215 51 C
55
PCIE x 1 Mini-Card INPUTS OUTPUTS
3D3V_S5 1D5V_S0
802.11 b/g/n
14.0" LCD eDP/LVDS Converter USB2.0 x 1 BT V4.0 combo Switches 36 83
Realtek eDP 58
(16:9) 52
RTD2136R 53
INPUTS OUTPUTS
Left side 1D35V_S3 1D35V_S0
Touch Panel USB3.0 x 2 5V_S5 5V_S0
USB2.0 x 1
USB3.0 Port x 2 3D3V_S5 0D675V_S0

USB2.0 x 2 VCCP_CPU 3D3V_S0

34,35
Camera 3D3V_S0 1D05V_VGA_S0
USB2.0 x 1 3D3V_VGA_S0
Digital MIC 52 USB Board 1D35V_VGA_S0
Right side

HDA USB2.0 x 1 USB2.0 Port x 1 PCB LAYER

MIC_IN/GND
CODEC
HDA L1:Top L5:VCC
HP_R/L Realtek L2:GND L6:Signal
29 L3:Signal L7:GND
B Combo Jack ALC3223 27 L4:Signal L8:Bottom B

CardReader SD/SDHC/MS/MS Pro

2CH SPEAKER USB2.0 x 1
RealTek Slot
(2CH 2W/4ohm) 33
RTS5176E 32

29
LPC debug port LPC BUS
65

Thermal
NUVOTON SMBUS
NCT7718W 26 KBC
NUVOTON SPI SATA(Gen3) x 1 HDD
Fan Control NPCE985P 56
NUVOTON 24
NCT3940S-A 26
Flash ROM
PS2 8MB
Int. SATA(Gen1) x 1 ODD
Quad Read 25
FAN 26
A
KB 62 56 A

Touch PAD SMBUS

Image sensor UM
62
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Block Diagram
Size Document Number Rev
C Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 2 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 3 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
1D05S_VCCST

RN401
XDP_TMS 1 8
XDP_TDI 2 7
D 3 6 D
XDP_TDO 4
XDP 5

Do Not Stuff

XDP_TRST# R402 1
XDP 2 Do Not Stuff
XDP_TCLK R406 1 2 51R2J-2-GP

Check TCLK Pull down Res.

1D05S_VCCST
HSW_ULT_DDR3L
CPU1B 2 OF 19
1

R401 TP401 1 SKTOCC# D61

62R2J-GP TP402 H_CATERR# PROC_DETECT# MISC
1 K61 CATERR#
N62 J62 XDP_PRDY# XDP_PRDY# 96
24 H_PECI PECI PRDY#
C K62 XDP_PREQ# XDP_PREQ# 96 C
2

PREQ# XDP_TCLK
PROC_TCK E60 XDP_TCLK 96
E61 XDP_TMS XDP_TMS 96
JTAG PROC_TMS
24,42,44,46 H_PROCHOT# 1 2 H_PROCHOT#_R K63 PROCHOT# PROC_TRST# E59 XDP_TRST# XDP_TRST# 96
R403 THERMAL F63 XDP_TDI XDP_TDI 96
PROC_TDI XDP_TDO
56R2J-4-GP PROC_TDO F62 XDP_TDO 96
Layout Note: TP403 1 H_CPUPWRGD C61 PROCPWRGD XDP_BPM[7:0]
Impedance control:50 ohm R405
PWR
XDP_BPM[7:0] 96
2 1 J60 XDP_BPM0
BPM#0 XDP_BPM1
10KR2J-3-GP BPM#1 H60
H61 XDP_BPM2
BPM#2 XDP_BPM3
BPM#3 H62
SM_RCOMP_0 AU60 K59 XDP_BPM4
SM_RCOMP_1 SM_RCOMP0 DDR3L BPM#4 XDP_BPM5
AV60 SM_RCOMP1 BPM#5 H63
SM_RCOMP_2 AU61 K60 XDP_BPM6
SM_DRAMRST# SM_RCOMP2 BPM#6 XDP_BPM7
AV15 SM_DRAMRST# BPM#7 J61
DDR_PG_CTRL AV61
12 DDR_PG_CTRL SM_PG_CNTL1

B B
HASWELL-6-GP

R407 1 2 200R2F-L-GP SM_RCOMP_0 1D35V_S3

Layout Note:
R408 1 2 120R2F-GP SM_RCOMP_1 Place close to DIMM
R409 1 2 100R2F-L1-GP-U SM_RCOMP_2 1 R410
470R2J-2-GP
2

R404
SM_DRAMRST# 1 2 DDR3_DRAMRST# 12,13
0R2J-2-GP
Layout Note: UM
Design Guideline:
SM_RCOMP keep routing length less than 500 mils.
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (THERMAL/MISC/PM)
Size Document Number Rev
A4 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 4 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D
HSW_ULT_DDR3L 3 OF 19 HSW_ULT_DDR3L 4 OF 19
CPU1C CPU1D

M_A_DQ[63:0]
12 M_A_DQ[63:0] M_B_DQ[63:0]
M_A_DQ0 AH63 AU37
SA_DQ0 SA_CLK#0 M_A_DIMA_CLK_DDR#0 12 13 M_B_DQ[63:0]
M_A_DQ1 AH62 AV37 M_B_DQ0 AY31 AM38
M_A_DQ2 SA_DQ1 SA_CLK0 M_A_DIMA_CLK_DDR0 12 M_B_DQ1 SB_DQ0 SB_CK#0 M_B_DIMB_CLK_DDR#0 13
AK63 AW36 AW31 AN38
M_A_DQ3 SA_DQ2 SA_CLK#1 M_A_DIMA_CLK_DDR#1 12 M_B_DQ2 SB_DQ1 SB_CK0 M_B_DIMB_CLK_DDR0 13
AK62 AY36 AY29 AK38
M_A_DQ4 SA_DQ3 SA_CLK1 M_A_DIMA_CLK_DDR1 12 M_B_DQ3 SB_DQ2 SB_CK#1 M_B_DIMB_CLK_DDR#1 13
AH61 AW29 AL38
M_A_DQ5 SA_DQ4 M_B_DQ4 SB_DQ3 SB_CK1 M_B_DIMB_CLK_DDR1 13
AH60 AU43 AV31
M_A_DQ6 SA_DQ5 SA_CKE0 M_A_DIMA_CKE0 12 M_B_DQ5 SB_DQ4
AK61 AW43 AU31 AY49
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIMA_CKE1 12 M_B_DQ6 SB_DQ5 SB_CKE0 M_B_DIMB_CKE0 13
AK60 AY42 AV29 AU50
M_A_DQ8 SA_DQ7 SA_CKE2 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIMB_CKE1 13
AM63 AY43 AU29 AW49
M_A_DQ9 SA_DQ8 SA_CKE3 M_B_DQ8 SB_DQ7 SB_CKE2
AM62 AY27 AV50
M_A_DQ10 SA_DQ9 M_B_DQ9 SB_DQ8 SB_CKE3
AP63 AP33 AW27
M_A_DQ11 SA_DQ10 SA_CS#0 M_A_DIMA_CS#0 12 M_B_DQ10 SB_DQ9
AP62 AR32 AY25 AM32
M_A_DQ12 SA_DQ11 SA_CS#1 M_A_DIMA_CS#1 12 M_B_DQ11 SB_DQ10 SB_CS#0 M_B_DIMB_CS#0 13
AM61 AW25 AK32
M_A_DQ13 SA_DQ12 TP_M_A_DIMA_ODT0 TP501 M_B_DQ12 SB_DQ11 SB_CS#1 M_B_DIMB_CS#1 13
AM60 AP32 1 AV27
M_A_DQ14 SA_DQ13 SA_ODT0 M_B_DQ13 SB_DQ12 TP_M_B_DIMB_ODT0 TP503
AP61 AU27 AL32 1
M_A_DQ15 SA_DQ14 M_B_DQ14 SB_DQ13 SB_ODT0
AP60 AY34 M_A_RAS# 12 AV25
M_A_DQ16 SA_DQ15 SA_RAS# M_B_DQ15 SB_DQ14
AP58 AW34 M_A_WE# 12 AU25 AM35 M_B_RAS# 13
M_A_DQ17 SA_DQ16 SA_WE# M_B_DQ16 SB_DQ15 SB_RAS#
AR58 AU34 M_A_CAS# 12 AM29 AK35 M_B_WE# 13
M_A_DQ18 SA_DQ17 SA_CAS# M_B_DQ17 SB_DQ16 SB_WE#
AM57 AK29 AM33 M_B_CAS# 13
M_A_DQ19 SA_DQ18 M_B_DQ18 SB_DQ17 SB_CAS#
AK57 AU35 M_A_BS0 12 AL28
M_A_DQ20 SA_DQ19 SA_BA0 M_B_DQ19 SB_DQ18
AL58 AV35 M_A_BS1 12 AK28 AL35 M_B_BS0 13
M_A_DQ21 SA_DQ20 SA_BA1 M_B_DQ20 SB_DQ19 SB_BA0
AK58 AY41 M_A_BS2 12 AR29 AM36 M_B_BS1 13
M_A_DQ22 SA_DQ21 SA_BA2 M_B_DQ21 SB_DQ20 SB_BA1
AR57 AN29 AU49 M_B_BS2 13
M_A_DQ23 SA_DQ22 M_A_A0 M_A_A[15:0] 12 M_B_DQ22 SB_DQ21 SB_BA2
AN57 AU36 AR28
M_A_DQ24 SA_DQ23 SA_MA0 M_A_A1 M_B_DQ23 SB_DQ22 M_B_A0 M_B_A[15:0] 13
AP55 AY37 AP28 AP40
M_A_DQ25 SA_DQ24 SA_MA1 M_A_A2 M_B_DQ24 SB_DQ23 SB_MA0 M_B_A1
AR55 AR38 AN26 AR40
M_A_DQ26 SA_DQ25 SA_MA2 M_A_A3 M_B_DQ25 SB_DQ24 SB_MA1 M_B_A2
AM54 AP36 AR26 AP42
M_A_DQ27 SA_DQ26 SA_MA3 M_A_A4 M_B_DQ26 SB_DQ25 SB_MA2 M_B_A3
AK54 AU39 AR25 AR42
M_A_DQ28 SA_DQ27 SA_MA4 M_A_A5 M_B_DQ27 SB_DQ26 SB_MA3 M_B_A4
AL55 AR36 AP25 AR45
M_A_DQ29 SA_DQ28 SA_MA5 M_A_A6 M_B_DQ28 SB_DQ27 SB_MA4 M_B_A5
AK55 AV40 AK26 AP45
M_A_DQ30 SA_DQ29 SA_MA6 M_A_A7 M_B_DQ29 SB_DQ28 SB_MA5 M_B_A6
AR54 AW39 AM26 AW46
M_A_DQ31 SA_DQ30 DDR CHANNEL A SA_MA7 M_A_A8 M_B_DQ30 SB_DQ29 SB_MA6 M_B_A7
AN54 AY39 AK25 AY46
M_A_DQ32 SA_DQ31 SA_MA8 M_A_A9 M_B_DQ31 SB_DQ30 SB_MA7 M_B_A8
AY58 AU40 AL25 AY47
M_A_DQ33 SA_DQ32 SA_MA9 M_A_A10 M_B_DQ32 SB_DQ31 DDR CHANNEL B SB_MA8 M_B_A9
AW58 AP35 AY23 AU46
M_A_DQ34 SA_DQ33 SA_MA10 M_A_A11 M_B_DQ33 SB_DQ32 SB_MA9 M_B_A10
AY56 AW41 AW23 AK36
M_A_DQ35 SA_DQ34 SA_MA11 M_A_A12 M_B_DQ34 SB_DQ33 SB_MA10 M_B_A11
AW56 AU41 AY21 AV47
M_A_DQ36 SA_DQ35 SA_MA12 M_A_A13 M_B_DQ35 SB_DQ34 SB_MA11 M_B_A12
AV58 AR35 AW21 AU47
M_A_DQ37 SA_DQ36 SA_MA13 M_A_A14 M_B_DQ36 SB_DQ35 SB_MA12 M_B_A13
C AU58 AV42 AV23 AK33 C
M_A_DQ38 SA_DQ37 SA_MA14 M_A_A15 M_B_DQ37 SB_DQ36 SB_MA13 M_B_A14
AV56 AU42 AU23 AR46
M_A_DQ39 SA_DQ38 SA_MA15 M_B_DQ38 SB_DQ37 SB_MA14 M_B_A15
AU56 M_A_DQS#[7:0] 12 AV21 AP46
M_A_DQ40 SA_DQ39 M_A_DQS#0 M_B_DQ39 SB_DQ38 SB_MA15
AY54 AJ61 AU21 M_B_DQS#[7:0] 13
M_A_DQ41 SA_DQ40 SA_DQSN0 M_A_DQS#1 M_B_DQ40 SB_DQ39 M_B_DQS#0
AW54 AN62 AY19 AW30
M_A_DQ42 SA_DQ41 SA_DQSN1 M_A_DQS#2 M_B_DQ41 SB_DQ40 SB_DQSN0 M_B_DQS#1
AY52 AM58 AW19 AV26
M_A_DQ43 SA_DQ42 SA_DQSN2 M_A_DQS#3 M_B_DQ42 SB_DQ41 SB_DQSN1 M_B_DQS#2
AW52 AM55 AY17 AN28
M_A_DQ44 SA_DQ43 SA_DQSN3 M_A_DQS#4 M_B_DQ43 SB_DQ42 SB_DQSN2 M_B_DQS#3
AV54 AV57 AW17 AN25
M_A_DQ45 SA_DQ44 SA_DQSN4 M_A_DQS#5 M_B_DQ44 SB_DQ43 SB_DQSN3 M_B_DQS#4
AU54 AV53 AV19 AW22
M_A_DQ46 SA_DQ45 SA_DQSN5 M_A_DQS#6 M_B_DQ45 SB_DQ44 SB_DQSN4 M_B_DQS#5
AV52 AL43 AU19 AV18
M_A_DQ47 SA_DQ46 SA_DQSN6 M_A_DQS#7 M_B_DQ46 SB_DQ45 SB_DQSN5 M_B_DQS#6
AU52 AL48 AV17 AN21
M_A_DQ48 SA_DQ47 SA_DQSN7 M_B_DQ47 SB_DQ46 SB_DQSN6 M_B_DQS#7
AK40 M_A_DQS[7:0] 12 AU17 AN18
M_A_DQ49 SA_DQ48 M_A_DQS0 M_B_DQ48 SB_DQ47 SB_DQSN7
AK42 AJ62 AR21 M_B_DQS[7:0] 13
M_A_DQ50 SA_DQ49 SA_DQSP0 M_A_DQS1 M_B_DQ49 SB_DQ48 M_B_DQS0
AM43 AN61 AR22 AV30
M_A_DQ51 SA_DQ50 SA_DQSP1 M_A_DQS2 M_B_DQ50 SB_DQ49 SB_DQSP0 M_B_DQS1
AM45 AN58 AL21 AW26
M_A_DQ52 SA_DQ51 SA_DQSP2 M_A_DQS3 M_B_DQ51 SB_DQ50 SB_DQSP1 M_B_DQS2
AK45 AN55 AM22 AM28
M_A_DQ53 SA_DQ52 SA_DQSP3 M_A_DQS4 M_B_DQ52 SB_DQ51 SB_DQSP2 M_B_DQS3
AK43 AW57 AN22 AM25
M_A_DQ54 SA_DQ53 SA_DQSP4 M_A_DQS5 M_B_DQ53 SB_DQ52 SB_DQSP3 M_B_DQS4
AM40 AW53 AP21 AV22
M_A_DQ55 SA_DQ54 SA_DQSP5 M_A_DQS6 M_B_DQ54 SB_DQ53 SB_DQSP4 M_B_DQS5
AM42 AL42 AK21 AW18
M_A_DQ56 SA_DQ55 SA_DQSP6 M_A_DQS7 M_B_DQ55 SB_DQ54 SB_DQSP5 M_B_DQS6
AM46 AL49 AK22 AM21
M_A_DQ57 SA_DQ56 SA_DQSP7 M_B_DQ56 SB_DQ55 SB_DQSP6 M_B_DQS7
AK46 AN20 AM18
M_A_DQ58 SA_DQ57 SB_DQ56 SB_DQSP7
AM49 AP49 +V_SM_VREF_CNT +V_SM_VREF_CNT 37
M_B_DQ57 AR20
M_A_DQ59 SA_DQ58 SM_VREF_CA M_B_DQ58 SB_DQ57
AK49 AR51 DDR_WR_VREF01 12 AK18
M_A_DQ60 SA_DQ59 SM_VREF_DQ0 M_B_DQ59 SB_DQ58
AM48 AP51 DDR_WR_VREF02 13 AL18
M_A_DQ61 SA_DQ60 SM_VREF_DQ1 M_B_DQ60 SB_DQ59
AK48 AK20
M_A_DQ62 SA_DQ61 M_B_DQ61 SB_DQ60
AM51 AM20
M_A_DQ63 SA_DQ62 M_B_DQ62 SB_DQ61
AK51 AR18
SA_DQ63 M_B_DQ63 SB_DQ62
AP18
SB_DQ63

HASWELL-6-GP HASWELL-6-GP

B B

A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDR)
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 5 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

CPU1S HSW_ULT_DDR3L 19 OF 19

CFG[19:0]
96 CFG[19:0]
CFG0 AC60 AV63
CFG1 CFG0 RSVD_TP#AV63
AC62 CFG1 RSVD_TP#AU63 AU63
CFG2 AC63
CFG3 CFG2
AA63 CFG3
CFG4 AA60 C63
CFG5 CFG4 RSVD_TP#C63
Y62 CFG5 RSVD_TP#C62 C62
CFG6 Y61 B43 EDP_SPARE 1 TP605
CFG7 CFG6 RSVD#B43
Y60 CFG7
CFG8 V62 A51
CFG9 CFG8 RSVD_TP#A51
V61 CFG9 RSVD_TP#B51 B51
CFG10 V60
CFG11 CFG10
U60 CFG11 RSVD_TP#L60 L60
CFG12 T63 CFG12
CFG13 T62 CFG13
RESERVED
RSVD#N60 N60 1127 add (follow EA40)
CFG14 T61
CFG15 CFG14
T60 CFG15 RSVD#W23 W23
Y22 PROC_OPI_COMP3 R606 1 DY 2 Do Not Stuff
CFG16 RSVD#Y22
AA62 CFG16 PROC_OPI_RCOMP AY15 PROC_OPI_COMP R602 1 2 49D9R2F-GP
CFG18 U63
CFG17 CFG18
AA61 CFG17 RSVD#AV62 AV62
CFG19 U62 D58
C CFG19 RSVD#D58 C
CFG_RCOMP
1 2 V63 CFG_RCOMP VSS P22
N21
Layout Note:
VSS
R601 A5 RSVD#A5
1.Referenced "continuous" VSS plane only.
49D9R2F-GP P20 HVM_CLK# 1 2.Avoid routing next to clock pins or noisy
RSVD#P20
E1 R20 HVM_CLK 1 TP619
D1
RSVD#E1 RSVD#R20 TP620 signals.
RSVD#D1 3.Trace width: 12~15mil
J20 RSVD#J20
H18 RSVD#H18 4.Isolation Spacing: 12mil
1 2 TD_IREF B12 5.Max length: 500mil
TD_IREF
R603
8K2R2F-1-GP

CFG3
1

PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

R604
Do Not Stuff 0 : ENABLED
DY CFG[3] SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
2

1 : DISABLED

B B
CFG4
1

DISPLAY PORT PRESENCE STRAP

R605
1KR2J-1-GP 0 : ENABLED
CFG[4] AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT
2

1 : DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RESERVED)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 6 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

VCC_CORE
HSW_ULT_DDR3L
D CPU1L 12 OF 19 D

L59 RSVD#L59 VCC C36

1D35V_S3 J58 C40
RSVD#J58 VCC
C44
1D05S_VCCST 1127 Change net name of R703.2 AH26
VCC
C48
VDDQ VCC
from VR_SVID_ALERT# to AJ31
AJ33
VDDQ VCC C52
C56
R703 1 VDDQ VCC
2 75R2F-2-GP VR_SVID_ALERT#
H_CPU_SVIDALRT# AJ37
AN33
VDDQ VCC E23
E25
R704 1 VDDQ VCC
2 130R2F-1-GP H_CPU_SVIDDAT AP43 VDDQ VCC E27
VCC_CORE AR48 E29
VDDQ VCC
Layout Note: AY35 VDDQ VCC E31
1127 130R change to 110R 1. Place close to CPU
AY40
AY44
VDDQ VCC E33
E35
VDDQ VCC

1
1203 110R change to 130R 2. VCC_SENSE/ VSS_SENSE AY50 VDDQ VCC E37
E39
impedance=50 ohm R702 F59
VCC
E41
VCC_CORE VCC VCC
3. Lwngth match<25mil 100R2F-L1-GP-U N58 E43
RSVD#N58 VCC
AC58 E45

2
RSVD#AC58 VCC
VCC E47
46 VCC_SENSE E63 VCC_SENSE VCC E49
AB23 RSVD#AB23 VCC E51
TP701 1 TP_VCCIO_OUT A59 VCCIO_OUT VCC E53
+VCCIOA_OUT E20 VCCIOA_OUT VCC E55
AD23 RSVD#AD23 VCC E57
AA23 RSVD#AA23 VCC F24
R701 AE59 F28
43R2J-GP RSVD#AE59 VCC
VCC F32
C
46 VR_SVID_ALERT# 1 2H_CPU_SVIDALRT# L62 VIDALERT# VCC F36 C
H_CPU_SVIDCLK N63 HSW ULT POWER F40
3D3V_S5 46 H_CPU_SVIDCLK VIDSCLK VCC
H_CPU_SVIDDAT L63 F44
46 H_CPU_SVIDDAT VIDSOUT VCC
H_VCCST_PW RGD B59 F48
VCCST_PWRGD VCC
1127_modify 46 H_VR_ENABLE
R710 1 2 Do Not Stuff
F60
C59
VR_EN VCC F52
F56
1D05S_VCCST
(follow EA40) IMVP_PW RGD_R DY VR_READY VCC
G23
VCC
1

D63 G25
C702 DY 96 PW R_DEBUG PW R_DEBUG H59
VSS VCC
G27
Do Not Stuff PWR_DEBUG# VCC
P62 G29
2

VSS VCC
1D05S_VCCST R705 1 2150R2J-L1-GP-U P60 RSVD_TP#P60 VCC G31
1 P61 RSVD_TP#P61 VCC G33
U701 R706 N59 G35
RSVD_TP#N59 VCC
1 5 DY Do Not Stuff N61
T59
RSVD_TP#N61 VCC G37
G39
NC#1 VCC RSVD#T59 VCC
AD60 G41
2

RSVD#AD60 VCC
2 AD59 G43
36,48 1D05V_VTT_PW RGD A DY AA59
RSVD#AD59 VCC
G45
RSVD#AA59 VCC
3 GND Y 4 H_VCCST_PW RGD 96 AE60 RSVD#AE60 VCC G47
AC59 RSVD#AC59 VCC G49
AG58 RSVD#AG58 VCC G51
Do Not Stuff U59 G53
1D05S_VCCST RSVD#U59 VCC
Do Not Stuff V59 RSVD#V59 VCC G55
VCC G57
AC22 VCCST VCC H23
AE22 VCCST VCC J23
1 2 VCC_CORE AE23 K23
R707 VCCST VCC
VCC K57
100KR2F-L1-GP AB57 L22
VCC VCC
1

B B
AD57 VCC VCC M23
R709 AG57 M57
47KR2F-GP VCC VCC
C24 VCC VCC P57
C28 VCC VCC U57
C32 W57
2

VCC VCC

HASW ELL-6-GP

1205 Add

1D05V_S0 1D05S_VCCST 1 2 IMVP_PW RGD_R

24,46 IMVP_PW RGD
R713
1 2 100KR2F-L1-GP
1
Do Not Stuff

Do Not Stuff

R711 R712
C701

C703
1

0R5J-5-GP 47KR2F-GP

DY DY
2

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC CORE)

Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 7 of 104
5 4 3 2 1
 5 4 3 2 1
SSID = CPU

D D

CPU1A HSW_ULT_DDR3L 1 OF 19

55 PCH_DPB_N0 C54 DDI1_TXN0 EDP_TXN0 C45 EDP_TX0_DN 53

CRT 55
55
PCH_DPB_P0
PCH_DPB_N1
C55
B58
DDI1_TXP0
DDI1_TXN1
EDP_TXP0
EDP_TXN1
B46
A47
EDP_TX0_DP
EDP_TX1_DN
53
53
55 PCH_DPB_P1 C58 DDI1_TXP1 EDP_TXP1 B47 EDP_TX1_DP 53
B55 DDI1_TXN2
A55 C47 +VCCIOA_OUT
DDI1_TXP2 EDP_TXN2
A57 C46 Design Guideline:
DDI1_TXN3 EDP_TXP2
C B57 DDI1_TXP3 EDP_TXN3 A49 EDP_COMP keep routing length max 100 mils. C

1
DDI EDP B49 R801
EDP_TXP3 Trace Width:20 mils.
C51 24D9R2F-L-GP
DDI2_TXN0
C50 DDI2_TXP0 EDP_AUXN A45 EDP_AUX_DN 53
C53 DDI2_TXN1 EDP_AUXP B45 EDP_AUX_DP 53
B54

2
DDI2_TXP1 EDP_COMP
C49 DDI2_TXN2 EDP_RCOMP D20
B50 A43 EDP_BRIGHTNESS 1 TP801
DDI2_TXP2 EDP_DISP_UTIL
A53 DDI2_TXN3
B53 DDI2_TXP3

HASW ELL-6-GP

B B

A UM
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 8 of 104
 5 4 3 2 1

SSID = CPU
CPU1P HSW_ULT_DDR3L 16 OF 19

VSS H17
D33 VSS VSS H57
D34 VSS VSS J10
D D35 J22 D
VSS VSS
D37 VSS VSS J59
D38 VSS VSS J63
D39 VSS VSS K1
D41 VSS VSS K12
D42 VSS VSS L13
D43 VSS VSS L15
D45 VSS VSS L17
D46 VSS VSS L18
D47 VSS VSS L20
D49 VSS VSS L58
D5 VSS VSS L61
D50 VSS VSS L7
D51 VSS VSS M22
D53 VSS VSS N10
D54 VSS VSS N3
D55 VSS VSS P59
D57 VSS VSS P63
D59 VSS VSS R10
D62 VSS VSS R22
C D8 VSS VSS R8 C
E11 VSS VSS T1
E17 VSS VSS T58
F20 VSS VSS U20
F26 VSS VSS U22
F30 VSS VSS U61
F34 VSS VSS U9
F38 VSS VSS V10
F42 VSS VSS V3
F46 VSS VSS V7
F50 VSS VSS W20
F54 VSS VSS W22
F58 VSS VSS Y10
F61 VSS VSS Y59
G18 VSS VSS Y63
G22 VSS
G3 VSS
G5 VSS VSS V58
G6 VSS VSS AH46
G8 VSS VSS V23
B H13 E62 VSS_SENSE VSS_SENSE 46 B
VSS VSS_SENSE
VSS AH16

100R2F-L1-GP-U
1
HASWELL-6-GP
Layout Note:

R901
1. Place close to CPU
2. VCC_SENSE/ VSS_SENSE
impedance=50 ohm

2
3. Lwngth match<25mil

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A4 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 9 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

1D35V_S3

D D

SC10U6D3V3KX-GP

SC10U6D3V3KX-GP

SC10U6D3V3KX-GP

SC10U6D3V3KX-GP

SC10U6D3V3KX-GP

SC10U6D3V3KX-GP
C1001

C1002

C1003

C1004

C1005

C1006
Layout Note:
1

1
As close to CPU as possible
2

2
SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

Do Not Stuff

Do Not Stuff
C1017

C1018

C1019

C1020
1

1
DY DY
2

Layout Note:
Direct tie to CPU VccIn/Vss balls

C C

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 10 of 104
5 4 3 2 1
 5 4 3 2 1

MAX: 1.92A

1.838A 41mA 42mA

D D
1D05V_HSIO +V1.05DX_MODPHY_PCH 1D05V_HSIO +V1.05S_ASATA3PLL
R1101 1D05V_HSIO +V1.05S_AUSB3PLL
1 2 L1102 1 2 IND-2D2UH-196-GP +V1.05S_ASATA3PLL

C1102
SC1U6D3V2KX-GP

C1101
SC1U6D3V2KX-GP
L1101 1 2 IND-2D2UH-196-GP +V1.05S_AUSB3PLL
68.2R21D.10R

C1105
SC1U6D3V2KX-GP

C1106
SC10U6D3V3KX-GP

C1107
Do Not Stuff
0R5J-5-GP

1
C1103
SC1U6D3V2KX-GP

C1104
SC10U6D3V3KX-GP

C1123
Do Not Stuff
68.2R21D.10R

1
DY

2
DY

2
2

2
CAP need close to pin K9 L10 CAP need close to pin B18 CAP need close to pin B11

57mA 62mA 200mA

1D05V_S0 +V1.05S_APLLOPI 1D05V_S0 +V1.05S_AXCK_DCB

R1102 3D3V_S5_PCH R1103 +V3.3A_PSUS
0R3J-0-U-GP 0R3J-0-U-GP L1103 1 2 IND-2D2UH-196-GP +V1.05S_AXCK_DCB
C 1 2 +V1.05S_APLLOPI 1 2 C
68.2R21D.10R

C1111
SC1U6D3V2KX-GP

C1112
Do Not Stuff

C1125
Do Not Stuff
1

1
C1109
SC1U6D3V2KX-GP

C1110
SC10U6D3V3KX-GP

C1124
Do Not Stuff
C1108
1

1
SC10U6D3V3KX-GP
DY DY

2
DY
2

2
1205 Add
CAP need close to pin AA21 CAP need close to pin AC9 CAP need close to pin J18

31mA 658mA 1.632A 1mA

1D05V_S0 R1104 +1.05M_ASW 1D05V_S0 R1105 +V1.05S_CORE_PCH

1D05V_S0 IND-2D2UH-196-GP +V1.05S_AXCK_LCPLL 0R3J-0-U-GP 0R5J-5-GP RTC_AUX_S5
L1104 1 2 1 2
1 2
C1115
Do Not Stuff

C1116
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C1117

SC1U6D3V2KX-GP
C1118

SC10U6D3V3KX-GP
C1119

C1120
Do Not Stuff

C1121
SCD1U10V2KX-5GP

C1122
SC1U6D3V2KX-GP
68.2R21D.10R
1

1
C1113
SC1U6D3V2KX-GP

C1114
Do Not Stuff
1

DY
DY DY
2

2
B B
2

CAP need close to pin A20 CAP need close to pin AE9 CAP need close to pin AE8 J11 CAP need close to pin AG10

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 11 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = MEMORY

DM1
5 M_A_A[15:0]
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 NP2
M_A_A2 A1 NP2
96
M_A_A3 A2
95 110 M_A_RAS# 5
M_A_A4 A3 RAS# SA0_DIMA
M_A_A5
92
A4 WE#
113 M_A_WE# 5
SA1_DIMA
Note:
D 91 115 M_A_CAS# 5 D
M_A_A6 A5 CAS# SA0 DIM0 = 0, SA1_DIM0 = 0
90
M_A_A7 A6
86 114 M_A_DIMA_CS#0 5 SO-DIMMA SPD Address is 0xA0
A7 CS0#

1
M_A_A8 89 121
A8 CS1# M_A_DIMA_CS#1 5
M_A_A9 SO-DIMMA TS Address is 0x30

R1201

R1202
85

0R2J-2-GP

0R2J-2-GP
M_A_A10 A9
107 73 M_A_DIMA_CKE0 5
M_A_A11 A10/AP CKE0
84 74 M_A_DIMA_CKE1 5
M_A_A12 A11 CKE1
83

2
M_A_A13 A12
119 101 M_A_DIMA_CLK_DDR0 5
M_A_A14 A13 CK0
80 103 M_A_DIMA_CLK_DDR#0 5
M_A_A15 A14 CK0#
78
A15
79 102 M_A_DIMA_CLK_DDR1 5
5 M_A_BS2 A16/BA2 CK1
104 M_A_DIMA_CLK_DDR#1 5
CK1#
109
5 M_A_BS0 BA0
108 11
5 M_A_BS1 BA1 DM0
5 M_A_DQ[63:0] 28
M_A_DQ13 DM1
5 46
M_A_DQ8 DQ0 DM2
7 63
M_A_DQ14 DQ1 DM3
15 136
M_A_DQ10 DQ2 DM4
M_VREF_CA_DIMMA Layout Note: M_A_DQ9
17
4
DQ3 DM5
153
170
DQ4 DM6
Place these caps M_A_DQ12 6
DQ5 DM7
187
M_A_DQ15 16
close to VREF_CA M_A_DQ11 DQ6
18 200 PCH_SMBDATA 13,18,62,96
M_A_DQ29 DQ7 SDA
21 202 PCH_SMBCLK 13,18,62,96
M_A_DQ28 DQ8 SCL
23
M_A_DQ30 DQ9 3D3V_S0
33 198
1

M_A_DQ31 DQ10 EVENT#

35
M_A_DQ25 DQ11
C1201

C1218

C1202

22 199
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

M_A_DQ24 DQ12 VDDSPD

24
2

M_A_DQ27 DQ13 SA0_DIMA

34 197
DQ14 SA0

1
M_A_DQ26 36 201 SA1_DIMA C1203
M_A_DQ44 DQ15 SA1 Do Not Stuff
39
M_A_DQ41 41
DQ16
77
DY

2
M_A_DQ43 DQ17 NC#1
51 122
M_A_DQ47 DQ18 NC#2 1D35V_S3
53 125
M_A_DQ45 DQ19 NC#/TEST
40
M_A_DQ40 DQ20
42 75
M_A_DQ42 DQ21 VDD1
M_A_DQ46
50
DQ22 VDD2
76
Layout Note:
Layout Note: M_A_DQ51
52
57
DQ23 VDD3
81
82 Place Close SO-DIMMA.
DQ24 VDD4
C Place these caps M_A_DQ50 59
DQ25 VDD5
87 C
M_A_DQ49 67 88
close to VREF_DQ M_A_DQ48 DQ26 VDD6 1D35V_S3
69 93
M_VREF_DQ_DIMMA M_A_DQ52 DQ27 VDD7
56 94
M_A_DQ53 DQ28 VDD8
58 99
M_A_DQ54 DQ29 VDD9
68 100
M_A_DQ55 DQ30 VDD10 DDR_VREF_S3 1D35V_S3
70 105
M_A_DQ0 DQ31 VDD11
129 106

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
DQ32 VDD12 5 DDR_WR_VREF01

Do Not Stuff
M_A_DQ1

TC1201

C1208

C1220

C1221

C1222
131 111

SC10U6D3V5KX-1GP
1

1
DQ33 VDD13

Do Not Stuff
M_A_DQ2 141 112
DQ34 VDD14 DY
1

1
M_A_DQ6 R1217

C1207

C1209
143 117
M_A_DQ5 DQ35 VDD15 Do Not Stuff R1211
C1204

C1205

C1206

130 118
DY DY
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2
DQ36 VDD16
Do Not Stuff

M_A_DQ4 132 123 1K8R2F-GP

2

M_A_DQ3 DQ37 VDD17

140 124
M_A_DQ7 142
DQ38 VDD18 2R2F-GP DY

2
M_A_DQ21 DQ39 R1210
147 2
M_A_DQ20 DQ40 VSS
149 3 1 2 M_VREF_DQ_DIMMA
M_A_DQ17 DQ41 VSS
157 8
M_A_DQ16 DQ42 VSS
159 9

1
M_A_DQ18 DQ43 VSS C1219
146 13
0D675V_S0 M_A_DQ19 DQ44 VSS SCD022U16V2JX-GP R1213
148 14

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
DQ45 VSS

Do Not Stuff
M_A_DQ22 1K8R2F-GP

C1210

C1211

C1212

C1213
158 19

2
DQ46 VSS

1
M_A_DQ23 160 20
M_A_DQ36 DQ47 VSS +V_VREF_PATH1
163 25 DY

2
1
M_A_DQ33 DQ48 VSS
165 26

2
M_A_DQ34 DQ49 VSS R1212
175 31
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DQ50 VSS
Do Not Stuff

M_A_DQ38 24D9R2F-L-GP
C1214

C1215

C1216

177 32
DQ51 VSS
1

M_A_DQ37
Layout Note: M_A_DQ32
164
166
DQ52 VSS
37
38
DY

2
DQ53 VSS
Place these caps M_A_DQ35 174 43
2

M_A_DQ39 DQ54 VSS

close to VTT1 and 176 44
M_A_DQ62 DQ55 VSS
181 48
VTT2. M_A_DQ58 183
DQ56 VSS
49
M_A_DQ60 DQ57 VSS
M_A_DQ61
191
193
DQ58 VSS
54
55
Layout Note:
DQ59 VSS
M_A_DQ63 180
DQ60 VSS
60 Place these Caps near SO-DIMMA.
M_A_DQ59 182 61
M_A_DQ56 DQ61 VSS
192 65
M_A_DQ57 DQ62 VSS
194 66
DQ63 VSS
5 M_A_DQS#[7:0] 71
M_A_DQS#1 VSS
10 72
B M_A_DQS#3 DQS0# VSS B
27 127
M_A_DQS#5 DQS1# VSS
45 128
M_A_DQS#6 DQS2# VSS
62 133
M_A_DQS#0 DQS3# VSS 1D35V_S3
135 134
M_A_DQS#2 DQS4# VSS
152 138
M_A_DQS#4 DQS5# VSS
169 139
M_A_DQS#7 DQS6# VSS
186 144
DQS7# VSS
5 M_A_DQS[7:0] 145
M_A_DQS1 VSS
12 150

D
M_A_DQS3 DQS0 VSS
29 151
M_A_DQS5 DQS1 VSS Q1202
47 155
M_A_DQS6 DQS2 VSS 5V_S5
64 156 2N7002K-2-GP
M_A_DQS0 DQS3 VSS
137 161 84.2N702.J31
M_A_DQS2 DQS4 VSS
154 162
M_A_DQS4 DQS5 VSS 1D35V_S3 2ND = 84.2N702.031 R1206 M_A_DIMA_ODT0
171 167 1 2 66D5R2F-GP
M_A_DQS7 DQS6 VSS
188 168
DQS7 VSS

1
172 R1207 1 2 66D5R2F-GP M_A_DIMA_ODT1

S
M_A_DIMA_ODT0 VSS R1208
116 173
M_A_DIMA_ODT1 ODT0 VSS M_A_B_DIMM_ODT R1203
120 178 200KR2F-L-GP 1 2 66D5R2F-GP M_B_DIMB_ODT0 13
ODT1 VSS
179
VSS R1209
126 184 1 2 66D5R2F-GP

G
M_VREF_CA_DIMMA M_B_DIMB_ODT1 13

2
VREF_CA VSS
Layout Note: M_VREF_DQ_DIMMA 1
VREF_DQ VSS
185
189 0R2J-2-GP
VSS
All VREF traces should 4,13 DDR3_DRAMRST#
30
RESET# VSS
190 R1205
195 1 2 DDR_PG_CTRL_R S D DDR_VTT_PG_CTRL
have width=20mil; VSS 4 DDR_PG_CTRL DDR_VTT_PG_CTRL 49
196
spacing=20 mil VSS

1
Do Not Stuff
C1217

0D675V_S0 203 205

1

VTT1 VSS R1204

204 206
VTT2 VSS Q1201
DY Q1201 Need check Vth=1V DMN5L06K-7-GP DY Do Not Stuff
2

84.05067.031

2
DDR3-204P-119-GP-U

close to dimm

A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 12 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = MEMORY

DM2
5 M_B_A[15:0]
D M_B_A0 98 NP1 D
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2
96
M_B_A3 A2
95 110 M_B_RAS# 5
M_B_A4 A3 RAS#
92 113 M_B_WE# 5
M_B_A5 A4 WE#
91 115 M_B_CAS# 5
M_B_A6 A5 CAS#
90
M_B_A7 A6
86 114 M_B_DIMB_CS#0 5
M_B_A8 A7 CS0#
89 121 M_B_DIMB_CS#1 5
M_B_A9 A8 CS1#
85
M_B_A10 A9
M_B_A11
107
A10/AP CKE0
73 M_B_DIMB_CKE0 5 Note:
84 74 M_B_DIMB_CKE1 5
M_B_A12 A11 CKE1 SO-DIMMB SPD Address is 0xA4
83
M_B_A13 A12
119 101 M_B_DIMB_CLK_DDR0 5 SO-DIMMB TS Address is 0x34
M_B_A14 A13 CK0
80 103 M_B_DIMB_CLK_DDR#0 5
M_B_A15 A14 CK0#
78
A15
79 102 M_B_DIMB_CLK_DDR1 5
5 M_B_BS2 A16/BA2 CK1
104 M_B_DIMB_CLK_DDR#1 5
CK1#
109
5 M_B_BS0 BA0
108 11
5 M_B_BS1 BA1 DM0
5 M_B_DQ[63:0] 28
M_B_DQ8 DM1
5 46
M_VREF_CA_DIMMB M_B_DQ14 DQ0 DM2
7 63
M_B_DQ10 DQ1 DM3
15 136
M_B_DQ11 DQ2 DM4
17 153
M_B_DQ12 DQ3 DM5 3D3V_S0
Layout Note: M_B_DQ9
4
6
DQ4 DM6
170
187
DQ5 DM7
Place these caps M_B_DQ13 16
DQ6
1

M_B_DQ15 18 200
close to VREF_CA PCH_SMBDATA 12,18,62,96

1
M_B_DQ28 DQ7 SDA
C1301

C1302
EC1302

21 202
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

M_B_DQ29 DQ8 SCL PCH_SMBCLK 12,18,62,96

23 R1301
2

M_B_DQ26 DQ9 3D3V_S0 10KR2J-3-GP

33 198
M_B_DQ27 DQ10 EVENT#
35
M_B_DQ25 DQ11
22 199

2
M_B_DQ24 DQ12 VDDSPD
24

1
M_B_DQ30 DQ13 SA0_DIMB
34 197
M_B_DQ31 36
DQ14 SA0
201 SA1_DIMB C1303 DY
M_B_DQ40 DQ15 SA1 Do Not Stuff SA1_DIMB
39

2
M_B_DQ41 DQ16
41 77
M_B_DQ46 DQ17 NC#1 SA0_DIMB
51 122
M_B_DQ42 DQ18 NC#2 1D35V_S3
53 125
M_B_DQ45 DQ19 NC#/TEST
C 40 C

1
M_B_DQ44 DQ20
42 75
M_B_DQ47 DQ21 VDD1

R1302
50 76

0R2J-2-GP
M_B_DQ43 DQ22 VDD2
52 81
M_B_DQ56 DQ23 VDD3
57 82
M_B_DQ57 DQ24 VDD4
59 87

2
M_B_DQ59 DQ25 VDD5
M_VREF_DQ_DIMMB Layout Note: M_B_DQ58
67
69
DQ26 VDD6
88
93
DQ27 VDD7
Place these caps M_B_DQ61 56
DQ28 VDD8
94
M_B_DQ60 58 99
close to VREF_DQ M_B_DQ63 DQ29 VDD9
68 100
M_B_DQ62 DQ30 VDD10 1D35V_S3
70 105
DQ31 VDD11
1

M_B_DQ4 129 106

1

M_B_DQ1 DQ32 VDD12

C1304

131 111
SCD1U10V2KX-5GP

M_B_DQ3 DQ33 VDD13

C1305

C1306

141 112
DY
SCD1U10V2KX-5GP
2

DQ34 VDD14
Do Not Stuff

M_B_DQ7 143 117

2

M_B_DQ5 DQ35 VDD15

130 118

SC10U6D3V5KX-1GP
DQ36 VDD16

Do Not Stuff

Do Not Stuff

Do Not Stuff
M_B_DQ0

C1307

C1308

C1309

C1311
132 123

SC10U6D3V5KX-1GP
1

1
DQ37 VDD17

Do Not Stuff
M_B_DQ2

C1312
140 124

1
M_B_DQ6 DQ38 VDD18

C1310
142
M_B_DQ32 147
DQ39
2
DY
DY DY DY

2
M_B_DQ37 DQ40 VSS
149 3

2
M_B_DQ38 DQ41 VSS
157 8
M_B_DQ34 DQ42 VSS
159 9
M_B_DQ33 DQ43 VSS
146 13
M_B_DQ36 DQ44 VSS
148 14
M_B_DQ39 DQ45 VSS
158 19
0D675V_S0 M_B_DQ35 DQ46 VSS
160 20
M_B_DQ17 DQ47 VSS
Layout Note: 163 25

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
DQ48 VSS

Do Not Stuff
M_B_DQ16

C1313

C1314

C1315

EC1301
165 26
DQ49 VSS

1
Place these caps M_B_DQ18 175
DQ50 VSS
31
M_B_DQ19 177 32 DY
close to VTT1 and M_B_DQ20 DQ51 VSS
C1316

C1317

C1318

164 37
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

2
VTT2.
1

DQ52 VSS
Do Not Stuff

M_B_DQ21 166 38
M_B_DQ23 DQ53 VSS
174 43
DY M_B_DQ22 DQ54 VSS
176 44
Layout Note:
2

M_B_DQ52 DQ55 VSS

181 48
DQ56 VSS
M_B_DQ49 183
DQ57 VSS
49 Place Close SO-DIMMA.
M_B_DQ48 191 54
M_B_DQ53 DQ58 VSS
193 55
M_B_DQ51 DQ59 VSS
180 60
B M_B_DQ55 DQ60 VSS B
M_B_DQ54
182
192
DQ61 VSS
61
65
Layout Note:
DQ62 VSS
M_B_DQ50 194
DQ63 VSS
66 Place these Caps near SO-DIMMA.
71 DDR_VREF_S3 1D35V_S3
5 M_B_DQS#[7:0] VSS 5 DDR_WR_VREF02
M_B_DQS#1 10 72
M_B_DQS#3 DQS0# VSS
27 127
DQS1# VSS

1
M_B_DQS#5 45 128
M_B_DQS#7 DQS2# VSS R1312 R1306
62 133
M_B_DQS#0 DQS3# VSS 1K8R2F-GP
135 134
M_B_DQS#4 152
DQS4# VSS
138
Do Not Stuff
DY
M_B_DQS#2 DQS5# VSS 2R2F-GP
169 139

2
M_B_DQS#6 DQS6# VSS R1305
186 144
DQS7# VSS
5 M_B_DQS[7:0] 145 1 2 M_VREF_DQ_DIMMB
M_B_DQS1 VSS
12 150
M_B_DQS3 DQS0 VSS
29 151

1
M_B_DQS5 DQS1 VSS C1321
47 155
M_B_DQS7 DQS2 VSS SCD022U16V2JX-GP R1303
64 156
M_B_DQS0 DQS3 VSS 1K8R2F-GP
137 161

2
M_B_DQS4 DQS4 VSS
154 162
M_B_DQS2 DQS5 VSS +V_VREF_PATH2
171 167

2
1
M_B_DQS6 DQS6 VSS
188 168
DQS7 VSS R1310
172
VSS 24D9R2F-L-GP
116 173
12 M_B_DIMB_ODT0 ODT0 VSS
120 178
12 M_B_DIMB_ODT1 ODT1 VSS
179

2
VSS
M_VREF_CA_DIMMB 126 184
VREF_CA VSS
M_VREF_DQ_DIMMB 1 185
VREF_DQ VSS
Layout Note: 30
VSS
189
190
4,12 DDR3_DRAMRST# RESET# VSS
All VREF traces should VSS
195
have width=20mil; 196
VSS
Do Not Stuff
C1319

0D675V_S0 203 205

spacing=20 mil
1

VTT1 VSS
204 206
VTT2 VSS
DY
2

DDR3-204P-90-GP

A A
close to dimm

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 13 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

M3
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 14 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

3D3V_S0

2
1
RN1509
SRN2K2J-1-GP

3
4
HSW_ULT_DDR3L
CPU1I 9 OF 19

53 eDP_BKLT_CTRL B8 EDP_BKLCTL DDPB_CTRLCLK B9 PCH_CRT_CLK 55

TP1503 1eDP_BKLEN A9 C9
EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA PCH_CRT_DATA 55
TP1502 1eDP_VDDEN C6 D9
EDP_VDDEN DDPC_CTRLCLK
DDPC_CTRLDATA D11
RN1503
1 4 DGPU_HOLD_RST#
2 OPS 3 DGPU_PW R_EN 20 PIRQA# U6
PIRQB# PIRQA#/GPIO77
P4 PIRQB#/GPIO78 DDPB_AUXN C5 PCH_DPB_AUXN 55
PIRQC# N4 B6 DDPB_AUXN 1 TP1506
Do Not Stuff PIRQD# PIRQC#/GPIO79 DISPLAY DDPC_AUXN
N2 PIRQD#/GPIO80 DDPB_AUXP B5 PCH_DPB_AUXP 55
C R1509 1 DY 2 DGPU_PW ROK TP1501 1 PCI_PME# AD4 A6 DDPB_AUXP 1 TP1508
C
Do Not Stuff PME# PCIE DDPC_AUXP
U7 GPIO55
82,83 DGPU_PW R_EN L1 GPIO52
73 DGPU_HOLD_RST# L3 GPIO54 DDPB_HPD C8 CRT_PCH_HPD 55
82,83 DGPU_PW ROK R5 GPIO51 DDPC_HPD A8
L4 GPIO53 EDP_HPD D6 EDP_HPD 53

1
EC1501 EC1502
SC1KP25V2JX-GP SC1KP25V2JX-GP

2
3D3V_S0
HASW ELL-6-GP

RN1505
1 8 PIRQC#
2 7 PIRQD#
3 6 CLK_PCIE_W LAN_REQ3# 18,58
4 5 PIRQB#

SRN10KJ-6-GP

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH ( EDP/GPIO/DDI )
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 15 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
PCIE Table
Port Device Share BUS

1 TBD USB3.0_3
D D

2 TBD USB3.0_4
USB 2.0 Table
3 WLAN Pair Device

4 LAN 0 USB3.0 port1

5(4lane) GPU 1 USB3.0 Port2

6(4lane) TBD SATA0~3 HSW_ULT_DDR3L

2 USB2.0 Port3
CPU1K 11 OF 19

3 TBD
73 CPU_RXN_C_dGPU_TXN0 F10 PERN5_L0 USB2N0 AN8 USB_PN0 34
73 CPU_RXP_C_dGPU_TXP0 E10 PERP5_L0 USB2P0 AM8 USB_PP0 34
Do Not Stuff 4 CAMERA
73 dGPU_RXN_C_CPU_TXN0 C1606 1 2 dGPU_RXN_CPU_TXN0 C23 AR7 USB_PN1 34
dGPU_RXN_CPU_TXP0 C22 PETN5_L0 USB2N1
73 dGPU_RXP_C_CPU_TXP0 1 2 PETP5_L0 USB2P1 AT7 USB_PP1 34
C1605 5 WLAN
Do Not Stuff F8 AR8
73 CPU_RXN_C_dGPU_TXN1 OPS E8
PERN5_L1 USB2N2
AP8
USB_PN2 63
73 CPU_RXP_C_dGPU_TXP1 OPS PERP5_L1 USB2P2 USB_PP2 63
Do Not Stuff 6 Touch Panel
73 dGPU_RXN_C_CPU_TXN1 C1608 1 2 dGPU_RXN_CPU_TXN1 B23 AR10 USB_PN3 1 TP1601
dGPU_RXN_CPU_TXP1 A23 PETN5_L1 USB2N3 USB_PP3 TP1602
73 dGPU_RXP_C_CPU_TXP1 1 2 PETP5_L1 USB2P3 AT10 1
C C1607 7 Card Reader C

73 CPU_RXN_C_dGPU_TXN2 Do Not Stuff

OPS H10 PERN5_L2 GPU USB2N4 AM15 USB_PN4 52
73 CPU_RXP_C_dGPU_TXP2 G10 AL15 USB_PP4 52
OPS
Do Not Stuff PERP5_L2 USB2P4
73 dGPU_RXN_C_CPU_TXN2 C1610 1 2 dGPU_RXN_CPU_TXN2 B21 AM13 USB_PN5 58
dGPU_RXN_CPU_TXP2 C21 PETN5_L2 USB2N5
73 dGPU_RXP_C_CPU_TXP2 1 2 PETP5_L2 USB2P5 AN13 USB_PP5 58
C1609
Do Not Stuff E6 AP11
73 CPU_RXN_C_dGPU_TXN3 OPS F6
PERN5_L3 USB2N6
AN11
USB_PN6 52
73 CPU_RXP_C_dGPU_TXP3 OPS PERP5_L3 USB2P6 USB_PP6 52
Do Not Stuff
73 dGPU_RXN_C_CPU_TXN3 C1612 1 2 dGPU_RXN_CPU_TXN3 B22 AR13 USB_PN7 32
dGPU_RXN_CPU_TXP3 A21 PETN5_L3 USB2N7
73 dGPU_RXP_C_CPU_TXP3 1 2 PETP5_L3 USB2P7 AP13 USB_PP7 32
C1611
Do Not Stuff G11
58 PCIE_PRX_W LANTX_N3 OPS F11
PERN3
G20
58 PCIE_PRX_W LANTX_P3 OPS PERP3 USB3RN1 USB3_PRX_CTX_N0 34
SCD1U10V2KX-5GP H20
USB3RP1 USB3_PRX_CTX_P0 34
58 PCIE_PTX_W LANRX_N3_C C1601 1 2 PCIE_PTX_W LANRX_N3 C29 PETN3 WLAN PCIE USB
58 PCIE_PTX_W LANRX_P3_C 1 2 PCIE_PTX_W LANRX_P3 B30 C33 USB3_PTX_CRX_N0 34
C1602 PETP3 USB3TN1
USB3TP1 B34 USB3_PTX_CRX_P0 34
30 PCIE_PRX_LANTX_N4 SCD1U10V2KX-5GP F13 PERN4
30 PCIE_PRX_LANTX_P4 G13 PERP4 USB3RN2 E18 USB3_PRX_CTX_N1 34
SCD1U10V2KX-5GP LAN USB3RP2 F18 USB3_PRX_CTX_P1 34
30 PCIE_PTX_LANRX_N4_C C1603 1 2 PCIE_PTX_LANRX_N4 B29
PCIE_PTX_LANRX_P4 PETN4
30 PCIE_PTX_LANRX_P4_C 1 2 A29 PETP4 USB3TN2 B33 USB3_PTX_CRX_N1 34
C1604 A33 USB3_PTX_CRX_P1 34
SCD1U10V2KX-5GP USB3TP2
G17 PERN1/USB3RN3
F17 PERP1/USB3RP3
C30
Layout Note:
B PETN1/USB3TN3 B
C31 PETP1/USB3TP3 USBRBIAS# AJ10 USB_COMP 1 2 1. USB_COMP using 50 ohm single-ended impedance
AJ11 R1602 2. Isolation Spacing :15mil
USBRBIAS 22D6R2F-L1-GP
F15 PERN2/USB3RN4 RSVD#AN10 AN10 3. Total trace length<500mil
G15 PERP2/USB3RP4 RSVD#AM10 AM10

B31 PETN2/USB3TN4
A31 PETP2/USB3TP4
AL3 USB_OC#0_1 USB_OC#0_1 18,35
OC0/GPIO40# USB_OC#2_3
OC1/GPIO41# AT1 USB_OC#2_3 35
AH2 USB_OC#4_5 USB_OC#4_5 20
+V1.05S_AUSB3PLL R1601 OC2/GPIO42# USB_OC#6_7
E15 RSVD#E15 OC3/GPIO43# AV3
3KR2F-GP E13
PCIE_RCOMP RSVD#E13
1 2 A27 PCIE_RCOMP
B27 PCIE_IREF

3D3V_S5_PCH
RN1601
HASW ELL-6-GP USB_OC#2_3 8 1
USB_OC#6_7
Layout Note: 7
6
2
3
18 MCP_GPIO73
1. PCIE_RCOMP/ PCIE_IREF trace width=12~15mil 5 4
17 PM_SUSW ARN#_R
2. Isolation Spacing: 12mil
3. Total trace length<500mil
SRN10KJ-6-GP

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (PCIE/USB)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 16 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

RN1703
PM_RSMRST#
D 1
2
4
3 PM_PCH_PW ROK PCH strap pin: D

SRN10KJ-5-GP On Die DSW VR Enable R1720 RTC_AUX_S5

R1717 2 1 Do Not Stuff SYS_PW ROK 330KR2J-L1-GP
DY DSW ODVREN 1 2
Low = Disable
DSWODVREN High = Enable (default) 1
DY 2
* R1721
Do Not Stuff

3D3V_S0

1
R1701
10KR2J-3-GP
CPU1H HSW_ULT_DDR3L 8 OF 19

NON DS3
2

X01 2/26 Add PH 10K on XDP_DBRESET# SYSTEM POWER MANAGEMENT

0R2J-2-GP
PM_SUSACK#_R AK2 AW7 DSW ODVREN R1704
XDP_DBRESET# SUSACK# DSWVRMEN PCH_DPW ROK
96 XDP_DBRESET# AC3 SYS_RESET# DPWROK AV5 1 2 PM_RSMRST#
24,96 SYS_PW ROK SYS_PW ROK AG2 AJ5 PCH_W AKE# 1 DY 2 PCIE_W AKE# 24,30
R1706 1 SYS_PWROK WAKE# R1705 X01 2/26 DY for OBFF disable
24,26,36 PCH_PW ROK 20R2J-2-GP PM_PCH_PW ROK AY7
PCH_PWROK
1 2 MPW ROK AB5 Do Not Stuff
R1707 PCI_PLTRST# APWROK PM_CLKRUN# R1709 1
AG7 PLTRST# CLKRUN#/GPIO32 V5 2 0R2J-2-GP PM_CLKRUN#_EC 24
C 0R2J-2-GP AG4 PM_SUS_STAT#1 C
SUS_STAT#/GPIO61 SUS_CLK TP1702
SUSCLK/GPIO62 AE6 1 2 PCH_SUSCLK_KBC 24
AP5 PM_SLP_S5# 1 R1710
PM_RSMRST# SLP_S5#/GPIO63 TP1703
AW6 RSMRST# 0R2J-2-GP
PM_SUSW ARN#_R AV4
16 PM_SUSW ARN#_R PM_PW RBTN# SUSWARN#/SUSPWRDNACK#/GPIO30 PM_SLP_S4#
24,96 PM_PW RBTN# AL7 PWRBTN# SLP_S4# AJ6 PM_SLP_S4# 24,49
24,76 AC_PRESENT AC_PRESENT AJ8 AT4 PM_SLP_S3# PM_SLP_S3# 24,36,48,49,51
BATLOW # ACPRESENT/GPIO31 SLP_S3# PM_SLP_A#
20 BATLOW # AN4 BATLOW#/GPIO72 SLP_A# AL5 1
1 PCH_SLP_S0# AF3 AP4 PM_SLP_SUS# TP1704 PM_SLP_SUS# 24,38
TP1706 PCH_SLP_W LAN# AM5 SLP_S0# SLP_SUS# PM_SLP_LAN# 1
1 SLP_WLAN#/GPIO29 SLP_LAN# AJ7
TP1705 TP1707

R1713
0R2J-2-GP
24,30,55,58,65,73,96 PLT_RST# 1 2 PCI_PLTRST#
HASW ELL-6-GP
1

R1715 C1701
Do Not Stuff Do Not Stuff
DY DY
2
2

3D3V_S5 PCH_DPW ROK R1718 1 2 Do Not Stuff

RN1702 DS3 KBC_DPW ROK 24
RN1701 2 3 PM_SUSACK#_R
24 PM_SUSACK# DS3

2
1 4 MCP_GPIO12 MCP_GPIO12 20 24 PM_SUSW ARN# 1 4 PM_SUSW ARN#_R
2 3 AC_PRESENT R1725
Do Not Stuff DS3 Do Not Stuff
SRN10KJ-5-GP
B B
X01 2/26 modify PCH_WAKE# PU to 1K

1
1 R1703 2 10KR2J-3-GP PCH_W AKE#

3D3V_S5_PCH 3D3V_S0
R1714
8K2R2F-1-GP
1 2 PM_SUS_STAT# PM_CLKRUN# 1 2
R1724 DY Do Not Stuff 3D3V_AUX_S5 R1727
100KR2J-1-GP
1 2 PCH_SUSCLK_KBC
Non DS3
2

EMI 12/20

2
XDP_DBRESET# R1726
SYS_PW ROK 10KR2J-3-GP EC1701
PLT_RST# Do Not Stuff DY

1
PCH_PW ROK 1KR2J-1-GP
Q1701
1

KBC_DPW ROK R1702

4 3 PM_RSMRST# 1 2 RSMRST#_KBC 24
R1728
3V_5V_POK# 5 2 3V_5V_POK_C 1 2
NON DS3 3V_5V_POK 45
1

6 1 0R2J-2-GP
EC1706 EC1702 EC1703 EC1704 EC1705
SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP
2

2N7002KDW -GP R1729 1 PM_SLP_SUS#

2
A
DS3
Do Not Stuff UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (PM)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 17 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

X01 3/7 Change value from test report

C1801
D 0R2J-2-GP D
XTAL24_IN 1 R1810 2 XTAL24_IN_R 1 2

3D3V_S0 SC18P50V2JN-1-GP

1
RN1801
1 8 MCP_GPIO76 MCP_GPIO76 20 X1801

1
2 7 PEG_CLKREQ# XTAL-24MHZ-86-GP
3 6 CLK_PCIE_REQ# R1802
1MR2J-1-GP 82.30004.891
4 5 BOARD_ID1 20 HSW_ULT_DDR3L 2nd = 82.30004.841
CPU1F 6 OF 19

4
SRN10KJ-6-GP
C1802

2
XTAL24_OUT 1 2

C43 A25 XTAL24_IN

CLKOUT_PCIE_N0 XTAL24_IN XTAL24_OUT SC18P50V2JN-1-GP
C42 CLKOUT_PCIE_P0 XTAL24_OUT B25
CLK_PCIE_REQ# U2 +V1.05S_AXCK_LCPLL
PCIECLKRQ0#/GPIO18
RSVD#K21 K21
B41 CLKOUT_PCIE_N1 RSVD#M21 M21
A41 C26 XCLK_BIASREF R1803 1 2 3KR2F-GP
CLK_PCIE_REQ# CLKOUT_PCIE_P1 DIFFCLK_BIASREF RN1803
Y5 PCIECLKRQ1#/GPIO19
C35 MCP_TESTLOW1 4 1
CLOCK TESTLOW_C35 MCP_TESTLOW2 RN1804
C41 CLKOUT_PCIE_N2 TESTLOW_C34 C34 3 2
B42 AK8 MCP_TESTLOW3 3 2
CLK_PCIE_WLAN_REQ3# CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 MCP_TESTLOW4 SRN10KJ-5-GP 4
15,58 CLK_PCIE_WLAN_REQ3# AD1 PCIECLKRQ2#/GPIO20 TESTLOW_AL8 AL8 1
SRN10KJ-5-GP
58 CLK_PCIE_WLAN_N3 B38 AN15 CLK_PCI_LPC_R R1804 1 LPC 2 0R2J-2-GP CLK_PCI_LPC 65
CLKOUT_PCIE_N3 CLKOUT_LPC_0 CLK_PCI_KBC_R R1805 1 2 33R2J-2-GP
58 CLK_PCIE_WLAN_P3
20,30 CLK_PCIE_LAN_REQ4# CLK_PCIE_LAN_REQ4#
C37
N1
CLKOUT_PCIE_P3
PCIECLKRQ3#/GPIO21
WLAN CLKOUT_LPC_1 AP15 CLK_PCI_KBC 24

CLKOUT_ITPXDP# B35 PCIE_CLK_XDP_N 96

30 CLK_PCIE_LAN_N4 A39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P A35 PCIE_CLK_XDP_P 96

C
30 CLK_PCIE_LAN_P4
73 PEG_CLKREQ# PEG_CLKREQ#
B39
U5
CLKOUT_PCIE_P4
PCIECLKRQ4#/GPIO22
LAN C

EC1801
Do Not Stuff

EC1802
Do Not Stuff
73 CLK_PCIE_VGA# B37 CLKOUT_PCIE_N5

1
73 CLK_PCIE_VGA
CLK_PCIE_REQ#
A37
T2
CLKOUT_PCIE_P5
PCIECLKRQ5#/GPIO23
GPU DY DY
1128 Add EC1801 EC1802(DY)

2
HASWELL-6-GP
3D3V_S5_PCH

RN1807
LPC_AD[3..0] SML1_CLK 8 1
24,65 LPC_AD[3..0] HSW_ULT_DDR3L
RN1806 CPU1G 7 OF 19 SML1_DATA 7 2
LPC_AD0 8 1 SML0_DATA 6 3
LPC_AD2 7 2 LPC_LAD0_PCH AU14 AN2 MCP_GPIO11 SML0_CLK 5 4
LPC_AD1 LPC_LAD1_PCH LAD0 SMBALERT#/GPIO11 SMB_CLK
6 3 AW12
LAD1 SMBCLK
AP2
LPC_AD3 5 4 LPC_LAD2_PCH AY12 LPC AH1 SMB_DATA SRN2K2J-4-GP
LPC_LAD3_PCH LAD2 SMBUS SMBDATA CARD_PWR_EN
AW11 AL2
SRN0J-7-GP LPC_LFRAME#_PCH LAD3 SML0ALERT#/GPIO60 SML0_CLK
AV12 AN1 SML0_CLK 53
LFRAME# SML0CLK SML0_DATA RN1809
AK1 SML0_DATA 53
SML0DATA MCP_GPIO73 SRN10KJ-6-GP
AU4 MCP_GPIO73 16
0R2J-2-GP 1 R1801 SML1ALERT#/PCHHOT#/GPIO73 SML1_CLK CARD_PWR_EN
24,65 LPC_FRAME# 2 SML1CLK/GPIO75
AU3 SML1_CLK 24,26,53,76 8 1
AH3 SML1_DATA 16,35 USB_OC#0_1 7 2
SML1DATA/GPIO74 SML1_DATA 24,26,53,76
24,25 SPI_CLK_R 33R2J-2-GP 1 2 R1806 PCH_SPI_CLK AA3 20,24 EC_SCI# 6 3
0R2J-2-GP 1 SPI_CLK
24,25 SPI_CS0#_R 2 R1807 PCH_SPI_CS0# Y7 AF2 TP_CL_CLK 1 TP1803 MCP_GPIO11 5 4
SPI_CS0# CL_CLK TP_CL_DATA1 TP1804
Y4 AD2
SPI_CS1# CL_DATA TP_CL_RST# 1 TP1805
AC2 SPI C-LINK AF4
0R2J-2-GP R1808 PCH_SPI_SI SPI_CS2# CL_RST#
24,25 SPI_SI_R 1 2 AA2
0R2J-2-GP R1809 PCH_SPI_SO SPI_MOSI RN1811
24,25 SPI_SO_R 1 2 AA4
SPI_MISO
0R2J-2-GP 1 2 R1811 PCH_SPI_DQ2 Y6 SMB_CLK 4 1
25 SPI_WP# SPI_IO2
0R2J-2-GP 1 2 R1812 PCH_SPI_DQ3 AF1 SMB_DATA 3 2
25 SPI_HOLD# SPI_IO3
B B
SRN2K2J-3-GP

3D3V_S5 3D3V_S0
1203 R1806 change to 33R
HASWELL-6-GP
RN1810
2
1

3 2 3D3V_S0
RN1802 4 1
SRN1KJ-11-GP-U
SRN10KJ-5-GP

Q1801
3
4

PCH_SPI_DQ3 SMB_DATA 6 1 PCH_SMBDATA 12,13,62,96

PCH_SPI_DQ2
5 2
84.2N702.A3F
4 3 2nd = 84.DM601.03F
3rd = 84.2N702.E3F
2N7002KDW-GP 4th = 84.2N702.F3F

PCH_SMBCLK 12,13,62,96

SMB_CLK

A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size
PCH (CLOCK/SMBUS/CL/LPC/SPI)Rev
Document Number
Custom X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 18 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
RTC_X1

1 2 RTC_X2
R1915 10MR2J-L-GP
X01 3/7 Change value from test report
X1901

1 4

D
RTC_AUX_S5 D

2
2 3 C1904
C1903 SC15P50V2JN-2-GP
SC15P50V2JN-2-GP

1
X-32D768KHZ-65-GP X01 3/7 Change value from test report

1
RTC_AUX_S5 R1903 R1901 82.30001.A41
330KR2J-L1-GP 1MR2J-1-GP 2nd = 82.30001.841

2
2
1
RN1901
CPU1E HSW_ULT_DDR3L 5 OF 19
SRN20KJ-1-GP

RTC_X1 AW5

3
4
RTC_X2 RTCX1
AY5 RTCX2
Q1901 SM_INTRUDER# AU6 J5 SATA3_PRX_HDDTX_N0 56
PCH_INTVRMEN AV7 INTRUDER# SATA_RN0/PERN6_L3
24 RTCRST_ON G INTVRMEN SATA_RP0/PERP6_L3 H5 SATA3_PRX_HDDTX_P0 56
HDD1
SRTC_RST# AV6 RTC B15 SATA3_PTX_HDDRX_N0 56
SRTCRST# SATA_TN0/PETN6_L3
1

D RTC_RST# AU7 A15 SATA3_PTX_HDDRX_P0 56

R1902 RTCRST# SATA_TP0/PETP6_L3

2
10KR2J-3-GP S SATA_RN1/PERN6_L2 J8 SATA_PRX_ODDTX_N2 56

1
ODD
G1901 H8 SATA_PRX_ODDTX_P2 56
SATA_RP1/PERP6_L2

1
2N7002K-2-GP C1901 C1902 A17 SATA_PTX_ODDRX_N2 56
2

SATA_TN1/PETN6_L2

SC1U6D3V2KX-GP

Do Not Stuff
84.2N702.J31 SC1U6D3V2KX-GP B17 SATA_PTX_ODDRX_P2 56 0114 Change

2
C SATA_TP1/PETP6_L2 C
2ND = 84.2N702.031

2
3rd = 84.07002.I31 HDA_BITCLK AW8 J6
HDA_SYNC HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1
AV11 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 H6
HDA_RST# AU8 B14
HDA_SDIN0 HDA_RST#/I2S_MCLK# AUDIO SATA SATA_TN2/PETN6_L1
27 HDA_SDIN0 AY10 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 C15
AU12 HDA_SDI1/I2S1_RXD
HDA_SDOUT AU11 F5
TP1902 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0
1203 R1907 change from 0R to 33R 1TP_HDA_DOCK_EN# AW10 HDA_DOCK_EN#/I2S1_TXD# SATA_RP3/PERP6_L0 E5
AV10 HDA_DOCK_RST#/I2S1_SFRM# SATA_TN3/PETN6_L0 C17
AY8 I2S1_SCLK SATA_TP3/PETP6_L0 D17
27 HDA_CODEC_BITCLK R1907 1 2 33R2J-2-GP HDA_BITCLK

27 HDA_CODEC_SYNC R1908 1 2 0R2J-2-GP HDA_SYNC V1 EC_SMI# EC_SMI# 24

SATA0GP/GPIO34 +V1.05S_ASATA3PLL
SATA1GP/GPIO35 U1 SATA_ODD_PRSNT# 56
27,29 HDA_CODEC_RST# R1911 1 2 0R2J-2-GP HDA_RST# V6
SATA2GP/GPIO36 R1904
SATA3GP/GPIO37 AC1
TP1901 1 PCH_JTAG_TRST# AU62 0R2J-2-GP
PCH_JTAG_TCK PCH_TRST# SATA_IREF
AE62 PCH_TCK SATA_IREF A12 1 2
Flash Descriptor Security Overide/ 27 HDA_CODEC_SDOUT R1912 1 2 0R2J-2-GP HDA_SDOUT PCH_JTAG_TDI AD61 L11
PCH_JTAG_TDO PCH_TDI RSVD#L11
Intel ME Debug Mode AE61 PCH_TDO RSVD#K10 K10
24 ME_UNLOCK R1909 1 2 1KR2J-1-GP PCH_JTAG_TMS AD62 JTAG C12 SATA_RCOMP 1 2
PCH_TMS SATA_RCOMP
HDA_SDOUT
Low = Default * AL11
AC4
RSVD#AL11 SATALED# U3 SATA_LED# SATA_LED# 61
R1906
High = Enable XDP_TCK_JTAGX RSVD#AC4 3KR2F-GP
AE63 JTAGX
The internal pull-down is disabled after AV2 RSVD#AV2
PLTRST# deasserts

B Layout Note: B
R1913 HASW ELL-6-GP 4mil trace at break-out and 3
1 2 PCH_INTVRMEN 1D05S_VCCST 12-15mil trace with <0.2 ohms
DY and length total <= 500mils.
Do Not Stuff
2
DY 1 PCH_JTAG_TDI
R1916 Do Not Stuff
2 1 PCH_JTAG_TDO
Integrated SUS 1V VRM Enable R1917 DY Do Not Stuff 3D3V_S0
2 1 PCH_JTAG_TMS
Low = External VRs R1918 DY Do Not Stuff RN1902
INTVRMEN 2 1 XDP_TCK_JTAGX SATA_ODD_PRSNT# 1 4
High = Internal VRs* R1919 DY Do Not Stuff EC_SMI# 2 3

SRN10KJ-5-GP

EC1901

1 2 HDA_CODEC_BITCLK
DY 1 2 PCH_JTAG_TCK
R1920 DY Do Not Stuff
Do Not Stuff

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (RTC/SATA/HDA/JTAG)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 19 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU 1D05S_VCCST

1
HSW_ULT_DDR3L
CPU1J 10 OF 19 R2018
1KR2J-1-GP

2
18 MCP_GPIO76 MCP_GPIO76 P1 D60 PCH_THERMTRIP
MCP_GPIO8 BMBUSY#/GPIO76 THRMTRIP# H_RCIN#
AU2 GPIO8 RCIN#/GPIO82 V4 H_RCIN# 24
MCP_GPIO12 AM7 T4 INT_SERIRQ INT_SERIRQ 24
17 MCP_GPIO12 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ
D MCP_GPIO15 AD6 AW15 PCH_OPIRCOMP 1 2 D
GPIO15 MISC PCH_OPI_RCOMP
Y1 GPIO16 RSVD#AF20 AF20
3D3V_S5 R2003
56 SATA_ODD_DA#
25 RTC_DET# RTC_DET#
T3
AD5
GPIO17 RSVD#AB21 AB21
49D9R2F-GP Layout Note:
GPIO24
RN2006 MCP_GPIO27 AN5 GPIO27
1.Referenced "continuous" VSS plane only.
1 4 BATLOW # BATLOW # 17 MCP_GPIO28 AD7 2.Avoid routing next to clock pins or noisy
MCP_GPIO27 MCP_GPIO26 GPIO28
2 3 AN3 GPIO26
R6
signals.
SRN10KJ-11-GP-U MCP_GPIO56 GSPI0_CS#/GPIO83 3. Trace width: 12~15mil
AG6 GPIO56 GSPI0_CLK/GPIO84 L6
56 4. Isolation Spacing: 12mil
MCP_GPIO57 AP1 N6
GPIO57 GSPI0_MISO/GPIO85 SATA_ODD_PW RGT
MCP_GPIO58 AL4 L8 LPSS_GSPI0_MOSI_BBS0_R 5. Max length: 500mil
W LAN_PLT_RST# GPIO58 GSPI0_MOSI/GPIO86
AT5 GPIO59 GSPI1_CS#/GPIO87 R7
MCP_GPIO44 AK4 GPIO L5
MCP_GPIO47 GPIO44 GSPI1_CLK/GPIO88
AB6 GPIO47 GSPI1_MISO/GPIO89 N7
18 BOARD_ID1 BOARD_ID1 U4 K2 KB_DET# 62
BOARD_ID2 GPIO48 GSPI_MOSI/GPIO90
Y3 GPIO49 UART0_RXD/GPIO91 J1
P3 GPIO50 UART0_TXD/GPIO92 K3 DBC_EN 52
3D3V_S5_PCH HSIOPC Y2 J2 3D3V_S0
21 HSIOPC HSIOPC/GPIO71 SERIAL IO UART0_RTS#/GPIO93
MCP_GPIO13 AT3 G1 RN2002
MCP_GPIO14 GPIO13 UART0_CTS#/GPIO94 SRN10KJ-6-GP
AH4 GPIO14 UART1_RXD/GPIO0 K4
2

TP2002 1CAMERA_PW R_EN AM4 G2 H_RCIN# 8 1

R2013 MCP_GPIO45 GPIO25 UART1_TXD/GPIO1
AG5 GPIO45 UART1_RST#/GPIO2 J3 56 SATA_ODD_DA# 7 2
0R2J-2-GP X01 3/7 Add shotpad to 10K and R2013 to MCP_GPIO46 AG3 GPIO46 UART1_CTS#/GPIO3 J4 BLUETOOTH_EN 58 INT_SERIRQ 6 3
F2 I2C0_SDA KB_DET# 5 4
0 ohm for power consumption EC_SW I# AM3
I2C0_SDA/GPIO4
F3 I2C0_SCL
24 EC_SW I#
1

EC_SCI# GPIO9 I2C0_SCL/GPIO5 I2C1_SDA

18,24 EC_SCI# AM2 GPIO10 I2C1_SDA/GPIO6 G4
10KR2J-3-GP 1 2 R2001 MCP_GPIO58 TP2001 1HDD_DEVSLP P2 F1 I2C1_SCL
10KR2J-3-GP R2002 MCP_GPIO44 DEVSLP0/GPIO33 I2C1_SCL/GPIO7
1 2 C4 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 E3
MCP_R

10KR2J-3-GP 1 2 R2004 MCP_GPIO46 L2 F4 3D3V_S0

C 10KR2J-3-GP R2009 MCP_GPIO26 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 LPSS_SDIO_D0_CMNHDR C
1 2 N5 DEVSLP2/GPIO39 SDIO_D0/GPIO66 D3
10KR2J-3-GP 1 2 R2015 MCP_GPIO56 27 HDA_SPKR HDA_SPKR V2 E4 RN2007
10KR2J-3-GP R2016 MCP_GPIO45 SPKR/GPIO81 SDIO_D1/GPIO67 SRN10KJ-6-GP
1 2 SDIO_D2/GPIO68 C3
10KR2J-3-GP 1 2 R2017 MCP_GPIO14 E2 I2C0_SCL 8 1
10KR2J-3-GP R2019 MCP_GPIO28 SDIO_D3/GPIO69 I2C0_SDA
1 2 7 2
10KR2J-3-GP 1 2 R2020 MCP_GPIO8 I2C1_SCL 6 3
10KR2J-3-GP 1 2 R2021 MCP_GPIO13 HASW ELL-6-GP I2C1_SDA 5 4
10KR2J-3-GP 1 2 R2022 MCP_GPIO47
10KR2J-3-GP 1 2 R2023 MCP_GPIO57 3D3V_S0
HSIOPC R2007 1 2
RN2011 100KR2J-1-GP
SRN10KJ-6-GP PCH strap pin:
3D3V_S5_PCH 1 8 CLK_PCIE_LAN_REQ4# 18,30
RN2012 2 7 PIRQA# PIRQA# 15 NO REBOOT
SRN10KJ-6-GP 3 6 DBC_EN 3D3V_S0
1 8 EC_SW I# 4 5 BLUETOOTH_EN Do Not Stuff
2
3
7
6 RTC_DET#
USB_OC#4_5 16
HDA_SPKR
* Low = Disable (Default) R2006
1 2 HDA_SPKR
4 5 W LAN_PLT_RST#
High = Enable DY
The internal pull-down is disabled after
PLTRST# deasserts

3D3V_S0

B
Top-Block Swap Override mode B

1
High = Enable "Top-Block swap" R2011
SDIO_D0 mode (Default)
DY Do Not Stuff
/ GPIO66 Low = Disable "Top-Block swap" mode
*

2
LPSS_SDIO_D0_CMNHDR
The internal pull-down is disabled after
PLTRST# deasserts
BIOS strap pin:
3D3V_S0 Need SW double confirm if that's needed Top-Block swap
BIOS UMA/DIS Strap pin
1

3D3V_S5_PCH
BOARD_ID1 BOARD_ID2
OPS R2005
Do Not Stuff
TLS Confidentiality

1
UMA 1 0 *Low = Disable Intel ME Crypto TLS R2014
DY
2

GPIO15 High = Enable Intel ME Crypto TLS Do Not Stuff

BOARD_ID2
DIS 1 1

2
The internal pull-down is disabled after MCP_GPIO15
1

R2008
RSMRST# deasserts.
10KR2J-3-GP
UMA
2

A
3D3V_S0 UM A

Boot BIOS Strap Bit BBS

Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Boot BIOS * Low = SPI DY R2012
Do Not Stuff Taipei Hsien 221, Taiwan, R.O.C.
Destination High = LPC
Title
2

The internal pull-down is disabled after LPSS_GSPI0_MOSI_BBS0_R

PLTRST# deasserts
PCH (GPIO/CPU)
Size Document Number Rev
A3 X00
Need double confirm, GPIO table set to GPI if that's needed PH or PL
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 20 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU DSW 20121019

3D3V_S5_PCH

R2102
0R2J-2-GP
+3.3A_DSW _PRTCSUS 1 2

1
D
+V1.05DX_MODPHY_PCH C2109 D
HSW_ULT_DDR3L
CPU1M 13 OF 19 SC1U6D3V2KX-GP

2
+V1.05DX_MODPHY_PCH K9
1D05V_S0 VCCHSIO
L10 VCCHSIO
0R2J-2-GP M9 RTC_AUX_S5
VCCHSIO HSIO RTC
1 R2105 2 +V1.05S_AIDLE N8 VCC1_05 VCCSUS3_3 AH11
P9 VCC1_05 VCCRTC AG10
+V1.05S_AUSB3PLL B18 AE7 +VCCRTCEXT C2110 1 2
VCCUSB3PLL DCPRTC

1
C2105
Do Not Stuff
+V1.05S_ASATA3PLL B11 VCCSATA3PLL SCD1U10V2KX-5GP 3D3V_S5
DY

2
TP2102 1 TP_VCCAPLLOPI_VAL Y20 SPI Y8
RSVD#Y20 VCCSPI
+V1.05S_APLLOPI AA21 VCCAPLL
OPI

1
W21 C2147
VCCAPLL SCD1U10V2KX-5GP
VCCASW AG14
AG13
DSW 20121019 1D05V_S0

2
VCCASW
TP2107 1 +V1.05A_VCCUSB3SUS J13 USB3
3D3V_S5_PCH +V3.3A_1.5A_HDA DCPSUS3
VCC1_05 J11 +V1.05S_CORE_PCH
R2108 H11
+V3.3A_1.5A_HDA HDA VCC1_05
1 2 AH14 VCCHDA VCC1_05 H15
AE8 R2110 C2114
VCC1_05

1
C2116
SC1U6D3V2KX-GP
0R2J-2-GP AF22 5D1R2F-GP SC1U6D3V2KX-GP
TP2108 +V1.05A_USB2SUS VRM VCC1_05
1 AH13 DCPSUS2 DCPSUSBYP#AG19 AG19 +PCH_VCCDSW 1 2PCH_VCCDSW _R 1 2
CORE AG20

2
DCPSUSBYP#AG20
VCCASW AE9 +1.05M_ASW
VCCASW AF9
3D3V_S5 +V3.3A_DSW _P 3D3V_S0 AC9 AG8
+V3.3A_PSUS VCCSUS3_3 VCCASW
C AA9 VCCSUS3_3
GPIO/LPC
DCPSUS1#AD10 AD10 +V1.05A_SUS_PCH1 TP2106 C
R2101 1 2 0R2J-2-GP +V3.3A_DSW _P +V3.3A_DSW _P AH10 AD8
R2112 1 VCCDSW3_3 DCPSUS1#AD8
2 0R2J-2-GP +V3.3S_PCORE V8 VCC3_3
W9 3D3V_S0
VCC3_3
1

1
C2136 C2123 J15 1D5V_S0
THERMAL SENSOR VCCTS1_5
DY Do Not Stuff SC10U6D3V3KX-GP
VCC3_3 K14
K16
2

2
VCC3_3

C2128
SC1U6D3V2KX-GP
1
+V1.05S_AXCK_DCB J18 VCCCLK
1D05V_S0 +V1.05S_SSCF100 K19 SERIAL IO U8 +V3.3S_1.8S_LPSS_SDIO

2
0R2J-2-GP VCCCLK VCCSDIO
+V1.05S_AXCK_LCPLL A20 VCCACLKPLL VCCSDIO T9
1 R2117 2 +V1.05S_SSCF100 +V1.05S_SSCF100 J17 VCCCLK
+V1.05S_SSCFF R21 VCCCLK
C2137
SC1U6D3V2KX-GP

T21 LPT LP POWER

VCCCLK
1

1 TP_V1.05S_SSCF100 K18 SUS OSCILLATOR AB8 +V1.05A_AOSCSUS 1 TP2109

TP2103 RSVD#K18 DCPSUS4
1 TP_V1.05S_AXCK_DCB M20 RSVD#M20
TP2104 1 TP_V1.05S_SSCFF V21
2

TP2101 RSVD#V21
+V3.3A_PSUS AE20 VCCSUS3_3 RSVD#AC20 AC20 TP_V1.05S_APLLOPI 1 TP2105
AE21 VCCSUS3_3 VCC1_05 AG16 1D05V_S0
USB2 AG17
VCC1_05

1
C2135
SC1U6D3V2KX-GP
2
HASW ELL-6-GP

1D05V_S0 +V1.05S_SSCFF
0R2J-2-GP
B B
1 R2118 2 +V1.05S_SSCFF
C2138
SC1U6D3V2KX-GP
1

1D05V_S0 1D05V_HSIO

R2122
2

1 0R5J-5-GP
2
Non-HSIO

+V3.3S_1.8S_LPSS_SDIO 0R2J-2-GP 3D3V_S0

1D05V_HSIO R2103
1D05V_S0
HSIO
U2101 1 2

9 R2114
GND

1
1 8 HSIO_OUT 1 Do Not Stuff
2
R2123 VIN#1 VOUT#8 C2104
2 VIN#2 VOUT#7 7
1 2 HSIOPC_R 3 6 1D05V_HSIO_CT HSIO SC1U6D3V2KX-GP
20 HSIOPC

2
ON CT
HSIO 5V_S5 4 VBIAS GND 5

1
Do Not Stuff C2142
HSIO Do Not Stuff DY C2140 Do Not Stuff
1

Do Not Stuff Do Not Stuff

2
C2141 HSIO
Do Not Stuff
2

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER2)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 21 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

HSW_ULT_DDR3L
CPU1Q 17 OF 19

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 TP_DC_TEST_A4 TP2202
AY3 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 A4 1
TP2201 1TP_DC_TEST_AY60 AY60 DAISY_CHAIN_NCTF_AY60
DC_TEST_AY61_AW61 AY61 A60 TP_DC_TEST_A60 1 TP2203
DC_TEST_AY62_AW62 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 DC_TEST_A61_B61
AY62 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A61
TP2204 1TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 A62 TP_DC_TEST_A62 1 TP2205
DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1 1 TP2206
DC_TEST_A61_B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP_DC_TEST_AW1 TP2207
B61 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW1 1
DC_TEST_B62_B63 B62 AW2 DC_TEST_AY2_AW2
DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 DC_TEST_AY3_AW3
B63 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW3
DC_TEST_C1_C2 C1 AW61 DC_TEST_AY61_AW61
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 DC_TEST_AY62_AW62
C2 DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW62
AW63 TP_DC_TEST_AW63 1 TP2208
C
DAISY_CHAIN_NCTF_AW63 C
HASWELL-6-GP

HSW_ULT_DDR3L
CPU1R 18 OF 19

RSVD#N23 N23
RSVD#R23 R23
RSVD#T23 T23
AT2 RSVD#AT2
RSVD#U10 U10
AU44 RSVD#AU44
AV44 RSVD#AV44
D15 RSVD#D15
RSVD#AL1 AL1
RSVD#AM11 AM11
RSVD#AP7 AP7
F22 RSVD#F22
RSVD#AU10 AU10
H22 RSVD#H22
B
RSVD#AU15 AU15 B
J21 RSVD#J21
RSVD#AW14 AW14
RSVD#AY14 AY14

HASWELL-6-GP

www.vinafix.vn UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 22 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

HSW_ULT_DDR3L HSW_ULT_DDR3L
CPU1N 14 OF 19 CPU1O 15 OF 19

A11 VSS VSS AJ35 AP22 VSS VSS AV59

A14 VSS VSS AJ39 AP23 VSS VSS AV8
A18 VSS VSS AJ41 AP26 VSS VSS AW16
A24 VSS VSS AJ43 AP29 VSS VSS AW24
A28 VSS VSS AJ45 AP3 VSS VSS AW33
A32 VSS VSS AJ47 AP31 VSS VSS AW35
A36 VSS VSS AJ50 AP38 VSS VSS AW37
A40 VSS VSS AJ52 AP39 VSS VSS AW4
A44 VSS VSS AJ54 AP48 VSS VSS AW40
A48 VSS VSS AJ56 AP52 VSS VSS AW42
A52 VSS VSS AJ58 AP54 VSS VSS AW44
A56 VSS VSS AJ60 AP57 VSS VSS AW47
AA1 VSS VSS AJ63 AR11 VSS VSS AW50
AA58 VSS VSS AK23 AR15 VSS VSS AW51
AB10 VSS VSS AK3 AR17 VSS VSS AW59
AB20 VSS VSS AK52 AR23 VSS VSS AW60
AB22 VSS VSS AL10 AR31 VSS VSS AY11
AB7 VSS VSS AL13 AR33 VSS VSS AY16
AC61 VSS VSS AL17 AR39 VSS VSS AY18
AD21 VSS VSS AL20 AR43 VSS VSS AY22
AD3 VSS VSS AL22 AR49 VSS VSS AY24
AD63 VSS VSS AL23 AR5 VSS VSS AY26
AE10 VSS VSS AL26 AR52 VSS VSS AY30
C AE5 AL29 AT13 AY33 C
VSS VSS VSS VSS
AE58 VSS VSS AL31 AT35 VSS VSS AY4
AF11 VSS VSS AL33 AT37 VSS VSS AY51
AF12 VSS VSS AL36 AT40 VSS VSS AY53
AF14 VSS VSS AL39 AT42 VSS VSS AY57
AF15 VSS VSS AL40 AT43 VSS VSS AY59
AF17 VSS VSS AL45 AT46 VSS VSS AY6
AF18 VSS VSS AL46 AT49 VSS VSS B20
AG1 VSS VSS AL51 AT61 VSS VSS B24
AG11 VSS VSS AL52 AT62 VSS VSS B26
AG21 VSS VSS AL54 AT63 VSS VSS B28
AG23 VSS VSS AL57 AU1 VSS VSS B32
AG60 VSS VSS AL60 AU16 VSS VSS B36
AG61 VSS VSS AL61 AU18 VSS VSS B4
AG62 VSS VSS AM1 AU20 VSS VSS B40
AG63 VSS VSS AM17 AU22 VSS VSS B44
AH17 VSS VSS AM23 AU24 VSS VSS B48
AH19 VSS VSS AM31 AU26 VSS VSS B52
AH20 VSS VSS AM52 AU28 VSS VSS B56
AH22 VSS VSS AN17 AU30 VSS VSS B60
AH24 VSS VSS AN23 AU33 VSS VSS C11
AH28 VSS VSS AN31 AU51 VSS VSS C14
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
B B
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
AH57 VSS VSS AN52 AV39 VSS VSS D23
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31

HASW ELL-6-GP

HASW ELL-6-GP

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 23 of 104
5 4 3 2 1
 SSID = KBC 5 4 3 2 1
VBAT 3D3V_AUX_KBC
VBAT MODEL_ID_DET(GPIO07) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
VBAT PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
UMA 100.0K 10.0K(64.10025.6DL) 3.0V
R2402 X00 100.0K 10.0K 3.0V TBD 100.0K 13.7K(64.13725.6DL) 2.902V

1
VBAT 2 1 R2446 R2445 R2405 TBD 100.0K 17.8K(64.17825.6DL) 2.801V

1
R2404 X01 100.0K 20.0K 2.75V Do Not Stuff Do Not Stuff 10KR2F-2-GP TBD 100.0K 22.1K(64.22125.6DL) 2.702V
0R3J-0-U-GP

2
10KR2F-2-GP TBD 100.0K 27.0K(64.27025.6DL) 2.598V
R2403 X02 100.0K 33.0K 2.48V N14P-GV2 N14M-GE TBD 100.0K 32.4K(64.32425.6DL) 2.492V
2D2R3-1-U-GP
UMA TBD 100.0K 37.4K(64.37425.6DL) 2.402V

2
X03 100.0K 47.0K 2.24V TBD 100.0K 43.2K(64.43225.6DL) 2.304V

2
3D3V_AUX_KBC_VCC DIS 100.0K 49.9K(64.49925.6DL) 2.201V

1
PCB_VER_AD A00 100.0K 64.9K 2.0V MODEL_ID_DET N14M-GE 100.0K 57.6K(64.57625.6DL) 2.093V
N14P-GV2 100.0K 64.9K(64.64925.6DL) 2.001V

1
Reserved 100.0K 76.8 1.87V TBD 100.0K 73.2K(64.73225.6DL) 1.905V

2
R2406 R2407 TBD 100.0K 82.5K(64.82525.6DL) 1.808V

2
1D05V_S0 100KR2F-L1-GP Reserved 100.0K 100.0K 1.65V C2403 100KR2F-L1-GP TBD 100.0K 93.1K(64.93125.6DL) 1.709V
DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP
Do Not Stuff

Do Not Stuff

Do Not Stuff
C2402 Do Not Stuff TBD 100.0K 107K(64.10735.6DL) 1.594V

C2404

C2405

C2406

C2407

C2408

C2409

C2410

C2411
DY

1
1

1
D 1 2 EC_VTT Do Not Stuff Reserved 100.0K 143.0K 1.358V TBD 100.0K 120K(64.12035.6DL) 1.499V
D

2
TBD 100.0K 137K(64.13735.6DL) 1.392V
DY DY DY
1
R2401 Reserved 100.0K 174.0K 1.204V TBD 100.0K 154K(64.15435.6DL) 1.299V

2
0R2J-2-GP TBD 100.0K 200K(64.20035.6DL) 1.099V

C2401
SCD1U10V2KX-5GP
2 EC_AGND Reserved 100.0K 215.0K 1.048V EC_AGND TBD 100.0K 232K(64.23236.6DL) 0.994V

Layout Note:
Need very close to EC
EC_AGND

ECSCI#_KBC 0R2J-2-GP 2 1 R2408 EC_SCI# 18,20

KBC24
ECSMI#_KBC 0R2J-2-GP 2 1 R2409
KROW[0..7] 62 EC_SMI# 19
19 54 KROW0
VCC KBSIN0/GPIOA0/N2TCK KROW1 ECSWI#_KBC 0R2J-2-GP
46 55 2 1 R2410 EC_SWI# 20
VCC KBSIN1/GPIOA1/N2TMS KROW2
76 56
3D3V_S0 VCC KBSIN2/GPIOA2 KROW3
88 57
VCC KBSIN3/GPIOA3 KROW4
115 58
VCC KBSIN4/GPIOA4 KROW5
59
KBSIN5/GPIOA5 KROW6
102 60
AVCC KBSIN6/GPIOA6 KROW7
61
KBSIN7/GPIOA7
4 KCOL[0..16] 62
VDD
1

EC_VTT 12 53 KCOL0
44 AD_IA VTT KBSOUT0/GPOB0/SOUT_CR/JENK#
C2412 C2413 52 KCOL1
SCD1U10V2KX-5GP DY Do Not Stuff KBSOUT1/GPIOB1/TCK
51 KCOL2
2

C2414 KBSOUT2/GPIOB2/TMS KCOL3

EC_AGND 1 2 SCD1U10V2KX-5GP 97 50
PCB_VER_AD GPIO90/AD0 KBSOUT3/GPIOB3/TDI KCOL4
98 49
GPIO91/AD1 KBSOUT4/GPOB4/JEN0# KCOL5
42 PSID_EC 99 48
GPIO92/AD2 KBSOUT5/GPIOB5/TDO KCOL6
58 CARD_WPAN_OUT# 100 47
GPIO93/AD3 KBSOUT6/GPIOB6/RDY# KCOL7 3D3V_AUX_KBC
17,38 PM_SLP_SUS# 108 43
GPIO5/AD4 KBSOUT7/GPIOB7 KCOL8
44 BOOST_MON 96 42 RN2401
GPIO4/AD5 KBSOUT8/GPIOC0 KCOL9
44 DIS_DTM 95 41
MODEL_ID_DET GPIO3/EXT_PURST#/AD6 KBSOUT9/GPOC1/SDP_VIS# KCOL10 BAT_SCL
94 40 3 2
GPIO7/AD7/VD_IN2 KBSOUT10/P80_CLK/GPIOC2
X01 3/5 move WPAN_LED# from GPIO85 to GPIO93 KBSOUT11/P80_DAT/GPIOC3
39 KCOL11 BAT_SDA 4 1
38 KCOL12
KBSOUT12/GPO64/TEST# KCOL13 SRN4K7J-8-GP
26 FAN1_DAC_1 101 37
GPIO94/DA0 KBSOUT13/GPI/O63/TRIST# KCOL14
44 AD_IA_HW 105 36
GPIO95/DA1 KBSOUT14/GPI/O62/XORTR# KCOL15
C 76 EC_FB_CLAMP_TGL_REQ#
7,46 IMVP_PWRGD
106
107
GPIO96/DA2
GPIO97/DA3
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
35
34
33
KCOL16 ECRST# R2418 1 2 10KR2J-3-GP C
BAT_SCL 70 LPC_AD[3..0] 18,65
43,44 BAT_SCL GPIO17/SCL1/N2TCK
BAT_SDA 69 126 LPC_AD0
43,44 BAT_SDA GPIO22/SDA1/N2TMS LAD0/GPIOF1
67 127 LPC_AD1
18,26,53,76 SML1_CLK GPIO73/SCL2/N2TCK LAD1/GPIOF2 LPC_AD2
18,26,53,76 SML1_DATA 68 128
GPIO74/SDA2/N2TMS LAD2/GPIOF3 LPC_AD3 3D3V_AUX_KBC
30 PM_LAN_ENABLE 119 1
GPIO23/SCL3/N2TCK LAD3/GPIOF4 R2416
19 RTCRST_ON 120 2 CLK_PCI_KBC 18
PROCHOT_EC GPIO31/SDA3/N2TMS LCLK/GPIOF5 0R2J-2-GP AC_IN# R2413 1
24 3 2 Do Not Stuff
52 LCD_TST_EN
LCD_TST_EN 28
GPIO47/SCL4/N2TCK LFRAME#/GPIOF6
7 PLT_RST#_EC
LPC_FRAME# 18,65
1 2 PLT_RST# 17,30,55,58,65,73,96
BAT_IN# R2414 1 DY 2 100KR2J-1-GP
GPIO53/SDA4/N2TMS LRESET#/GPIOF7
26
52 LCD_TST R2417 2 1 0R2J-2-GP
75,76,83 EC_FB_CLAMP
ECSWI#_KBC 123
GPIO51/TA3/N2TCK 0111 Add AC_IN_KBC# R2426 1 2100KR2J-1-GP
GPIO67/N2TMS

2
90 EC_SPI_CS#_C 2 R2419 1 33R2J-2-GP
F_CS0# SPI_CS0#_R 18,25
EC_SPI_CLK_C 2 R2420 1 33R2J-2-GP
72
F_SCK
92
109
SPI_CLK_R 18,25 DY C2415
Do Not Stuff
62 TPCLK CAP_LED# 62

1
GPIO37/PSCLK1 GPIO30/F_WP# BAT_IN#
62 TPDATA 71 80 BAT_IN# 42,43,44
GPIO35/PSDAT1 GPIO41/F_WP# EC_SPI_DI_C 3D3V_S0
36 ALL_SYS_PWRGD 10 87 2 R2422 1 33R2J-2-GP SPI_SI_R 18,25
GPIO26/PSCLK2 F_SDIO/F_SDIO0 EC_SPI_DO_C
42 PWR_CHG_AD_OFF 11 86 2 R2423 1 33R2J-2-GP SPI_SO_R 18,25
GPIO27/PSDAT2 F_SDI/F_SDIO1
44 AD_IA_HW2 25 91 PM_SUSACK# 17
GPIO50/PSCLK3/TDO GPIO81/F_WP#/F_SDIO2 FAN_TACH1 R2415 1
52 BLON_OUT 27 77 PCH_SUSCLK_KBC 17 2 10KR2J-3-GP
GPIO52/PSDAT3/RDY# GPIO0/EXTCLK/F_SDIO3 TOUCH_PANEL_INTR# R2443 1 2 10KR2J-3-GP
3D3V_AUX_S5
26 FAN_TACH1 31
GPIO56/TA1 PSL_IN1#/GPI70
73 PSL_IN1#
Layout Note: Power Switch Logic(PSL)
117 93 PSL_IN2#
17,96 PM_PWRBTN# GPIO20/TA2/IOX_DIN_DIOPSL_IN2#/GPI6/EXT_PURST#

2
61 WLAN_LED# 63
GPIO14/TB1 PSL_OUT#/GPIO71
74 PSL_OUT# Need very close to EC
17,36,48,49,51 PM_SLP_S3# 64 R2425
GPIO1/TB2
330KR2J-L1-GP
29 ECSCI#_KBC 3D3V_S5
ECSCI#/GPIO54 ECRST#
61 PWRLED# 32 85

1
GPIO15/A_PWM EXT_RST# PSL_IN2#
27 KBC_BEEP 118 122 H_RCIN# 20 61 KBC_PWRBTN# 1 2
GPIO21/B_PWM KBRST#/GPIO86
52 EC_BRIGHTNESS 62
65
GPIO13/C_PWM
75 SC1U25V3KX-1-GP R2427
LID_CLOSE# R2421 1 DY 2Do Not Stuff
42 AC_IN_KBC# GPIO32/D_PWM VSBY 3D3V_AUX_S5
22 114 EC_VBKUP R2428 1 2 0R2J-2-GP C2416 0R2J-2-GP
76 OVER_CURRENT_P8# GPIO45/E_PWM VBKUP RTC_AUX_S5
16 44 KBC_VCORF 1 2
61 CHG_AMBER_LED# GPIO40/F_PWM/1_WIRE VCORF
Don't PD 17 KBC_DPWROK 81
GPIO66/G_PWM PECI
13 PECI 1 2 H_PECI 4 44 AC_IN# 1 2 PSL_IN1#
17,30 PCIE_WAKE# 66 125 INT_SERIRQ 20 R2429
GPO33/H_PWM/VD1_EN# SERIRQ/GPIOF0

C2422
Do Not Stuff
6 ECSMI#_KBC 43R2J-GP R2430
GPIO24

1
ALL_SYS_PWRGD assert, 17,26,36 PCH_PWROK 104
GPIO80/VD_IN1 GPIO36/TB3
15 BATT_WHITE_LED# 61 0R2J-2-GP
delay 10ms; PCH_PWROK assert. DY
35 USB_PWR_EN# 110 21 PM_SLP_S4# 17,49
B ALL_SYS_PWRGD de-assert, B
2
GPIO82/IOX_LDSH/VD_OUT1 GPIO44/TDI
17,76 AC_PRESENT 112 20 RSMRST#_KBC 17
GPIO84/IOX_SCLK/VD_OUT2 GPIO43/TMS
17 LID_CLOSE# 64
GPIO42/TCK
delay 100ms; SYS_PWROK assert. 23 ME_UNLOCK 19
GPIO46/CIRRXM/TRST#
17,96 SYS_PWROK
58 CARD_WLAN_OUT#
84
83
GPIO77/SPI_MISO
113
Layout Note:
GPIO76/SPI_MOSI GPIO87/CIRRXM/SIN_CR
LVDS backlight Control from PS8625 58 WIFI_RF_EN 82
GPIO75/SPI_SCK GPIO34/CIRRXL
14 S5_ENABLE 36 Need very close to EC
79 3D3V_AUX_S5 C2417 3D3V_AUX_S5
17 PM_SUSWARN# GPIO2/SPI_CS# C2422 PDG is 47p SCD1U10V2KX-5GP

2
5
GND R2431
52 TOUCH_PANEL_INTR# 124 18 1 2
GPIO10/LPCPD# GND
121 45 330KR2J-L1-GP
GPIO85/GA20 GND
58 E51_TxD 111 78
R2444 0R2J-2-GP L_BKLT_EN_EC GPIO83/SOUT_CR GND
53 L_BKLT_EN 1 2 9 89

S
R2432

1
GPIO65/SMI# GND
116
GND

2
17 PM_CLKRUN#_EC 8 PSL_OUT# 1 2 KBC_ON#_GATE_L 1 2 KBC_ON#_GATE G
GPIO11/CLKRUN# G
R2434
30 103
eDP backlight Control from Travis
27 AMP_MUTE# GPIO55/CLKOUT/IOX_DIN_DIO AGND R2433 DY Do Not Stuff
2

1KR2J-1-GP 20KR2F-L-GP Q2402 D

Travis request response time < 1ms NPCE985PA0DX-1-GP R2435 DMP2130L-7-GP

1
D
0R2J-2-GP 84.02130.031
2ND = 84.03413.A31
71.00985.C0G
1

3D3V_AUX_KBC 3D3V_AUX_KBC
EC_AGND
Layout Note:

1
Connect GND and AGND planes via either
R2436
0R resistor or connect directly.
10KR2J-3-GP
Q2403
EC_AGND G

2
D S5_ENABLE

EC_GPIO47 High Active S

3D3V_AUX_S5
R2424 2N7002K-2-GP
R2438 Do Not Stuff 84.2N702.J31
1

Do Not Stuff 1 2 ECRST# 2ND = 84.2N702.031

1 2 R2439 DY 3rd = 84.07002.I31
DY 10KR2J-3-GP 4th = 84.2N702.W31

A Q2401 C2418
A
2

PROCHOT_EC G
E

Do Not Stuff

D H_PROCHOT#_EC 1 2 H_PROCHOT# 4,42,44,46 26,36,76 PURE_HW_SHUTDOWN# B

DY
2
1

R2442 S R2440 Q2404

C
1

Do Not Stuff 0R2J-2-GP C2421 MMBT3906-4-GP UM

DY 2N7002K-2-GP Do Not Stuff 84.T3906.A11
84.2N702.J31 DY 2nd = 84.03906.F11
Wistron Corporation
2

2ND = 84.2N702.031
3rd = 84.07002.I31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4th = 84.2N702.W31 Taipei Hsien 221, Taiwan, R.O.C.

Title

KBC Nuvoton NPCE885

Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 24 of 104

5 4 3 2 1
 5 4 3 2 1

SSID = Flash.ROM

SPI Flash ROM(8M) for PCH 3D3V_S5 3D3V_S5

1
D
1203 RN2501 DY C2501 C2502
D

DY

4
3
Do Not Stuff SCD1U10V2KX-5GP

2
R2501 RN2501
4K7R2J-2-GP
DY Do Not Stuff Single SPI shared flash connection (SPI Quad I/O mode)

1
2
SPI25 3D3V_S5

18,24 SPI_CS0#_R 1 CS# VCC 8

18,24 SPI_SO_R 2 DO/IO1 HOLD#/IO3 7 SPI_HOLD# 18
18 SPI_W P# 3 WP#/IO2 CLK 6 SPI_CLK_R 18,24
4 GND DI/IO0 5 SPI_SI_R 18,24
1

1
W 25Q64FVSSIQ-GP
EC2502 DY 72.25Q64.K01 EC2501 EC2503
Do Not Stuff Do Not Stuff DY DY Do Not Stuff
2

2
C C
3D3V_S5
SKT25
Source QUAD/DUAL fast read DUAL fast read
SPI_CS0#_R 1 8
SPI_SO_R 2 DY 7 SPI_HOLD#
SPI_W P# 3 6 SPI_CLK_R 72.25Q64.K01 O O
4 5 SPI_SI_R

Do Not Stuff 72.25Q64.F01 O O

Do Not Stuff Refer to "NCPE985x/ NPCE995x board design reference guide"
72.25Q64.D01 O O

SSID = RBATT
+RTC_VCC 3D3V_AUX_S5 RTC_AUX_S5

B Do Not Stuff TP2502 B

1 +RTC_VCC

D2501
1

RTC1 R2502 3
1KR2J-1-GP
1 2 1 RTC_PW R 2
PWR

2
GND 2
NP1 BAS40-05-7-F-1-GP C2503
NP1 SC1U6D3V2KX-GP
NP2 NP2 1
75.00040.A7D
BAT-060003HA002M213ZL-GP-U1
1 TP2501 2nd = 83.00040.E81
Do Not Stuff
62.70014.001

Q2505
A G UM A
1

D RTC_DET# 20
R2504
10MR2J-L-GP S Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2N7002K-2-GP Taipei Hsien 221, Taiwan, R.O.C.
2

84.2N702.J31
2ND = 84.2N702.031 Title
3rd = 84.07002.I31
4th = 84.2N702.W31 Flash/RTC
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 25 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Thermal

Fan controller1
5V_S0
R2605 FAN261
Do Not Stuff
3D3V_S0 3D3V_S0 1 2 FON# 1 8
D
DY D

SC4D7U6D3V3KX-GP
FSM# GND

C2605

C2611
2 7

SCD1U10V2KX-5GP
5V_S0 VIN GND
FAN_VCC1 3 6
VOUT GND

1
24 FAN1_DAC_1 4 VSET GND 5

1
2

2
RN2602 APL5606AKI-TRG-GP
SRN2K2J-1-GP 74.05606.A71
2nd = 74.02113.0E1
3D3V_S0 Layout Note:

4
3
Need 10 mil trace width.
6 1 THM_SML1_DATA
18,24,53,76 SML1_DATA
5 2 R2606 FAN1
SC10U6D3V3KX-GP

84.2N702.A3F 0R2J-2-GP
C2601

C2602

5
SCD1U10V2KX-5GP
1

4 3 2nd = 84.DM601.03F 24 FAN_TACH1 1 2 FAN_TACH1_C 3

3rd = 84.2N702.E3F 2
Q2601 4th = 84.2N702.F3F
2

2N7002KDW -GP FAN_VCC1 1

THM_SML1_CLK 4

C2603
2

Do Not Stuff
ETY-CON3-8-GP

1
C2604 D2601
18,24,53,76 SML1_CLK Layout Note: Do Not Stuff
20.F1841.003
84.03904.L06 Signal Routing Guideline: DY DY DY

2
2ND = 84.03904.P11 Trace width = 15mil AFTP2803 1

1
NCT7718_DXP
C THM26 Do Not Stuff C
3

1 8 THM_SML1_CLK Do Not Stuff

C2606 C2607 VDD SCL THM_SML1_DATA
1 2 D+ SDA 7 2ND = 83.R5003.H8H
Q2603 Do Not Stuff SC2200P50V2KX-2GP 3 6 ALERT# 3rd = 83.5R003.08F
DY
2

PMBS3904-1-GP T_CRIT# D- ALERT#

4 5
2

T_CRIT# GND

1
Do Not Stuff

Do Not Stuff
NCT7718_DXN

C2608

C2609
2.System Sensor, Put on palm rest NCT7718W -GP DY DY

2
74.07718.0B9
1

AFTP2802 1FAN_TACH1_C
R2601 AFTP2801 1FAN_VCC1
0R2J-2-GP
1203 change to ALL_SYS_PWRGD
Q2602
Layout Note: 17,24,36 PCH_PW ROK G
2

C2812 close U2801

D
PURE_HW _SHUTDOW N# 24,36,76
THERM_SYS_SHDN# S
FAN_TACH1

1
Layout Note: 2N7002K-2-GP C2610 FAN_VCC1
Both DXN and DXP routing 10 mil trace width and 10 mil spacing. 84.2N702.J31 DY Do Not Stuff

2
2ND = 84.2N702.031

1
EC2602 EC2601
3rd = 84.07002.I31
4th = 84.2N702.W31 DY DY

Do Not Stuff

Do Not Stuff
2

2
3D3V_S0
B B

R2603 1 2 18K7R2F-GP ALERT#

R2604 1 2 2KR2F-3-GP T_CRIT#

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 26 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = AUDIO

29 LINE1_VREFO_R MIC2_VREFO 29
D D
29 LINE1_VREFO_L AUD_AGND

SC2D2U6D3V2MX-GP
29 AUD_HP1_JACK_L
3D3V_S0 25mA +3V_AVDD
29 AUD_HP1_JACK_R
EC27071 2 SC1KP25V2JX-GP
EC27061 2 SC1KP25V2JX-GP
R2701 1 2 0R2J-2-GP EC27051 SC1KP25V2JX-GP

1 C2705
2
SC1U10V2KX-1GP EC27041 2 SC1KP25V2JX-GP
C2704 EC27031 2 SC1KP25V2JX-GP

1
1 2

1
C2701 C2702
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP +5V_AVDD 5V_S0
2 Close pin36 AUD_AGND

2
R2703

1
+3V_AVDD
1.5A
C2703

AUD_VREF
1 2

LDO1_CAP
+5V_AVDD

CPVEE
AUD_AGND SC1U10V2KX-1GP
5V_S0 +5V_PVDD R2706

CBN
AUD_AGND 0R3J-0-U-GP

1
R2702 C2710 C2711 1 2
0R5J-5-GP
Layout Note:

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
2 1

2
0R5J-6-GP
Place close to Pin 26

36

35

34

33

32

31

30

29

28

27

26

25
R2704 C2706 C2707 C2708 C2709 HDA27
1

0R5J-5-GP 1
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

CPVEE

HP_OUT_L

LINE1_VREFO_L

MIC2_VREFO

LDO1_CAP

AVDD1

AVSS1
CPVDD

CBN

HP_OUT_R

LINE1_VREFO_R

VREF
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

2 1
2

CBP 37 24 AUD_AGND AUD_AGND Layout Note:

CBP LINE2_L
Tied at point only under
AUD_AGND 38 23 Codec or near the Codec
AVSS2 LINE2_R
C2712 1 2 LDO2_CAP 39 22
AUD_AGND LDO2_CAP LINE1_L LINE1_L 29
SC10U6D3V3KX-GP
Layout Note: Layout Note: +3V_1D5V_AVDD 40
AVDD2 LINE1_R
21
LINE1_R 29
Close pin41 Close pin46 +5V_PVDD 41
PVDD1 CPVREF
20

AUD_SPK_L+ 42 19 MIC_CAP C2713 1 2 SC10U6D3V3KX-GP

29 AUD_SPK_L+ SPK_L+ MIC_CAP AUD_AGND
AUD_SPK_L-
C
29 AUD_SPK_L-
43
SPK_L- MIC2_R/SLEEVE
18
SLEEVE 29 Layout Note: C

29 AUD_SPK_R-
AUD_SPK_R- 44
SPK_R- MIC2_L/RING2
17
RING2 29
Width>40mil, to improve
3D3V_S0 1D5V_S0 +3V_1D5V_AVDD AUD_SPK_R+
Headpohone Crosstalk noise
45 16
29 AUD_SPK_R+ SPK_R+ MONO_OUT
R2705 1 2 0R2J-2-GP 46 15 JDREF R2707 1 2 20KR2F-L-GP
+5V_PVDD PVDD2 JDREF AUD_AGND

GPIO0/DMIC_DATA

GPIO1/DMIC_CLK
1

R2710 1 2 Do Not Stuff 1 2 EAPD# 47 14

DY C2715 24 AMP_MUTE# R2708 0R2J-2-GP PDB SENSE_B

SDATA_OUT
SC4D7U6D3V3KX-GP COMBO-GPI AUD_SENSE_A AUD_SENSE
Add R2710 DY(3D3V_S0) 48 13 1 2

LDO3_CAP
2

SPDIFO/GPIO2 SENSE_A AUD_SENSE 29

SDATA_IN

DVDD_IO
BIT_CLK

PCBEEP
RESET#
Close pin40 49
GND
R2709

DVDD

SYNC
DVSS
39K2R2F-L-GP
AUD_AGND remove D2702 R2710 R2711 Add R2708_0R(PDB pin)
ALC3223-CG-GP
Layout Note:

10

11

12
+3V_AVDD Place close to Pin 13
AUD_PC_BEEP

1 LDO3_CAP
Azalia I/F EMI
TP2702 1 +3V_AVDD

C2718
1

1
C2716 C2717

C2719
SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

1
HDA_CODEC_SDOUT

2
HDA_CODEC_BITCLK

2
EC2708 EC2709

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
1

1
Do Not Stuff

Do Not Stuff
2

DY DY
1 2 DMIC_DATA_R
52 DMIC_DATA R2714 0R2J-2-GP
1 2 DMIC_CLK_R
52 DMIC_CLK R2716 0R2J-2-GP
1 2 CODEC_SDOUT_R
2

19 HDA_CODEC_SDOUT R2719 0R2J-2-GP

C2723 1 2 CODEC_BITCLK_R
Do Not Stuff
DY 19 HDA_CODEC_BITCLK R2720 0R2J-2-GP
1

B 1 2 HDA_CODEC_SDIN0 B
19 HDA_SDIN0 R2718 0R2J-2-GP
Close pin3 19 HDA_CODEC_SYNC
HDA_CODEC_SYNC

HDA_CODEC_RST#
19,29 HDA_CODEC_RST#
BAT54CPT-2-GP
RN2701 HDA_SPKR_R 2 SCD1U10V2KX-5GP
20 HDA_SPKR 2 3 C2720
1 4 3 AUD_PC_BEEP_C 1 2AUD_PC_BEEP
24 KBC_BEEP
SRN0J-6-GP KBC_BEEP_R 1

1
D2701
R2717
1KR2J-1-GP

2
A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec ALC3221

Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 27 of 104
5 4 3 2 1
 5 4 3 2 1

D D

(Blanking)

C C

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 28 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = AUDIO

Speaker
SPK1
5
0R3J-0-U-GP 2 1 R2904 AUD_SPK_R+_C 1
27 AUD_SPK_R+
D D
0R3J-0-U-GP 2 1 R2903 AUD_SPK_R-_C 2
27 AUD_SPK_R- 0R3J-0-U-GP
27 AUD_SPK_L+ 2 1 R2902 AUD_SPK_L+_C 3
27 AUD_SPK_L-
0R3J-0-U-GP 2 1 R2901 AUD_SPK_L-_C 4 CONN Pin Net name
6
Pin1 SPK_R+
ACES-CON4-7-GP-U Pin2 SPK_R-
20.F0772.004
Pin3 SPK_L+

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
EC2901

EC2902

EC2903

EC2904
1

1
DY DY DY DY Pin4 SPK_L_

2
AUD_SPK_L-_C 1 AFTP5801
AUD_SPK_L+_C 1 AFTP5802
AUD_SPK_R-_C 1 AFTP5803
AUD_SPK_R+_C 1 AFTP5804

C C
AUD_PORTA_L_R_B 1 AFTP2906

Combo Jack
AUD_PORTA_R_R_B 1 AFTP2907
RN2901 AUD_AGND 1 AFTP2908
1 4 AUD_SENSE 1 AFTP2909
27 MIC2_VREFO
2 3

SRN2K2J-3-GP HPMIC1
27 RING2 0R3J-0-U-GP 2 1 R2906 RING2_R 3
R2908 1 2 10R2F-L-GP AUD_HP1_JACK_L1 0R3J-0-U-GP 2 1 R2907 AUD_PORTA_L_R_B 1
27 AUD_HP1_JACK_L C2907 1
27 LINE1_L 2 LINE1-L_C
R2922 1 21KR2J-1-GP
SC4D7U6D3V3KX-GP R2912 1 2 2K2R2J-2-GP 5
27 LINE1_VREFO_L
27 AUD_SENSE 6
R2910 1 2 10R2F-L-GP AUD_HP1_JACK_R1 0R3J-0-U-GP 2 1 R2909 AUD_PORTA_R_R_B 2
27 AUD_HP1_JACK_R C2908 1
27 LINE1_R 2 LINE1-L_R
R2921 1 21KR2J-1-GP 0R3J-0-U-GP 2 1 R2911 SLEEVE_R 4
SC4D7U6D3V3KX-GP R2913 1 2 2K2R2J-2-GP 7
27 LINE1_VREFO_R

Do Not Stuff
EC2908

Do Not Stuff
EC2907

Do Not Stuff
EC2906

Do Not Stuff
EC2905
1

1
10KR2J-3-GP
R2920

10KR2J-3-GP
R2919
27 SLEEVE AUDIO-JK363-GP

1
22.10270.P81
2

2
DY DY DY DY
2

2
AUD_AGND

B B

AUD_AGND AUD_AGND

1227 modify
AUD_PORTA_R_R_B
AUD_PORTA_L_R_B
RING2_R 5V_PW R_2 +3V_AVDD
AUD_SENSE
SLEEVE_R
1

R2915 R2918
470KR2J-2-GP Do Not Stuff DY
2

2
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

2
ED2901

ED2902

ED2903

ED2904

ED2905

R2917 1 2 0R2J-2-GP
U2901 HDA_CODEC_RST# 19,27
A DY DY DY DY DY S D UM A
AUD_AGND 4 3 SLEEVE 27
SLEEVE_CTRL
G G MUTE_CTRL
D
5 2
S Wistron Corporation
1

6 1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

1

C2901 Taipei Hsien 221, Taiwan, R.O.C.

DMN66D0LDW -7-GP Do Not Stuff
2

Title
84.DMN66.03F
AUD_AGND AUD_AGND AUD_AGND AUD_AGNDAUD_AGND
Thermal NCT7718W/Fan Controllor P2793
DY Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 29 of 104
5 4 3 2 1
 5 4 3 2 1

10/100 Need Only need C3021, C3022, C3023, C3024 in Pin3, 8, 22, 30
LAN CHIP C3014
LAN_TXP_C_PCH_RXP4 1 2
SCD1U10V2KX-5GP
PCIE_PRX_LANTX_P4 16
LAN_TXN_C_PCH_RXN4 1 2 PCIE_PRX_LANTX_N4 16
L3010 C3016 SCD1U10V2KX-5GP
REGOUT 1 2 VDD10 PCIE_PTX_LANRX_P4_C
PCIE_PTX_LANRX_P4_C 16
IND-4D7UH-242-GP PCIE_PTX_LANRX_N4_C
PCIE_PTX_LANRX_N4_C 16
R3032
CLK_PCIE_LAN_P4 18
2K49R2F-GP
CLK_PCIE_LAN_N4 18

1
D C3012 C3019 C3021 C3022 C3023 C3024 1 2 D

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP
2

2
X5R

3D3V_LAN_S5

LANXOUT
LANXIN
VDD10
LED0 1 TP3003 Do Not Stuff

RSET
LED1 1 TP3002 Do Not Stuff
LED2 1 TP3001 Do Not Stuff

32
31
30
29
28
27
26
25
LOM30

AVDD33

AVDD10
CKXTAL2
CKXTAL1
LED0

LED2
LED1/GPO
RSET
40 mils 3D3V_LAN_S5 VDDREG
33 GND

1 R3006 2 31 LAN_MDI0P 2 R3024 1 0R2J-2-GP LAN_MDI0P_1 1 MDIP0 REGOUT 24 REGOUT C3018 1 2

0R3J-0-U-GP 2 R3025 1 0R2J-2-GP LAN_MDI0N_1 2 23 VDDREG SC1U10V2KX-1GP
31 LAN_MDI0N MDIN0 VDDREG
1

1
C3007 C3008 C3009 C3010 VDD10 3 22 VDD10 C3025 1 2 3D3V_S0
R3026 0R2J-2-GP LAN_MDI1P_1 AVDD10 DVDD10 PCIE_W AKE# SCD1U10V2KX-4GP
31 LAN_MDI1P 2 1 4 MDIP1 LANWAKE# 21 PCIE_W AKE# 17,24
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2 R3027 1 0R2J-2-GP LAN_MDI1N_1 5 20 ISOLATE# 2 1

31 LAN_MDI1N
2

2
R3028 0R2J-2-GP LAN_MDI2P_1 MDIN1 ISOLATE# PLT_RST#_LAN R3014
31 LAN_MDI2P 2 1 6 MDIP2 PERST# 19

1
SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP
2 R3029 1 0R2J-2-GP LAN_MDI2N_1 7 18 LAN_TXN_C_PCH_RXN4 1KR2J-1-GP
31 LAN_MDI2N MDIN2 HSON
C VDD10 8 17 LAN_TXP_C_PCH_RXP4 R3015 C
AVDD10 HSOP

REFCLK_N
REFCLK_P
CLKREQB
15KR2F-GP

AVDD33
MDIN3
MDIP3

2
HSIN
HSIP
RTL8111GUS-CGT-GP
71.08111.X03

9
10
11
12
13
14
15
16
3D3V_LAN_S5
LAN_MDI0P
LAN_MDI0N 2 R3030 1 0R2J-2-GP LAN_MDI3P_1 3D3V_LAN_S5
31 LAN_MDI3P
LAN_MDI1P 2 R3031 1 0R2J-2-GP LAN_MDI3N_1
31 LAN_MDI3N
1
2

LAN_MDI1N R3033
3D3V_LAN_S5 PCIE_W AKE# 1 2
RN3001 CLK_LAN_REQ4#_R
DY Do Not Stuff PCIE_PTX_LANRX_P4_C 10KR2J-3-GP
1

EC3001 EC3002 EC3003 EC3004 PCIE_PTX_LANRX_N4_C

DY DY DY DY CLK_PCIE_LAN_P4
1Q402_14
3

CLK_PCIE_LAN_N4
2

2
Do Not Stuff

Do Not Stuff

Do Not Stuff
Do Not Stuff

3D3V_LAN_S5

2 3 PLT_RST#_LAN
17,24,55,58,65,73,96 PLT_RST# DY
Q3003
X00 3/7 Change value from test report

1
B Do Not Stuff B
R3016 R3003
2 1 Do Not Stuff

1
0R2J-2-GP C3011
LANXOUT 1 2 R3004

2
Do Not Stuff

CLK_LAN_REQ#_EN
251mA SC15P50V2JN-2-GP
DY

2
3D3V_S5 3D3V_LAN_S5

3
PA102FMG-GP-U DY
Q3004 main: 84.00102.031 X3001 Do Not Stuff
XTAL-25MHZ-155-GP 2ND = 84.03904.P11
2nd: 84.03403.031

1
S D Q3002
1

Do Not Stuff DY

2
1
C3013
SCD1U10V2KX-5GP

R3021 18,20 CLK_PCIE_LAN_REQ4# 3 2 CLK_LAN_REQ4#_R

1

10KR2J-3-GP C3017
G

Do Not Stuff

C3015 R3005
2

R3022 SC1U10V2KX-1GP 2 1
2

20KR2F-L-GP
1 2 PM_LAN_ENABLE_R
DY C3001 0R2J-2-GP
2

LANXIN 1 2
LAN_ENABLE_R_C

SC15P50V2JN-2-GP

A Q3001 UM A
24 PM_LAN_ENABLE G
1

R3023
D
Wistron Corporation
100KR2J-1-GP S 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2N7002K-2-GP
2

Title

LOM
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 30 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = LOM 100/GIGA LAN TransFormer

XF3101
1CT:1CT MDO3-
30 LAN_MDI3N 2 23
D D
1 24 MCT3

3 22 MDO3+
30 LAN_MDI3P

1CT:1CT MDO2-
30 LAN_MDI2N 5 20

4 21 MCT2

6 19 MDO2+
30 LAN_MDI2P

1CT:1CT MDO1-
30 LAN_MDI1N 8 17

7 18 MCT1

9 16 MDO1+
30 LAN_MDI1P

1CT:1CT MDO0-
30 LAN_MDI0N 11 14

10 15 MCT0
LOM_TCT

12 13 MDO0+
30 LAN_MDI0P

XFORM-24P-19-GP

C C
2nd = 68.89240.30B
1

C5902
SCD1U10V2KX-5GP
2

B B

U3103

LAN_MDI0P 1 6 LAN_MDI0N
RJ45 CONN
2 5
MCT0
RJ45 MCT2
DY 9 MCT1
LAN_MDI1P LAN_MDI1N MDO0+ CHASSIS#9
3 4 1 MDO0+ MCT3
Do Not Stuff MDO0- 2 MDO0-

5
6
7
8
Do Not Stuff MDO1+ 3
MDO2+ MDO1+ RN3101
4 MDO2+
MDO2- 5 SRN75J-1-GP
U3104 MDO1- MDO2-
6 MDO1-
MDO3+ 7
LAN_MDI2P LAN_MDI2N MDO3- MDO3+
1 6 8

4
3
2
1
MDO3-
10 CHASSIS#10
RJ45

MCT
2 5
RJ45-8P-129-GP-U
A 22.10019.201 UM A
DY

1
LAN_MDI3P 3 4 LAN_MDI3N MDO1+ 1 AFTP3101
MDO1- AFTP3104 C3101
Do Not Stuff MDO0+
1
1 AFTP3107 SC100P3KV8JN-2-GP Wistron Corporation

2
Do Not Stuff MDO0- AFTP3108 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
MDO2+
1
AFTP3102
78.1013N.1AL Taipei Hsien 221, Taiwan, R.O.C.
1
MDO2- 1 AFTP3105
MDO3+ 1 AFTP3109 Title
MDO3- AFTP3110
1
XFOM&RJ45
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 31 of 104
5 4 3 2 1
 5 4 3 2 1

Pin name Net name

1121 remove Switch(No support D3 cold)
0R3J-0-U-GP
R3213 SD_DAT1 SD_MMC_DAT1
16 USB_PP7 1 2 USB_DP7_R

3D3V_S0 3D3V_CARD_S0
SP1 SD_WP/MS_DATA1
R3215
0R3J-0-U-GP SP2 SD_MMC_DATA0/MS_DATA5

3
1 2
D TR3201 SP3 MMC_DATA7/MS_DATA4 D

C3201
SCD1U10V2KX-5GP

C3202
SC4D7U6D3V3KX-GP
Do Not Stuff

1
SP4 MMC_DATA6/MS_DATA0
SP5 SD_MMC_CLK/MS_DATA2

2
DY Do Not Stuff SP6 MMC_DATA5/MS_DATA6

4
SP7 SD_MMC Command/MS_DATA3
16 USB_PN7 1 2 USB_DN7_R SP8 MMC_DATA4/MS_DATA7
R3214 SP9 SD_MMC_DATA3/MS_CLK
0R3J-0-U-GP
SP10 SD_MMC_DATA2/MS_BS

C C

CARD32

USB_DP7_R 4 5 3D3V_CARD_S0
USB_DN7_R DP 3V3_IN
3 DM 3V3_IN 6
3V3_IN 8
SD_CD# 10
33 SD_CD# SD_CD#
SD_MMC_DAT1 12 7 3D3V_CARD
33 SD_MMC_DAT1 SC1U6D3V2KX-GP SD_DAT1 CARD_3V3
C3204 1 2 CARD_AV18 1
R3201 1 CARD_RREF AV18 SD_WP/MS_DATA1
2 2 RREF SP1 11 SD_WP/MS_DATA1 33
6K2R2F-GP 9 13 SD_MMC_DATA0/MS_DATA5 SD_MMC_DATA0/MS_DATA5 33
MS_INS# GPIO SP2 TP_MMC_DATA7/MS_DATA4 TP3201
33 MS_INS# 15 MS_INS# SP3 14 1
1 2 SDREG 16 17 MMC_DATA6/MS_DATA0 33
C3205 12MHZ_IN SDREG SP4 SP5
B 24 48MHZ_IN SP5 18 R3202 1 2 0R2J-2-GP SD_MMC_CLK/MS_DATA2 33 B
SC1U6D3V2KX-GP 19 TP_MMC_DATA5/MS_DATA6 1 TP3202
SP6 SD_MMC_CMM/MS_DATA3
SP7 20 SD_MMC_CMM/MS_DATA3 33
21 TP_MMC_DATA4/MS_DATA7 1 TP3203
SP8
1

C3203 25 22 SD_MMC_DATA3/MS_CLK SD_MMC_DATA3/MS_CLK 33

GND SP9 SD_MMC_DATA2/MS_BS
SP10 23 SD_MMC_DATA2/MS_BS 33
DY
Do Not Stuff
2

RTS5176E-GRT-GP

UM

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size
Card Reader-RTS5176
Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 32 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = SDIO

SD/MS/MMC Card Connector

D 3D3V_CARD D

3D3V_CARD

C3302
SC10U6D3V3KX-GP
CARD1
C3301

C3310

C3311

C3312
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
1

1
Do Not Stuff
11 12
DY SD_VDD/MMC_VDD MS_DATA0
13
MMC_DATA6/MS_DATA0 32
SD_W P/MS_DATA1 32
2

2
MS_DATA1
4 MS_VCC MS_DATA2 10 SD_MMC_CLK/MS_DATA2 32
MS_DATA3 7 SD_MMC_CMM/MS_DATA3 32
R3301 1 2 0R2J-2-GP 20 8
32 SD_CD# SD_CD MS_INS MS_INS# 32
32 SD_MMC_DATA3/MS_CLK 3 SD_CD/DAT3/MMC_RSV MS_BS 15 SD_MMC_DATA2/MS_BS 32
MS_SCLK 5 SD_MMC_DATA3/MS_CLK 32
32 SD_MMC_CLK/MS_DATA2 14 SD_CLK/MMC_CLK
32 SD_MMC_CMM/MS_DATA3 6 SD_CMD/MMC_CMD 23 23
Layout Note: 32 SD_MMC_DATA0/MS_DATA5 18
24 24
SD_DAT0/MMC_DAT
Close to Card Reader CONN 32 SD_MMC_DAT1 19 SD_DAT1
32 SD_MMC_DATA2/MS_BS 1 SD_DAT2 SD_GND 21

32 SD_W P/MS_DATA1 22 SD_WP/SW MS_VSS 16

MS_VSS 2

NP1 NP1 SD_VSS/MMC_VSS1 9

NP2 NP2 SD_VSS/MMC_VSS2 17

SKT-CARDREADER26-GP-U
C C

62.10051.C21

For EMI Reserved

B
SD_W P/MS_DATA1

SD_MMC_DATA0/MS_DATA5

SD_MMC_CLK/MS_DATA2
www.vinafix.vn B

SD_MMC_CMM/MS_DATA3

SD_MMC_DATA3/MS_CLK

SD_MMC_DATA2/MS_BS

SD_MMC_DAT1

MMC_DATA6/MS_DATA0
EC3308
Do Not Stuff

EC3301
Do Not Stuff

EC3302
Do Not Stuff

EC3303
Do Not Stuff

EC3304
Do Not Stuff

EC3307
SC4D7P50V2BN-GP

EC3305
Do Not Stuff

EC3306
Do Not Stuff
1

DY DY DY DY DY
DY DY
2

Layout Note:
A please close U3201 UM A
1203 modify 10P change to 4.7P
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SD/XD/MS/MMC Card CONN

Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 33 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = USB USB3.0 Port1

USB_PN1_C 1 AFTP6204
USB30_VCCA USB30_VCCA 1 AFTP6205
U3401 USB_PP1_C 1 AFTP6209
16 USB_PN1 1 DY 2 USB_PN1_C
USB_PN1_C 1 8
R3402 USB_PP1_C I/O_1 VDD
2 I/O_2 GND 7
Do Not Stuff USB3_PRX_CTX_P1_C 3 6 USB3_PTX_CRX_P1_C
USB3_PRX_CTX_N1_C I/O_3 I/O_6 USB3_PTX_CRX_N1_C
4 I/O_4 I/O_5 5
TR3401
D 1 2 D
TVW MSOP06AD0-GP
4 3
USB30_VCCA X00 0320
FILTER-4P-6-GP

USB1

1 2 USB_PN1_C
USB_PP1_C VBUS D- USB_PP1_C
16 USB_PP1 D+ 3
1 DY 2
USB3_PRX_CTX_N1_C 5 STDA_SSRX-
R3403 USB3_PRX_CTX_P1_C 6 7
Do Not Stuff STDA_SSRX+ GND_DRAIN
C3401
USB3_PTX_CRX_N1_C 8
USB3_PTX_CRX_P1_R USB3_PTX_CRX_P1_C USB3_PRX_CTX_P1_C USB3_PTX_CRX_P1_C STDA_SSTX-
16 USB3_PTX_CRX_P1 1 2 1 2 16 USB3_PRX_CTX_P1 1 2 9 STDA_SSTX+ GND 10
GND 11
R3404 R3406 12 4
SCD1U10V2KX-5GP 0R2J-2-GP 0R2J-2-GP CHASSIS#12 GND
13 CHASSIS#13

4
SKT-USB13-18-GP-U
TR3402 TR3403
Do Not Stuff Do Not Stuff
DY Do Not Stuff DY Do Not Stuff 22.10339.331
AFTP6218 1
2

3
C C

C3402
1 2 USB3_PTX_CRX_N1_R 1 2 USB3_PTX_CRX_N1_C 16 USB3_PRX_CTX_N1 1 2 USB3_PRX_CTX_N1_C
16 USB3_PTX_CRX_N1
R3405 R3407
SCD1U10V2KX-5GP 0R2J-2-GP 0R2J-2-GP

USB3.0 Port2
R3408
16 USB_PN0 1 DY 2 USB_PN0_C
Do Not Stuff
USB30_VCCB 1 AFTP6210
USB_PN0_C 1 AFTP6211
USB_PP0_C 1 AFTP6212
TR3404
1 2 USB30_VCCB
U3402
USB30_VCCB
4 3
USB_PN0_C 1 8
X00 0320
FILTER-4P-6-GP USB_PP0_C I/O_1 VDD
2 I/O_2 GND 7
USB3_PRX_CTX_P0_C 3 6 USB3_PTX_CRX_P0_C USB2
USB3_PRX_CTX_N0_C I/O_3 I/O_6 USB3_PTX_CRX_N0_C
4 I/O_4 I/O_5 5
1 2 USB_PN0_C
B R3409 VBUS D- USB_PP0_C B
D+ 3
16 USB_PP0 1 DY 2 USB_PP0_C TVW MSOP06AD0-GP
Do Not Stuff USB3_PRX_CTX_N0_C 5
USB3_PRX_CTX_P0_C STDA_SSRX-
6 STDA_SSRX+ GND_DRAIN 7

USB3_PTX_CRX_N0_C 8
USB3_PTX_CRX_P0_C STDA_SSTX-
9 STDA_SSTX+ GND 10
GND 11
12 CHASSIS#12 GND 4
13 CHASSIS#13

C3404
SKT-USB13-18-GP-U
1 2 USB3_PTX_CRX_P0_R 1 2 USB3_PTX_CRX_P0_C 16 USB3_PRX_CTX_P0 1 2 USB3_PRX_CTX_P0_C
16 USB3_PTX_CRX_P0
R3410 R3412 22.10339.331
SCD1U10V2KX-5GP 0R2J-2-GP 0R2J-2-GP

AFTP6217 1
1

TR3405 TR3406
Do Not Stuff Do Not Stuff
DY Do Not Stuff DY Do Not Stuff
2

A UM A
C3403
USB3_PTX_CRX_N0_R USB3_PTX_CRX_N0_C USB3_PRX_CTX_N0_C
16 USB3_PTX_CRX_N0 1 2 1 2 16 USB3_PRX_CTX_N0 1 2
Wistron Corporation
R3411 R3401 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SCD1U10V2KX-5GP 0R2J-2-GP 0R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 3.0
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 34 of 104
5 4 3 2 1
 5 4 3 2 1

USB30_VCCA
2A
5V_S5 U3502

1 GND FLG1 8 USB_OC#0_1 16,18

USB3.0 Port1

1
D 2 7 USB30_VCCB TC3503 C3506 C3503 D
IN OUT1

SE220U6D3VM-30-GP

SC1U10V3KX-3GP

SCD1U10V2KX-4GP
3 EN1# OUT2 6 USB30_VCCA
1 24 USB_PWR_EN# 4 5

2
C3502 EN2# FLG2
SC1U10V3KX-3GP
2

AP2182SG-13-GP
74.02182.071 77.52271.09L

USB30_VCCB
2A

C3504
SC1U10V3KX-3GP

C3505
SCD1U10V2KX-4GP
USB3.0 Port2
TC3502

1
SC100U6D3V6MX-GP
78.10710.52L

2
C C

X01 0618
Right USB Power x1
5V_S5
Support 2A +5V_USB1
at least 40 mil 2A
U3501

at least 80 mil 1 GND NC#8 8

SC1U10V3KX-3GP
SCD1U10V2KX-5GP
2 7

Do Not Stuff
IN#2 OUT#7

1
R3501

C3507

C3508
3 6 TC3501
IN#3 OUT#6

1
24 USB_PWR_EN# 4 EN# FLG# 5 USB_OC#2_3 16
1

SC100U6D3V6MX-GP
DY 78.10710.52L
B C3501 B

2
AP2301M8G-13-GP
2

2
SCD1U10V2KX-5GP

74.02301.079

X01 0618

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Power SW
Size Document Number Rev
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 35 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Reset.Suspend
Power Good
D 3D3V_S0 D

ROSA Run Power

1
R3601
1KR2J-1-GP

49 1D35V_VTT_PWRGD R3610 2 1 0R2J-2-GP

2
7,48 1D05V_VTT_PWRGD R3611 2 1 0R2J-2-GP ALL_SYS_PWRGD 24
3D3V_AUX_S5

1 2 PS_S3CNTRL
DY
R3607
Do Not Stuff
D G S
C C
6

Q3601 5V_S5 5V_S5

DY Do Not Stuff
Do Not Stuff U3601 5V_S0 5V_S0
1

S G D
GND 15 5V_S0 Comsumption
1 14
VIN1#1 VOUT1#14 Peak current 6A

C3603
SC10U6D3V5KX-1GP
2 VIN1#2 VOUT1#13 13

1
17,24,48,49,51 PM_SLP_S3# R3609 2 1 0R2J-2-GP 3V5V_S0_ON 3 12 3V5V_CT1
ON1 CT1 3D3V_S0
17,24,26 PCH_PWROK
4
5
VBIAS GND 11
10 3V5V_CT2 3D3V_S0

2
ON2 CT2
3D3V_S5 6 VIN2#6 VOUT2#9 9

C3605
SC10U6D3V5KX-1GP
7 VIN2#7 VOUT2#8 8 3D3V_S0 Comsumption

1
C3601
SC470P50V2KX-3GP

C3602
SC470P50V2KX-3GP
Peak current 2.5A

1
TPS22966DPUR-GP

2
74.22966.093

2
B B

D3602
BAS16-6-GP
2

3 PURE_HW_SHUTDOWN# 24,26,76

45 3V_5V_EN 1
83.00016.K11
2ND = 83.00016.F11 UM
1

1 2 S5_ENABLE 24
R3602
DY
A
Do Not Stuff R3603
1KR2J-1-GP Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable

Size Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 36 of 104
5 4 3 2 1
 5 4 3 2 1

D Layout Note: D
Place Close SO-DIMM

DDR_VREF_S3Do Not Stuff 1D35V_S3

R3709 5 +V_SM_VREF_CNT
1 2
DY
SA_DIMM_VREFDQ

1
SODIMM1
R3706
1K8R2F-GP

2
2R2F-GP
C
M_VREF_CA_DIMMA 1 R3708 2 C

1
C3701

1
SCD022U16V2JX-GP
R3703

2
1K8R2F-GP
+V_VREF_PATH3

1
2
1
R3707
24D9R2F-L-GP
0R2J-2-GP
R3705

2
SB_DIMM_VREFDQ

2
SODIMM2

B M_VREF_CA_DIMMB B

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

S3 Reduction Circuit
Size Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 37 of 104
5 4 3 2 1
 5 4 3 2 1

3D3V_S5 0R3J-0-U-GP 3D3V_S5_PCH

R3801
1 2
D Non DS3 D

3D3V_S5

C3801

1
3D3V_S5_PCH

Do Not Stuff
2
U3801
DS3
1
DS3 8
GND OUT#8
2 IN#2 OUT#7 7
C 3 6 C
17,24 PM_SLP_SUS# 1
DS3 2 DS3_PWRCTL 4
IN#3 OUT#6
5
R3802 EN/EN# OCB C3802

1
Do Not Stuff

Do Not Stuff
Do Not Stuff
Do Not Stuff

2
DS3

1210 change power switch (RdsON:100m ohm)

B B

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DSW
Size Document Number Rev
A4 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 38 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

B B

A A
UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER1)
Size Document Number Rev
Custom X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 39 of 104
5 4 3 2 1
UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 40 of 104
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 41 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Support
5V_S5

2
84.03904.L06

1
PR4202 2nd = 84.03904.P11 3D3V_S5
15KR2F-GP PR4203

2
10KR2J-3-GP

1
PQ3802_1 1 PMBS3904-1-GP 3D3V_S5

1
D
PQ4202 D

2
2
PD4203

1
PR4209 PSID_DISABLE#_R_C BAV99-12-GP
100KR2J-1-GP PR4204
2K2R2J-2-GP

G
1

3
PQ4201

2
FDV301N-NL-GP
PR4217 PR4205
PS_ID_R 1 2 PS_ID_R2 D S PS_ID 1 2

D
PSID_EC 24
0R3J-0-U-GP 84.00301.A31 33R2J-2-GP
Layout Note: 2nd = 84.3K329.031
PSID Layout width > 25mil

1
PD4204 PR4206
JGND DY Do Not Stuff 1 2
DY
R4202 Do Not Stuff
0R0J-GP

3
1 2

L4202
Do Not Stuff 60ohm@100MHz
DCIN1 1 2
NP2
DY DCR=0.02 ohm
7 Max current = 6000mA
6
5 1 AFTP3803 +DC_IN AD+
C 4 PU4201 C
3 +DC_IN_C L4201 1 2Do Not Stuff 1 S D 8
DY S D

PC4205

PC4203

PC4204

PC4206
2 2 7

SC1U25V5KX-1GP

SC10U25V5KX-GP
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
1
R4203 S D

PC4201
3 6

240KR3-GP
K
1

1
1 0R0J-GP PR4214 4 G D 5

PR4207
NP1 EC4201 EC4202 1 2 PD4201 PC4202
SC10U25V5KX-GP

SC1KP50V2KX-1GP

3K3R6J-GP 1SMB22AT3G-GP-U1 SCD1U25V3KX-GP SI7121DN-T1-GE3-GP

2

2
ACES-CON7-3-GP-U1 83.22R03.03G

2
20.F1643.007

A
1

PR4212 PQ3809_D
100KR2J-1-GP 84.2N702.A3F PQ4205

1
R2
JGND JGND 2nd = 84.DM601.03F PQ4204 E Id=-9.6A
3rd = 84.2N702.E3F C AD_OFF_L B PR4208
Qg=-25nC
2

R1 R1
AD_OFF_R 47KR3J-L-GP
PQ4206 4th = 84.2N702.F3F B C
E Rdson=18~30mohm
3 4 R2 PDTA124EU-1-GP

2
PDTC124EU-1-GP 84.00124.K1K
AC_IN#_G 2 5 84.00124.H1K 2nd = 84.05124.A11
2nd = 84.05124.011
1 6

2N7002KDW -GP
1

PC4208
SC1U25V3KX-1-GP

1
PR4213
100KR2J-1-GP 1 2 PQ4208
PR4210 PR4215

2
1KR2J-1-GP G PQ3808G 1 2
2

3D3V_S5 1KR2J-1-GP
B PQ3808D B
D

1
24 AC_IN_KBC# S PC4209
PR4211
DY

SCD01U50V2KX-1GP
DT MODE Do Not Stuff

2
2N7002K-2-GP
84.2N702.J31

1
PW R_CHG_AD_OFF_R
24 PW R_CHG_AD_OFF

AFTP3801 1 +DC_IN_C BAT_IN#

AFTP3802 1 PS_ID_R
PQ4203
1 6
PR4216 PC4210
2 1 2 5 PQ4203_5 1 2
DY SCD47U6D3V2KX-GP
BAT_IN# 24,43,44

A Do Not Stuff 3 4 UM A

1
4,24,44,46 H_PROCHOT# 2N7002KDW -GP
PR4218
100KR2J-1-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

2
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

DCIN Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 42 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Support
BT+
PBAT_PRES1# 1 AFTP3902
D PBAT_SMBDAT1 1 AFTP3903 D

K
PBAT_SMBCLK1 1 AFTP3904

1
BT+ 1 AFTP3905
EC4304
SCD1U50V3KX-GP
2 EC4303
SC2200P50V2KX-2GP DY PD4302
Do Not Stuff Batt Connecter
2

A
BATT1
10
1
RN4301
4 5 2
3 6 PBAT_SMBCLK1 3
24,44 BAT_SCL
2 7 PBAT_SMBDAT1 4
24,44 BAT_SDA
1 8 PBAT_PRES1# 5
24,42,44 BAT_IN#
6
SRN33J-4-GP AFTP3901 1 BAT_ALERT 7
8
BAT_IN# 24,42,44 9
11
C C

ALP-CON9-6-GP-U
2
EC4301 EC4302 EC4305 20.81925.009
1

1
Do Not Stuff

Do Not Stuff

DY Do Not Stuff AFTP3906

DY DY 1
1
2

Placement: Close to Batt Connector

BAT_SCL
BAT_IN#

BAT_SDA

B B
3

D4302 D4303 D4301

DA3X101F0L-1-GP DA3X101F0L-1-GP DA3X101F0L-1-GP
1

UM
3D3V_AUX_KBC

75.03101.07D 75.03101.07D 75.03101.07D Wistron Corporation

A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
2nd = 83.00099.K11 2nd = 83.00099.K11 2nd = 83.00099.K11 Taipei Hsien 221, Taiwan, R.O.C.
3rd = 83.00099.M11 3rd = 83.00099.M11 3rd = 83.00099.M11 Title

BATT CONN
Size Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 43 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Charger
AD+ +SDC_IN CHARGER_SRC

PU4405
8 D S 1 PR4426 1 2
7 D S 2 D01R3721F-GP-U
6 D S 3
5 D G 4

1
PG4406 PG4402

PR4435
SI7121DN-T1-GE3-GP Do Not Stuff Do Not Stuff

100KR2J-1-GP
84.06675.030
2nd = 84.07121.037

2
2
1
PR4418 AD+_G_2
3KR5J-GP PR4421 2 1 Do Not Stuff
DY

10KR2F-2-GP
PC4428

PR4423
DC_IN_D
2 1

PWR_CHG_ACP
D D
SCD1U25V2KX-GP
PQ4407

1
AD+_G_1

SCD1U25V2KX-GP
3 4

PWR_CHG_ACN
2

Do Not Stuff
PC4418

PC4416
ACAV_IN 2 5
AD+
DY

1
1 6

1
PD4405 A K 1PS76SB40-GP-U PWR_CHG_1 1 2 PWR_CHG_VCC
83.1PS76.01F PR4403 10R5J-GP 2N7002KDW-GP
PC4410 84.2N702.A3F BQ24717_AGND

1
SC1U25V3KX-1-GP
2nd = 84.DM601.03F BQ24717_AGND
PC4433 3rd = 84.2N702.E3F
SCD1U25V2KX-2-GP 4th = 84.2N702.F3F

2
X01 3/07 Power modify
BQ24717_AGND CHARGER_SRC
AD+

PU4406 and PU4407:

PC4425
SC10U25V5KX-GP

PC4411
SC10U25V5KX-GP

PC4427
SC10U25V5KX-GP

PC4407
SC10U25V5KX-GP
main source: 84.03660.037

1
PC4413
SCD1U25V2KX-GP
VacDET=2.4V
PR4444
309KR2F-GP
Acok setting=2.4*((PR4444+PR4411)/PR4411) PU4406 PU4407

2
Setting=18.178v FDMS3600-02-RJK0215-COLAY-GP Do Not Stuff
2 2

2
3 3
BATDRV 1 4 1 4
10 10 DCBATOUT
PC4432 PWR_CHG_REGN 9 9
Do Not Stuff

1
Do Not Stuff 7 DY 7
1

PC4430
SC10U25V5KX-GP
KBC FOR DT MODE PR4411

PWR_CHG_ACP
PWR_CHG_ACN
DY DY 8 6 8 6

1
PC4403
SC10U25V5KX-GP
47KR2F-GP PC4422 1 2 5 5

1
CHECK EE PULL HIGH
2

PR4409
4K02R2F-GP
PC4402

SC1U25V3KX-1-GP

2
1
+VCHGR
1st = 84.03660.037 1st = 84.03660.037
2

2
BQ24717_AGND PD4402
PL4401 1

A
COIL-2D2UH-11-GP
BQ24717_AGND BQ24717_AGND +SDC_IN PD4401 1 2 1 2 3

2
PU4404 1PS76SB40-GP-U 68.2R210.20C PR4443
3D3V_AUX_S5

PR4427

Do Not Stuff
PWR_CHG_REGN BQ24717RGRR-GP 83.1PS76.01F D01R2512F-3-GP 2

1
BT+
Do Not Stuff

1 20

K
ACN VCC

2
3D3V_S5 3D3V_AUX_S5
PR4434

Do Not Stuff

Do Not Stuff
PR4439 V10P10-GP
C 4K02R2F-GP 11 PWR_CHG_BATDRV DY DY PC4420 83.10R10.087 C
BATDRV#
1

2
2 Do Not Stuff

1
ACP
1

PG4407

PG4403
PR4408 16 PWR_CHG_REGN PU4403
REGN

2
PR4419
Do Not Stuff

DY 100KR2F-L1-GP PWR_CHG_CMSRC 3 PR4425 PC4421 1 S D 8

CMSRC
1

PWR_CHG_BTST 2PWR_CHG_BTST1 1 DCBATOUT_SNUB S D 7

DY 17 1 2 2

1
PR4432 PR4414 BTST 0R3J-0-U-GP S D 6
4 3
2

ACDRV

Do Not Stuff
Do Not Stuff Do Not Stuff PWR_CHG_HIDRV SCD047U25V3KX-3-GP BATDRV G D 5
DY DY 18 4
2

HIDRV

1
PWR_CHG_ACDET

PC4406
6
ACDET
DY FDMC6675BZ-GP-U DY PC4424
2

CHARGER_CELL_PIN 10 84.06675.030

2
CELL

Do Not Stuff
19 PWR_CHG_PHASE 2nd = 84.07121.037
PHASE PC4429
1

15 PWR_CHG_LODRV 1 2
LODRV
PR4415
Do Not Stuff

PG4401 2 1 Do Not Stuff PWR_SDA 8

24,43 BAT_SDA SDA

1
DY 14 PC4401 SCD1U25V2KX-GP PC4412
PG4408 2 GND
24,43 BAT_SCL 1 Do Not Stuff PWR_SCL 9 SCD1U25V2KX-GP SCD1U25V2KX-GP
SCL PWR_CHG_SRP PR4438 1
13 2 0R2J-2-GP PWR_CHG_SRP_R
2

2
ACAV_IN PR4430 2 PWR_CHG_ACOK SRP
1 0R2J-2-GP 5
ACOK
ACAV_IN SRN
12 PWR_CHG_SRN PR4417 1 2 0R2J-2-GP PWR_CHG_SRN_R
PR4413 2 1BQ24715_IOUT_1 7 BQ24717_AGND BQ24717_AGND
H=ACIN

GND
24 AD_IA 0R2J-2-GP IOUT
L=UNAC 3D3V_AUX_S5

21
100KR2F-L1-GP

PR4406 1 2 0R2J-2-GP

SC100P50V2JN-3GP
PC4423
1

PWR_CHG_REGN

1
PR4412

BQ24717_AGND
DIS_DTM: BQ24717_AGND PWR_CHG_CMPIN:
1

PR4452
H= cell is plus to GND. (reset charger ic) V-=3.3*(PR4402/(PR4428+PR4402))=1.1099V
2
1
2

L=nornal 100KR2J-1-GP
PQ4412
PR4410
3D3V_AUX_S5

150KR2F-L-GP
100KR2F-L1-GP

PR4428
24 AC_IN#
3 4
Close PR4443
2

Follow custormer circuits 5V_S5

2

1
24 DIS_DTM 1 2 PQ4412_2 2 5 PWR_CHG_ACOK

1
1

PC4409 1 6 CHARGER_CELL_PIN PR4422 1 2

1
SC1U25V3KX-1-GP PR4404 1M8R2J-L-GP PQ4413 PR4457 H_PROCHOT# 4,24,42,46
2N7002KDW-GP 120KR2J-GP PR4437 2N7002KDW-GP 0R2J-2-GP

2
3D3V_S5
DCBATOUT

100KR2J-1-GP PQ4413_3

PWR_CHG_CMPIN
84.2N702.A3F

2
Do Not Stuff

+VCHGR
2nd = 84.DM601.03F 1 2 4 3
2

3rd = 84.2N702.E3F PR4402 PWR_CHG_CMPOUT

2
1

4th = 84.2N702.F3F 75KR2F-GP PWR_CHG_CMPOUT 1 PR4436 2 PQ4413_5 5 2 PQ4413_2 1 2DIS_DTM_CELL

5V_S5
PR4431

DY 20KR2F-L-GP

SCD01U25V2KX-3GP

1
Do Not Stuff

Do Not Stuff

PC4419
PQ4413_6 6 1 PC4431

1
PWR_CHG_ACOK: BQ24715_IOUT_1 PR4461 SC1U25V3KX-1-GP
2

1
PC4405 DY Do Not Stuff
PWR_CHG_REGN=6V
2

PG4404

PG4405

PC4426
SCD01U50V3JX-1GP

SC100P50V2JN-3GP
B B
V+=6*(PR4404/(PR4410+PR4404))=3.27V

1
84.2N702.A3F

2
BAT_IN# 24,42,43
CHECK PM BATTERY TYPE PR4454 2nd = 84.DM601.03F
1DCBATOUT_R 1

5
6
7
8
0R2J-2-GP
3rd = 84.2N702.E3F
1

LM393PWR-GP
CHECK CELL for DT mode

VCC
2IN+

2OUT
2IN-
4th = 84.2N702.F3F
+VCHGR_R

CHECK EE DY PC4414

2
Do Not Stuff CHARGER_CELL_PIN
2

PU4402

1OUT
GND
1IN+
1IN-
PQ4406_G
1

PR4446 5V_S5 PWR_CHG_REGN PWR_CHG_REGN 5V_S5

4
3
2
1
1

PQ4406 0R2J-2-GP PR4448

G

Do Not Stuff 10R2F-L-GP

DIS_DTM_CELL
DY PR4429 X01 3/1 Power modify
Do Not Stuff
CHECK PM ADAPTER TYPE
2

1
4,24,42,46 H_PROCHOT# Do Not Stuff
DY
2

1 2 PR4460 DY PR4441 PR4449 PR4453

And setting adapter type
2

1 2 PQ4406_D D DY S PR4407 100KR2F-L1-GP Do Not Stuff DY Do Not Stuff 100KR2F-L1-GP

PU4401_5

PR4456 6D8R2F-GP
Do Not Stuff
2

2
PU4402_1IN+ X01 3/1 Power modify
AD+ BATTERY MON 1 2

1
PR4424 PC4415 BT+ 84.2N702.A3F
1 2 BOOST_MON_1 1 2PU4401_6 SCD1U25V2KX-GP PR4440 2nd = 84.DM601.03F
24 BOOST_MON PR4445 PU4401_4 120KR2J-GP
(AD_IA_HW)
100KR2J-1-GP

3rd = 84.2N702.E3F
1

1
PC4417
SC1U25V3KX-1-GP

412KR2F-GP
0R2J-2-GP 20KR2F-L-GP PR4401 4th = 84.2N702.F3F
PQ4411
1

PR4442
182KR2F-GP
PR4416

2
6
5
4

X01 3/4 Power modify PWR_CHG_CMPIN 1 2 PQ4411_D1 3 4

2

PU4401

PU4402_1IN-
-
+

15V_S5 INA199A1-GP 2 5
24 AD_IA_HW2 AD_IA_HW 24

2
2

1 6 PQ4411_D2 1 2 PWR_CHG_CMPIN
1
2
3

2N7002KDW-GP PR4420
2

PR4459 PR4433
DCBATOUT 75KR2F-GP
(AD_IA_HW_2)
E PQ4408_E

1
PC4408
SC1U25V3KX-1-GP

Do Not Stuff
0R2J-2-GP DY
DIS_DTM_HW: PR4447
1

H_PROCHOT# 4,24,42,46 180KR2F-GP

5V_S5
1

V+=5*(PR4440/(PR4460+PR4440))=2.73V
2

PD4403
PD4403_K

1N4148WS-7-F-GP PR4455 84.2N702.A3F Setting=2.73*((PR4442+PR4447)/PE4447)=9V

K APD4403_A B MMBT3906-4-GP 0R2J-2-GP 2nd = 84.DM601.03F ADAPTER TYPE AD_IA_HW AD_IA_HW_2 SETTING
PQ4408 3rd = 84.2N702.E3F
PQ4405 4th = 84.2N702.F3F
C

PQ4408_C
2

PR4462 PQ4405_3
A PR4458 0R2J-2-GP
3 4
90W L L 1.099V A
Do Not Stuff DY 1 2 PQ4405_2 2 5 PQ4405_5
1
PC4404
SC1U25V3KX-1-GP

1 6
65W H L 0.862329V
1

PR4451 2N7002KDW-GP
2

680KR2J-GP DY PR4463
DCBATOUT Do Not Stuff

45W L H 0.659648V
PQ4405_6

UM
2

www.vinafix.vn
2

PWR_CHG_ACOK PR4405 Wistron Corporation

100KR2F-L1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.

PR4450
1

CHECK EE 10KR2F-2-GP Title

CHARGER BQ24717
follow custormer circuits.
2

Size Document Number Rev

Custom
3D3V_S5 Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 44 of 104
5 4 3 2 1
 A B C D E

SSID = PWR.Plane.Regulator_5v3p3v

PWR_5V_VCLK

PC4514
3D3V_AUX_S5

SCD1U25V3KX-GP
PC4521

1
SC1KP50V2KX-1GP
DCBATOUT PWR_DCBATOUT_5V PC4532

1
4 4

2
SCD1U25V3KX-GP
PR4501

2
PG4520

BST15V_1

BST15V_2
Do Not Stuff DY 2 1

Do Not Stuff

2
PR4530 PR4504 PG4536

3
2 DY 1 PWR_5V_EN1_R 1 2 PWR_5V_EN1 2 1 2nd = 83.00054.Y81 PD4503 PD4502
Do Not Stuff 3rd = 83.BAT54.P81 BAT54SPT-1-GP BAT54SPT-1-GP
Do Not Stuff

2
0R2J-2-GP PG4518
PR4515 2 1 75.00054.C7D 2nd = 83.00054.Y81

2
DCBATOUT PWR_DCBATOUT_3D3V 0R2J-2-GP Do Not Stuff 5V_PWR
3rd = 83.BAT54.P81
PG4530 15V_S5
PG4534
PR4506 Do Not Stuff

1
PG4525 2 1 75.00054.C7D
2 1
1 2 PWR_3D3V_EN2 Do Not Stuff BOOST_10V 15V_PWR
36 3V_5V_EN 2 1
Do Not Stuff PG4542
PG4521 0R2J-2-GP 2 1

K
1

1
2 1 PC4533
Do Not Stuff PC4515 PC4534 SC1U25V3KX-1-GP PD4501
Do Not Stuff SCD1U25V3KX-GP SCD1U25V3KX-GP Do Not Stuff
PG4543
DY

2
PG4524 2 1
2 1

A
Do Not Stuff
Do Not Stuff
PG4531
2 1
DCBATOUT
Do Not Stuff

PWR_DCBATOUT_3D3V

PC4525 PC4528 PC4509

SCD1U50V3KX-GP

PC4519 PC4531
1

PWR_DCBATOUT_5V
SC10U25V5KX-GP

SC10U25V5KX-GP

Do Not Stuff
1

SCD01U50V2KX-1GP
Design Current=3.3A DY
2

5.17A<OCP>6.11A

2
3 PC4530 PC4529 PC4527 3
8
7
6
5

5
6
7
8

1
SIS412DN-T1-GE3-GP

SIS412DN-T1-GE3-GP

SCD1U50V3KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
D
D
D
D
5V_S5
D
D
D
D

PU4104 PU4101 5V_PWR

12
PG4527

2
PU4503 2 1

VIN
PR4528
PC4535 Design Current=8.3A Do Not Stuff
1PWR_3D3V_VBST2_11 2 PWR_3D3V_VBST2

G
S
S
S
2 SCD1U25V3KX-GP PG4519
S
S
S
G

3D3V_S5 3D3V_PWR 1D5R3-GP PR4524 PC4516 12.98A<OCP>15.34A 2 1

SCD1U25V3KX-GP
1
2
3
4

4
3
2
1
PG4526 9 17 PWR_5V_VBST1 1 2 PWR_5V_VBST1_1 1 2
VBST2 VBST1 Do Not Stuff
2 1 2nd = 68.3R31B.10U 1D5R3-GP 2nd = 68.2R21B.10J
3D3V_PWR 68.3R310.20A PWR_3D3V_DRVH2 10 16 PWR_5V_DRVH1 68.2R210.20B 5V_PWR PG4538
Do Not Stuff PL4503 DRVH2 DRVH1 PL4101 2 1
PG4517 1 2 PWR_3D3V_LL2 8 18 PWR_5V_LL1 1 2
IND-3D3UH-57GP SW2 SW1 Do Not Stuff
2 1
1

PWR_3D3V_DRVL2 11 15 PWR_5V_DRVL1 IND-2D2UH-46-GP-U PG4537

DRVL2 DRVL1

1
Do Not Stuff 2 1

5
6
7
8
PG4528 PR4533 DY PU4102 PR4529 PG4532
PC4518
8
7
6
5

D
D
D
D

SIS780DN-T1-GE3-GP
PC4517 PT4102 PG4535 Do Not Stuff PU4105 PWR_5V_VO1 Do Not Stuff PT4101 Do Not Stuff
2 1
VO1
14 DY
1

1
SIS780DN-T1-GE3-GP

Do Not Stuff
D
D
D
D

PG4533
2
1
Do Not Stuff

SE220U6D3VM-30-GP

Do Not Stuff

Do Not Stuff

SE220U6D3VM-30-GP
Do Not Stuff PWR_3D3V_FB2 PWR_5V_FB1
4 2 DY 2 1

2
VFB2 VFB1
PG4522 DY
1PWR_3D3V_SNUB
2

2
G
2 1 4 Do Not Stuff
2

2
S
S
S
4 PG4523
G

1PWR_5V_SNUB
Do Not Stuff PWR_3D3V_EN2 6 20 PWR_5V_EN1 2 1
S
S
S

3
2
1
EN2 EN1
PG4529
1
2
3

2 1 Do Not Stuff
3V_FEEDBACK

PWR_3D3V_CS2 5 1 PWR_5V_CS1 PG4541

Do Not Stuff CS2 CS1
2 1
1

1
PG4539
2 1 DY PR4517 19 PWR_5V_VCLK PR4531 Do Not Stuff
PC4520 45K3R2F-L-GP VCLK 137KR2F-1-GP PC4536
DY PG4540
2

Do Not Stuff Do Not Stuff Do Not Stuff 2 1

2
PG4546 7 21
2

2
PGOOD GND Do Not Stuff
2 1
VREG3

VREG5
PG4545
Do Not Stuff 2 1
PG4547
1

1
2 1 TPS51225RUKR-GP Do Not Stuff
3

13

PR4535 3D3V_S5 5V_PWR_2 PR4525 PG4544

1
2 Do Not Stuff PR4512 DYDo Not Stuff 3D3V_PWR_2 Do Not Stuff DY 2 1 2
6K65R2F-GP PR4527
1

15KR2F-GP Do Not Stuff

2

1 2

1 2
PWR_3D3V_FB2_R PR4534 PWR_5V_FB1_R
PC4523 Do Not Stuff
DY

2
1

DYDo Not Stuff PC4524 PC4522 DY

PC4526 SC1U6D3V3KX-2GP Do Not Stuff
2

2
SC4D7U6D3V3KX-GP
2

X01 change PR4120 to 9.76K to solve 5V

1

1
voltage fall issue while on heavy loading
PR4523 17 3V_5V_POK PR4526
10KR2F-2-GP 9K76R2F-1-GP

Close to VFB Pin (pin2)

2

2
3D3V_PWR_2 3D3V_AUX_S5
PR4532
2 1
Close to VFB Pin (pin5)
0R2J-2-GP

TPS51225 & TPS51285 Co-lay

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP IND 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap:CHIP CAP POL 220U 6.3V M 6.3*4.5 /Matsuki/ 17mOhm / 77.52271.09L TPS51225 TPS51285 O/P cap:CHIP CAP POL 220U 6.3V M 6.3*4.5 /Matsuki/ 17mOhm / 77.52271.09L
H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037
L/S:SIS780 / 14.5mOhm/17.5mOhm@4.5Vgs / 84.00780.037 PR4510 45.3KK 9.09K L/S:SIS780 / 14.5mOhm/17.5mOhm@4.5Vgs / 84.00780.037

1 PR4511 110K 22.1K 1

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

3V/5V TPS51225
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 45 of 104
A B C D E
 5 4 3 2 1

SSID = CPU.Regulator

PR4614
2 1PW R_VCC_PRGM1

D 113KR2F-1-GP D

PR4630 PR4607
1D05S_VCCST 2 1 PW R_VCC_SDA 2 1PW R_VCC_PRGM2

130R2F-1-GP 49K9R2F-L-GP
PR4620
2 1 PW R_VCC_SCLK 2 PR4619 1 0R2J-2-GP PW R_VCC_SDA
7 H_CPU_SVIDDAT
54D9R2F-L1-GP

PR4601
1 2 PW R_VCC_ALERT# 2 PR4618 1 0R2J-2-GP PW R_VCC_ALERT#
7 VR_SVID_ALERT#
DY
Do Not Stuff
1

PC4606 2 PR4616 1 0R2J-2-GP PW R_VCC_SCLK

SCD1U16V2JX-1-GP 7 H_CPU_SVIDCLK
2

5V_S0

20

19

18

11

17
PC4604 PU4601

1
SC1U10V3KX-3GP

ALERT#

PRGM2

PRGM1
SCLK

SDA
2
C 12 13 PW R_VCC_BOOT PW R_VCC_BOOT 47
C
VCC BOOT

PR4621
2 1 0R2J-2-GP PW R_VCC_EN 1 VR_ON UG 14 PW R_VCC_UG PW R_VCC_UG 47
7 H_VR_ENABLE

PR4610
2 1 105KR2F-1-GP PW R_VCC_IMON 3 IMON PHASE 15 PW R_VCC_PHASE PW R_VCC_PHASE 47
ISL95813-REV1D1-GP
PC4609
2 1
SC2200P50V2KX-2GP PW R_VCC_VRHOT# 4 16 PW R_VCC_LG PW R_VCC_LG 47
PR4602 VRHOT# LG
2 Do Not Stuff
1D05V_S0 1
DY PR4624 PR4603 LL=2mohm
4,24,42,44 H_PROCHOT# 2 1 0R2J-2-GP PW R_VCC_COMP 6 COMP FB 7 PW R_VCC_FB 2 1 VCC_SENSE 7
PC4611 PR4613 1K37R2F-GP
2 1 PW R_VCC_COMP_RC 2 1

SC6800P50V3KX-GP 8K06R2F-GP 21 PR4606 PC4601 PC4613

GND

PGOOD
PW R_VCC_FB_RC 1
1
DY 2
DY2 2
DY 1

ISUMN

ISUMP
PC4610 2
DY 1

NTC

RTN
Do Not Stuff Do Not Stuff
Do Not Stuff
R4622 Do Not Stuff

10
2KR2F-3-GP
3D3V_S0 1 2
B B
PR4628
7,24 IMVP_PW RGD 2 1 0R2J-2-GP PW R_VCC_POK PW R_VCC_ISUMP
PW R_VCC_ISUMP 47

PR4617 PR4615
2 1 PW R_VCC_NTC_R 2 1 PW R_VCC_NTC
PW R_VCC_ISUMN
27K4R2F-GP 3K83R2F-GP PW R_VCC_ISUMN 47

PR4622 PR4604
2 1 2 1 VSS_SENSE 9
NTC-470K-2-GP 10R2F-L-GP
B=4500K
PC4612
close to H/S MOSFET 2 1

SC1KP25V2JX-GP

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51622_CPUCORE(1/2)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 46 of 104

5 4 3 2 1
 5 4 3 2 1

DCBATOUT

1
PC4701 PC4702 PC4703 PC4704

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U25V3KX-GP
2

2
PU4701
2
46 PW R_VCC_UG 3
D PR4701 PC4706 1 4 D
0R3J-0-U-GP 10
1 2 PW R_VCC_BOOT_RC 1 2 9
46 PW R_VCC_BOOT 7
SCD22U25V3KX-GP 8 6
5
46 PW R_VCC_LG
Cyntec 7.2x6.8x3
FDMS3600-02-RJK0215-COLAY-GP DCR=2.5~2.8mohm
1st = 84.03664.037 Idc=23A

VCC_CORE
PL4701
PW R_VCC_PHASE 1 2
46 PW R_VCC_PHASE IND-D22UH-37-GP

2
PG4701 PG4702
Do Not Stuff Do Not Stuff

1
PHASE1G

ISUM_R_C
1
PR4702
C 3K65R2F-1-GP C
close to CHOKE
Shark Bay ULT 15W CPU

2
PR4704
PR4703
PHASE_R_R
IccMAX=32A
1 2 1 2
TDC=10A
2K61R2F-1-GP NTC-10K-26-GP
35.2A<OCP<41.6A

1
B=3370K
PR4707
Do Not Stuff PR4708 Frequency=750KHZ
DY 1 2 LL=-2.0 mV/A

2
11KR2F-L-GP

PC4707
1 2 OCP=41.6A
SCD047U16V2KX-1-GP

PC4708 PR4705
2 Do Not Stuff
1
DY 1 2 PW R_VCC_ISUMN 46
1K2R2F-1-GP

PC4709 PR4706
ISUM_R_R
1 2
DY 1
DY 2

Do Not Stuff Do Not Stuff

B B

PW R_VCC_ISUMP 46

22uF/6.3V/0805*13 VCC_CORE
330uF/2.5V/6.3*4.5/12mohm*1 X01 3/1 Power for pass transient spec
1

1
PC4723 PC4725 PC4726 PC4729 PC4730 PC4731 PC4732 PC4733 PC4734 PC4736 PC4741 PC4721 PC4722 PC4724 PC4727 PC4728 PC4735 PC4737 PC4738 PC4739 PC4740 PC4742 PC4743
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Do Not Stuff

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Do Not Stuff

Do Not Stuff

SC22U6D3V5MX-2GP

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Do Not Stuff
DY DY DY DY DY DY DY DY DY
2

2
1

A PT4701 PC4717 PC4718 PC4719 PC4720 PC4744 UM A

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Do Not Stuff
DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Don't need POSCAP
If space concern Title

TPS51622_CPUCORE(2/2)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 47 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p05v

DCBATOUT PW R_DCBATOUT_1D05V

D PG4838 D
2 1
PW R_DCBATOUT_1D05V
Do Not Stuff
PG4837
2 1

SCD1U50V3KX-GP
1D05V_PW R 1D05V_S0

SC10U25V5KX-GP

SC10U25V5KX-GP
Do Not Stuff

PC4825
PC4826

PC4814
PG4834

1
2 1 PG4828
2 1

5
6
7
8
SIS412DN-T1-GE3-GP
Do Not Stuff

2
D
D
D
D
PU4808 PG4827 Do Not Stuff
2 1 PG4830
PR4821 2 1
2 1 Do Not Stuff
7,36 1D05V_VTT_PW RGD
0R2J-2-GP Do Not Stuff

G
S
S
S
PG4831
PR4817 Design Current =6.7A 2 1

4
3
2
1
127KR2F-GP PU4806 PC4822
1 2 PR4820 SCD1U25V3KX-GP 10.56A<OCP<12.48A Do Not Stuff
PW R_1D05V_PW RGD 1 11 2D2R3-1-U-GP 2nd = 68.2R21B.10J PG4826
PW R_1D05V_TRIP PGOOD GND PW R_1D05V_BOOT 1 1D05V_PW R
2 CS BOOT 10 2PW R_1D05V_BOOT_R 2 1 68.2R210.20B 2 1
PW R_1D05V_EN 3 9 PW R_1D05V_UGATE PL4801
PW R_1D05V_FB EN UGATE PW R_1D05V_PHASE
4 FB PHASE 8 1 2 Do Not Stuff
PR4819 PW R_1D05V_CCM 5 7 5V_S5 IND-2D2UH-46-GP-U PT4803 PG4824
RF VCC

1
17,24,36,49,51 PM_SLP_S3# 1 2 6 PW R_1D05V_LGATE
LGATE 2 1
1

Do Not Stuff

SCD1U10V2KX-4GP

SE330U2D5VM-8-GP
PR4837 PC4824

1
0R2J-2-GP PC4815 Do Not Stuff
DY Do Not Stuff
1

2
C PR4824 RT8237CZQW -2-GP SC1U10V2KX-1GP C
PC4821

PG4825

5
6
7
8
Do Not Stuff

PG4832
DY 470KR2F-GP PU4805
2 1

1PWR_1D05V_SNUB 2

2
D
D
D
D
SIS780DN-T1-GE3-GP
2

Do Not Stuff

1
G
4

S
S
S
PW R_1D05V_PW R 77.53371.18L

3
2
1
2nd = 77.93371.03L

1
DY PC4838

1
Do Not Stuff PR4822

2
10KR2F-2-GP DY PC4823
Do Not Stuff

2
2
PW R_1D05V_FB
I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18~20mohm Isat =14Arms 68.2R210.20B
O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L Vout=0.704V*(R1+R2)/R2

1
H/S:SIS412DN-T1-GE3 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 PR4823
B
L/S:SIS780DN-T1-GE3 / 14.5mOhm/17.5mOhm@4.5Vgs / 84.00780.037 21KR2F-GP
B

2
X01 3/1 Powermodifyc

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51367_1D05V
Size Document Number Rev
A3 X00
Date: Friday, March 15, 2013 Sheet 48 of 104
5 4 3 2 1
 SSID = PWR.Plane.Regulator_1p35v0p675v
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p35v0p675v

DCBATOUT +PWR_SRC_1D35V
PG4903
D D
1 2

Do Not Stuff
PG4904
1 2

Do Not Stuff
PG4905
1 2
1D35V_PWR 1D35V_S3
Do Not Stuff
PG4906
1 2 PG4908
1 2
Do Not Stuff
Do Not Stuff
PG4909
1 2

Do Not Stuff
PG4910
+PWR_SRC_1D35V 1 2

Do Not Stuff
5V_S5 PG4911
1 2

PC4914
SC1U10V3KX-3GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U50V3KX-GP

SC4D7U25V5KX-GP
Do Not Stuff

PC4913
1

1
PG4912

PC4901

PC4909

PC4911

PC4912
3D3V_S0 1 2

2
Do Not Stuff

5
6
7
8
PG4913

2
1

D
D
D
D
SIS412DN-T1-GE3-GP
PU4902 1 2
PR4904
Do Not Stuff Do Not Stuff
DY PG4914
C PU4901 1 2 C
2

PR4605_2

G
S
S
S
20 12 PC4919
36 1D35V_VTT_PWRGD PGOOD V5IN SCD1U25V3KX-GP Do Not Stuff

4
3
2
1
R4909 2 1 0R2J-2-GP DDR_VTT_PG_CTRL_R 17 PR4905 Design Current=9.8A PG4915
12 DDR_VTT_PG_CTRL VTTEN PWR_1D35V_VBST1
15 2 1 2 1 2
R4910 2 1 Do Not Stuff PWR_1D35V_EN 16
VBST 15.3A<OCP>18.1A
17,24,36,48,51 PM_SLP_S3# EN/PSV 2D2R3-1-U-GP Do Not Stuff
DY PWR_1D35V_VREF 6 14 PWR_1D35V_DRVH PG4916
VREF DRVH
1

PL4902 1D35V_PWR 1 2
PR4903
10KR2F-2-GP 13 PWR_1D35V_SW 1 2 Do Not Stuff
SW PG4917
COIL-1UH-63-GP 1 2

SCD1U10V2KX-5GP
2

SC4D7U6D3V5KX-3GP
5
6
7
8

SE330U2D5VM-8-GP
PWR_1D35V_REFIN 8 11 PWR_1D35V_DRVL
30K1R2F-L-GP

REFIN DRVL

1
PC4921
D
D
D
D

Do Not Stuff
SISA12ADN-T1-GE3-GP
PU4903 Do Not Stuff

PT4903
PC4920
1

1
PG4907
10
DY
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

PGND
1

Do Not Stuff
PWR_1D35V_MODE 19 PR4912
DY

2
MODE
1

Do Not Stuff
PC4903

2 PR4901

200KR2F-L-GP

2
G
4
PC4902

EC4601
2
2

S
S
S
PWR_1D35V_TRIP 18 9 PWR_1D35V_VDDQS
2

TRIP VDDQS

PWR_1D35V_VDDQS
1 PR4908

51K1R2F-GP

3
2
1
1

TPS51216_PHS_SET
PR4601_1

2
PR4902

PWR_1D35V_VTTREF5 VTTIN +0D675V_DDR_P

VTTREF 77.53371.18L
1

1
3 X01 3/1 A84.SSA12.A37 2nd = 77.93971.03L
PR4906

0R2J-2-GP

VTT
1

PC4918 PC4922
DY
SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP
1

1
Do Not Stuff
SCD22U10V2KX-1GP PC4915 Do Not Stuff

PC4916

PC4917
1
2

2
VTTS
21 DY
2

GND
4
2

2
VTTGND
7
GND
X01 3/4 Power ModifyTPS51216RUKR-GP
74.51216.073 1D35V_PWR

SC1U10V3KX-3GP
PC4904
1
+0D675V_DDR_P 0D675V_S0
PG4901 PR4907
1 2 DDR_VREF_S3 1 2 PWR_1D35V_EN

2
B 17,24 PM_SLP_S4# B

Do Not Stuff PWR_1D35V_VTTREF 1 PR4911 2 0R2J-2-GP

1
PG4902 0R3J-0-U-GP PC4906
1 2 DY Do Not Stuff

2
Do Not Stuff

State S3 S5 VDDR VTTREF VTT I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP IND 0.1UH M PCMC063T-R10MN 1.5~1.7mohm Isat =60Arms 68.R1010.10T
S0 Hi Hi On On On
O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L
S3 Lo Hi On On Off(Hi-Z) H/S MOS: FET MOS SIS412DN-T1-GE3 NC 8P / 84.00412.037 / Rds(on)=24~30mohm @Vgs=4.5V
S4/S5 Lo Lo Off Off Off L/S MOS: FET MOS SIS780DN-T1-GE3 NC POWERPAK 121 / 84.00780.037 / Rds(on)=14.5~17.5mohm @Vgs=4.5V

MODE
PR4608 Frequency Discharge Mode
200k ohm 400kHz
Tracking Discharge
100k ohm 300kHz
68k ohm 300kHz
Non-tracking Discharge
47k ohm 400kHz

A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51367+51206_1D35V & 0D675V

Size Document Number Rev
C
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 49 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 50 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p5v

3D3V_S5
TLV70215 for 1D5V_S0
D D

PC5119
SC1U6D3V2KX-GP
Design Current = 150mA

1
2
PU5101 1D5V_PW R 1D5V_S0
PG5105
1 IN OUT 5 1 2
2 GND
PW R_1D5V_EN 3 4 Do Not Stuff
EN NC#4

PC5120
SC1U6D3V2KX-GP
1
TLV70215DBVR-GP

2
17,24,36,48,49 PM_SLP_S3# PR5110 2 1 0R2J-2-GP PW R_1D5V_EN

C C

DCBATOUT PW R_DCBATOUT_VRAM_PW R

1
PG5101
2

Do Not Stuff
PW R_DCBATOUT_VRAM_PW R SY8208D for 1D35V_VGA_S0(1D5V)
PG5102
1 2
1

PC5115 PC5113
SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

Do Not Stuff PC5110 Design Current=3.4A

PG5103 PU5102 PR5102
OCP=8A
2

1 2 1 2 VRAM_PW R_BS_R 1 2

Do Not Stuff 0R3J-L1-GP SCD1U25V3KX-L-GP

B B

8 6 VRAM_PW R_BS
IN BS 1D35V_VGA_S0

PL5101
10 VRAM_PW R_PH 1 2
LX

IND-1UH-206-GP

1
Do Not Stuff
TP5101 1 2 4 VRAM_PW R_FB PC5101 PC5108 PC5116 PC5117 PC5118 PC5114
PG FB

SC22U6D3V5MX-L3-GP

Do Not Stuff

SC22U6D3V5MX-L3-GP

Do Not Stuff

SC22U6D3V5MX-L3-GP
DY DY

2
PR5111 2 1 PW R_VRAM_PW R_ILIM 3 7 VRAM_PW R_BYP

2
470KR2F-GP ILMT BYP 3D3V_S5 PG5104
PR5112

SCD1U50V3KX-L-GP
1 2 PW R_VRAM_PW R_EN 1
83 1D35V_VGA_EN EN
1 2

1
PR5114 9 5 VRAM_PW R_LDO
GND LDO
1

0R2J-L-GP
0R2J-L-GP
1
PR5104
DY Do Not Stuff SY8208DQNC-GP-U PC5109 VRAM_PW R_FBH
1

PC5112
2
SC1U6D3V2KX-GP
2

SC2D2U6D3V2MX-GP

1
PR5113

1
150KR2F-L-GP
PC5111
SC220P50V2KX-3GP

2
A UM A

Wistron Corporation
1

Vo=0.6x(1+R1/R2) PR5103 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

=0.6x(1+150/100) 100KR2F-L3-GP Taipei Hsien 221, Taiwan, R.O.C.

=1.5V Title
2

RT9198_1D5V/SY8208D_1D5V(VGA)
Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 51 of 104
5 4 3 2 1
 5 4 3 2 1

R5224
0R2J-2-GP
DBC_EN_R 1 2
DBC_EN 20
LCDVDD R5228
LCD1 1 AFTP5202 0R3J-0-U-GP
41 1 2 LVDS_VDD_EN 53
R5238
LDO_DY

2
1 C5201 C5206 0R3J-0-U-GP RN5205
1 2 LVDS_DDC_DATA_R 4 1

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
2 1 AFTP5201 LDO_DY LVDS_DDC_CLK_R 3 2 3D3V_S0

1
3
4 3D3V_LCD_ROM RN5204
5 LCD_TST_C SRN33J-5-GP-U SRN4K7J-8-GP
6 LVDS_DDC_CLK 3 2 LVDS_DDC_CLK_R 53
7 LVDS_DDC_DATA 4 1 LVDS_DDC_DATA_R 53
8 LVDSA_DATA0#_C
9 LVDSA_DATA0_C
10
D 11 LVDSA_DATA1#_C D
12 LVDSA_DATA1_C
13
14 LVDSA_DATA2#_C
15 LVDSA_DATA2_C
16
17 LVDSA_CLK#_C
18 LVDSA_CLK_C
19
20 LVDSB_DATA0#_C RN5202
21 LVDSB_DATA0_C DMIC_CLK_C 2 3 DMIC_CLK 27
22 DMIC_CLK_C DMIC_DATA_C 1 4 DMIC_DATA 27
23 LVDSB_DATA1#_C
24 LVDSB_DATA1_C SRN33J-5-GP-U

1
25 DMIC_DATA_C
26 LVDSB_DATA2#_C EC5205 EC5206
27 LVDSB_DATA2_C

2
SC6D8P50V2DN-GP

SC6D8P50V2DN-GP
28
29 LVDSB_CLK#_C
30 LVDSB_CLK_C
31
32 USB_CAMERA#
33 USB_CAMERA
34 3D3V_CAMERA_S0_R R5227 1 20R2J-2-GP 3D3V_CAMERA_S0
35 LCD_BRIGHTNESS
36 BLON_OUT_C
37
38
39
1 AFTP5204
DCBATOUT_LCD
INVERTER POWER
40

42 DCBATOUT 800mA DCBATOUT_LCD

ACES-CON40-10-GP F5201
20.K0617.040 POLYSW-1D1A24V-GP-U
1 2

1
LCD_BRIGHTNESS 1 AFTP5203 69.50007.A31 C5202
BLON_OUT_C AFTP5205 C5205
1 DY

SC1KP50V2KX-1GP
LCD_TST_C AFTP5207 Do Not Stuff
1 2nd = 69.50007.D31

2
C LVDS_DDC_CLK 1 AFTP5206 R5222 1 DY 2Do Not Stuff C
LVDS_DDC_DATA AFTP5208
1 3rd = 69.50007.A41
D5202
LVDSA_DATA0#_C AFTP5213
LVDSA_DATA0_C
LVDSA_DATA1#_C
1
1
1
AFTP5210
AFTP5211 BKLT_CTRL 3
1 L_BKLT_CTRL 53
TPNL 3D3V_S0 5V_S0

LVDSA_DATA1_C 1 AFTP5212 TPAN_VDD

1
LVDSA_DATA2#_C 1 AFTP5209 2 Do Not Stuff
EC_BRIGHTNESS 24

R5231
Do Not Stuff
LVDSA_DATA2_C 1 AFTP5215 R5230
LVDSA_CLK#_C 1 AFTP5216 BAT54CPT-2-GP 3D3V_S0 3D3V_CAMERA_S0 DY 0R3J-0-U-GP 2nd = 69.50007.D31
LVDSA_CLK_C 1 AFTP5214
R5229 3rd = 69.50007.A41

2
LVDSB_DATA0#_C 1 AFTP5220 F5203
LVDSB_DATA0_C 1 AFTP5217 1 2 Do Not Stuff
LVDSB_DATA1#_C 1 AFTP5218 TPAN_VDD_F 1 DY 2
LVDSB_DATA1_C 1 AFTP5221 0R3J-0-U-GP

1
LVDSB_DATA2#_C 1 AFTP5219 R5232 2 1 0R3J-0-U-GP
LVDSB_DATA2_C 1 AFTP5223 EC5210 DY C5207 TPNL1
LVDSB_CLK_C 1 AFTP5224 RN5203 Do Not Stuff SC4D7U6D3V3KX-GP 7 TPAN_VDD

2
LVDSB_CLK#_C 1 AFTP5229 1 4 BKLT_CTRL USB_PN6_TPNL 2 1 USB_PN6 16
2 3 BLON_OUT_C 1
DMIC_CLK_C 1 AFTP5222 Close to LCD connector R5223
DMIC_DATA_C 1 AFTP5228 2 0R3J-0-U-GP
USB_CAMERA# 1 AFTP5225 SRN100KJ-6-GP 3 USB_PN6_TPNL
TR5209
USB_CAMERA 1 AFTP5226 USB_CAMERA# USB_PN4 16 4 USB_PP6_TPNL
3D3V_CAMERA_S0_R 1 AFTP5227 5 3 DY 4
6 TOUCH_PANEL_INTR# 24
3D3V_S0 3D3V_LCD_ROM 2 1
RN5201 TR5208 8

1
LCD_TST_C 1 8 LCD_TST 24 Do Not Stuff
LCD_BRIGHTNESS 2 7 BKLT_CTRL R5201 1 2 0R3J-0-U-GP 3 4 ETY-CON6-21-GP C5208
BLON_OUT_C Do Not Stuff
3 6 BLON_OUT 24 Do Not Stuff

2
4 5 F5202 1 2 Do Not Stuff 2 1
DY USB_PP6_TPNL 2 1 USB_PP6 16
SRN100J-4-GP DY
FILTER-4P-6-GP R5220
69.10103.041 0R3J-0-U-GP

USB_CAMERA USB_PP4 16

B
LCDVDD B

R5216 R5212 R5207 R5209

0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
LVDSB_CLK#_C 1 2 LVDSB_DATA2#_C 1 2 LVDSB_DATA1#_C 1 2 LVDSB_DATA0#_C 1 2
LVDSB_CLK# 53 LVDSB_DATA2# 53 LVDSB_DATA1# 53 LVDSB_DATA0# 53

D5201
1

4
53 LVDS_VDD_EN 1
TR5201 TR5202 TR5210 TR5203
LCDVDD_EN
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff LDO 3
600mA
DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff
24 LCD_TST_EN 2

2
3D3V_S0
Do Not Stuff R5202
Do Not Stuff
2

3
U4901
LDO LCDVDD

1
1 5
LVDSB_CLK_C LVDSB_DATA2_C LVDSB_DATA1_C LVDSB_DATA0_C EN VIN#5
1 2 1 2 1 2 1 2 2
LVDSB_CLK 53 LVDSB_DATA2 53 LVDSB_DATA1 53 LVDSB_DATA0 53
3
GND LDO 4
R5221 R5215 R5208 R5211 VOUT VIN#4

1
0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP C5204
Do Not Stuff Do Not Stuff

1
C5203
LDO

2
Do Not Stuff EC5201
Layout Note: Do Not Stuff Do Not Stuff
LDO DY

2
Trace width = 80mil
R5226 R5218 R5203 R5205
0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
LVDSA_CLK#_C 1 2 LVDSA_DATA2#_C 1 2 LVDSA_DATA1#_C 1 2 LVDSA_DATA0#_C 1 2
LVDSA_CLK# 53 LVDSA_DATA2# 53 LVDSA_DATA1# 53 LVDSA_DATA0# 53
1

A A
TR5204 TR5205 TR5206 TR5207
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff

UM
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LVDSA_CLK_C 1 2 LVDSA_CLK 53 LVDSA_DATA2_C 1 2 LVDSA_DATA2 53 LVDSA_DATA1_C 1 2 LVDSA_DATA1 53 LVDSA_DATA0_C 1 2 LVDSA_DATA0 53 Taipei Hsien 221, Taiwan, R.O.C.
R5219 R5225 R5204 R5206 Title
0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
Reserved
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 52 of 104
5 4 3 2 1
 5 4 3 2 1

R5302
1KR2J-1-GP
1 2 DP_HPD
3D3V_S0 DP_AVCC33 15 EDP_HPD
L5301

2
1 2

D PBY201209T-700Y-N-GP R5303 D
100KR2J-1-GP

1
C5301 C5303

1
SC10U6D3V3KX-GP

SCD1U10V2KX-4GP
2

2
SW R_V12
C5311
24 L_BKLT_EN LVDS_DDC_DATA_R SCD1U10V2KX-4GP
52 LVDS_DDC_DATA_R
LVDS_DDC_CLK_R 2 1
52 LVDS_DDC_CLK_R
EEPROM_SDA0 LVDSA_DATA0# 52
EEPROM_SCL0 LVDSA_DATA0 52
LVDSA_DATA1# 52
LVDSA_DATA1 52
LVDSA_DATA2# 52
3D3V_S0 DP_DVCC33 LVDSA_DATA2 52
L5302
1 2

49

48
47
46
45
44
43
42
41
40
39
38
37
U5301 3D3V_S0
PBY201209T-700Y-N-GP

MODE_CFG1
MODE_CFG0
MIICSCL
GND

BL_EN

TXO0-

TXO1-

TXO2-
MIICSDA

VCCK

TXO0+

TXO1+

TXO2+
1

C5313 C5302 C5304

R5306 R5317

1
Do Not Stuff

SC10U6D3V3KX-GP

SCD1U10V2KX-4GP

DY
2

4K7R2J-2-GP

Do Not Stuff
DP_HPD 1 36 LVDSA_CLK# 52 DY
TEST_MODE HPD TXOC-
2 TEST TXOC+ 35 LVDSA_CLK 52
C5320 1 2SCD1U10V2KX-5GP EDP_AUX_DN_C 3 34
8 EDP_AUX_DN

2
C5321 1 AUX_N TXO3-
8 EDP_AUX_DP 2SCD1U10V2KX-5GP EDP_AUX_DP_C 4 AUX_P TXO3+ 33 EEPROM_SCL0
C C5312 2 1 DP_AVCC33 5 32 LVDSB_DATA0# 52 EEPROM_SDA0 C
SCD1U10V2KX-4GP DP_V33 TXE0-
6 DP_GND TXE0+ 31 LVDSB_DATA0 52

1
8 EDP_TX0_DP C5316 1 2 EDP_TX0_DP_C 7 30 LVDSB_DATA1# 52 R5318 R5307
C5317 1 LANE0_P TXE1-
8 EDP_TX0_DN 2SCD1U10V2KX-5GP EDP_TX0_DN_C 8 LANE0_N TXE1+ 29 LVDSB_DATA1 52

Do Not Stuff

4K7R2J-2-GP
8 EDP_TX1_DP C5318 1 2SCD1U10V2KX-5GP EDP_TX1_DP_C 9 28 LVDSB_DATA2# 52 DY
C5319 1 LANE1_P TXE2-
8 EDP_TX1_DN 2SCD1U10V2KX-5GP EDP_TX1_DN_C 10 LANE1_N TXE2+ 27 LVDSB_DATA2 52
SCD1U10V2KX-5GP SW R_V12 11 26 LVDSB_CLK# 52

2
DP_REXT DP_V12 TXEC-
Travis_SW 12 DP_REXT TXEC+ 25 LVDSB_CLK 52

PANEL_VCC
L5303

SWR_VCCK
1

SWR_GND

PWM_OUT
SWR_VDD
Do Not Stuff

CIICSDA

SWR_LX
1

PWM_IN
CIICSCL
SW R_LX 1 2 SW R_V12 C5310 R5301

TXE3+
TXE3-
PVCC
12KR2F-L-GP
Do Not Stuff
SCD1U10V2KX-4GP
2

1 R5314 2

2
1

C5305 C5306 RTD2136R-CGT-GP

13
14
15
16
17
18
19
20
21
22
23
24
0R3J-0-U-GP 71.02136.B03
SC10U10V5KX-2GP

SCD1U10V2KX-4GP

Travis_LDO
2

DP_DVCC33

SWR_V12

SWR_LX
RN5302
1 8 L_BKLT_EN CIICSCL1
1206 modify TEST_MODE CIICSDA1
2 7
EEPROM

1
3 6 eDP_BKLT_CTRL C5309
4 5 LVDS_VDD_EN

SCD1U10V2KX-4GP
2
52 L_BKLT_CTRL
1

SRN100KJ-4-GP C5315 52 LVDS_VDD_EN

B 15 eDP_BKLT_CTRL B
LDO_DY SC4D7U6D3V3KX-GP
2

3D3V_S0 DP_DVCC33
3D3V_S0 3D3V_S0
2
1

1
RN5301 C5308 C5307 U5302
SRN4K7J-8-GP

SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
8 1
2

2
VCC E0
Close to PIN13 7 WC# E1 2
EEPROM_SCL0 R5304 1 2 Do Not Stuff EEPROM_SCL0_R 6 3
3
4

Q5301 EEPROM_SDA0 R5305 Do Not Stuff EEPROM_SDA0_R SCL E2

1 2 5 SDA VSS 4
CIICSDA1 SML_DATA_R R5310 DY 2 Do Not Stuff LVDS_DDC_CLK_RR5316 Do Not Stuff DY
1 6 1 SML0_DATA 18
PCH 1 DY 2

1
LVDS_DDC_DATA_R
R5315 1 2 Do Not Stuff C5314
DY

Do Not Stuff
R5309 2 0R2J-2-GP DY
2 5 1 SML1_DATA 18,24,26,76
KBC DY DY
Do Not Stuff

2
3 4 Do Not Stuff
2N7002KDW -GP 2nd = 72.24C64.D0Q
84.2N702.A3F
2nd = 84.DM601.03F SML_CLK_R R5312 DY 2 Do Not Stuff

CIICSCL1
3rd = 84.2N702.E3F
R5311
1 SML0_CLK 18
PCH
2 0R2J-2-GP
4th = 84.2N702.F3F 1 SML1_CLK 18,24,26,76
KBC
A Slave Address: 0x94 & 0x6A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LVDS_Switch
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 53 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter/Connector

Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 54 of 104

5 4 3 2 1
 5 4 3 2 1

5V_CRT_S0_R
CRT1
CRT DDCDATA & DDCCLK level shift 5V_CRT_S0

9 4 5V_CRT_S0

14

13
VCC_CRT NC#4
NC#11 11 0314 X00 U5504D
1

C5502 CRT_DDCDATA_CON 12 12 DY 11
CRT_DDCCLK_CON DDCDATA_ID1 5V_CRT_S0_R 5V_CRT_S0 5V_S0
15
SCD01U16V2KX-L1-GP

DDCCLK_ID3 D5502
5
2

GND

3
4
CRT_R 1 6 F5501 Do Not Stuff

7
CRT_G CRT_RED GND
2 CRT_GREEN GND 7 1 2 2 1
D CRT_B 3 8 RN5501 D
CRT_BLUE GND SRN2K2J-1-GP
GND 10
CRT_VSYNC_CON 14 16 FUSE-1D1A6V-4GP-U CH551H-30PT-GP
CRT_HSYNC_CON VSYNC GND
13 17 69.50007.691

2
1
HSYNC GND CRT_DDCDATA_CON
2nd = 69.50007.771
D-SUB-15-174-GP 5V_CRT_S0
20.21019.015 CRT_DDCCLK_CON

14

10
U5504C

5V_CRT_S0
9 DY 8

CRT_DDCDATA_CON Hsync & Vsync level shift

BLM18BB220SN-GP CRT_HSYNC_CON Do Not Stuff
L5501

7
68.00084.A11 CRT_VSYNC_CON

1
C5503
Do Not Stuff

C5504
Do Not Stuff
DP_CRT_R 1 2 CRT_R CRT_DDCCLK_CON DY

C5505
Do Not Stuff
C5542

1
C5506 Do Not Stuff

2
DY DY DY DY Do Not Stuff
BLM18BB220SN-GP
L5502

2
68.00084.A11

14

1
DP_CRT_G 1 2 CRT_G
U5504A
DP_CRT_HSYNC_CON 2 DY 3 HSYNC_5

BLM18BB220SN-GP
L5503
68.00084.A11 Do Not Stuff

14

7
4
DP_CRT_B 1 2 CRT_B U5504B RN5011
C CRT_HSYNC_CON C
1 R5503

1 R5504

1 R5505

2 3
C5501
SC10P50V2JN-4GP

C5507
SC10P50V2JN-4GP

C5508
SC10P50V2JN-4GP

C5509
SC10P50V2JN-4GP

C5510
SC10P50V2JN-4GP

C5511
SC10P50V2JN-4GP
DP_CRT_VSYNC_CON DY VSYNC_5 CRT_VSYNC_CON
5 6 1
DY 4
1

1
Do Not Stuff
Do Not Stuff
2

7
75R2F-2-GP 2

75R2F-2-GP 2

75R2F-2-GP 2

R50021 2 33R2J-2-GP
R50031 2 33R2J-2-GP

PTN3355
CRT_S0 R5518 2 1 5V_S0 U5503 3D3V_S0
VBUCK_1D5V 1R5527 Do2 Not Stuff VDDD33_CORE 1R5523 2 DP_VDDD Do Not Stuff L5504
SCD1U10V2KX-L1-GP

0R2J-L-GP PTN3355 1 5 DP_VDDD 2 DY 1

L5505 IN OUT
PTN3355 PTN3393 2 Do Not Stuff
GND
1

C5538
SC1U6D3V2KX-L-1-GP

C5539
SC10U6D3V3MX-L-GP
C5531 CRT_S2 1 2 VBUCK_1D5V 3 4 SC12P50V2JN-3GP
EN NC#4

1
Do Not Stuff C5513 C5514 DP_27M_IN C5512 2 1

C5524
SC1U10V2KX-1GP

SCD1U10V2KX-L1-GP
2

2
SC10U6D3V3MX-GP
C5540 TLV70233DBVR-GP

2
CRT_S3 1R5524 2Do Not Stuff SC4D7U6D3V3KX-GP 74.70233.03F R5509 X5501
2nd = 74.08818.B3F Do Not Stuff XTAL-27MHZ-65-GP-U
2

2
PTN3355

1
1
VDDA33_DP 1R5521 2 DP_VDDD U5502 DP_27M_OUT C5515 2 1
1

B B
SCD1U10V2KX-L1-GP

C5535 0R2J-L-GP
VDDD33_CORE 36 37 CRT_S0 R5506 2 1 DP_VDDD SC15P50V2JN-2-GP
PTN3393 DP_VDDA 1
VDDD33_CORE S0
38 CRT_S1 R5507 2 1 10KR2J-L-GP
2

VDDA33_AUX S1
1R5529 Do2 Not Stuff VDDA33_DP 14 39 CRT_S2 R5508 2 1 10KR2J-L-GP 1R5522 2 DP_VDD_DAC
PCH_CRT_CLK 15
DP_VDDD 21
VDDA33_DP S2
40 CRT_S3 R5510 2 PTN3393
1 10KR2J-L-GP 0R2J-L-GP
VDDD33_IO S3 PTN3393
PTN3355 2 1 C5525 DP_VDD_DAC 27 VDDA33_DAC PTN3393
10KR2J-L-GP
PTN3393

1
SCD1U10V2KX-L1-GP DP_LDOCAP_AUX 2 C5523

R5519
LDOCAP_AUX PTN3393

SCD1U10V2KX-L1-GP
LDOCAP_DIG 35 5 DP_RRX CRT_PCH_HPD
LDOCAP_DIG RRX CRT_PCH_HPD 15

1
11 DP_PLT_RST# 1 2

2
RESET# C5521 SC1U6D3V2KX-L-1-GP

1
8
PCH_DPB_N0 C5517 1 2SCD1U10V2KX-L1-GP PCH_DPB_N0_U 7 12 PTN3393
C5516 ML0_N CLK_O
8
PCH_DPB_P0 1 2SCD1U10V2KX-L1-GP PCH_DPB_P0_U 6 ML0_P OSC_IN 33 DP_27M_IN R5514
8
PCH_DPB_N1 C5519 1 2SCD1U10V2KX-L1-GP PCH_DPB_N1_U 10 34 DP_27M_OUT DY 100KR2J-4-GP

2
ML1_N OSC_OUT

0R5J-5-GP
8
PCH_DPB_P1 C5518 1 2SCD1U10V2KX-L1-GP PCH_DPB_P1_U 9 U_TCK R5531 2 1 Do Not Stuff DP_VDDD
C5522 ML1_P
15 PCH_DPB_AUXN 1 2SCD1U10V2KX-L1-GP PCH_DPB_AUXN_U 4 U_TDO R5517 1 2

2
C5520 AUX_N
15 PCH_DPB_AUXP 1 2SCD1U10V2KX-L1-GP PCH_DPB_AUXP_U 3
AUX_P TCK 15 PTN3355 Do Not Stuff
PTN3355 CRT_PCH_HPD 13 16
HPD TDO
1R5520 Do2 Not Stuff DP_VDDD
TMS 17 PCH_CRT_DATA_C 1R5530 Do2 Not Stuff
PCH_CRT_DATA 15
DP_VDDA
DP_CRT_B 26 18 PTN3355
DP_CRT_G BLU TRST#
28 GRN TDI 19

1
PTN3393 PTN3393 DP_CRT_R 31 C5532 C5527 C5528
RED

SCD1U10V2KX-L1-GP
DP_RRX 1 2CRT_RRX_AUX
1 2 DP_LDOCAP_AUX R5515 1 2 DP_RSET 30 8 VBUCK_1D5V_C 1R5525 Do2 Not Stuff VBUCK_1D5V DY
RSET NC#8

SC2D2U10V3KX-L-GP
R5511 R5513 1K2R2F-1-GP 23 PTN3355

2
NC#23
1

SC10U6D3V3MX-GP
12KR2F-L-GP 0R2J-L-GP DP_CRT_HSYNC_CON 25 29
HSYNC NC#29
1

C5526 DP_CRT_VSYNC_CON 24 32 C5534 C5537 C5533 DP_PLT_RST# R5512

1 DY 2
VSYNC NC#32 PLT_RST# 17,24,30,58,65,73,96
1

Do Not Stuff

R5516 C5536 PTN3355 PTN3355 U_TDO Do Not Stuff

Do Not Stuff
SC2D2U10V3KX-L-GP

SCD01U50V2KX-L-GP

Do Not Stuff

C5541
SC1U6D3V2KX-L-1-GP
CRT_DDCCLK_CON 20
2

CRT_DDCDATA_CON SCL
22 41
2

SDA GND

1
SCD01U50V2KX-L-GP

A UM A
PTN3355
LDOCAP_DIG 1R5526 Do2 Not Stuff VBUCK_1D5V PTN3393BS-GP

2
PTN3355
Wistron Corporation
SCD1U10V2KX-L1-GP

SC2D2U10V3KX-L-GP
1

C5530 C5529 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

PTN3393 Taipei Hsien 221, Taiwan, R.O.C.
2

Title

LVDS_Switch
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 55 of 104
5 4 3 2 1
 SSID = SATA

SATA HDD Connector

HDD1

P1 V33 23 23
P2 24
P3
V33 24 1A
V33
NP1 NP1
P7 NP2 5V_S0
5V_S0 V5 NP2
P8 V5
P9 V5

C5605

C5606
P13 S1

SC10U10V5KX-2GP

SCD1U10V2KX-5GP
V12 GND
P14 V12 GND S4

1
P15 V12 GND S7
GND P4
P5

2
SCD01U16V2KX-3GP GND
19 SATA3_PTX_HDDRX_P0 2 1 C5602 SATA_TXP0_R S2 A+ GND P6
19 SATA3_PTX_HDDRX_N0 SCD01U16V2KX-3GP 2 1 C5603 SATA_TXN0_R S3 P10
A- GND
GND P12
SCD01U16V2KX-3GP 1 2C5615 SATA_RXP0_R S6
19 SATA3_PRX_HDDTX_P0 SCD01U16V2KX-3GP B+
19 SATA3_PRX_HDDTX_N0 1 2C5616 SATA_RXN0_R S5 B- DAS/DSS P11

SKT-SATA7P-15P-27-GP-U
Close to HDD1
22.10300.991

ODD Connector ODD_PW R_5V

ODD1
14
NP1

6
5
4 SATA_ODD_DA#_C 1 2R5602 SATA_ODD_DA# 20
3 0R2J-2-GP
2 SATA Zero Power ODD
1 SATA_ODD_PRSNT# 3D3V_S0
SATA_ODD_PRSNT# 19 20 SATA_ODD_PW RGT 2.5A
S7 U5601
R5607 SY6288CCAC-GP ODD_PW R_5V
S6 SATA_RXP2_R C5608 1 2SCD01U16V2KX-3GP SATA_PRX_ODDTX_P2 19
S5 SATA_RXN2_R C5607 1 2SCD01U16V2KX-3GP SATA_ODD_PW RGT 2 1 5V_S0
SATA_PRX_ODDTX_N2 19
S4 4 EN/EN# OCB 5
S3 SATA_TXN2_R C5611 1 2 SCD01U16V2KX-3GP SATA_PTX_ODDRX_N2 19 3 6 ODD_PW R_5V 100 mil
SATA_TXP2_R C5612 1 100KR2J-1-GP IN#3 OUT#6
S2 2 SCD01U16V2KX-3GP SATA_PTX_ODDRX_P2 19 2 IN#2 OUT#7 7
S1 1 GND OUT#8 8
1

1
follow CKL1.5 C5609

1
NP2 R5604 SC10U6D3V5KX-1GP C5610
15 DY Do Not Stuff SUPPORT ZERO SATA 74.02001.079 SC10U6D3V5KX-1GP

2
SKT-SATA7P-6P-130-GP
ODD 2nd = 74.06288.079
2

22.10300.581 3rd = 74.02311.079

Current limit
Active High
typ =>2.5A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD/ODD
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 56 of 104
 5 4 3 2 1

SSID = ESATA

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ESATA
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 57 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Wireless Mini Card Connector(802.11a/b/g) WLAN1

6 1.5V REFCLK+ 13 CLK_PCIE_WLAN_P3 18

REFCLK- 11 CLK_PCIE_WLAN_N3 18
3D3V_S0 2 3.3V/MS_V3
MS_TX+/PERN0 23 PCIE_PRX_WLANTX_N3 16
D 28 25 D
+1.5V MS_TX-/PERP0 PCIE_PRX_WLANTX_P3 16
48 +1.5V
MS_RX-/PETN0 31 PCIE_PTX_WLANRX_N3_C 16
3D3V_S0 52 +3.3V/MS_V3 MS_RX+/PETP0 33 PCIE_PTX_WLANRX_P3_C 16
24 36 USB_PN5_R
+3.3VAUX/MS_V3 USB_D- USB_PP5_R
USB_D+ 38

TP5801 1 WLAN_ACT 3 30
BT_ACT RESERVED#3 SMB_CLK
5 RESERVED#5 SMB_DATA 32
8 RESERVED#8
10 RESERVED#10
12 RESERVED#12 WAKE# 1
14 RESERVED#14 CLKREQ# 7 CLK_PCIE_WLAN_REQ3# 15,18
16 RESERVED#16 PERST# 22 PLT_RST# 17,24,30,55,65,73,96
TP5802 1 E51_RX 17 RESERVED#17
24 E51_TXD R5804 1 2Do Not Stuff E51_TX 19 RESERVED#19
R5806 24 WIFI_RF_EN DY 20 4
Do Not Stuff RESERVED#20 GND
37 RESERVED#37 GND 9
BT_ACT 1 2 3D3V_S0 39 15
RESERVED#39/MS_V3 GND
C
DY 41 RESERVED#41/MS_V3 GND 18 C
43 RESERVED#43 GND 21
20 BLUETOOTH_EN 1 2 R5807 45 26
R5805 0R2J-2-GP Do Not Stuff RESERVED#45 GND
47 RESERVED#47 GND 27
1 DY 2 DEBUG 49 29
RESERVED#49 GND
5V_S0 1 DY 2+5V_MINI_DEBUG 51 RESERVED#51 GND 34
R5801 Do Not Stuff 35
GND
GND 40
42 LED_WWAN# GND 50
24 CARD_WLAN_OUT# 44 LED_WLAN# GND 53
24 CARD_WPAN_OUT# 46 LED_WPAN# GND 54

NP1
NP2
MINI_PCI 52P
SKT-MINI52P-81-GP-U

NP1
NP2
1.1A
3D3V_S0
B B
USB_PN5_R 2 1 USB_PN5 16
1

C5802 C5803 C5804 R5803

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

0R3J-0-U-GP
2

TR5801
3 4

2 DY 1

Do Not Stuff
Do Not Stuff
2nd = 69.10103.061
WLAN_ACT
USB_PP5_R 2 1 UM
Do Not Stuff

USB_PP5 16
1

C5807
DY R5802
0R3J-0-U-GP
Wistron Corporation
2

A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A

Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)/ITP CONN
Size Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 58 of 104
5 4 3 2 1
 A B C D E

4 4

3 3

(Blanking)

2 2

1 UM 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 59 of 104
A B C D E
 5 4 3 2 1

SSID = PCH

D D

C C

B B

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)
Size Document Number Rev
A4 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 60 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = User.Interface
Wireless LED
FRONT POWER LED Low actived from KBC GPIO
Low actived from KBC GPIO
5V_S0
5V_S5
D Q6105 W LED1 D
R2
Q6101 PLED1 E R6105

3
R2
E R6104 24 W LAN_LED# B

3
1A K2
R1
24 PW RLED# B C W LAN_LED_R 2 1 W LAN_LED_A
FPOW ER_LED_A 1 A K2
R1
C LED_PW R 2 1
PDTA144VT-GP 330R2J-3-GP LED-W -27-GP
PDTA144VT-GP 330R2J-3-GP LED-W -27-GP 84.00144.P11 83.01221.R70

1
84.00144.P11 83.01221.R70 2nd = 84.DT144.A11

1
2nd = 84.DT144.A11 DY EC6102
2nd = 83.00110.R70
DY EC6101 2nd = 83.00110.R70 Do Not Stuff

2
Do Not Stuff
3rd = 83.01105.070

2
3rd = 83.01105.070
Place EC6806 near WLED1

SATA HDD LED(White) Power button

C
Low actived from PCH GPIO PW RBT1
C

5V_S0 R6102 6
100R2F-L1-GP-U
Q6102 HDLED1 1 2 KBC_PW RBTN#_C 4
R2 24 KBC_PW RBTN#
E R6106 3

3
19 SATA_LED# B 2
1A K2
R1
C SATA_LED_R 2 1 HDD_LED_A

1
AFTP6801 1 1
PDTA144VT-GP 330R2J-3-GP LED-W -27-GP DY EC6104

Do Not Stuff
84.00144.P11 83.01221.R70 5

2
1

2nd = 84.DT144.A11
DY EC6106
Do Not Stuff
2nd = 83.00110.R70 ETY-CON4-34-GP
2

3rd = 83.01105.070 20.K0465.004 AFTP6802

1

Battery LED1 (AMBER_LED)

B
Low actived from KBC GPIO B

5V_S5

Q6104
R2
E
24 CHG_AMBER_LED# B R6103
R1
C AMBER_LED_BAT 2 1 BAT_AMBER

PDTA144VT-GP 499R2F-2-GP
84.00144.P11 AMBER
1

2nd = 84.DT144.A11
DY EC6105
Do Not Stuff
CHLED1
2

1 ORANGE
+
- 3
2 +
WHITE

5V_S5
LED-OW -8-GP
Q6103 83.01222.X80
R2
E R6101
24 BATT_W HITE_LED# B R1
C W HITE_LED_BAT 2 1 BAT_W HITE WHITE
PDTA144VT-GP 330R2J-3-GP
84.00144.P11
1

2nd = 84.DT144.A11 UM
A DY EC6103
Do Not Stuff
A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Battery LED2 (WHITE_LED) LED Bard/Power Button
Low actived from KBC GPIO Size
A3
Document Number

Latitude300 Haswell
Rev
X00
Date: Friday, March 15, 2013 Sheet 61 of 104

5 4 3 2 1
 5 4 3 2 1

SSID = KBC SSID = Touch.Pad

Internal Keyboard Connector
3D3V_S0 TP_VDD

AFTP6901 1 KB1 R6209 1 2 0R3J-0-U-GP

D 31 D
20 KB_DET# 1

Touch Pad Connector

AFTP6909 1 KROW 7 2
AFTP6910 1 KROW 6 3
AFTP6911 1 KROW 4 4
AFTP6913 1 KROW 2 5 TP_VDD TP_VDD
AFTP6912 1 KROW 5 6
AFTP6914 1 KROW 1 7
24 KROW [0..7] AFTP6916 1 KROW 3 8
AFTP6915 1 KROW 0 9

SCD1U10V2KX-5GP
AFTP6917 KCOL5

C6201
1 10

1
2
24 KCOL[0..16] AFTP6919 1 KCOL4 11

1
AFTP6918 1 KCOL7 12 RN6201
AFTP6920 1 KCOL6 13 SRN10KJ-5-GP
AFTP6922 1 KCOL8 14 TPAD1

2
AFTP6921 1 KCOL3 15 7
AFTP6923 1 KCOL1 16

4
3
AFTP6925 1 KCOL2 17 1
AFTP6924 1 KCOL0 18 SRN10KJ-5-GP RN6202
AFTP6926 1 KCOL12 19 24 TPCLK 3 2 TPCLK_C 2
AFTP6928 1 KCOL16 20 24 TPDATA 4 1 TPDATA_C 3
AFTP6927 1 KCOL15 21 4
AFTP6929 1 KCOL13 22 12,13,18,96 PCH_SMBCLK 3 2 PCH_SMBCLK_R 5
AFTP6931 1 KCOL14 23 12,13,18,96 PCH_SMBDATA 4 1 PCH_SMBDATA_R 6
AFTP6930 1 KCOL9 24
AFTP6932 1 KCOL11 25 8
AFTP6934 1 KCOL10 26 RN6203 SRN10KJ-5-GP
CAP_LED 27 ACES-CON6-28-GP
C 28 C
29
20.K0422.006

EC6202
Do Not Stuff

EC6203
Do Not Stuff

EC6204
Do Not Stuff
AFTP6902 1 30

1
32 1
EC6201 AFTP6935
Do Not Stuff DY DY DY DY

2
ACES-CON30-10-GP
20.K0592.030

Refer "PN 510-002792-01 Rev 2 "

module spec
CAP LED Control 5V_S0

LOW actived from KBC GPIO Q6201

R2 Pin number Pin name
E TP_VDD 1 AFTP6906
24 CAP_LED# 1 2 CAP_LED_R# B R1
R6201 TPCLK_C 1 AFTP6907 1 VDD
C CAP_LED_Q 1 2 CAP_LED TPDATA_C 1 AFTP6908
R6202 PCH_SMBCLK_R 1 AFTP6933 2 PS2_CLK
33R2J-2-GP PDTA144VT-GP 1KR2J-1-GP PCH_SMBDATA_R 1 AFTP6937
84.00144.P11 3 PS2_DATA
2nd = 84.DT144.A11
4 GND
5 SMBUS_CLK
6 SMBUS_DATA
B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad

Size Document Number Rev
A3 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 62 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = User.Interface

D D

C C

R6302
1 DY 2

Do Not Stuff

USB_PN2_R
16 USB_PN2

TR6301
4 3

1 2
IOBD1 +5V_USB1
7 FILTER-4P-6-GP
1 1 AFTP8201

2 USB_PP2_R
16 USB_PP2
3 USB_PN2_R R6303
4 USB_PP2_R 1 DY 2
5
6 Do Not Stuff
8

B PTW O-CON6-13-GP B

20.K0397.006
1 AFTP8204
U6302
+5V_USB1 5

USB_PN2_R 1 AFTP8203
USB_PP2_R 1 AFTP8202

TVLST2304AD0-1-GP

6
USB_PP2_R USB_PN2_R

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

IO Board Connector Rev
A3 Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 63 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = User.Interface

D D

3D3V_S5

3D3V_S5

1
R6401 C6402
Do Not Stuff SCD1U10V2KX-5GP LIDSW1
DY

2
1

1
VSS
2 VDD
24 LID_CLOSE# LID_CLOSE# 3 OUT
C C
S-5712ACDL1-M3T1U-GP

1
C6401
DY Do Not Stuff 74.05712.0BB
2

B B

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
A4 X00
Latitude300 Haswell
Date: Friday, March 15, 2013 Sheet 64 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = DEBUG PORT

D D

Layout Note: Debug Connector

Place near trace separated point 3D3V_S0 DB1

11
LPC_AD[3..0] RN6501 1
18,24 LPC_AD[3..0]
SRN0J-7-GP
LPC_AD0 1 8 LPC_LAD0_R 2
LPC_AD1 2 7 LPC_LAD1_R 3
LPC_AD2 3 6 LPC_LAD2_R 4
LPC_AD3 4
LPC 5 LPC_LAD3_R 5 LPC
LPC_FRAME#_DEBUG 6
1 2 PLT_RST#_DEBUG 7
18,24 LPC_FRAME#
R6501 1
LPC 2 0R2J-2-GP 8
17,24,30,55,58,73,96 PLT_RST#
R6502 LPC 0R2J-2-GP 9
18 CLK_PCI_LPC
10
12
C C

ACES-CON10-1-GP-U1
20.F0714.010

B B

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Dubug connector
Size Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 65 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 66 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 67 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

RESERVED Rev
A3 Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 68 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB3.0 PORT
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 69 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 70 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 71 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 72 of 104
5 4 3 2 1
 5 4 3 2 1

dGPU Reset
3D3V_VGA_S0
U7301
15 DGPU_HOLD_RST# 1 5
A VCC

17,24,30,55,58,65,96 PLT_RST# 2
B OPS
3 4
GND Y
Do Not Stuff 1D05V_VGA_S0
Do Not Stuff Place close VDD ball Place close Chip

1
D 2ND = 73.7SZ08.EAH D
3RD = 73.01G08.L04 R7306
R7304 1 DY 2 Do Not Stuff OPS Do Not Stuff

1
OPS OPS OPS OPS OPS OPS OPS
3D3V_VGA_S0
C7312 C7313 C7310 C7323 C7322 C7325 C7326

2
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
GPU1A 1 OF 14
1/14 PCI_EXPRESS

2
GK208/GF117/GF119
Q7301
R7303 AB6 NC
PEX_WAKE#
G OPS Do Not Stuff
AA22
VGA_RST# PEX_IOVDD
18 PEG_CLKREQ# D 76 VGA_RST# AC7 AB23

1
PEX_RST# PEX_IOVDD
AC24
GPU_CLKREQ# PEX_IOVDD
OPS S AC6
PEX_CLKREQ# PEX_IOVDD
AD25

AE8
PEX_IOVDD
AE26
AE27
1.05V +/- 30mV
Do Not Stuff 18 CLK_PCIE_VGA PEX_REFCLK PEX_IOVDD
Do Not Stuff 18 CLK_PCIE_VGA# AD8
PEX_REFCLK# 3.3A
C7301 1OPS 2Do Not Stuff dGPU_TXP_CPU_RXP0 AC9
16 CPU_RXP_C_dGPU_TXP0 PEX_TX0 1D05V_VGA_S0
C7302 1OPS 2Do Not Stuff dGPU_TXN_CPU_RXN0 AB9
16 CPU_RXN_C_dGPU_TXN0 PEX_TX0#
Place close VDD ball Place close Chip
1 DY 2 16 dGPU_RXP_C_CPU_TXP0 AG6
PEX_RX0
16 dGPU_RXN_C_CPU_TXN0 AG7 AA10
R7305 PEX_RX0# PEX_IOVDDQ
AA12
Do Not Stuff C7303 1OPS dGPU_TXP_CPU_RXP1 PEX_IOVDDQ
16 CPU_RXP_C_dGPU_TXP1 2Do Not Stuff AB10 AA13
C7304 1OPS dGPU_TXN_CPU_RXN1 PEX_TX1 PEX_IOVDDQ
16 CPU_RXN_C_dGPU_TXN1 2Do Not Stuff AC10 AA16
PEX_TX1# PEX_IOVDDQ
AA18

1
PEX_IOVDDQ OPS OPS OPS OPS OPS OPS OPS
16 dGPU_RXP_C_CPU_TXP1 AF7 AA19
PEX_RX1 PEX_IOVDDQ
16 dGPU_RXN_C_CPU_TXN1 AE7 AA20
PEX_RX1# PEX_IOVDDQ C7311 C7314 C7309 C7320 C7321 C7327 C7328
AA21

2
PEX_IOVDDQ

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
C7305 1OPS 2Do Not Stuff dGPU_TXP_CPU_RXP2 AD11 AB22
16 CPU_RXP_C_dGPU_TXP2 PEX_TX2 PEX_IOVDDQ
16 CPU_RXN_C_dGPU_TXN2 C7306 1OPS 2Do Not Stuff dGPU_TXN_CPU_RXN2 AC11 AC23
PEX_TX2# PEX_IOVDDQ
AD24
PEX_IOVDDQ
16 dGPU_RXP_C_CPU_TXP2 AE9 AE25
PEX_RX2 PEX_IOVDDQ
16 dGPU_RXN_C_CPU_TXN2 AF9 AF26
PEX_RX2# PEX_IOVDDQ
AF27
C7307 1OPS dGPU_TXP_CPU_RXP3 PEX_IOVDDQ
C
16 CPU_RXP_C_dGPU_TXP3 2Do Not Stuff AC12 C
C7308 1OPS dGPU_TXN_CPU_RXN3 PEX_TX3
16 CPU_RXN_C_dGPU_TXN3 2Do Not Stuff AB12
PEX_TX3#

16 dGPU_RXP_C_CPU_TXP3 AG9
PEX_RX3
16 dGPU_RXN_C_CPU_TXN3 AG10
PEX_RX3#
AB13
PEX_TX4
AC13
PEX_TX4#
AF10
PEX_RX4
AE10
PEX_RX4#
Place close Chip
AD14
PEX_TX5
AC14
PEX_TX5# PEX_PLL_HVDD
AA8
AA9 3D3V_VGA_S0
3.3V +/- 5%
PEX_PLL_HVDD
AE12
AF12
PEX_RX5 210mA
PEX_RX5#
AB8
PEX_SVDD_3V3
AC15
PEX_TX6
AB15
PEX_TX6#

1
C7316 OPS C7315 OPS C7324 OPS

Do Not Stuff

Do Not Stuff

Do Not Stuff
AG12
PEX_RX6
AG13

2
PEX_RX6#
AB16
PEX_TX7
AC16
PEX_TX7#
AF13
PEX_RX7
AE13
PEX_RX7#
AD17 NC
PEX_TX8
AC17 NC
PEX_TX8#
AE15 NC
PEX_RX8
AF15 NC
PEX_RX8#
AC18 NC F2 VGA_SENSE 82
PEX_TX9 VDD_SENSE
AB18
PEX_TX9# NC
POWER IC
AG15 NC F1 GND_SENSE 82
PEX_RX9 GND_SENSE
AG16 NC
B PEX_RX9# B
AB19 NC
PEX_TX10
AC19 NC
PEX_TX10#
AF16 NC
PEX_RX10
AE16 NC
PEX_RX10#
AD20 NC
PEX_TX11
AC20 NC
PEX_TX11#
AE18 NC
PEX_RX11
AF18 NC
PEX_RX11#
AC21 NC
PEX_TX12 R7307
AB21 NC
PEX_TX12# Do Not Stuff
AG18 NC AF22 PEXTSTCLK_OUT 1 DY 2
PEX_RX12 PEX_TSTCLK_OUT
AG19 NC AE22 PEXTSTCLK_OUT#
PEX_RX12# PEX_TSTCLK_OUT#
N14M-GE 1D05V_VGA_S0
AD23
AE23
PEX_TX13 NC
NC Place close VDD ball Place close Chip L7301 1.05V +/- 30mV
PEX_TX13#
AF19 AA14 VCC1R05VIDEO_PEX_PLLVDD
Do Not Stuff
1 2
150mA
PEX_RX13 NC PEX_PLLVDD
AE19
PEX_RX13# NC PEX_PLLVDD
AA15 Do Not Stuff
AF24 NC
PEX_TX14

1
AE24 NC C7318 OPS C7317 OPS C7319 OPS
PEX_TX14#

Do Not Stuff

Do Not Stuff

Do Not Stuff
R7308
AE21 NC Do Not Stuff
R7302

2
PEX_RX14
AF21 NC 1 2
PEX_RX14#
AD9 TESTMODE 1 OPS 2 N14P-GV2
TESTMODE Do Not Stuff
AG24 NC
PEX_TX15
AG25 NC
PEX_TX15#
AG21 NC
PEX_RX15
AG22 NC
PEX_RX15#
GF119 GF117 R7301
GK208 AF25 PEX_TERMP 1 OPS 2
PEX_TERMP Do Not Stuff
A Do Not Stuff A

Do Not Stuff

OPS UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_PCIE/STRAPPING(1/5)
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 73 of 104

5 4 3 2 1
 5 4 3 2 1

LVDS Interface
GPU1G 7 OF 14
D 4/14 IFPAB D

GF117 GF119/GK208

NC AC4 GPU1I 9 OF 14
IFPA_TXC#
NC AC3 6/14 IFPD
GF119/GK208 GF117 IFPA_TXC
GF119/GK208 GF117
AA6 NC
IFPAB_RSET GF117 GF119/GK208
NC Y3 U6 NC
IFPA_TXD0# IFPD_RSET
NC Y4
IFPA_TXD0 DVI/HDMI DP
IFPAB_PLLVDD V7 NC
IFPAB_PLLVDD IFPC_PLLVDD
NC AA2 T7 NC NC I2CX_SDA IFPD_AUX_I2CX_SDA# P4
IFPA_TXD1# IFPD_PLLVDD
W7 NC NC AA3 NC I2CX_SCL P3
IFPAB_PLLVDD IFPA_TXD1 IFPD_AUX_I2CX_SCL
R7 NC
IFPD_PLLVDD
NC AA1 NC TXC R5
IFPA_TXD2# IFPD_L3#
NC AB1 NC TXC R4
IFPA_TXD2 IFPD_L3

NC TXD0 T5
IFPD_L2#
NC AA5 NC TXD0 T4
IFPA_TXD3# IFPD_L2
NC AA4
IFPA_TXD3
NC TXD1 U4
IFPD IFPD_L1#
NC TXD1 U3
IFPD_L1
NC AB4
IFPB_TXC#
NC AB5 NC TXD2 V4
IFPB_TXC IFPD_L0#
NC TXD2 V3
GF119/GK208 GF117 IFPD_L0
IFPAB_IOVDD W6 NC AB2
IFPA_IOVDD NC IFPB_TXD4#
NC AB3
IFPB_TXD4 IFPC_IOVDD
Y6 NC R6 NC NC D4
IFPB_IOVDD IFPD_IOVDD GPIO17

NC AD2 GF119/GK208 GF117

4
3
IFPB_TXD5#
NC AD3
IFPB_TXD5
4
3

RN7401
RN7402 Do Not Stuff
DY Do Not Stuff NC IFPB_TXD6#
AD1 DY Do Not Stuff
NC AE1
IFPB_TXD6
Do Not Stuff

1
2
1
2

NC AD5
IFPB_TXD7#
NC IFPB_TXD7
AD4 OPS
C C

NC B3
GPIO14
IFPAB
Do Not Stuff
Do Not Stuff

OPS

GPU1J 10 OF 14
7/14 IFPEF
GF119/GK208
GF117
DVI-DL DVI-SL/HDMI DP

HDMI Interface IFPEF_PLLVDD

GF119
GF117
GK208 NC
NC
I2CY_SDA
I2CY_SCL
I2CY_SDA
I2CY_SCL
IFPE_AUX_I2CY_SDA#
IFPE_AUX_I2CY_SCL
J3
J2
J7 NC
GPU1H 8 OF 14 IFPEF_PLLVDD
5/14 IFPC J1
IFPC NC
NC
TXC
TXC
TXC
TXC
IFPE_L3#
K1
GF119/GK208 GF117 IFPE_L3
K7 NC
IFPEF_PLLVDD
T6 NC GF117 GF119/GK208 K3
IFPC_RSET NC TXD0 TXD0 IFPE_L2#
NC K2
TXD0 TXD0 IFPE_L2
DVI/HDMI DP
K6 NC NC TXD1 TXD1 M3
IFPD_PLLVDD IFPEF_RSET IFPE_L1#
M7 NC NC I2CW_SDA IFPC_AUX_I2CW_SDA# N5 NC TXD1 TXD1 M2
IFPC_PLLVDD IFPE_L1
N7 NC NC I2CW_SCL N4
IFPC_PLLVDD IFPC_AUX_I2CW_SCL
M1
NC TXD2 TXD2 IFPE_L0#
NC N1
TXD2 TXD2 IFPE_L0
NC TXC N3
IFPC_L3#
NC TXC N2
IFPC_L3 IFPE NC FOR GK208

NC TXD0 R3
IFPC_L2#
NC TXD0 R2
B IFPC_L2 B
NC HPD_E HPD_E C2
GPIO18
NC TXD1 R1
IFPC_L1#
NC TXD1 T1
IFPC_L1 GF117
GF119 GK208
NC TXD2 T3
IFPC_L0# IFPEF_IOVDD
NC TXD2 T2 H6 NC
IFPC_L0 IFPE_IOVDD
GF119/GK208
GF117
J6 NC
IFPF_IOVDD DVI-DL DVI-SL/HDMI DP
IFPD_IOVDD P6 NC NC C3 NC I2CZ_SDA H4
IFPC_IOVDD GPIO15 IFPF_AUX_I2CZ_SDA#
NC I2CZ_SCL H3
IFPF_AUX_I2CZ_SCL
Do Not Stuff
4
3

RN7404
Do Not Stuff NC TXC IFPF_L3#
J5
NC TXC J4
4
3

IFPF_L3
DY Do Not Stuff
OPS RN7403 NC TXD3 TXD0 IFPF_L2#
K5
DY Do Not Stuff NC TXD3 TXD0 IFPF_L2
K4
1
2

NC TXD4 TXD1 L4
IFPF IFPF_L1#
NC TXD4 TXD1 L3
1
2

IFPF_L1

NC TXD5 TXD2 M5
IFPF_L0#
NC TXD5 TXD2 M4
IFPF_L0

NC FOR GK208

NC HPD_F F7
GPIO19

Do Not Stuff
Do Not Stuff

OPS
A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU Memory(2/5)
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 74 of 104
5 4 3 2 1
 5 4 3 2 1

OPS_GC6
R7519 1 2 EC_FB_CLAMP 24,76,83
Do Not Stuff
78 FBA_D[0..31] 2 OF 14
GPU1B
2/14 FBA
FBA_D0 E18 NC F3 FB_CLAM R7518 1 2Do Not Stuff
FBA_D1 FBA_D0 FB_CLAMP
F18
FBA_D1 OPS
FBA_D2 E16 GF119 GF117/GK208
FBA_D3 FBA_D2
F17
FBA_D4 FBA_D3
D20
FBA_D5 FBA_D4
D21
FBA_D6 FBA_D5
D F20 D
FBA_D7 FBA_D6 FBA_CMD5
E21
FBA_D8 FBA_D7 FBA_CMD2
E15
FBA_D9 FBA_D8 FBA_CMD3
D15
FBA_D10 FBA_D9 FBA_CMD19
F15
FBA_D11 FBA_D10 FBA_CMD18
F13
FBA_D12 FBA_D11
C13
FBA_D13 FBA_D12
B13
FBA_D14 FBA_D13
E13
FBA_D15 FBA_D14
D13
FBA_D16 FBA_D15
B15
FBA_D16

1
FBA_D17 C16 R7508 R7509 R7510 R7511 R7512
FBA_D18 FBA_D17
A13
FBA_D18

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
FBA_D19 A15 OPS OPS OPS OPS OPS
FBA_D20 FBA_D19
B18
FBA_D21 FBA_D20
A18

2
FBA_D22 FBA_D21
A19
FBA_D23 FBA_D22
C19
FBA_D24 FBA_D23
B24
FBA_D25 FBA_D24
C23
FBA_D26 FBA_D25
A25
FBA_D27 FBA_D26
A24
FBA_D28 FBA_D27
A21
FBA_D29 FBA_D28
B21
FBA_D30 FBA_D29
C20
FBA_D31 FBA_D30
79 FBA_D[32..63] C21
FBA_D32 FBA_D31
FBA_D33
R22
R24
FBA_D32
C27 FBA_CMD0
FBA_CMD0 78
1.5V +/- 3%
FBA_D34 FBA_D33 FBA_CMD0 FBA_CMD1
FBA_D35
T22
R23
FBA_D34 FBA_CMD1
C26
E24 FBA_CMD2
1 TP7501 Do Not Stuff
4.88A
FBA_D35 FBA_CMD2 FBA_CMD2 78 1D35V_VGA_S0
FBA_D36
FBA_D37
N25
FBA_D36 FBA_CMD3
F24 FBA_CMD3
FBA_CMD4
FBA_CMD3 78 Under GPU Near GPU
N26 D27 FBA_CMD4 78,79
FBA_D38 FBA_D37 FBA_CMD4 FBA_CMD5 4 OF 14 GPU1D
N23 D26 FBA_CMD5 78,79
FBA_D39 FBA_D38 FBA_CMD5 FBA_CMD6
N24 F25 FBA_CMD6 78,79 12/14 FBVDDQ
FBA_D40 FBA_D39 FBA_CMD6 FBA_CMD7
V23 F26 FBA_CMD7 78,79
FBA_D41 FBA_D40 FBA_CMD7 FBA_CMD8
V22 F23 FBA_CMD8 78,79 B26
FBA_D42 FBA_D41 FBA_CMD8 FBA_CMD9 FBVDDQ C7501 C7502 C7525 C7507 C7513 C7514 C7517 C7520
T23 G22 FBA_CMD9 78,79 C25

1
FBA_D43 FBA_D42 FBA_CMD9 FBA_CMD10 FBVDDQ
U22 G23 FBA_CMD10 78,79 E23
FBA_D43 FBA_CMD10 FBVDDQ

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
FBA_D44 Y24 G24 FBA_CMD11 E26 OPS OPS OPS OPS OPS OPS OPS OPS
FBA_D44 FBA_CMD11 FBA_CMD11 78,79 FBVDDQ

Do Not Stuff
FBA_D45 AA24 F27 FBA_CMD12 F14
FBA_CMD12 78,79

2
FBA_D46 FBA_D45 FBA_CMD12 FBA_CMD13 FBVDDQ
Y22 G25 FBA_CMD13 78,79 F21
FBA_D47 FBA_D46 FBA_CMD13 FBA_CMD14 TP7505 Do Not Stuff FBVDDQ
C AA23 G27 1 G13 C
FBA_D48 FBA_D47 FBA_CMD14 FBA_CMD15 FBVDDQ
AD27 G26 FBA_CMD15 78,79 G14
FBA_D49 FBA_D48 FBA_CMD15 FBA_CMD16 FBVDDQ
AB25 M24 FBA_CMD16 79 G15
FBA_D50 FBA_D49 FBA_CMD16 FBA_CMD17 TP7502 Do Not Stuff FBVDDQ
AD26 M23 1 G16
FBA_D51 FBA_D50 FBA_CMD17 FBA_CMD18 FBVDDQ
AC25 K24 FBA_CMD18 79 G18
FBA_D52 FBA_D51 FBA_CMD18 FBA_CMD19 FBVDDQ
AA27 K23 FBA_CMD19 79 G19
FBA_D53 FBA_D52 FBA_CMD19 FBA_CMD20 FBVDDQ
AA26 M27 FBA_CMD20 78,79 G20
FBA_D53 FBA_CMD20 FBVDDQ 1D35V_VGA_S0
FBA_D54
FBA_D55
W26
FBA_D54 FBA_CMD21
M26 FBA_CMD21
FBA_CMD22
FBA_CMD21 78,79 FBVDDQ
G21 Close to DRAM
Y25 M25 FBA_CMD22 78,79 H24
FBA_D56 FBA_D55 FBA_CMD22 FBA_CMD23 FBVDDQ
R26 K26 FBA_CMD23 78,79 H26
FBA_D57 FBA_D56 FBA_CMD23 FBA_CMD24 FBVDDQ
T25 K22 FBA_CMD24 78,79 J21
FBA_D58 FBA_D57 FBA_CMD24 FBA_CMD25 FBVDDQ
N27 J23 FBA_CMD25 78,79 K21
FBA_D59 FBA_D58 FBA_CMD25 FBA_CMD26 FBVDDQ
R27 J25 FBA_CMD26 78,79 L22
FBA_D60 FBA_D59 FBA_CMD26 FBA_CMD27 FBVDDQ C7503 C7504 C7526 C7511 C7528 C7527 C7515 C7516 C7519 C7521 C7530 C7531
V26 J24 FBA_CMD27 78,79 L24

1
FBA_D61 FBA_D60 FBA_CMD27 FBA_CMD28 FBVDDQ
V27 K27 FBA_CMD28 78,79 L26
FBA_D61 FBA_CMD28 FBVDDQ

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
FBA_D62 W27 K25 FBA_CMD29 M21 OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS
FBA_D62 FBA_CMD29 FBA_CMD29 78,79 FBVDDQ
FBA_D63 W25 J27 FBA_CMD30 N21
FBA_CMD30 78,79

2
FBA_D63 FBA_CMD30 FBA_CMD31 TP7504 Do Not Stuff FBVDDQ
J26 1 R21
FBA_CMD31 FBVDDQ
T21
FBA_DQM0 FBVDDQ
D19 V21
78 FBA_DQM0 FBA_DQM1 FBA_DQM0 FBVDDQ
D14 W21
78 FBA_DQM1 FBA_DQM2 FBA_DQM1 1D35V_VGA_S0 FBVDDQ
C17
78 FBA_DQM2 FBA_DQM3 FBA_DQM2
C22
78 FBA_DQM3 FBA_DQM4 FBA_DQM3
P24
79 FBA_DQM4 FBA_DQM5 FBA_DQM4
W24
79 FBA_DQM5 FBA_DQM6 FBA_DQM5
AA25
79 FBA_DQM6 FBA_DQM7 FBA_DQM6 FBA_DEBUG0 R7501
U25 F22 1 DY 2 Do Not Stuff
79 FBA_DQM7 FBA_DQM7 FBA_DEBUG0 FBA_DEBUG1 R7503
J22 1 DY 2 Do Not Stuff
FBA_DEBUG1
FBA_EDC0 E19
78 FBA_EDC0 FBA_EDC1 FBA_DQS_WP0
C15
78 FBA_EDC1 FBA_EDC2 FBA_DQS_WP1 FBA_CLK0P
B16 D24 FBA_CLK0P 78
78 FBA_EDC2 FBA_EDC3 FBA_DQS_WP2 FBA_CLK0 FBA_CLK0N
B22 D25 FBA_CLK0N 78
78 FBA_EDC3 FBA_EDC4 FBA_DQS_WP3 FBA_CLK0# FBA_CLK1P
R25 N22 FBA_CLK1P 79
79 FBA_EDC4 FBA_EDC5 FBA_DQS_WP4 FBA_CLK1 FBA_CLK1N
W23 M22 FBA_CLK1N 79
79 FBA_EDC5 FBA_EDC6 FBA_DQS_WP5 FBA_CLK1#
AB26
79 FBA_EDC6 FBA_EDC7 FBA_DQS_WP6
T26
79 FBA_EDC7 FBA_DQS_WP7

F19 D18
78 FBA_DQS_RN0 FBA_DQS_RN0 FBA_WCK01
C14 C18
B 78 FBA_DQS_RN1 FBA_DQS_RN1 FBA_WCK01# B
A16 D17 1D35V_VGA_S0
78 FBA_DQS_RN2 FBA_DQS_RN2 FBA_WCK23
A22 D16
78 FBA_DQS_RN3 FBA_DQS_RN3 FBA_WCK23#
79 FBA_DQS_RN4
P25
FBA_DQS_RN4 FBA_WCK45
T24 Under GPU
W22 U24
79 FBA_DQS_RN5 FBA_DQS_RN5 FBA_WCK45# R7505
AB27 V24
79 FBA_DQS_RN6 FBA_DQS_RN6 FBA_WCK67 FB_CAL_PD_VDDQ
79 FBA_DQS_RN7
T27
FBA_DQS_RN7 FBA_WCK67#
V25 2 OPS 1 D22
FB_CAL_PD_VDDQ
Do Not Stuff
FB_CAL_PU_GND
F16
62mA C24
FB_CAL_PU_GND
FB_PLLAVDD 1D05V_VGA_S0

FB_PLLAVDD
P22 Under GPU Near GPU L7501
FB_CAL_TERM_GND B25
FB_CAL_TERM_GND

FB_PLLAVDD H22
35mA FBA_PLL_AVDD 1 (
OPS ( 2
FB_DLLAVDD Do Not Stuff
GF117 GF119/GK208 Do Not Stuff Do Not Stuff
CHIP BEAD BLM18KG300TN1D MURATA
1

1
C7505 C7518
Do Not Stuff
OPS OPS R7507 R7506 OPS
Do Not Stuff

Do Not Stuff

30ohm@100MHZ(ESR=0.01ohm) OPS OPS

2

Do Not Stuff
Do Not Stuff
1

2
TP7503 1 FB_VREF D23
FB_VREF_PROBE

Do Not Stuff
Do Not Stuff

OPS

A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DP/LVDS/CRT/GPIO(3/5)
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 75 of 104
5 4 3 2 1
 5 4 3 2 1

30ohm@100MHz
1D05V_VGA_S0 DCR=0.04 ohm
3D3V_VGA_S0 Max current = 3000mA
GPU1K 11 OF 14 L7601
3/14 DACA Do Not Stuff 52mA NV request to need to be keeped
1 OPS 2
GF119/GK208 GF117 GF117 GF119/GK208
W5 NC NC B7 I2CA_SCL 4 OPS 1 RN7603 Do Not Stuff
DACA_VDD I2CA_SCL

1
A7 I2CA_SDA 3 2 Do Not Stuff C7606 GPU1M 13 OF 14
NC I2CA_SDA
AE2 C7605 OPS OPS Do Not Stuff 9/14 XTAL_PLL
DACA_VREF TSEN_VREF
Do Not Stuff

2
AF2 NC NC AE3 GPU_PLL_VDD L6
DACA_RSET DACA_HSYNC L7602 SP_PLLVDD CORE_PLLVDD
AE4 M6
NC DACA_VSYNC Do Not Stuff 111mA SP_PLLVDD
1 OPS2 N6
VID_PLLVDD NC
AG3
NC DACA_RED
Do Not Stuff GF119/GK208 GF117
AF4
NC DACA_GREEN
180ohm@100MHz

1
AF3 C7601 C7603 C7604 C7602
NC DACA_BLUE DCR=0.3 ohm

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
OPS OPS OPS OPS VIDEO_CLK_XTAL_SS A10 C10 N12P_XTAL_OUTBUFF
XTAL_SSIN XTAL_OUTBUFF
Max current = 300mA

2
C11 B10
Do Not Stuff XTAL_IN XTAL_OUT

1
D Do Not Stuff D
Do Not Stuff

1
Do Not Stuff 20PF 5% 50V +/-0.25PF 0402 R7602
OPSDo Not Stuff
OPS OPS R7601 R7603
Do Not Stuff OPS Do Not Stuff

2
27MHZ_IN 1 DY 2 27MHZ_OUT

2
X7601

2
1 4 R7604
Do Not Stuff
OPS

1
2 3 27MHZ_OUT_R
OPS

2
Do Not Stuff
C7607 Do Not Stuff C7608
Do Not Stuff 2ND = 82.30034.651 Do Not Stuff

1
OPS 3RD = 82.30034.681
OPS
X01 3/7 Change value from test report

R7613
Do Not Stuff
73 VGA_RST# 1 2
OPS
82 VIDEO_THERM_OVERT# GPIO8_OVERT#

4
Q7602
Do Not Stuff
OPS Do Not Stuff

3
GPIO9_ALERT PURE_HW_SHUTDOWN# 24,26,36
R7612
C C
1 2 3D3V_VGA_S0
GPU1N 14 OF 14 3D3V_VGA_S0
OPS
Do Not Stuff
8/14 MISC1
D9 SMBC_THERM_NV
I2CS_SCL SMBD_THERM_NV
D8
I2CS_SDA
A9 I2CC_SCL 4 OPS 1 RN7604
I2CC_SCL I2CC_SDA
B9 3 2 Do Not Stuff
I2CC_SDA
GF119
GF117 GK208
1 P2800_VGA_DXN E12
TP7603 THERMDN I2CB_SCL
NC C9 4 OPS 1 RN7605
P2800_VGA_DXP I2CB_SCL I2CB_SDA 3D3V_VGA_S0
1 F12 C8 3 2 Do Not Stuff
TP7604OPS THERMDP NC I2CB_SDA

OPS N12P_JTAG_TCK AE5 GPIO10_FBVREF

N12P_JTAG_TMS JTAG_TCK 3D3V_VGA_S0
1 AD6
JTAG_TMS

4
3
TP7602 1 N12P_JTAG_TDI AE6
JTAG_TDI
1

TP7605 1 N12P_JTAG_TDO AF6 R7624

TP7601OPS N12P_JTAG_TRST AG4
JTAG_TDO
C6 FB_CLAMP_MON R7610 1 OPS 2 Q7601_G RN7601
OPS JTAG_TRST# GPIO0
B2 OPS Do Not Stuff
OPS Do Not Stuff
OPS GPIO1
D6 Do Not Stuff
GPIO2
4
3

C7 3D3V_VGA_S0
2

1
2
RN7602 GPIO3
F9
GPIO4
Do Not Stuff A3 Q7601
GPIO5 FB_CLAMP_TGL_REQ#
OPS GPIO6
A4
1

GK208 B6 3 4 SMBD_THERM_NV
GPIO7 18,24,26,53 SML1_DATA
OVERT A6 GPIO8_OVERT# R7605
1
2

GPIO8 GPIO9_ALERT
GPIO9
F8
GPIO10_FBVREF
OPS Do Not Stuff 2 5
C5 GPIO10_FBVREF 78,79
GPIO10 Do Not Stuff
E7 VGA_CORE_VID 82 D7601 1 6
2

GPIO11 PWR_LEVEL
GPIO12
D7 A DY K AC_PRESENT 17,24 Do Not Stuff
GPIO13
B4 VGA_CORE_PSI 82 OPS 2nd = 84.DM601.03F
Do Not Stuff
GK208 GF117 GF119
Do Not Stuff 3rd = 84.2N702.E3F
D5
2ND = 83.27101.01F SMBC_THERM_NV
GPIO16 NC GPIO16
GPIO20 NC GPIO20
E6 3RD = 83.01426.01F 18,24,26,53 SML1_CLK
GPIO8 NC C4 D7602
GPIO21
DA-05691-001_V05 P15 A OPS K OVER_CURRENT_P8# 24
GPIO20/21 NC : for ALL
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 83.27101.01F
Do Not Stuff
3RD = 83.01426.01F
OPS

3D3V_VGA_S0

GPU1L 12 OF 14
10/14 MISC2
2

GF117/GF119/GK208
R7626
B B
DY Do Not Stuff
E10 NC
VMON_IN0
F10 NC D12 ROM_CS#
1

VMON_IN1 ROM_CS#
B12 ROM_SI
ROM_SI
A12 ROM_SO
STRAP0 ROM_SO
D1 C12 ROM_SCLK
STRAP1 STRAP0 ROM_SCLK
D2
STRAP2 STRAP1
STRAP3
STRAP4
E4
E3
D3
STRAP2
STRAP3
STRAP4
N14M-GE, N14P-GV2 Strapping
GF117
GF119
GK208
R7628 3D3V_VGA_S0
C1 NC
R7607 STRAP5
D11 BUFRST# 2 OPS 1 3D3V_VGA_S0
Do Not Stuff BUFRST#
1 2STRAP_REF0_GND_N9 F6 NC D10 Do Not Stuff
MULTI_STRAP_REF0_GND PGOOD
1

N14P-GV2
1

GF117 GF117 R7608 R7611 R7619

GF119 GF119

1
GK208 GK208 Do Not Stuff Do Not Stuff Do Not Stuff
F4
MULTI_STRAP_REF1_GND NC GV2_ROM_SCLK GV2_ROM_SO DY

1
NC E9 N14X no support CEC
2

CEC R7616 R7622

F5 NC
2

MULTI_STRAP_REF2_GND GF117
ROM_SCLK Do Not Stuff Do Not Stuff

2
GK208
GF119
ROM_SO
GV2_STRAP0 GE_STRAP1

2
Do Not Stuff STRAP0
ROM_SI
STRAP1
Do Not Stuff
1

R7615 R7618
1

1
R7614 R7620 Do Not Stuff Do Not Stuff

1
Do Not Stuff Do Not Stuff GV2_ROM_SI GE_ROM_SI R7621 R7617
OPS Do Not Stuff Do Not Stuff
GE_ROM_SCLK GE_ROM_SO
GE_STRAP0 GV2_STRAP1
2

2
3D3V_VGA_S0 3D3V_VGA_S0 3D3V_S0
3D3V_S0
3D3V_VGA_S0
2

Q7603
2

Do Not Stuff R7648

Q7606
Do Not Stuff R7650 R7649 Do Not Stuff
2nd = 84.DM601.03F Do Not Stuff Do Not Stuff G OPS_GC6
3rd = 84.2N702.F3F OPS_GC6 OPS_GC6
1

D
1

1 6 R7623
1

1
FB_CLAMP_TGL_REQ# S Do Not Stuff R7633 R7634
2 5 FB_CLAMP_MON_S GE_STRAP2 Do Not Stuff Do Not Stuff
24,75,83 EC_FB_CLAMP EC_FB_CLAMP_TGL_REQ# 24
DY DY
2

A 3D3V_VGA_S0 Do Not Stuff A

3 4
Do Not Stuff
2

2
STRAP2
2ND = 84.2N702.031
2

R7647
OPS_GC6 OPS_GC6 STRAP3
Do Not Stuff
OPS_GC6 STRAP4
1

FB_CLAMP_MON
1

R7609 R7629 R7630 R7631 R7632

Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
GV2_STRAP2 GV2_STRAP3 GE_STRAP3 GV2_STRAP4 GE_STRAP4
UM
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_POWER(4/5)
Size Document Number Rev
A1
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 76 of 104

5 4 3 2 1
 5 4 3 2 1

GPU1F 6 OF 14
13/14 GND
A2 M13
GND GND
VGA_CORE AB17 M15
GND GND
AB20 GND GND M17
AB24 GND GND N10
AC2 GND GND N12
Under GPU GPU1E 5 OF 14
AC22 GND GND N14
AC26 GND GND N16
11/14 NVVDD AC5 GND GND N18
K10 VDD AC8 GND GND P11
K12 VDD AD12 GND GND P13
K14 VDD AD13 GND GND P15
C7722 C7708 C7723 C7702 C7701 K16 A26 P17
VDD GND GND

1
K18 VDD AD15 GND GND P2
D OPS OPS OPS OPS OPS L11 AD16 P23 D

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
VDD GND GND
L13 AD18 P26

2
VDD GND GND
L15 VDD AD19 GND GND P5
L17 VDD AD21 GND GND R10
M10 VDD AD22 GND GND R12
M12 VDD AE11 GND GND R14
M14 VDD AE14 GND GND R16
M16 VDD AE17 GND GND R18
M18 VDD AE20 GND GND T11
N11 VDD AB11 GND GND T13
N13 VDD AF1 GND GND T15
N15 VDD AF11 GND GND T17
N17 VDD AF14 GND GND U10
P10 AF17 U12
C7709 C7725 C7721 C7720 C7719 VDD GND GND
P12 AF20 U14
VDD GND GND

1
P14 AF23 U16
VDD GND GND
OPS OPS OPS DY OPS P16 AF5 U18
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
VDD GND GND
P18 AF8 U2
2

2
VDD GND GND
R11 AG2 U23
VDD GND GND
R13 AG26 U26
VDD GND GND
R15 AB14 U5
VDD GND GND
R17 B1 V11
VDD GND GND
T10 B11 V13
VDD GND GND
T12 B14 V15
VDD GND GND
T14 B17 V17
VDD GND GND
T16 B20 Y2
VDD GND GND
T18 B23 Y23
VDD GND GND
U11 B27 Y26
VDD GND GND
U13 B5 Y5
VDD GND GND
U15 B8
C7714 C7713 C7712 C7711 VDD GND
U17 E11
VDD GND
1

1
V10 E14
VDD GND
OPS OPS OPS OPS V12 E17
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
VDD GND
V14 E2
2

2
VDD GND
V16 E20
VDD GND
V18 E22
VDD GND
E25
GND
C E5 C
Do Not Stuff GND
E8
GND
H2
GND
H23
Do Not Stuff H25
GND
GND
H5
GND
OPS K11
GND
Near GPU K13
GND
K15
GND
K17
GND
L10
GND
L12
GND
L14
GND
L16
C7733 C7732 C7731 C7730 C7726 C7724 C7717 C7710 GND
L18
GND
1

DY L2
GND
OPS DY OPS OPS OPS OPS OPS L23
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

GND
L25
2

GND
L5 AA7
GND GND
M11 AB7
GND GND

Do Not Stuff

Do Not Stuff

OPS

B B

3.3V +/- 5%
GPU1C 3 OF 14
85mA 3D3V_VGA_S0
14/14 XVDD/VDD33 Under GPU Near GPU
AD10 G10
NC#AD10 VDD33
AD7 G12
NC#AD7 VDD33
B19 G8
NC#B19 VDD33
G9
VDD33
1

F11 C7734 C7729 C7727 C7728 C7703

3V3AUX
OPS OPS OPS OPS OPS
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

V5
2

NC#V5
V6
NC#V6

CONFIGURABLE
POWER CHANNELS
* nc on substrate

G1
NC#G1
G2
NC#G2
G3
NC#G3
G4
NC#G4
G5
NC#G5
G6
NC#G6
G7
NC#G7

V1 NC#V1
A V2 A
NC#V2

UM
W1 NC#W1
W2
W3
NC#W2
NC#W3
Wistron Corporation
W4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
NC#W4 Taipei Hsien 221, Taiwan, R.O.C.

Do Not Stuff Title

Do Not Stuff
GPU_DPPWR/GND(5/5)
Size Document Number Rev
Custom
Latitude300 Haswell X00
OPS Date: Friday, March 15, 2013 Sheet 77 of 104
5 4 3 2 1
 5 4 3 2 1

1D35V_VGA_S0 1D35V_VGA_S0
VRAM1
FBA_D[0..31] 75
VRAM2
FBA_D[0..31] 75 Place close VRAM1 VDD ball
K8 E3 FBA_D0 K8 E3 FBA_D21 1D35V_VGA_S0
VDD DQL0 FBA_D4 VDD DQL0 FBA_D17
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 FBA_D2 N1 F2 FBA_D20 OPS OPS OPS
VDD DQL2 FBA_D7 VDD DQL2 FBA_D16
R9 VDD DQL3 F8 R9 VDD DQL3 F8

Do Not Stuff
C7827

Do Not Stuff
C7804

Do Not Stuff
C7805
B2 H3 FBA_D1 B2 H3 FBA_D22
VDD DQL4 VDD DQL4

1
D9 H8 FBA_D5 D9 H8 FBA_D19
VDD DQL5 FBA_D3 VDD DQL5 FBA_D23
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 FBA_D6 R1 H7 FBA_D18

2
1D35V_VGA_S0 VDD DQL7 1D35V_VGA_S0 VDD DQL7
D N9 VDD N9 VDD D
D7 FBA_D10 D7 FBA_D30
DQU0 FBA_D13 DQU0 FBA_D25
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 FBA_D8 A1 C8 FBA_D31
VDDQ DQU2 FBA_D12 VDDQ DQU2 FBA_D26
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2
C9 A7 FBA_D11 C9 A7 FBA_D29
VDDQ DQU4 FBA_D15 VDDQ DQU4 FBA_D24
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 FBA_D9 E9 B8 FBA_D28
VDDQ DQU6 VDDQ DQU6
F1
H9
VDDQ DQU7 A3 FBA_D14 F1
H9
VDDQ DQU7 A3 FBA_D27
Place close VRAM2 VDD ball
VDDQ VDDQ 1D35V_VGA_S0
H2 VDDQ DQSU C7 FBA_EDC1 75 H2 VDDQ DQSU C7 FBA_EDC3 75
DQSU# B7 FBA_DQS_RN1 75 DQSU# B7 FBA_DQS_RN3 75
FBA_VREF_0 H1 FBA_VREF_0 H1 OPS OPS OPS
R7808 VREFDQ R7809 VREFDQ
M8 VREFCA DQSL F3 FBA_EDC0 75 M8 VREFCA DQSL F3 FBA_EDC2 75

Do Not Stuff
C7820

Do Not Stuff
C7821

Do Not Stuff
C7822
1 OPS 2 FBA_ZQ0 L8 ZQ DQSL# G3 FBA_DQS_RN0 75 1 OPS 2FBA_ZQ1 L8 ZQ DQSL# G3 FBA_DQS_RN2 75

1
Do Not Stuff Do Not Stuff
ODT K1 FBA_CMD2 75 ODT K1 FBA_CMD2 75
75,79 FBA_CMD9 N3 75,79 FBA_CMD9 N3

2
A0 A0
75,79 FBA_CMD11 P7 A1 75,79 FBA_CMD11 P7 A1
75,79 FBA_CMD8 P3 A2 CS# L2 FBA_CMD0 75 75,79 FBA_CMD8 P3 A2 CS# L2 FBA_CMD0 75
75,79 FBA_CMD25 N2 A3 RESET# T2 FBA_CMD5 75,79 75,79 FBA_CMD25 N2 A3 RESET# T2 FBA_CMD5 75,79
75,79 FBA_CMD10 P8 A4 75,79 FBA_CMD10 P8 A4
75,79 FBA_CMD24 P2 A5 75,79 FBA_CMD24 P2 A5
75,79 FBA_CMD22 R8 A6 NC#M7 M7 75,79 FBA_CMD22 R8 A6 NC#M7 M7
75,79 FBA_CMD7 R2 A7 NC#L9 L9 75,79 FBA_CMD7 R2 A7 NC#L9 L9
75,79 FBA_CMD21 T8 A8 NC#L1 L1 75,79 FBA_CMD21 T8 A8 NC#L1 L1
75,79 FBA_CMD6 R3 A9 NC#J9 J9 75,79 FBA_CMD6 R3 A9 NC#J9 J9
75,79 FBA_CMD29 L7 A10/AP NC#J1 J1 75,79 FBA_CMD29 L7 A10/AP NC#J1 J1
75,79 FBA_CMD23 R7 A11 75,79 FBA_CMD23 R7 A11
C N7 N7 C
75,79 FBA_CMD28 A12/BC# 75,79 FBA_CMD28 A12/BC#
75,79 FBA_CMD20
75,79 FBA_CMD4
T3
T7
A13 VSS J8
M1
75,79 FBA_CMD20
75,79 FBA_CMD4
T3
T7
A13 VSS J8
M1
Place close VRAM1VDDQ ball
A14 VSS A14 VSS 1D35V_VGA_S0
VSS M9 VSS M9
VSS J2 VSS J2
75,79 FBA_CMD12 M2 BA0 VSS P9 75,79 FBA_CMD12 M2 BA0 VSS P9
75,79 FBA_CMD27 N8 BA1 VSS G8 75,79 FBA_CMD27 N8 BA1 VSS G8
75,79 FBA_CMD26 M3 BA2 VSS B3 75,79 FBA_CMD26 M3 BA2 VSS B3 OPS OPS OPS OPS OPS OPS OPS OPS

Do Not Stuff
C7812

Do Not Stuff
C7810

Do Not Stuff
C7814

Do Not Stuff
C7813

Do Not Stuff
C7832

Do Not Stuff
C7829

Do Not Stuff
C7831

Do Not Stuff
C7830
VSS T1 VSS T1

1
VSS A9 VSS A9
75 FBA_CLK0P J7 T9 75 FBA_CLK0P FBA_CLK0P J7 T9
CK VSS FBA_CLK0N CK VSS
75 FBA_CLK0N K7 E1 75 FBA_CLK0N K7 E1

2
CK# VSS CK# VSS
VSS P1 VSS P1
75 FBA_CMD3 FBA_CMD3 K9 75 FBA_CMD3 FBA_CMD3 K9
CKE CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
75 FBA_DQM1 D3 DMU VSSQ E8 75 FBA_DQM3 D3 DMU VSSQ E8
75 FBA_DQM0 E7 DML VSSQ E2 75 FBA_DQM2 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
75,79 FBA_CMD13 L3 WE# VSSQ B9 75,79 FBA_CMD13 L3 WE# VSSQ B9
75,79 FBA_CMD15
75,79 FBA_CMD30
K3
J3
CAS# VSSQ B1
G9
75,79 FBA_CMD15
75,79 FBA_CMD30
K3
J3
CAS# VSSQ B1
G9
Place close VRAM1VDDQ ball
RAS# VSSQ RAS# VSSQ 1D35V_VGA_S0

Check Do Not Stuff Do Not Stuff

OPS OPS
OPS OPS OPS OPS OPS OPS OPS OPS

Do Not Stuff
C7817

Do Not Stuff
C7811

Do Not Stuff
C7816

Do Not Stuff
C7815

Do Not Stuff
C7836

Do Not Stuff
C7833

Do Not Stuff
C7835

Do Not Stuff
C7834
1

1
B B
Frame Buffer Patition A-Lower Half
FBA_CLK0P

FBCLK Termination place on VRAM side

FBA_CLK0N

2
1D35V_VGA_S0
1

R7802 R7801
Do Not Stuff Do Not Stuff FBA_CLK0P
1
Do Not Stuff
R7806

DY DY
2

2
OPS FBA_CLK0_MIDPT
R7810
1

Do Not Stuff
2

FBA_VREF_0 C7801 DY
Do Not Stuff OPS
2

1
1

1
Do Not Stuff
C7803

Do Not Stuff
R7807

Do Not Stuff
R7804
1

FBA_CLK0N
OPS OPS DY
2

FBA_VREF_FET_L
D

FBVREF Termination
Q7801
UM
A Do Not Stuff A
Do Not Stuff Type FBVREF% Voltage GPU_GPIO10
DY Wistron Corporation
2ND = 84.2N702.031
Un-termination 50% 0.749V High 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
G

Description
76,79 GPIO10_FBVREF Termination 70% 1.0617V Low Title

20110613 GPU-VRAM1,2 (1/4)

Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 78 of 104

5 4 3 2 1
 5 4 3 2 1

1D35V_VGA_S0 1D35V_VGA_S0
VRAM3
FBA_D[32..63] 75
VRAM4
FBA_D[32..63] 75 Place close VRAM3 VDD ball
K8 E3 FBA_D32 K8 E3 FBA_D41 1D35V_VGA_S0
VDD DQL0 FBA_D39 VDD DQL0 FBA_D45
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 FBA_D35 N1 F2 FBA_D43 OPS DY OPS
VDD DQL2 FBA_D36 VDD DQL2 FBA_D47
R9 VDD DQL3 F8 R9 VDD DQL3 F8

Do Not Stuff
C7910

Do Not Stuff
C7909

Do Not Stuff
C7906
B2 H3 FBA_D34 B2 H3 FBA_D40
VDD DQL4 VDD DQL4

1
D9 H8 FBA_D38 D9 H8 FBA_D46
VDD DQL5 FBA_D33 VDD DQL5 FBA_D42
G7 VDD DQL6 G2 G7 VDD DQL6 G2
D R1 H7 FBA_D37 R1 H7 FBA_D44 D

2
1D35V_VGA_S0 VDD DQL7 1D35V_VGA_S0 VDD DQL7
N9 VDD N9 VDD
D7 FBA_D58 D7 FBA_D49
DQU0 FBA_D61 DQU0 FBA_D53
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 FBA_D56 A1 C8 FBA_D51
VDDQ DQU2 FBA_D63 VDDQ DQU2 FBA_D54
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2
C9 A7 FBA_D57 C9 A7 FBA_D50
VDDQ DQU4 FBA_D62 VDDQ DQU4 FBA_D55
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 FBA_D59 E9 B8 FBA_D48
VDDQ DQU6 FBA_D60 VDDQ DQU6 FBA_D52
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9
H2
VDDQ
C7
H9
H2
VDDQ
C7
Place close VRAM4 VDD ball
VDDQ DQSU FBA_EDC7 75 VDDQ DQSU FBA_EDC6 75 1D35V_VGA_S0
DQSU# B7 FBA_DQS_RN7 75 DQSU# B7 FBA_DQS_RN6 75
FBA_VREF_1 H1 FBA_VREF_1 H1
R7912 VREFDQ R7913 VREFDQ
M8 VREFCA DQSL F3 FBA_EDC4 75 M8 VREFCA DQSL F3 FBA_EDC5 75 OPS OPS OPS
1 OPS 2FBA_ZQ2 L8 ZQ DQSL# G3 FBA_DQS_RN4 75 1 OPS 2FBA_ZQ3 L8 ZQ DQSL# G3 FBA_DQS_RN5 75

Do Not Stuff
C7913

Do Not Stuff
C7912

Do Not Stuff
C7911
Do Not Stuff Do Not Stuff

1
ODT K1 FBA_CMD18 75 ODT K1 FBA_CMD18 75
75,78 FBA_CMD9 N3 A0 75,78 FBA_CMD9 N3 A0
75,78 FBA_CMD11 P7 75,78 FBA_CMD11 P7

2
A1 A1
75,78 FBA_CMD8 P3 A2 CS# L2 FBA_CMD16 75 75,78 FBA_CMD8 P3 A2 CS# L2 FBA_CMD16 75
75,78 FBA_CMD25 N2 A3 RESET# T2 FBA_CMD5 75,78 75,78 FBA_CMD25 N2 A3 RESET# T2 FBA_CMD5 75,78
75,78 FBA_CMD10 P8 A4 75,78 FBA_CMD10 P8 A4
75,78 FBA_CMD24 P2 A5 75,78 FBA_CMD24 P2 A5
75,78 FBA_CMD22 R8 A6 NC#M7 M7 75,78 FBA_CMD22 R8 A6 NC#M7 M7
75,78 FBA_CMD7 R2 A7 NC#L9 L9 75,78 FBA_CMD7 R2 A7 NC#L9 L9
75,78 FBA_CMD21 T8 A8 NC#L1 L1 75,78 FBA_CMD21 T8 A8 NC#L1 L1
75,78 FBA_CMD6 R3 A9 NC#J9 J9 75,78 FBA_CMD6 R3 A9 NC#J9 J9
75,78 FBA_CMD29 L7 A10/AP NC#J1 J1 75,78 FBA_CMD29 L7 A10/AP NC#J1 J1
C
75,78 FBA_CMD23
75,78 FBA_CMD28
R7
N7
A11 75,78 FBA_CMD23
75,78 FBA_CMD28
R7
N7
A11 Place close VRAM3 VDDQ ball C

A12/BC# A12/BC# 1D35V_VGA_S0

75,78 FBA_CMD20 T3 A13 VSS J8 75,78 FBA_CMD20 T3 A13 VSS J8
75,78 FBA_CMD4 T7 A14 VSS M1 75,78 FBA_CMD4 T7 A14 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
75,78 FBA_CMD12 M2 BA0 VSS P9 75,78 FBA_CMD12 M2 BA0 VSS P9 OPS OPS OPS OPS OPS OPS DY OPS

Do Not Stuff
C7916

Do Not Stuff
C7915

Do Not Stuff
C7919

Do Not Stuff
C7918

Do Not Stuff
C7921

Do Not Stuff
C7922

Do Not Stuff
C7923

Do Not Stuff
C7925
75,78 FBA_CMD27 N8 BA1 VSS G8 75,78 FBA_CMD27 N8 BA1 VSS G8

1
75,78 FBA_CMD26 M3 BA2 VSS B3 75,78 FBA_CMD26 M3 BA2 VSS B3
VSS T1 VSS T1
A9 A9

2
VSS FBA_CLK1P VSS
75 FBA_CLK1P J7 CK VSS T9 75 FBA_CLK1P J7 CK VSS T9
75 FBA_CLK1N K7 E1 75 FBA_CLK1N FBA_CLK1N K7 E1
CK# VSS CK# VSS
VSS P1 VSS P1
75 FBA_CMD19 FBA_CMD19 K9 75 FBA_CMD19 FBA_CMD19 K9
CKE CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
75 FBA_DQM7 D3 DMU VSSQ E8 75 FBA_DQM6 D3 DMU VSSQ E8
75 FBA_DQM4 E7 DML VSSQ E2 75 FBA_DQM5 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
75,78 FBA_CMD13 L3 WE# VSSQ B9 75,78 FBA_CMD13 L3 WE# VSSQ B9
75,78 FBA_CMD15 K3 CAS# VSSQ B1 75,78 FBA_CMD15 K3 CAS# VSSQ B1
75,78 FBA_CMD30 J3 RAS# VSSQ G9 75,78 FBA_CMD30 J3 RAS# VSSQ G9
Place close VRAM4 VDDQ ball
1D35V_VGA_S0
Do Not Stuff Do Not Stuff

B OPS OPS OPS OPS OPS OPS DY OPS OPS OPS

B

Do Not Stuff
C7917

Do Not Stuff
C7926

Do Not Stuff
C7924

Do Not Stuff
C7920

Do Not Stuff
C7929

Do Not Stuff
C7928

Do Not Stuff
C7930

Do Not Stuff
C7927
1

1
Frame Buffer Patition A-Lower Half
FBCLK Termination place on VRAM side
FBA_CLK1P

2
FBA_CLK1N
1D35V_VGA_S0
1

R7906 R7908
1
Do Not Stuff
R7903

Do Not Stuff Do Not Stuff FBA_CLK1P

DY DY
2

2
OPS FBA_CLK1_MIDPT
R7914
2

FBA_VREF_1 DY Do Not Stuff

C7931
OPS
1

1
Do Not Stuff
C7902

Do Not Stuff
R7904

Do Not Stuff
R7902

Do Not Stuff
2

1
1

OPS FBA_CLK1N
OPS DY
2

FBA_VREF_FET_H

UM
A A
D

Q7901
Do Not Stuff Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Do Not Stuff Taipei Hsien 221, Taiwan, R.O.C.
DY
2ND = 84.2N702.031
Title

GPU-VRAM3,4 (2/4)
G

76,78 GPIO10_FBVREF Size Document Number Rev

A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 79 of 104

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM5,6 (3/4)
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 80 of 104

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM7,8 (4/4)
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 81 of 104

5 4 3 2 1
 5 4 3 2 1

DCBATOUT PWR_DCBATOUT_VGA_CORE1 DCBATOUT PWR_DCBATOUT_VGA_CORE2 5V_S5

D D

1
PG8201 PG8204
PR8264
Do Not Stuff
X01 3/1 Change to MP version
1 2 1 2
OPS 5V_S5
Do Not Stuff Do Not Stuff

2
PG8202 PG8205
PWR_VGA_CORE_VCC PU8201
1 OPS 2 1 OPS 2 PC8212

1
15 21 1 2
Do Not Stuff Do Not Stuff PC8211 VCC PVCC
OPS Do Not Stuff Do Not Stuff
PG8203 PG8206

2
25 22
GND PGND
1 OPS 2 1 OPS 2 OPS
81172_AGND PR8225 OPS
Do Not Stuff Do Not Stuff 81172_AGND HG1
2 PWR_VGA_CORE_HG1 Do Not Stuff PC8230 2012-12-06 (Power team modify)
1 PWR_VGA_CORE_BST1 2 OPS 1PWR_VGA_CORE_BST1_R 1 2PWR_VGA_CORE_SW1 PR8228 and PR8227 change to
15,83 DGPU_PWROK PWR_VGA_CORE_EN BST1 PWR_VGA_CORE_SW1
3 24 100R(64.10005.6DL) nVidia suggest
EN PH1
OPS OPS PWR_VGA_CORE_PSI 4
PSI LG1
23 PWR_VGA_CORE_LG1 Do Not Stuff
3D3V_VGA_S0 1 PR8213 2 Do Not Stuff DY 16 1 PR8216 2Do Not Stuff
Do Not Stuff 1 PGOOD
76 VIDEO_THERM_OVERT# 2 PR8215 PWR_VGA_CORE_TALERT# 14 DY OPS
Do Not Stuff 1 TALERT#
OPS
76 VGA_CORE_VID OPS 2 PR8214 PWR_VGA_CORE_VID 5 17 PWR_VGA_CORE_HG2 PC8237
VID HG2 PWR_VGA_CORE_BST2 2
BST2
18 OPS 1PWR_VGA_CORE_BST2_R 1 2PWR_VGA_CORE_SW2
PWR_VGA_CORE_TSENSE 13 19 PWR_VGA_CORE_SW2 PR8230 PR8228
TSNS PH2 PWR_VGA_CORE_LG2 Do Not Stuff Do Not Stuff
20 1 2
LG2

1
Do Not Stuff
PC8216 PWR_VGA_CORE_VREF 8
VREF

1
PR8268 Do Not Stuff PWR_VGA_CORE_REFIN 7 10 PWR_VGA_CORE_FBRTN 1 2
NTC close Phase1 MOSFET Do Not Stuff R3 R1 PWR_VGA_CORE_VIDBUF
REFIN FBRTN PWR_VGA_CORE_FB PR8210 OPS GND_SENSE 73
OPS 6
VIDBUF FB
11

1
B=4250K 9 12 PC8218 PR8206 Do Not Stuff

2
FS COMP

1
1 PR8267 2COMP_RC1 1 COMP_RC2 1 2 PC8215

PWR_VGA_CORE_FS
PR8202 2 1 2
PC8232 OPS

1
Do Not Stuff PR8204 PR8269 PR8207 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff

2
Do Not Stuff Do Not Stuff Do Not Stuff PR8272 Do Not Stuff Do Not Stuff
PR8209 OPS

2
Do Not Stuff OPS PC8217
EN N14P-GV2 N14M-GE N14P-GV2 N14M-GE OPS OPS

2
OPS PWR_VGA_CORE_COMP 2 1 1 OPS 2 FBRTN_RC 1 PR8205 2
Do Not Stuff

1
Do Not Stuff VGA_SENSE 73
OPS

2
81172_AGND OPS VGA_R1R3 Do Not Stuff
Do Not Stuff OPS PR8227
1 PR8271 2 N14M-GE 1 OPS 2 VGA_CORE
OPS

1
3D3V_VGA_S0 Do Not Stuff Do Not Stuff
R2 PG8207
DY 1 PR8211 2 N14P-GV2 PR8208
PR8263 1 2 Do Not Stuff PWR_VGA_CORE_EN Do Not Stuff Do Not Stuff 1 2

2
PC8238 OPS Do Not Stuff

1
OPS PC8222 OPS

2
Do Not Stuff
Do Not Stuff 81172_AGND
PR8265
81172_AGND

2
15,83 DGPU_PWR_EN 1 OPS 2 81172_AGND

Do Not Stuff

X01 3/7 DY PR8263, POP PR8265 PWR_VGA_CORE_REFIN

and change resistor value TO 1.8K C

1
R4
PR8273 PR8203
EDC=45A

1
C N14M-GE Do Not Stuff Do Not Stuff PC8219
Do Not Stuff
PC8239
Do Not Stuff
C
N14P-GV2
N14P-GV2 N14M-GE
EDP=72A

2
3D3V_VGA_S0
PSI VGA_R4R5
R5
1

PR8258
Do Not Stuff TYPE config TDC EDP OCP R1/PR8207 R2/PR8211 R3/PR8204 R4/PR8203 R5/PR8201 C/PC8219

1
PR8257 N14M-GE PR8270 PR8201
2

Do Not Stuff Do Not Stuff

76 VGA_CORE_PSI 1 2 PWR_VGA_CORE_PSI N14P-GV2
OPS N14M-GE C 35A 41A 39kohm 30kohm 3kohm 24kohm 3kohm 1.8nF

2
Do Not Stuff
1

PC8214
OPS PR8259
Do Not Stuff

DY Do Not Stuff
2

DY 81172_AGND 81172_AGND N14P-GV2 B 32A 55A 20kohm 20kohm 2kohm 18kohm 0ohm 2.7nF
2

N14P-GT B 45A 75A 20kohm 20kohm 2kohm 18kohm 0ohm 2.7nF

Phase1 Phase2
PWR_DCBATOUT_VGA_CORE2 PWR_DCBATOUT_VGA_CORE2
PWR_DCBATOUT_VGA_CORE1 PWR_DCBATOUT_VGA_CORE1

OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS
1

1
PC8220 PC8221 PC8224 PC8229 PC8228 PC8227 PC8223 PC8226 PC8225 PC8236 PC8235 PC8234
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
2

2
PU8206 PU8205 PU8207 PU8208
OPS 2 OPS 2 OPS 2 OPS 2
3 3 3 3
1 4 1 4 1 4 1 4
10 10 10 10
9 9 9 9
B 7 7 7 7 B
8 6 8 6 8 6 8 6
5 5 5 5

Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff

1st = 84.03669.037 1st = 84.03669.037 1st = 84.03669.037 1st = 84.03669.037
PWR_VGA_CORE_HG1 PWR_VGA_CORE_HG2
PWR_VGA_CORE_SW1 VGA_CORE PWR_VGA_CORE_SW2 VGA_CORE
PWR_VGA_CORE_LG1 PL8201 PWR_VGA_CORE_LG2 PL8202

1 2 1 2

Do Not Stuff Do Not Stuff

2

OPS OPS
1

1
PR8226 PT8210 PT8211
ESR=12mohm
Do Not Stuff CYNTEC Do Not Stuff
ESR=6mohm
Do Not Stuff
ESR=12mohm
PR8229 CYNTEC OPS PT8213
Do Not Stuff
DY D15uH/DCR=0.66mohm+-7% Do Not Stuff
D15uH/DCR=0.66mohm+-7%
2

2
OPS OPS Do Not Stuff DY Do Not Stuff
1

VGA_SNB2 1
VGA_SNB1
1

PC8231
Do Not Stuff PC8233
DY Do Not Stuff
2

DY

I/P cap: 10U 25V K0805 X5R/ 78.10622.51L

MOS: Q1: Id=10A,Rdson=9.8~13.2 mohm ; Q2: Id=17A, Rdson=3.6~5.2mohm 84.03669.037 I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP CHOKE 0.22UH PCMB063T-R22MS 2.5~3mohm Isat =34Arms 68.R2210.20C MOS: Q1: Id=10A,Rdson=9.8~13.2 mohm ; Q2: Id=17A, Rdson=3.6~5.2mohm 84.03669.037
O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L Inductor: CHIP CHOKE 0.22UH PCMB063T-R22MS 2.5~3mohm Isat =34Arms 68.R2210.20C
O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L

A A

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ADP3211_+VGA_CORE
Size Document Number Rev
Custom
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 82 of 104

5 4 3 2 1
 5 4 3 2 1

3D3V_VGA_S0
1D05V_VGA_S0
3D3V_VGA_S0 should ramp-up before VGA_Core
VGA_Core should ramp-up before 1D5V_VGA_S0
D D
1D35V_VGA_S0 should ramp-up before 1D05V_VGA_S0
3D3V_S0 to 3D3V_VGA_S0
1D05V_S0 to 1D05V_VGA_S0 0307 Add Discharge Circuit
1D05V_S0 3D3V_S0

U8301 1D05V_VGA_S0 VGA_CORE

R8313
1 2 1D05V_VGA_EN 15
15,82 DGPU_PWROK GND

1
1 14 PG8313
Do Not Stuff VIN1#1 VOUT1#14 1D05V_VGA_OUT2 3D3V_AUX_S5 PR8317
2 VIN1#2 VOUT1#13 13 1 2
C8309 1D05V_VGA_EN VTT_CT_105VC_2 1D05V_VGA_S0 Do Not Stuff
OPS 3 ON1 CT1 12
OPS
2

4 11 Do Not Stuff 1 DGPU_PWR_EN#

5V_S0 VBIAS GND OPS 2
Do Not Stuff

5 10 VTT_CT_3VC_1
15,82 DGPU_PWR_EN ON2 CT2

2
6 9 PG8312 3D3V_VGA_S0 PR8313 D G S
OPS
1

VIN2#6 VOUT2#9 3D3V_VGA_OUT1 PG8314 Do Not Stuff

DY 7 VIN2#7 OPS VOUT2#8 8 1 2
1 2

1
Do Not Stuff
Do Not Stuff C8305 C8316 C8307 C8308 Do Not Stuff PQ8305
OPS Do Not Stuff

2
Do Not Stuff OPS Do Not Stuff
OPS PR8316

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
DY OPS Do Not Stuff

D
1
PG8315

2
1

DY C8304 OPS 1 2 2nd = 84.DM601.03F PQ8307

C8302 Do Not Stuff C8306 S G D
DY 3rd = 84.2N702.E3F Do Not Stuff
2

Do Not Stuff
Do Not Stuff Do Not Stuff
Do Not Stuff
2

2
C8310
DY OPS OPS

Do Not Stuff
OPS OPS

1
OPS

S
15,82 DGPU_PWR_EN

G
C C

DGPU_PWR_EN#

www.vinafix.vn
1D35V_VGA_S0 1.35V +/- 3%.
1D35V_S3 5.6A 1D35V_VGA_S0

PQ8308
AO4468, SO-8 8 D S 1
7 D S 2
Id=?A, Qg=9~12nC 6 D S 3
1
B B
Rdson=17.4~22m ohm 5 D
DY PC8307
1

DY DY Do Not Stuff
PC8303 Do Not Stuff G
4

Do Not Stuff
2

Do Not Stuff

1D35V_ENABLE_RC

R8314
1 DY 2
1D35V_VGA_S0
Do Not Stuff
Discharge Circuit
1

PC8302 DY
3D3V_AUX_S5 Do Not Stuff
1
DIS_1D35V_VGA_S0

DY OPS
2

1 2 1D35V_VGA_EN#
Do Not Stuff
PR8311 D G S PR8315
Do Not Stuff
2
6

PQ8304 15V_S5
DY
Do Not Stuff
Do Not Stuff
D
1

2nd = 84.DM601.03F
3rd = 84.2N702.E3F S G D PR8310 PQ8306
D8301 Do Not Stuff
DY Do Not Stuff
24,75,76 EC_FB_CLAMP 1 Do Not Stuff
OPS
1

GV2 3 1D35V_VGA_EN
A A
2 1D35V_ENABLE
S

15,82 DGPU_PWROK
G

UM
Do Not Stuff DGPU_PWR_EN#
R8312
1 2 1D35V_VGA_EN 51
Wistron Corporation
Do Not Stuff 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GE Taipei Hsien 221, Taiwan, R.O.C.

Title
DISCRETE VGA POWER
Size Document Number Rev
Custom Latitude300 Haswell X00
Date: Tuesday, March 19, 2013 Sheet 83 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 84 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 85 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Mechanical
S1 S2 S3
STF237R117H83-1-GP STF237R117H83-1-GP STF237R113H111-GP

34.4V802.001

1
34.4CK01.001 34.4CK01.001
D D

H1 H3 H4 H9 H8
Do Not Stuff H2 Do Not Stuff Do Not Stuff H5 Do Not Stuff Do Not Stuff
Do Not Stuff Do Not Stuff H6
Do Not Stuff Do Not Stuff Do Not Stuff
Do Not Stuff

1
1

1
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff

SPR4 SPR5
C1 C2 C3
Do Not Stuff Do Not Stuff Do Not Stuff SPRING-62-GP SPRING-102-GP
SPR2 SPR3
SPRING-102-GP SPRING-102-GP

1
1

1
C Do Not Stuff Do Not Stuff Do Not Stuff 34.39S07.003 34.41V01.001 C

34.41V01.001 34.41V01.001
CPU BRACKET

SSID = EMI
DCBATOUT 1D35V_VGA_S0 AUD_AGND
1

1
EC9701 EC9702 EC9703 EC9704 EC9708 EC9705 EC9706 EC9707 EC9709 EC9710 EC9727 EC9725 EC9726 EC9730 EC9728 EC9729 EC9731

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
EC9739 EC9744 EC9743 EC9745
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP
SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP

SC1KP25V2JX-GP

DY DY DY DY DY DY DY DY DY DY DY DY DY
2

2
1

EC9717 EC9711 EC9712 EC9713 EC9716 EC9715 EC9714

B B
X01 2/27 Change to 0.1u/25V for rating
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
SC1KP25V2JX-GP

SC1KP25V2JX-GP

DY DY DY DY DY
2

DCBATOUT

2
EC9740 EC9741 EC9742 EC9747 EC9748 EC9749 EC9750 EC9751

SC1KP25V2JX-GP

Do Not Stuff

Do Not Stuff

Do Not Stuff

SC1KP25V2JX-GP

Do Not Stuff

Do Not Stuff

Do Not Stuff
DY DY DY DY DY DY
1

1
5V_S0
1

EC9720 EC9719 EC9718 EC9723 EC9721 EC9722 EC9724

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY DY DY DY DY DY DY
2

3D3V_S0 5V_S5
1

1
A EC9737 EC9735 EC9736 EC9738 EC9734 EC9732 EC9733 A
UM
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
DY DY DY DY DY DY DY
2

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/EMI Capacitors

Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 86 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 87 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 88 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 89 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Free Fall Sensor

Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 90 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 91 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 92 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Express Card
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 93 of 104

5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LVDS_Switch
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 94 of 104

5 4 3 2 1
 5 4 3 2 1

D D

C C

(Blanking)

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT_Switch
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 95 of 104

5 4 3 2 1
 5 4 3 2 1

SSID = XDP
CPU XDP

D D

CFG[19:0]
6 CFG[19:0]
XDP_BPM[7:0]
4 XDP_BPM[7:0]
XDP_PREQ# 1 TP9601 Do Not Stuff
4 XDP_PREQ#

4 XDP_PRDY# XDP_PRDY# 1 TP9602 Do Not Stuff

4 XDP_TDO XDP_TDO 1 TP9624 Do Not Stuff
4 XDP_TRST# XDP_TRST# 1 TP9621 Do Not Stuff
4 XDP_TDI XDP_TDI 1 TP9623 Do Not Stuff
XDP_TMS 1 TP9611 Do Not Stuff
4 XDP_TMS
XDP_BPM0 1 TP9612 Do Not Stuff
XDP_BPM1 1 TP9613 Do Not Stuff
XDP_BPM2 1 TP9614 Do Not Stuff
7 H_VCCST_PWRGD R9601 1 XDP 2 Do Not Stuff VCCST_PWRGD_XDP
BP_PWRGD_RST#
1 TP9648 Do Not Stuff XDP_BPM3
XDP_BPM4
1 TP9615 Do Not Stuff
R9603 1
17,24 PM_PWRBTN# XDP 2 Do Not Stuff 1 TP9645 Do Not Stuff
XDP_BPM5
1
1
TP9616
TP9617
Do Not Stuff
Do Not Stuff
C R9604 1 2 Do Not Stuff XDP_PWR_DEBUG 1 TP9647 Do Not Stuff XDP_BPM6 1 TP9618 Do Not Stuff C
7 PWR_DEBUG R9605 1 XDP 2 Do Not Stuff XDP_SYS_PWROK 1 TP9644 Do Not Stuff XDP_BPM7 1 TP9619 Do Not Stuff
17,24 SYS_PWROK
XDP RN9601
XDP_SMBDAT
1 4 1 TP9646 Do Not Stuff
12,13,18,62 PCH_SMBDATA
2 XDP 3 XDP_SMBCLK 1 TP9649 Do Not Stuff CFG0 1 TP9626 Do Not Stuff
12,13,18,62 PCH_SMBCLK
CFG1 1 TP9627 Do Not Stuff
4 XDP_TCLK Do Not Stuff XDP_TCLK 1 TP9650 Do Not Stuff CFG2 1 TP9620 Do Not Stuff
CFG3 1 TP9622 Do Not Stuff
CFG4 1 TP9630 Do Not Stuff
18 PCIE_CLK_XDP_P PCIE_CLK_XDP_P 1 TP9652 Do Not Stuff CFG5 1 TP9631 Do Not Stuff
18 PCIE_CLK_XDP_N PCIE_CLK_XDP_N 1 TP9651 Do Not Stuff CFG6 1 TP9629 Do Not Stuff
CFG7 1 TP9628 Do Not Stuff
Do Not Stuff 2 1 R9602 XDP_RST 1 TP9654 Do Not Stuff CFG17 1 TP9634 Do Not Stuff
17,24,30,55,58,65,73 PLT_RST# XDP XDP_DBRESET# 1 TP9653 Do Not Stuff CFG16 1 TP9635 Do Not Stuff
17 XDP_DBRESET# CFG8 TP9633 Do Not Stuff
1
1

C9602 CFG9 1 TP9632 Do Not Stuff

Do Not Stuff CFG10 1 TP9637 Do Not Stuff
XDP CFG11 1 TP9639 Do Not Stuff
2

CFG19 1 TP9638 Do Not Stuff

CFG18 1 TP9636 Do Not Stuff
B CFG12 1 TP9640 Do Not Stuff B
CFG13 1 TP9643 Do Not Stuff
CFG14 1 TP9642 Do Not Stuff
CFG15 1 TP9641 Do Not Stuff

UM

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TOUCH PANEL
Size Document Number Rev
A4
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 96 of 104
5 4 3 2 1
 5 4 3 2 1

Shark Bay Platform Power Sequence

(DC mode) Red Words: Controlled by EC GPIO

+RTC_VCC t01 >9ms

RTC_RST#

DCBATOUT

3D3V_AUX_S5
D D

Sense the power button status

Press Power button
KBC_PWRBTN# Platform to KBC PSL_IN2
PSL_OUT#(GPIO71) keep low
3D3V_AUX_KBC
KBC GPIO34 control power on by 3V_5V_EN
S5_ENABLE

5V_S5
V5REF_Sus must be powered up before
5V_S5 & 3D3V_S5 need meet 0.7V difference
VccSus3_3, or after VccSus3_3 within
0.7 V. Also, V5REF_Sus must power
3D3V_S5
down after VccSus3_3, or before
5V_S5 & 3D3V_S5 need meet 0.7V difference
VccSus3_3 within 0.7 V.
+5VA_PCH_VCC5REFSUS Ta
KBC GPIO43 to PCH
PM_RSMRST#(RSMRST#_RST) t05 >10ms
In case of a non-Deep S4/S5 Platform
t07 >100ms PCH to KBC GPIO00
timing t42 should be added to t07
which will make it 100mS minimum.
PCH_SUSCLK_KBC

KBC GPIO20 to PCH

PM_PWRBTN#

DC PM_PWRBTN#
After Power Button
PCH to KBC GPIO44
PM_SLP_S4#
t10 PCH to KBC GPIO01
PM_SLP_S3# >30us
KBC GPIO47 to LAN
PM_LAN_ENABLE
Enable by PM_SLP_S4#
1D5V_S3
C C
DDR_VREF_S3(0.75V)
5V_S0 & 3D3V_S0 need meet 0.7V difference
5V_S0

V5REF must be powered up before 3D3V_S0

Vcc3_3, or after Vcc3_3 within 0.7
V. Also, V5REF must power down
after Vcc3_3, or before Vcc3_3
within 0.7 V. +5VS_PCH_VCC5REF Tb

1D5V_S0

1D8V_S0

0D75V_S0
1D8V_S0 & 1D5V_S3 power ready
RUNPWROK

1D05V_PCH

VCCP_CPU

1D05_VTT_PWRGD

0D85V_S0

0D85V_S0
D85V_PWRGD

SetVID ACK
CPU SVID BUS 50us< t36 <2000us

VCC_CORE

VCC_GFXCORE
t37
<5ms
IMVP_PWRGD
B B

PCH_CLOCK_OUT

This signal represents the Power

ALL_SYS_PWRGD=D85V_PWRGD t14 >99ms KBC GPIO77 to PCH
Good for all the non-CORE and
non-graphics power rails.
PWROK(S0_PWR_GOOD)
t18
D85V_PWRGD >0us PCH to CPU
DRAMPWROK(VDDPWRGOOD) 2ms<t17 <650ms
t19 >1ms
t20 >2ms
1D8V_S0
5ms<t13 <650ms PCH to CPU
UNCOREPWRGOOD(H_CPUPWRGD)

SYS_PWROK t21+t22 >1ms+60us

1ms< t25 <100ms PCH to all system
PLT_RST#
t39 <200us
DMI

N14P-GT Power-Up/Down Sequence

3D3V_S0
PCH GPIO54 output
DGPU_PWR_EN#(Discrete only)

3D3V_VGA_S0(VDD33)

A
8209A_EN/DEM_VGA(Discrete only) A

VGA_CORE(NVVDD) tNVVDD >0ms

RT8208 PGOOD
DGPU_PWROK(Discrete only)

1D5V_VGA_S0(FBVDDQ) tNV-FBVDDQ >0ms

1D05V_VGA_S0(PEX_VDD) tNV-PEX_VDD >0ms

First rail to power down VGA_CORE,1D05V_VGA_S0 UM

1D5V_VGA_S0,3D3V_VGA_S0
Last rail to power down Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
tPOWER-OFF <10ms Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence
Size Document Number Rev
For power-down, reversing the ramp-up sequence is recommended. A1
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 97 of 104
5 4 3 2 1
 5 4 3 2 1

Wistron SHARK BAY POWER UP SEQUENCE DIAGRAM

D D

DC 3
BT+ SWITCH
Battery PM_SLP_S4#
Page43 Page44

-7 -3 DCBATOUT
AC +DC_IN SWITCH DCBATOUT
Adapter in S5_ENABLE 3a
Page44 4a
Page42 VIN 1D35V_S3
SW
VIN 1D05V_S0
AD+ SW

4 TPS51367
-5 EN1 EN2 RUNPWROK
3D3V_S5 TPS51367 EN PGOOD
PM_SLP_S3# RUNPWROK Page48
Charger EN PGOOD
DCBATOUT TPS51225CRUKR Page48 4b
BQ24715 VIN
DC/DC -2 4b
(3.3V/5V) 5V_S5
ACOK Page44 1D35V_S3
Page41

3D3V_AUX_S5 RUNPWROK 5V_S0

4 SWITCH
Page36
DDR_VTT_PG_CTRL 0D675V_S0
C
-4 SWITCH TPS51206 C

Page24 Page46
RUNPWROK 3D3V_S0
-6 SWITCH
3D3V_AUX_KBC -3 4b Page36
5
AC_IN S5_ENABLE 7
PSL_IN1# GPIO34
DDR_PG_CTL RUNPWROK Level H_VCCST_PWRGD
1 H_VR_ENABLE Shifter
VR_EN
Page7
KBC_PWRBTN# -1
PSL_IN2# KBC DPWROK H_CPU_SVIDDAT
VIDSOUT
PM_SLP_S4#
NPCE985 GPIO43
RSMRST#_KBC
RSMRST# Haswell ULT CPU
GPIO8 PM_PWRBTN# 11
PM_SLP_S3#
GPIO01
GPIO20 PWRBTN#
with
3D3V_S5
GPIO80 2 Lynx Point PCH
Page24 12 4a
SLP_S3# de-assert, delay 20ms; APWROK PCI_PLTRST# 4 VIN 1D5V_S0
PCH_PWROK assert. PLTRST# VOUT
10 S0_PWR_GOOD
6 PCH_PWROK VCCST_PWRGD SYS_PWROK VR_READY PM_SLP_S3# TPS51312 RUNPWROK
SLP_S3# de-assert, delay 200ms; EN PGOOD
S0_PWR_GOOD assert. Page51

5 4b
PCH_PWROK H_VCCST_PWRGD
B B

SYS_PWROK be asserted after S0_PWR_GOOD

assertion and CPU core VR power good
assertion.
11
S0_PWR_GOOD
H_CPU_SVIDDAT
VDIO

TPS51622 9
7 H_VR_ENABLE IMVP_PWRGD
VR_ON PGOOD

Page46

PWR_VCC_PWM1

DCBATOUT 8
CSD97374
VCC_CORE
VSW
Page47

A A

UM

1 2 3a 4 4a 4b 5 6 7 8 9 10 11 12
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence Diagram

Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 98 of 104
5 4 3 2 1
 5 4 3 2 1

DCBATOUT
Adapter
RT8237 TPS51216RUKR ISL95813 AP3211
D D

Charger
1D05V_S0
BQ24717
1D35V_S3 0D675V_S0 VCC_CORE VGA_CORE
Battery +PBATT

TPS22966 TLV70215 SIRA06DP

1D05V_VGA_S0 1D5V_S0 1D35V_VGA_S0

C C

TPS51125ARGER

15V_S5 3D3V_AUX_S5 5V_AUX_S5 5V_S5 3D3V_S5

TPS22966
AP2182SG AP2301M8G TPS22966 AO3403
TLV70215

3D3V_S0
USB30_VCCA +5V_USB1 5V_S0 3D3V_LAN_S5
USB30_VCCB 1D5V_S0
B B

SY6288

ODD_PWR_5V
RT9724 TPS22966
Power Shape

LCDVDD 3D3V_VGA_S0
Regulator LDO Switch

A UM A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

Power Block Diagram Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 99 of 104
5 4 3 2 1
 A B C D E

PCH SMBus Block Diagram KBC SMBus Block Diagram

3D3V_S5_PCH 3D3V_S0
TP_VDD
‧ ‧
3D3V_S0 ‧
SRN2K2J-1-GP SRN10KJ-5-GP
‧
DIMM 1 SRN10KJ-5-GP

SMBCLK SMB_CLK
‧ ‧PCH_SMBCLK
1
SMBDATA SMB_DATA
‧ ‧ PCH_SMBDATA
SCL

SDA
TouchPad Conn. 1

PSDAT1 TPDATA
‧ TPDATA TPDATA

SMBus Address:A0 PSCLK1 TPCLK

‧ TPCLK TPCLK
2N7002SPT
3D3V_AUX_KBC

DIMM 2 ‧
‧PCH_SMBCLK SCL

3D3V_S5_PCH ‧ PCH_SMBDATA SDA

SRN4K7J-8-GP
SMBus Address:A4
‧
SRN33J-7-GP Battery Conn.
GPIO17/SCL1 ‧‧BAT_SCL PBAT_SMBCLK1 CLK_SMB
SMBus address:16
SRN2K2J-1-GP
TPAD GPIO22/SDA1
‧ BAT_SDA
‧ PBAT_SMBDAT1 DAT_SMB

PCH_SMBCLK SMB_CLK

SML1CLK SML1_CLK PCH_SMBDATA SMB_DATA

SML1DATA SML1_DATA
KBC BQ24717
KBC SCL

SMBus address:12
‧ NPCE985P SDA

2 2

3D3V_S5_PCH

PCH 3D3V_S0
‧
SCL
Thermal
3D3V_S5_PCH SDA

‧
SRN2K2J-8-GP
NCT7718W
3D3V_S0
SRN2K2J-8-GP

‧ SRN2K2J-8-GP
GPIO73/SCL2 SML1_CLK SCL

GPIO74/SDA2 SML1_DATA SDA PCH 3D3V_S0

SML1CLK ‧ ‧ SML1_CLK
‧ THM_SML1_CLK
SCL Thermal
‧ SML1_DATA THM_SML1_DATA SDL
SML1DATA ‧ ‧ NCT7718W ‧
SMBus Address:98 3D3V_S0
2N7002SPT
3D3V_VGA_S0
‧ SRN2K2J-8-GP

LVDS_DDC_DATA_R
‧SRN4K7J-8-GP
‧ CIICSCL1
SCL LVDS SWITCH LVDS_DDC_CLK_R
3D3V_VGA_S0 ‧ CIICSDA1

‧
VGA SDL

SMBus Address:94&6A SRN33J-5-GP

3 2N7002SPT 3

SMBC_Therm_NV I2CS_SCL
‧
SMBD_Therm_NV I2CS_SDA
‧
SMBus Address:9E
LVDS_DDC_CLK CLK

LVDS_DDC_DATA DATA LCD CONN

3D3V_S0 5V_S0

‧ ‧
3D3V_S0
SRN2K2J-1-GP SRN2K2J-1-GP
‧

SDVO_CTRLCLK ‧PCH_HDMI_CLK DDC_CLK_HDMI

‧
SDVO_CTRLDATA
‧ PCH_HDMI_DATA ‧‧ DDC_DATA_HDMI
‧ HDMI CONN
2N7002DW-1-GP

4 4

UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS Block Diagram

Size Document Number Rev
A2 Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 100 of 104
A B C D E
 5 4 3 2 1

OAK Haswell CLK Block Diagram

CK0
M_A_DIMA_CLK_DDR0
SA_CLK0
Intel CPU Card Reader
D CK0#
M_A_DIMA_CLK_DDR#0
SA_CLK#0 Haswell ULT
12MHZ_IN
D
DDR3L DIMM1 RTS5176E-GRT
M_A_DIMA_CLK_DDR1
CK1 SA_CLK1
M_A_DIMA_CLK_DDR#1
CK1# SA_CLK#1

CLK_PCIE_WLAN_P3
CLKOUT_PCIE_P3 REFCLK+
CK0
M_B_DIMB_CLK_DDR0
SB_CLK0
WLAN
CLK_PCIE_WLAN_N3
M_B_DIMB_CLK_DDR#0 CLKOUT_PCIE_N3 REFCLK-
CK0# SB_CLK#0
DDR3L DIMM2
M_B_DIMB_CLK_DDR1
CK1 SB_CLK1
M_B_DIMB_CLK_DDR#1
CK1# SB_CLK#1
LAN
CLK_PCIE_LAN_P4
TL8106EUS-CG
CLKOUT_PCIE_P4 REFCLK_P

FBA_CLK0P CLK_PCIE_LAN_N4
CK CLKOUT_PCIE_N4 REFCLK_N
C VRAM1 FBA_CLK0N
VGA C
CK#
N14M-GE
LANXIN
FBA_CLK0P
N14P-GV2 CKXTAL1
CLK_PCIE_VGA#
CK FBA_CLK0 PEX_REFCLK# CLKOUT_PCIE_N5
FBA_CLK0N
VRAM2 CK#
FBA_CLK0# X3101
25MHz
CLK_PCIE_VGA
PEX_REFCLK CLKOUT_PCIE_P5
LANXOUT
CKXTAL2
FBA_CLK1P
CK 27MHZ_IN
XTAL_IN
VRAM3 CK#
FBA_CLK1N

X7601
27MHz
FBA_CLK1P
CK FBA_CLK1
VRAM4 FBA_CLK1N
FBA_CLK1# XTAL_OUT
27MHZ_OUT Audio
CK#
RN2102
Realtek
HDA_BITCLK HDA_CODEC_BITCLK
HDA_BCLK/I2S0_SCLK BITCLK ALC3223
SRN33J-5-GP-U
B RTC_X1 B
RTCX1

X2101
KBC
32.768KHz
NPCE985P
RTC_X2 PCH_SUSCLK_KBC
RTCX2 SUSCLK/GPIO62 GPIO0/EXTCLK/F_SDIO3
XTAL24_IN CLK_PCI_KBC_R R1805 CLK_PCI_KBC
CLKOUT_LPC_1 LCLK/GPIOF5
XTAL24_IN 0R2J-2-GP

X1801
CLKOUT_LPC_0 CLK_PCI_LPC_R R1804 CLK_PCI_LPC
24MHz
0R2J-2-GP
LPC
XTAL24_OUT
XTAL24_OUT
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
Test Point

A A
UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CLK Block Diagram
Size Document Number Rev
A2
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 101 of 104

5 4 3 2 1
 A B C D E

Thermal Block Diagram Audio Block Diagram

1 1

3D3V_S5_PCH 3D3V_S0
PAGE28 D+ NCT7718_DXP
PCH MMBT3904-3-GP
SPKR_L+
SPKR_L-

D- NCT7718_DXN
SC2200P50V2KX-2GP SPKR_R-
SPKR_R+ SPEAKER
DIS Place near CPU
SML1_DATA THM_SML1_DATA
Thermal PWM CORE
Codec
GPIO75 ‧ ‧ 2N7002 ‧ SDA
NCT7718
GPIO58 SML1_CLK
‧‧
THM_SML1_CLK
‧ SCL
MMBT3904-3-GP
ALC3223
T8 AUD_HP1_JACK_L HP MIC
SML1_DATA AUD_HP1_JACK_R

PAGE20
SML1_CLK
3D3V_S0
T_CRIT# THERM_SYS_SHDN#
2N7002
S
D
PURE_HW_SHUTDOWN#

PCH_PWROK
EN 3V/5V SLEEVE COMBO
G RING2
2
‧ Put under CPU(T8 HW shutdown) (IPhone 2

PAGE27 PAGE86
Only)
GPIO74

KBC GPIO73 ‧
NPCE985P ‧ 2N7002
SMBD_THERM_NV I2CS_SCL
VGA
SMBC_THERM_NV I2CS_SDA

GPIO4
N14M-GE
GPIO94 GPIO56
N14P-GV2
FAN_TACH1
FAN1_DAC_1

3 TACH 3

FAN
5V VIN

Line1_L

VSET VOUT Line1_R Analog

VIN

www.vinafix.vn MIC
MIC1_L

FAN CONTROL MIC1_R

APL5606AKI
PAGE28

4 4
UM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size
Thermal/Audio Block Diagram
Document Number Rev
Custom
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 102 of 104
A B C D E
 5 4 3 2 1

Change notes -

DATE VERSON DATE Page Modify List OWNER

X01 2/26 17 XDP_DBRESET# 10K to 3.3V EE

D 2/26 17 PCH_Wake# to 1K and DY R1705 EE D

C C

B B

UM
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 103 of 104

5 4 3 2 1
 5 4 3 2 1
VERSION DATA PAGE Change Iteam

D D

C C

B B

UM
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
A3
Latitude300 Haswell X00
Date: Friday, March 15, 2013 Sheet 104 of 104