5 4 3 2 1

D D

Round Rock 13.3" Schematics Document

Haswell ULT

C C

2013-06-28
REV : SSI
DY : None Installed
B
XDP: For CPU XDP Debug Port installed B

PCH_XDP: For PCH XDP Debug Port installed

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 1 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

CHARGER
Project code : 91.4OA01.001 BQ24715 44

Round Rock 13.3" Block Diagram PCB P/N

Revision
: 13229
: X00
INPUTS
AD+
BT+
OUTPUTS
DCBATOUT

SYSTEM DC/DC
TPS51275 45
INPUTS OUTPUTS
3D3V_AUX_S5
3D3V_S5
DCBATOUT 5V_S5
DDR3L Channel A DDR3L Slot A
D D
1600MHz 12 CPU DC/DC
eDP 13.3" Panel eDP (Singal Channel)
52 TPS51622 46~47
Intel CPU DDR3L Channel B DDR3L Slot B INPUTS OUTPUTS
Haswell ULT 1600MHz 13 DCBATOUT VCC_CORE

Touch Panel USB2.0 SYSTEM DC/DC

52 15W
TPS51363 48

SATA GEN3 (3)

INPUTS OUTPUTS
NGFF DCBATOUT 1D05V_M
Camera 52 USB2.0
Micro SIM
WWAN
Internal Digital MIC 60 SYSTEM DC/DC
USB2.0 (4) TPS51363 & APL5338 49
Lynx Point-LP 59
10/100/1000 Lan INPUTS OUTPUTS
8 USB 2.0/1.1 ports
RJ45 LAN INTEL PCIE GEN2 1D35V_S3
4 USB 3.0 ports DCBATOUT 0D675V_S0
31 WGI218V 94 DDR_VREF_S3
High Definition Audio PCIE (2) , (5) NGFF
Load Switches 36
DDI
4 SATA ports 802.11a/b/g/n
HDMI 54 INPUTS OUTPUTS
8 PCIE ports BT V4.0 combo 5V_S5 5V_S0
USB2.0 (3)
LPC I/F 58 3D3V_S5 3D3V_S0
3D3V_S5_PCH
mini DP 55 DDI ACPI 4.0a 3D3V_M
3D3V_LAN
1D05V_MODPHY
HDD 2.5" 1D05V_M 1D05V_S0
SATA GEN3 7 mm mSATA
C C

56 PCB LAYER(FR4-6 Layer)

L1:Top L6:Bottom
L2:PWR/GND
L3:Signal
SM Bus
Free Fall Sensor L4:Signal
L5:PWR/GND
USB Port : 1 USB3.0 (0) ST LNG3DM 67
USB3.0 / PowerShare
USB2.0 (0)
USB PowerShare USB2.0 (0)
34 SLG55594AVTR 35

Debug Port: Port 2

USB2.0 (1) USB3.0 (1)
USB 3.0 34

TPM LPC BUS

AT97SC3204 88

LPC debug port LPC BUS

B 65 B

Card Reader Connector

PCIE (2) OZ777FJ2LN SD/SDHC/SDXC/SD SDIO UHS2
32 (SD4.0)
33
4,5,6,7,8,9,10,15,16
17,18,19,20,21,22,23
EC
25
MEC 507524
BC
PS2 BC
Audio Codec
HDA Universal Jack
ALC3234
27
SPI

Thermal & Fan Touch Pad KBC SIO Expander

Int KB
26 62
ECE1117 62 ECE 1099 99 2CH Speaker
( 2W, 4ohm /channel )

Flash ROM
8MB 25

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 2 of 107

5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

(Blanking)

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 3 of 107

www.vinafix.vn
 SSID = 5CPU 4 3 2 1

+V1.05S_VCCST

R401 1 2 62R2J-GP H_PROCHOT#

D
CPU1B 2 OF 19

99 CPU_DETECT# R403 1 2 0R2J-2-GP PROC_DETECT# D61

H_CATERR# PROC_DETECT# MISC
TP402 1 K61 CATERR#
R402 1 2 0R2J-2-GP H_PECI_R N62 J62 XDP_PRDY# 96
24 H_PECI PECI PRDY#
PREQ# K62 XDP_PREQ# 96
PROC_TCK E60 XDP_TCK 96
PROC_TMS E61 XDP_TMS 96
R404 1 2 56R2J-4-GP H_PROCHOT#_R K63 JTAG E59
24,42,44,46 H_PROCHOT# PROCHOT# PROC_TRST# XDP_TRST# 19,96
THERMAL F63
PROC_TDI XDP_TDI 96
PROC_TDO F62 XDP_TDO 96
R405 1 2 10KR2J-3-GP H_CPUPWRGD C61 PROCPWRGD PWR
J60 XDP_BPM0 XDP_BPM0 96
1
EC401 BPM#0 XDP_BPM1
SSI_0625 BPM#1 H60 XDP_BPM1 96
DY SC1KP50V2KX-1GP H61 XDP_BPM2 1
BPM#2 TP401
H62 XDP_BPM3 1 TP403
2

SM_RCOMP_0 BPM#3 XDP_BPM4

C AU60 SM_RCOMP0 BPM#4 K59 1 TP404
SM_RCOMP_1 AV60 DDR3 H63 XDP_BPM5 1
SM_RCOMP1 BPM#5 TP405
SM_RCOMP_2 AU61 K60 XDP_BPM6 1
SM_RCOMP2 BPM#6 TP406
SM_DRAMRST# AV15 J61 XDP_BPM7 1
SM_DRAMRST# BPM#7 TP407
14 DDR_PG_CTRL AV61 SM_PG_CNTL1

HASWELL-3-GP-U
1D05V_M
Design Guideline:
SM_RCOMP keep routing length less than 500 mils. XDP_TMS R406 1 51R2J-2-GP
XDP_TDI R407 1
XDP 2 51R2J-2-GP
R408 1 SM_RCOMP_0 XDP_TDO
XDP 2
2 200R2F-L-GP R409 1 XDP 2 51R2J-2-GP
R410 1 2 120R2F-GP SM_RCOMP_1
R411 1 2 100R2F-L1-GP-U SM_RCOMP_2
XDP_TCK R412 1 2 51R2J-2-GP
XDP_TRST# R413 1 DY 2 51R2J-2-GP

B
XDP_BPM0R414 1 DY 2 0R2J-2-GP XDP_BPM1

Layout Note: Colse to DIMM

1D35V_S3
1

R415
470R2J-2-GP
<Core Design>
2

SM_DRAMRST# R416 1 2 0R2J-2-GP DDR3_DRAMRST#_1 12 Wistron Corporation

A R417 1 2 0R2J-2-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR3_DRAMRST#_2 13 Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (THERMAL/CLOCK/PM )
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 4 of 107

www.vinafix.vn
 5 4 3 2 1

SSID = CPU

D D

CPU1C 3 OF 19 CPU1D 4 OF 19

12 M_A_DQ[63:0] M_A_DQ0 AH63 AU37 13 M_B_DQ[63:0]

M_A_DQ1 SA_DQ0 SA_CLK#0 M_A_DIM0_CLK_DDR#0 12 M_B_DQ0
AH62 AV37 AY31 AM38
M_A_DQ2 SA_DQ1 SA_CLK0 M_A_DIM0_CLK_DDR0 12 M_B_DQ1 SB_DQ0 SB_CK#0 M_B_DIM0_CLK_DDR#0 13
AK63 AW36 AW31 AN38
M_A_DQ3 SA_DQ2 SA_CLK#1 M_A_DIM0_CLK_DDR#1 12 M_B_DQ2 SB_DQ1 SB_CK0 M_B_DIM0_CLK_DDR0 13
AK62 AY36 AY29 AK38
M_A_DQ4 SA_DQ3 SA_CLK1 M_A_DIM0_CLK_DDR1 12 M_B_DQ3 SB_DQ2 SB_CK#1 M_B_DIM0_CLK_DDR#1 13
AH61 AW29 AL38
M_A_DQ5 SA_DQ4 M_B_DQ4 SB_DQ3 SB_CK1 M_B_DIM0_CLK_DDR1 13
AH60 AU43 AV31
M_A_DQ6 SA_DQ5 SA_CKE0 M_A_DIM0_CKE0 12 M_B_DQ5 SB_DQ4
AK61 AW43 AU31 AY49
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 12 M_B_DQ6 SB_DQ5 SB_CKE0 M_B_DIM0_CKE0 13
AK60 AY42 AV29 AU50
M_A_DQ8 SA_DQ7 SA_CKE2 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 13
AM63 AY43 AU29 AW49
M_A_DQ9 SA_DQ8 SA_CKE3 M_B_DQ8 SB_DQ7 SB_CKE2
AM62 AY27 AV50
M_A_DQ10 SA_DQ9 M_B_DQ9 SB_DQ8 SB_CKE3
AP63 AP33 AW27
M_A_DQ11 SA_DQ10 SA_CS#0 M_A_DIM0_CS#0 12 M_B_DQ10 SB_DQ9
AP62 AR32 AY25 AM32
M_A_DQ12 SA_DQ11 SA_CS#1 M_A_DIM0_CS#1 12 M_B_DQ11 SB_DQ10 SB_CS#0 M_B_DIM0_CS#0 13
AM61 AW25 AK32
M_A_DQ13 SA_DQ12 SB_DQ11 SB_CS#1 M_B_DIM0_CS#1 13
AM60 AP32 TP_M_A_DIM0_ODT0 1 TP501
M_B_DQ12 AV27
M_A_DQ14 SA_DQ13 SA_ODT0 M_B_DQ13 SB_DQ12
AP61 AU27 AL32 TP_M_B_DIM0_ODT0 1 TP502
M_A_DQ15 SA_DQ14 M_B_DQ14 SB_DQ13 SB_ODT0
AP60 AY34 M_A_RAS# 12 AV25
M_A_DQ16 SA_DQ15 SA_RAS# M_B_DQ15 SB_DQ14
AP58 AW34 M_A_WE# 12 AU25 AM35 M_B_RAS# 13
M_A_DQ17 SA_DQ16 SA_WE# M_B_DQ16 SB_DQ15 SB_RAS#
AR58 AU34 M_A_CAS# 12 AM29 AK35 M_B_WE# 13
M_A_DQ18 SA_DQ17 SA_CAS# M_B_DQ17 SB_DQ16 SB_WE#
AM57 AK29 AM33 M_B_CAS# 13
M_A_DQ19 SA_DQ18 M_B_DQ18 SB_DQ17 SB_CAS#
AK57 AU35 M_A_BS0 12 AL28
M_A_DQ20 SA_DQ19 SA_BA0 M_B_DQ19 SB_DQ18
AL58 AV35 M_A_BS1 12 AK28 AL35 M_B_BS0 13
M_A_DQ21 SA_DQ20 SA_BA1 M_B_DQ20 SB_DQ19 SB_BA0
AK58 AY41 M_A_BS2 12 AR29 AM36 M_B_BS1 13
M_A_DQ22 SA_DQ21 SA_BA2 M_B_DQ21 SB_DQ20 SB_BA1
AR57 M_A_A[15:0] 12 AN29 AU49 M_B_BS2 13
M_A_DQ23 SA_DQ22 M_A_A0 M_B_DQ22 SB_DQ21 SB_BA2
AN57 AU36 AR28
M_A_DQ24 SA_DQ23 SA_MA0 M_A_A1 M_B_DQ23 SB_DQ22 M_B_A0 M_B_A[15:0] 13
AP55 AY37 AP28 AP40
M_A_DQ25 SA_DQ24 SA_MA1 M_A_A2 M_B_DQ24 SB_DQ23 SB_MA0 M_B_A1
AR55 AR38 AN26 AR40
M_A_DQ26 SA_DQ25 SA_MA2 M_A_A3 M_B_DQ25 SB_DQ24 SB_MA1 M_B_A2
AM54 AP36 AR26 AP42
M_A_DQ27 SA_DQ26 SA_MA3 M_A_A4 M_B_DQ26 SB_DQ25 SB_MA2 M_B_A3
C AK54 AU39 AR25 AR42 C
M_A_DQ28 SA_DQ27 SA_MA4 M_A_A5 M_B_DQ27 SB_DQ26 SB_MA3 M_B_A4
AL55 AR36 AP25 AR45
M_A_DQ29 SA_DQ28 SA_MA5 M_A_A6 M_B_DQ28 SB_DQ27 SB_MA4 M_B_A5
AK55 AV40 AK26 AP45
M_A_DQ30 SA_DQ29 SA_MA6 M_A_A7 M_B_DQ29 SB_DQ28 SB_MA5 M_B_A6
AR54 AW39 AM26 AW46
M_A_DQ31 SA_DQ30 SA_MA7 M_A_A8 M_B_DQ30 SB_DQ29 SB_MA6 M_B_A7
AN54 AY39 AK25 AY46
M_A_DQ32 SA_DQ31 SA_MA8 M_A_A9 M_B_DQ31 SB_DQ30 SB_MA7 M_B_A8
AY58 AU40 AL25 AY47
M_A_DQ33 SA_DQ32 SA_MA9 M_A_A10 M_B_DQ32 SB_DQ31 DDR CHANNEL B SB_MA8 M_B_A9
AW58 AP35 AY23 AU46
M_A_DQ34 SA_DQ33 SA_MA10 M_A_A11 M_B_DQ33 SB_DQ32 SB_MA9 M_B_A10
AY56 AW41 AW23 AK36
M_A_DQ35 SA_DQ34 SA_MA11 M_A_A12 M_B_DQ34 SB_DQ33 SB_MA10 M_B_A11
AW56 AU41 AY21 AV47
M_A_DQ36 SA_DQ35 DDR CHANNEL A SA_MA12 M_A_A13 M_B_DQ35 SB_DQ34 SB_MA11 M_B_A12
AV58 AR35 AW21 AU47
M_A_DQ37 SA_DQ36 SA_MA13 M_A_A14 M_B_DQ36 SB_DQ35 SB_MA12 M_B_A13
AU58 AV42 AV23 AK33
M_A_DQ38 SA_DQ37 SA_MA14 M_A_A15 M_B_DQ37 SB_DQ36 SB_MA13 M_B_A14
AV56 AU42 AU23 AR46
M_A_DQ39 SA_DQ38 SA_MA15 M_B_DQ38 SB_DQ37 SB_MA14 M_B_A15
AU56 M_A_DQS#[7:0] 12 AV21 AP46
M_A_DQ40 SA_DQ39 M_A_DQS#0 M_B_DQ39 SB_DQ38 SB_MA15
AY54 AJ61 AU21 M_B_DQS#[7:0] 13
M_A_DQ41 SA_DQ40 SA_DQSN0 M_A_DQS#1 M_B_DQ40 SB_DQ39 M_B_DQS#0
AW54 AN62 AY19 AW30
M_A_DQ42 SA_DQ41 SA_DQSN1 M_A_DQS#2 M_B_DQ41 SB_DQ40 SB_DQSN0 M_B_DQS#1
AY52 AM58 AW19 AV26
M_A_DQ43 SA_DQ42 SA_DQSN2 M_A_DQS#3 M_B_DQ42 SB_DQ41 SB_DQSN1 M_B_DQS#2
AW52 AM55 AY17 AN28
M_A_DQ44 SA_DQ43 SA_DQSN3 M_A_DQS#4 M_B_DQ43 SB_DQ42 SB_DQSN2 M_B_DQS#3
AV54 AV57 AW17 AN25
M_A_DQ45 SA_DQ44 SA_DQSN4 M_A_DQS#5 M_B_DQ44 SB_DQ43 SB_DQSN3 M_B_DQS#4
AU54 AV53 AV19 AW22
M_A_DQ46 SA_DQ45 SA_DQSN5 M_A_DQS#6 M_B_DQ45 SB_DQ44 SB_DQSN4 M_B_DQS#5
AV52 AL43 AU19 AV18
M_A_DQ47 SA_DQ46 SA_DQSN6 M_A_DQS#7 M_B_DQ46 SB_DQ45 SB_DQSN5 M_B_DQS#6
AU52 AL48 AV17 AN21
M_A_DQ48 SA_DQ47 SA_DQSN7 M_B_DQ47 SB_DQ46 SB_DQSN6 M_B_DQS#7
AK40 M_A_DQS[7:0] 12 AU17 AN18
M_A_DQ49 SA_DQ48 M_A_DQS0 M_B_DQ48 SB_DQ47 SB_DQSN7
AK42 AJ62 AR21 M_B_DQS[7:0] 13
M_A_DQ50 SA_DQ49 SA_DQSP0 M_A_DQS1 M_B_DQ49 SB_DQ48 M_B_DQS0
AM43 AN61 AR22 AV30
M_A_DQ51 SA_DQ50 SA_DQSP1 M_A_DQS2 M_B_DQ50 SB_DQ49 SB_DQSP0 M_B_DQS1
AM45 AN58 AL21 AW26
M_A_DQ52 SA_DQ51 SA_DQSP2 M_A_DQS3 M_B_DQ51 SB_DQ50 SB_DQSP1 M_B_DQS2
AK45 AN55 AM22 AM28
M_A_DQ53 SA_DQ52 SA_DQSP3 M_A_DQS4 M_B_DQ52 SB_DQ51 SB_DQSP2 M_B_DQS3
AK43 AW57 AN22 AM25
M_A_DQ54 SA_DQ53 SA_DQSP4 M_A_DQS5 M_B_DQ53 SB_DQ52 SB_DQSP3 M_B_DQS4
AM40 AW53 AP21 AV22
M_A_DQ55 SA_DQ54 SA_DQSP5 M_A_DQS6 M_B_DQ54 SB_DQ53 SB_DQSP4 M_B_DQS5
AM42 AL42 AK21 AW18
M_A_DQ56 SA_DQ55 SA_DQSP6 M_A_DQS7 M_B_DQ55 SB_DQ54 SB_DQSP5 M_B_DQS6
AM46 AL49 AK22 AM21
M_A_DQ57 SA_DQ56 SA_DQSP7 M_B_DQ56 SB_DQ55 SB_DQSP6 M_B_DQS7
AK46 AN20 AM18
M_A_DQ58 SA_DQ57 M_B_DQ57 SB_DQ56 SB_DQSP7
AM49 AP49 +V_SM_VREF_CNT 14 AR20
M_A_DQ59 SA_DQ58 SM_VREF_CA M_B_DQ58 SB_DQ57
AK49 AR51 DDR_WR_VREF01 14 AK18
M_A_DQ60 SA_DQ59 SM_VREF_DQ0 M_B_DQ59 SB_DQ58
AM48 AP51 DDR_WR_VREF02 14 AL18
M_A_DQ61 SA_DQ60 SM_VREF_DQ1 M_B_DQ60 SB_DQ59
AK48 AK20
M_A_DQ62 SA_DQ61 M_B_DQ61 SB_DQ60
AM51 AM20
M_A_DQ63 SA_DQ62 M_B_DQ62 SB_DQ61
AK51 AR18
SA_DQ63 M_B_DQ63 SB_DQ62
AP18
SB_DQ63

B B

HASWELL-3-GP-U HASWELL-3-GP-U

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (DDR)
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 5 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = CPU
EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKE
0:Lane Reversed
CFG0
1:(Default) Normal Operation; No stall

CFG0
1

D D

R601
DY 1KR2J-1-GP
2

PCH/PCH LESS MODE SELECTION

CPU1S 19 OF 19
0:Lane Reversed
CFG1
1:(Default) Normal Operation

CFG1 96 CFG[19:0] CFG0 AC60 CFG0 RSVD_TP#AV63 AV63

CFG1 AC62 AU63
CFG1 RSVD_TP#AU63
1

CFG2 AC63
CFG3 CFG2
AA63 CFG3
R602
DY 1KR2J-1-GP CFG4 AA60 C63
CFG5 CFG4 RSVD_TP#C63
Y62 CFG5 RSVD_TP#C62 C62
CFG6 Y61 RSVD#B43 B43 TP_EDP_SPARE 1
TP601
2

CFG7 CFG6 EDP_SPARE

Y60 CFG7
CFG8 V62 A51
CFG9 CFG8 RSVD_TP#A51
V61 CFG9 RSVD_TP#B51 B51
X01-20130204 CFG10 V60
C CFG11 CFG10 C
U60 CFG11 RSVD_TP#L60 L60
CFG12 T63
CFG13 CFG12
T62 CFG13 RSVD#N60 N60
CFG14 T61 RESERVED
CFG15 CFG14
T60 CFG15 RSVD#W23 W23
RSVD#Y22 Y22
CFG16 AA62 PROC_OPI_RCOMP OPI_COMP1 AY15 OPI_COMP1 R603 1 2 49D9R2F-GP
CFG17 CFG16
AA61 CFG17
CFG18 U63 AV62
CFG19 CFG18 RSVD#AV62
U62 CFG19 RSVD#D58 D58

CFG_RCOMP V63 P22

CFG_RCOMP VSS
VSS N21

1
A5 RSVD#A5
R604 RSVD#P20 P20 TP_HVM_CLK# 1
HVM_CLK# TP602
49D9R2F-GP E1 RSVD#E1 RSVD#R20 R20 TP_HVM_CLK 1
TP9 HVM_CLK_P TP603
D1 TP10 RSVD#D1
J20 TP11 RSVD#J20

2
H18 TP12 RSVD#H18
TD_IREF B12 TD_IREF

1
Display Port Presence Strap HASWELL-3-GP-U
R605
1 : Disabled; No Physical Display Port 8K2R2F-1-GP
attached to Embedded Display Port
CFG4

2
0 : Enabled; An external Display Port device is
B
connected to the Embedded Display Port B

CFG4
1

R606
1KR2J-1-GP
2

ALLOW THE USE OF NOA ON LOCKED UNITS NO SVID PROTOCOL CAPABLE VR CONNECTED SAFE MODE BOOT
1: Enable(Default): Noa will be disable in 1: VRS support SVID protocol are present 1: POWER FEATURES ACTIVATED DURING
locked units and enable in un-locked units RESET
CFG8 CFG9 0:No VR support SVID is present CFG10
0: Enable Noa will be available pegardless of The chip will not generate(OR Respond to) 0: POWER FEATURES (ESPECIALLY CLOCK
the locking of the unit SVID activity GATINE ARE NOT ACTIVATED

CFG8 CFG9 CFG10

1

A R607
DY 1KR2J-1-GP R608
DY 1KR2J-1-GP R609
DY 1KR2J-1-GP <Core Design> A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RESERVED)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 6 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = CPU

VCC_CORE
CPU1L 12 OF 19
D D

L59 C36
1D35V_S3 RSVD#L59 VCC
J58 C40
RSVD#J58 VCC
C44
VCC
AH26 C48
VDDQ VCC
AJ31 C52
VDDQ VCC
AJ33 C56
VDDQ VCC
AJ37 E23
VDDQ VCC
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29
AY35 VDDQ VCC E31
AY40 VDDQ VCC E33
AY44 VDDQ VCC E35
AY50 VDDQ VCC E37
VCC E39
VCC_CORE F59 VCCIN VCC E41
VCC_CORE
Layout Note: R702 should be placed within 2 N58
AC58
RSVD#N58 VCC E43
E45
R702 1 RSVD#AC58 VCC
inches (50.8 mm) of the processor. 2 100R2F-L1-GP-U E47
VCC
46 VCC_SENSE E63 VCC_SENSE VCC E49
AB23 RSVD#AB23 VCC E51
1 VCCIO_OUT A59 E53
TP702 VCCIO_OUT VCC
VCCIOA_OUT E20 VCCIOA_OUT VCC E55
AD23 RSVD#AD23 VCC E57
AA23 RSVD#AA23 VCC F24
AE59 RSVD#AE59 VCC F28
VCC F32
C R703 1 2 43R2J-GP H_CPU_SVIDALRT# L62 F36 C
46 VR_SVID_ALERT# VIDALERT# VCC
46 H_CPU_SVIDCLK N63 VIDSCLK VCC F40
R701 1 2 0R2J-2-GP H_CPU_SVIDDAT_R L63 F44
46 H_CPU_SVIDDAT VIDSOUT VCC
R704 1 2 0R2J-2-GP H_VCCST_PW RGD_R B59 F48
36,96 H_VCCST_PW RGD R705 0R2J-2-GP H_VR_ENABLE_R VCCST_PWRGD VCC
36,46 H_VR_ENABLE 1 2 F60 VR_EN VCC F52
R706 1 2 0R2J-2-GP H_VR_READY_R C59 F56
36 H_VR_READY VR_READY HSW ULT POWER VCC
VCC G23
D63 G25
VSS VCC
96 PW R_DEBUG H59 PWR_DEBUG PWR_DEBUG# VCC G27
P62 VSS VCC G29
+V1.05S_VCCST 1 RSVD_TP_P60 P60 G31
close to CPU TP703
TP704 1 RSVD_TP_P61 P61 RSVD_TP#P60
RSVD_TP#P61
VCC
VCC G33
1 RSVD_TP_N59 N59 G35
TP705 RSVD_TP#N59 VCC
R707 1 2 110R2F-GP H_CPU_SVIDDAT_R TP701 1 RSVD_TP_N61 N61 G37
RSVD_T59 RSVD_TP#N61 VCC
TP706 1 T59 RSVD#T59 G39
VSS VCC
R708 1 2 75R2F-2-GP VR_SVID_ALERT# TP707 1 RSVD_AD60 AD60
RSVD#AD60 G41
RSVD_AD59 AD59 VSS VCC
TP708 1 RSVD#AD59 G43
RSVD_AA59 AA59 VSS VCC
TP709 1 RSVD#AA59 G45
RSVD_AE60 AE60 VSS VCC
TP710 1 RSVD#AE60 G47
RSVD_AC59 AC59 VSS VCC
TP711 1 RSVD#AC59 G49
RSVD_AG58 AG58 VSS VCC
TP712 1 VSS RSVD#AG58 VCC
G51
1D05V_S0 +V1.05S_VCCST 1 RSVD_U59 U59 G53
+V1.05S_VCCST TP713 VSS RSVD#U59 VCC
1 RSVD_V59 V59 G55
TP714 VSS RSVD#V59 VCC
G57
R709 1 VCC
2 0R3J-0-U-GP AC22 H23
1

VCCST VCC
AE22 J23
VCCST VCC
1

VCC_CORE
C702
SC22U6D3V3MX-1-GP

C701
SC1U6D3V2KX-GP

R710 AE23 K23

150R2J-L1-GP-U VCCST VCC
DY DY VCC
K57
AB57 L22
2

B VCC VCC B
AD57 M23
2

PW R_DEBUG VCC VCC

AG57 M57
VCC VCC
C24 P57
VCC VCC
1

C28 U57
R711 VCC VCC
C32 W57
VCC VCC
DY 10KR2J-3-GP
HASWELL-3-GP-U
2

H_VCCST_PW RGD_R
1

EC701 SSI_0625
DY SC1KP50V2KX-1GP
2

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)
Size Document Number Rev
Custom X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 7 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = CPU

D D

CPU1A 1 OF 19

54 HDMI_DATA2# C54 DDI1_TXN0 EDP_TXN0 C45 eDP_TXN0_CPU 52

54 HDMI_DATA2 C55 DDI1_TXP0 EDP_TXP0 B46 eDP_TXP0_CPU 52 eDP
54 HDMI_DATA1# B58 DDI1_TXN1 EDP_TXN1 A47
54 HDMI_DATA1 C58 DDI1_TXP1 EDP_TXP1 B47
HDMI 54 HDMI_DATA0# B55 DDI1_TXN2
54 HDMI_DATA0 A55 DDI1_TXP2 EDP_TXN2 C47
54 HDMI_CLK# A57 DDI1_TXN3 EDP_TXP2 C46
54 HDMI_CLK B57 DDI1_TXP3 EDP_TXN3 A49
DDI EDP B49
C
EDP_TXP3
55 DDPC_DATA0# C51 DDI2_TXN0
C
55 DDPC_DATA0 C50 DDI2_TXP0 EDP_AUXN A45 eDP_AUXN_CPU 52
55 DDPC_DATA1# C53 DDI2_TXN1 EDP_AUXP B45 eDP_AUXP_CPU 52
55 DDPC_DATA1 B54 DDI2_TXP1
DP/HDMI 55 DDPC_DATA2# C49 D20 EDP_RCOMP R801 1 2 24D9R2F-L-GP VCCIOA_OUT
DDI2_TXN2 EDP_RCOMP DP_UTIL
55 DDPC_DATA2 B50 DDI2_TXP2 EDP_DISP_UTIL A43 DP_UTIL 52
55 DDPC_DATA3# A53 DDI2_TXN3
55 DDPC_DATA3 B53 DDI2_TXP3

HASWELL-3-GP-U

B DDI HDMI Display Port B

DDI_TXN0 HDMI_DATA2_N DP_LANE0_N

DDI_TXP0 HDMI_DATA2_P DP_LANE0_P
DDI_TXN1 HDMI_DATA1_N DP_LANE1_N
DDI_TXP1 HDMI_DATA1_P DP_LANE1_P
DDI_TXN2 HDMI_DATA0_N DP_LANE2_N
DDI_TXP2 HDMI_DATA0_P DP_LANE2_P
DDI_TXN3 HDMI_CK_N DP_LANE3_N
DDI_TXP3 HDMI_CK_P DP_LANE3_P

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP)
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 8 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = CPU

CPU1P 16 OF 19

VSS H17
D D33 H57 D
VSS VSS
D34 VSS VSS J10
D35 VSS VSS J22
D37 VSS VSS J59
D38 VSS VSS J63
D39 VSS VSS K1
D41 VSS VSS K12
D42 VSS VSS L13
D43 VSS VSS L15
D45 VSS VSS L17
D46 VSS VSS L18
D47 VSS VSS L20
D49 VSS VSS L58
D5 VSS VSS L61
D50 VSS VSS L7
D51 VSS VSS M22
D53 VSS VSS N10
D54 VSS VSS N3
D55 VSS VSS P59
D57 VSS VSS P63
C D59 R10 C
VSS VSS
D62 VSS VSS R22
D8 VSS VSS R8
E11 VSS VSS T1
E17 VSS VSS T58
F20 VSS VSS U20
F26 VSS VSS U22
F30 VSS VSS U61
F34 VSS VSS U9
F38 VSS VSS V10
F42 VSS VSS V3
F46 VSS VSS V7
F50 VSS VSS W20
F54 VSS VSS W22
F58 VSS VSS Y10
F61 VSS VSS Y59
G18 VSS VSS Y63
G22 VSS
G3 VSS
G5 VSS VSS V58
B G6 VSS VSS AH46 B
G8 VSS VSS V23
H13 VSS VSS_SENSE E62 VSS_SENSE 46
VSS AH16
1

HASWELL-3-GP-U R901 Layout Note: R901 should be placed within 2

100R2F-L1-GP-U
inches (50.8 mm) of the processor.
Net Rule: VCC_SENSE and VSS_SENSE differential signals
2

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 9 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

1D35V_S3

C1001
SC10U6D3V3MX-GP

C1002
SC10U6D3V3MX-GP

C1003
SC10U6D3V3MX-GP

C1004
SC10U6D3V3MX-GP

C1005
SC10U6D3V3MX-GP

C1006
SC10U6D3V3MX-GP

C1007
SC2D2U6D3V3KX-GP

C1008
SC2D2U6D3V3KX-GP

C1009
SC2D2U6D3V3KX-GP

C1010
SC2D2U6D3V3KX-GP
D D
1

1
2

2
C C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP1)

Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 10 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

CPU (Power CAP2)

Size Document Number Rev
A X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 11 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = MEMORY

DM1
DQ0 M_A_DQ13
5 M_A_A[15:0] M_A_A0 98 NP1
M_A_A1 A0 NP1
DQ1 M_A_DQ8 97
A1 NP2
NP2
M_A_A2 96
M_A_A3 A2
DQ2 M_A_DQ14 95
A3 RAS#
110 M_A_RAS# 5
D M_A_A4 92 113 D
A4 WE# M_A_WE# 5
DQ3 M_A_DQ10 M_A_A5 91 115 M_A_CAS# 5
M_A_A6 A5 CAS#
DQS1 90
A6 Note:
DQ4 M_A_DQ9 M_A_A7 86 114
A7 CS0# M_A_DIM0_CS#0 5
M_A_A8 89 121 M_A_DIM0_CS#1 5
If SA0 DIM0 = 0, SA1_DIM0 = 0
M_A_A9 A8 CS1#
DQ5 M_A_DQ12 85
A9 SO-DIMMA SPD Address is 0xA0
M_A_A10 107 73
A10/AP CKE0 M_A_DIM0_CKE0 5
DQ6 M_A_DQ15 M_A_A11 84
A11 CKE1
74 M_A_DIM0_CKE1 5 SO-DIMMA TS Address is 0x30
M_A_A12 83
M_A_A13 A12
DQ7 M_A_DQ11 119
A13 CK0
101 M_A_DIM0_CLK_DDR0 5
M_A_A14 80
A14 CK0#
103 M_A_DIM0_CLK_DDR#0 5 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A15
Layout Note: 78
79
A15
102 M_A_DIM0_CLK_DDR1 5
SO-DIMMA SPD Address is 0xA2
5 M_A_BS2 A16/BA2 CK1
Place these caps close to VREF_CA DQ8 M_A_DQ29 CK1#
104 M_A_DIM0_CLK_DDR#1 5 SO-DIMMA TS Address is 0x32
109
M_VREF_CA_DIMMA 5 M_A_BS0 BA0
DQ9 M_A_DQ28 5 M_A_BS1
108
BA1 DM0
11
5 M_A_DQ[63:0] 28
M_A_DQ13 DM1
DQ10 M_A_DQ30 5
DQ0 DM2
46
M_A_DQ8 7 63
M_A_DQ14 DQ1 DM3
DQ11 M_A_DQ31 15
DQ2 DM4
136
DQS3 M_A_DQ10 17 153
DQ3 DM5
C1201
SCD1U10V2KX-5GP

EC1
SCD1U10V2KX-5GP

C1202
SCD1U10V2KX-5GP

DQ12 M_A_DQ25 M_A_DQ9 4 170

1

M_A_DQ12 DQ4 DM6

6 187
M_A_DQ15 DQ5 DM7
DY DQ13 M_A_DQ24 16
DQ6
M_A_DQ11 18 200 PCH_SMBDATA 13,18,67,96
2

M_A_DQ29 DQ7 SDA

DQ14 M_A_DQ27 21
DQ8 SCL
202 PCH_SMBCLK 13,18,67,96
M_A_DQ28 23
M_A_DQ30 DQ9 3D3V_S0
DQ15 M_A_DQ26 33
DQ10 EVENT#
198
M_A_DQ31 35
M_A_DQ25 DQ11
22 199
M_A_DQ24 DQ12 VDDSPD
24
M_A_DQ27 DQ13
DQ16 M_A_DQ44 34 197

1
M_A_DQ26 DQ14 SA0 C1203
36 201
Layout Note: DQ17 M_A_DQ41 M_A_DQ44 39
DQ15 SA1 SCD1U10V2KX-5GP
M_A_DQ41 DQ16
Place these caps close to VREF_DQ 41 77

2
M_A_DQ43 DQ17 NC#1
M_VREF_DQ_DIMMA
DQ18 M_A_DQ43 51
DQ18 NC#2
122
1D35V_S3
M_A_DQ47 53 125
M_A_DQ45 DQ19 NC#/TEST
DQ19 M_A_DQ47 40
DQ20
DQS5 M_A_DQ40 42 75
M_A_DQ42 DQ21 VDD1
DQ20 M_A_DQ45 50
DQ22 VDD2
76
M_A_DQ46 52 81
M_A_DQ51 DQ23 VDD3
C DQ21 M_A_DQ40 57
DQ24 VDD4
82 C
C1204
SCD1U10V2KX-5GP

C1205
SC2D2U10V3KX-1GP

C1206
SCD1U10V2KX-5GP

M_A_DQ50 59 87
1

M_A_DQ49 DQ25 VDD5

DQ22 M_A_DQ42 67
DQ26 VDD6
88
z DQ23 M_A_DQ46
M_A_DQ48
M_A_DQ52
69
56
DQ27 VDD7
93
94
2

M_A_DQ53 DQ28 VDD8

58 99
M_A_DQ54 DQ29 VDD9 1D35V_S3
68 100
M_A_DQ55 DQ30 VDD10
70 105
M_A_DQ0 DQ31 VDD11
DQ24 M_A_DQ51 129
DQ32 VDD12
106 DM1 DECOUPLING
M_A_DQ1 131 111
M_A_DQ2 DQ33 VDD13
DQ25 M_A_DQ50 141
DQ34 VDD14
112
M_A_DQ6 143 117
DQ35 VDD15

C1207
SC10U6D3V3MX-GP

C1208
SC10U6D3V3MX-GP

C1209
SC10U6D3V3MX-GP

C1210
SC10U6D3V3MX-GP

C1211
SC10U6D3V3MX-GP

C1212
SC10U6D3V3MX-GP

C1213
SC10U6D3V3MX-GP

C1214
SC10U6D3V3MX-GP
DQ26 M_A_DQ49 M_A_DQ5 130 118

1
M_A_DQ4 DQ36 VDD16
132 123
M_A_DQ3 DQ37 VDD17
DQ27 M_A_DQ48 140
DQ38 VDD18
124 DY DY DY DY
DQS6 M_A_DQ7 142

2
M_A_DQ21 DQ39
DQ28 M_A_DQ52 147
DQ40 VSS
2
M_A_DQ20 149 3
M_A_DQ17 DQ41 VSS
DQ29 M_A_DQ53 157
DQ42 VSS
8
M_A_DQ16 159 9
M_A_DQ18 DQ43 VSS
0D675V_S0
DQ30 M_A_DQ54 146
DQ44 VSS
13
M_A_DQ19 148 14
M_A_DQ22 DQ45 VSS
Place these caps DQ31 M_A_DQ55 158
DQ46 VSS
19
M_A_DQ23 160 20
close to VTT1 and VTT2. DQ47 VSS

C1215
SCD1U10V2KX-5GP

C1216
SCD1U10V2KX-5GP
M_A_DQ36 163 25 Layout Note:

1
M_A_DQ33 DQ48 VSS
165 26
M_A_DQ34 DQ49 VSS Place these Caps near DM1.
DQ32 M_A_DQ0 175
DQ50 VSS
31
C1217
SC1U6D3V2KX-GP

C1218
SC1U6D3V2KX-GP

C1219
SC1U6D3V2KX-GP

M_A_DQ38 177 32

2
1

M_A_DQ37 DQ51 VSS

DQ33 M_A_DQ1 164
DQ52 VSS
37
M_A_DQ32
DY M_A_DQ35
166
DQ53 VSS
38
DQ34 M_A_DQ2 174 43
2

M_A_DQ39 DQ54 VSS

176 44
M_A_DQ62 DQ55 VSS
DQ35 M_A_DQ6 181
DQ56 VSS
48
DQS0 M_A_DQ58 183 49
M_A_DQ60 DQ57 VSS
DQ36 M_A_DQ5 191
DQ58 VSS
54
M_A_DQ61 193 55
M_A_DQ63 DQ59 VSS
DQ37 M_A_DQ4 180
DQ60 VSS
60
M_A_DQ59 182 61
M_A_DQ56 DQ61 VSS
DQ38 M_A_DQ3 192
DQ62 VSS
65
M_A_DQ57 194 66
DQ63 VSS
DQ39 M_A_DQ7 VSS
71
B M_A_DQS#1 10 72 B
M_A_DQS#3 DQS0# VSS
27 127
M_A_DQS#5 DQS1# VSS
45 128
M_A_DQS#6 DQS2# VSS
DQ40 M_A_DQ21 62
DQS3# VSS
133
M_A_DQS#0 135 134
M_A_DQS#2 DQS4# VSS
DQ41 M_A_DQ20 152
DQS5# VSS
138
M_A_DQS#4 169 139
5 M_A_DQS#[7:0] DQS6# VSS
DQ42 M_A_DQ17 M_A_DQS#7 186 144
DQS7# VSS
5 M_A_DQS[7:0] 145
M_A_DQS1 VSS
DQ43 M_A_DQ16 12
DQS0 VSS
150
DQS2 M_A_DQS3 29 151
M_A_DQS5 DQS1 VSS
DQ44 M_A_DQ18 47
DQS2 VSS
155
M_A_DQS6 64 156
M_A_DQS0 DQS3 VSS
DQ45 M_A_DQ19 137
DQS4 VSS
161
M_A_DQS2 154 162
M_A_DQS4 DQS5 VSS
DQ46 M_A_DQ22 171
DQS6 VSS
167
M_A_DQS7 188 168
DQS7 VSS
DQ47 M_A_DQ23 VSS
172
116 173
14 M_A_DIM0_ODT0 ODT0 VSS
120 178
14 M_A_DIM0_ODT1 ODT1 VSS
179
VSS
DQ48 M_A_DQ36 M_VREF_CA_DIMMA 126
VREF_CA VSS
184
M_VREF_DQ_DIMMA 1 185
VREF_DQ VSS
DQ49 M_A_DQ33 VSS
189
30 190
4 DDR3_DRAMRST#_1 RESET# VSS
DQ50 M_A_DQ34 VSS
195
C1220
SCD1U10V2KX-5GP

196
1

VSS
DQ51 M_A_DQ38 0D675V_S0 203
VTT1 VSS
205
DQS4 DY 204
VTT2 VSS
206
DQ52 M_A_DQ37 H =4mm
2

DQ53 M_A_DQ32 DDR3-204P-106-GP

62.10017.X31
DQ54 M_A_DQ35 ϮŶĚсϲϮ͘ϭϬϬϮϰ͘'ϭϭ
DQ55 M_A_DQ39

DQ56 M_A_DQ62
A A
DQ57 M_A_DQ58
DQ58 M_A_DQ60
DQ59 M_A_DQ61
DQS7 <Core Design>
DQ60 M_A_DQ63
DQ61 M_A_DQ59
Wistron Corporation
DQ62 M_A_DQ56 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DQ63 M_A_DQ57
Title

DDR3L-SODIMM1
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 12 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = MEMORY

DM2

M_B_A0 98 NP1
M_B_A1 A0 NP1
DQ0 M_B_DQ8 97
A1 NP2
NP2
M_B_A[15:0] 5 M_B_A2 96
M_B_A3 A2
DQ1 M_B_DQ14 95
A3 RAS#
110 M_B_RAS# 5
M_B_A4 92 113 M_B_WE# 5
M_B_A5 A4 WE#
DQ2 M_B_DQ10 91
A5 CAS#
115 M_B_CAS# 5
D M_B_A6 90 D
M_B_A7 A6
DQ3 M_B_DQ11 86
A7 CS0#
114 M_B_DIM0_CS#0 5
DQS1 M_B_A8 89 121
A8 CS1# M_B_DIM0_CS#1 5
DQ4 M_B_DQ12 M_B_A9 85
M_B_A10 A9
107 73 M_B_DIM0_CKE0 5
M_B_A11 A10/AP CKE0
DQ5 M_B_DQ9 84
A11 CKE1
74 M_B_DIM0_CKE1 5
M_B_A12 83
M_B_A13 A12
DQ6 M_B_DQ13 119
A13 CK0
101 M_B_DIM0_CLK_DDR0 5
M_B_A14 80 103 Note:
A14 CK0# M_B_DIM0_CLK_DDR#0 5
DQ7 M_B_DQ15 M_B_A15 78
A15 SO-DIMMB SPD Address is 0xA4
79 102 M_B_DIM0_CLK_DDR1 5
5 M_B_BS2 A16/BA2 CK1
Layout Note: 109
CK1#
104 M_B_DIM0_CLK_DDR#1 5 SO-DIMMB TS Address is 0x34
5 M_B_BS0 BA0
Place these caps close to VREF_CA DQ8 M_B_DQ28 5 M_B_BS1
108
BA1 DM0
11
5 M_B_DQ[63:0] 28
M_VREF_CA_DIMMB M_B_DQ8 DM1
DQ9 M_B_DQ29 5
DQ0 DM2
46 SO-DIMMB is placed farther from
M_B_DQ14 7 63
M_B_DQ10 DQ1 DM3 the Processor than SO-DIMMA
DQ10 M_B_DQ26 15
DQ2 DM4
136
M_B_DQ11 17 153
M_B_DQ12 DQ3 DM5
DQ11 M_B_DQ27 4
DQ4 DM6
170
C1301
SCD1U10V2KX-5GP

EC2
SCD1U10V2KX-5GP

C1302
SCD1U10V2KX-5GP

DQS3 M_B_DQ9 6 187

1

M_B_DQ13 DQ5 DM7

DQ12 M_B_DQ25 16
DQ6
M_B_DQ15 18 200
M_B_DQ28 DQ7 SDA PCH_SMBDATA 12,18,67,96
DQ13 M_B_DQ24 21 202
2

M_B_DQ29 DQ8 SCL PCH_SMBCLK 12,18,67,96

23
M_B_DQ26 DQ9 3D3V_S0
DQ14 M_B_DQ30 33
DQ10 EVENT#
198
M_B_DQ27 35
M_B_DQ25 DQ11
DQ15 M_B_DQ31 22
DQ12 VDDSPD
199
M_B_DQ24 24

1
M_B_DQ30 DQ13 C1303
34 197
M_B_DQ31 DQ14 SA0 SA1_DIM1 R1301 1 SCD1U10V2KX-5GP
36 201 2
M_B_DQ40 DQ15 SA1 10KR2J-3-GP
Layout Note: DQ16 M_A_DQ40 39

2
M_B_DQ41 DQ16
41 77
M_B_DQ46 DQ17 NC#1
Place these caps close to VREF_DQ DQ17 M_A_DQ41 51
DQ18 NC#2
122
M_B_DQ42 53 125 1D35V_S3
M_VREF_DQ_DIMMB M_B_DQ45 DQ19 NC#/TEST
DQ18 M_A_DQ46 40
DQ20
M_B_DQ44 42 75
M_B_DQ47 DQ21 VDD1
DQ19 M_A_DQ42 50
DQ22 VDD2
76
DQS5 M_B_DQ43 52 81
M_B_DQ56 DQ23 VDD3
DQ20 M_A_DQ45 57
DQ24 VDD4
82
C1304
SC2D2U10V3KX-1GP

C1305
SCD1U10V2KX-5GP

C1306
SCD1U10V2KX-5GP

M_B_DQ57 59 87
1

M_B_DQ59 DQ25 VDD5

C DQ21 M_A_DQ44 67
DQ26 VDD6
88 C

z DQ22 M_A_DQ47
M_B_DQ58
M_B_DQ61
69
56
DQ27 VDD7
93
94
2

M_B_DQ60 DQ28 VDD8

58 99
M_B_DQ63 DQ29 VDD9
DQ23 M_A_DQ43 68
DQ30 VDD10
100
M_B_DQ62 70 105
M_B_DQ4 DQ31 VDD11
129 106
M_B_DQ1 DQ32 VDD12
131 111
M_B_DQ3 DQ33 VDD13
DQ24 M_A_DQ56 141
DQ34 VDD14
112
M_B_DQ7 143 117
M_B_DQ5 DQ35 VDD15 1D35V_S3
DQ25 M_A_DQ57 130
DQ36 VDD16
118
M_B_DQ0 132 123 DM2 DECOUPLING
M_B_DQ2 DQ37 VDD17
DQ26 M_A_DQ59 140
DQ38 VDD18
124
M_B_DQ6 142
M_B_DQ21 DQ39
DQ27 M_A_DQ58 147 2

ST330U2VDM-4-GP
DQ40 VSS

C1307
SC10U6D3V3MX-GP

C1308
SC10U6D3V3MX-GP

C1309
SC10U6D3V3MX-GP

C1310
SC10U6D3V3MX-GP

C1311
SC10U6D3V3MX-GP

C1312
SC10U6D3V3MX-GP

C1313
SC10U6D3V3MX-GP

C1314
SC10U6D3V3MX-GP

TC1
DQS7 M_B_DQ20 149 3

1
M_B_DQ22 DQ41 VSS
DQ28 M_A_DQ61 157
DQ42 VSS
8
M_B_DQ23 159 9 DY DY DY DY DY
M_B_DQ16 DQ43 VSS
DQ29 M_A_DQ60 146 13

2
M_B_DQ17 DQ44 VSS
148 14
0D675V_S0 M_B_DQ19 DQ45 VSS
Place these caps DQ30 M_A_DQ63 158
DQ46 VSS
19
M_B_DQ18 160 20
close to VTT1 and VTT2. M_B_DQ36 DQ47 VSS
DQ31 M_A_DQ62 163
DQ48 VSS
25
M_B_DQ33 165 26
M_B_DQ35 DQ49 VSS
175 31
DQ50 VSS
C1315
SC1U6D3V2KX-GP

C1316
SC1U6D3V2KX-GP

C1317
SC1U6D3V2KX-GP

M_B_DQ39 177 32
1

M_B_DQ37 DQ51 VSS

DQ32 M_A_DQ4 164
DQ52 VSS
37

C1318
SCD1U10V2KX-5GP

C1319
SCD1U10V2KX-5GP
DY M_B_DQ32 166 38 Layout Note:

1
M_B_DQ34 DQ53 VSS
DQ33 M_A_DQ1 174 43
2

M_B_DQ38 DQ54 VSS Place these Caps near DM2

176 44
M_B_DQ52 DQ55 VSS
DQ34 M_A_DQ3 181 48

2
M_B_DQ49 DQ56 VSS
183 49
M_B_DQ48 DQ57 VSS
DQ35 M_A_DQ7 191
DQ58 VSS
54
DQS0 M_B_DQ53 193 55
M_B_DQ51 DQ59 VSS
DQ36 M_A_DQ5 180
DQ60 VSS
60
M_B_DQ55 182 61
M_B_DQ54 DQ61 VSS
DQ37 M_A_DQ0 192
DQ62 VSS
65
M_B_DQ50 194 66
DQ63 VSS
DQ38 M_A_DQ2 VSS
71
M_B_DQS#1 10 72
M_B_DQS#3 DQS0# VSS
DQ39 M_A_DQ6 27
DQS1# VSS
127
B M_B_DQS#5 45 128 B
M_B_DQS#7 DQS2# VSS
62 133
M_B_DQS#0 DQS3# VSS
135 134
M_B_DQS#2 DQS4# VSS
DQ40 M_A_DQ21 152
DQS5# VSS
138
M_B_DQS#4 169 139
M_B_DQS#6 DQS6# VSS
DQ41 M_A_DQ20 186
DQS7# VSS
144
145
M_B_DQS1 VSS
DQ42 M_A_DQ22 12
DQS0 VSS
150
M_B_DQS3 29 151
M_B_DQS#[7:0] 5 DQS1 VSS
DQ43 M_A_DQ23 M_B_DQS5 47 155
M_B_DQS7 DQS2 VSS
DQS2 M_B_DQS[7:0] 5 64
DQS3 VSS
156
DQ44 M_A_DQ16 M_B_DQS0 137 161
M_B_DQS2 DQS4 VSS
154 162
M_B_DQS4 DQS5 VSS
DQ45 M_A_DQ17 171
DQS6 VSS
167
M_B_DQS6 188 168
DQS7 VSS
DQ46 M_A_DQ19 VSS
172
116 173
14 M_B_DIM0_ODT0 ODT0 VSS
DQ47 M_A_DQ18 14 M_B_DIM0_ODT1
120
ODT1 VSS
178
179
VSS
M_VREF_CA_DIMMB 126 184
VREF_CA VSS
M_VREF_DQ_DIMMB 1 185
VREF_DQ VSS
DQ48 M_A_DQ36 VSS
189
30 190
4 DDR3_DRAMRST#_2 RESET# VSS
DQ49 M_A_DQ33 VSS
195
C1320
SCD1U10V2KX-5GP

196
1

VSS
DQ50 M_A_DQ35 0D675V_S0 203
VTT1 VSS
205
DY 204
VTT2 H = 4mm VSS
206
DQ51 M_A_DQ39
2

DQS4
DQ52 M_A_DQ37 DDR3-204P-106-GP
62.10017.X31
DQ53 M_A_DQ32 ϮŶĚсϲϮ͘ϭϬϬϮϰ͘'ϭϭ
DQ54 M_A_DQ34
DQ55 M_A_DQ38

DQ56 M_A_DQ52
A A
DQ57 M_A_DQ49
DQ58 M_A_DQ48
DQ59 M_A_DQ53
DQS6 <Core Design>
DQ60 M_A_DQ51
DQ61 M_A_DQ55
Wistron Corporation
DQ62 M_A_DQ54 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DQ63 M_A_DQ50
Title

DDR3L-SODIMM1
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 13 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

95()FLUFXLW09ROWDJH'ULYHU1HWZRUN 0'ULYHQE\3URFHVVRU,PSOHPHQWDWLRQ

SSID = MEMORY

6$B',00B95()'4
'ULYHQE\SURFHVV3,1$5

D
0D675V_VTTREF D
DDR_W R_VREF01 5
1D35V_S3
1

0D675V_VTTREF 1D35V_S3
R1401 5 +V_SM_VREF_CNT

1
0R2J-2-GP

1
R1402 R1404
1K8R2F-GP
62',00
R1403 DY 0R2J-2-GP R1405
2

1K8R2F-GP
DY 0R2J-2-GP

2
R1410

2
DDR_W R_VREF01_R R1406 1 2 2R2F-GP DDR_W R_VREF01_B4 R1407 1 2 0R2J-2-GP M_VREF_DQ_DIMMA M_VREF_CA_DIMMA R1408 1 2 0R2J-2-GP +V_SM_VREF1 R1409 1 2 2R2F-GP +V_SM_VREF1_R 1 2
0R2J-2-GP

1
C1402
1

C1401 R1411 R1412

SCD022U16V2JX-GP 1K8R2F-GP 1K8R2F-GP SCD022U16V2JX-GP

2
2

+V_VREF_PATH3

1
+V_VREF_PATH1
1

R1414
R1413 24D9R2F-L-GP
24D9R2F-L-GP

2
2

1
C C
R1415 R1416
0R2J-2-GP 0R2J-2-GP
DY

2
6%B',00B95()'4
'ULYHQE\SURFHVV3,1$3 0D675V_VTTREF
1D35V_S3
DDR_W R_VREF02 5 1D35V_S3
1
1

R1418
1

1
R1417 DY 0R2J-2-GP

62',00
0R2J-2-GP R1419 R1420
1K8R2F-GP 1K8R2F-GP
DY
2
2

2
DDR_W R_VREF02_R R1421 1 2 2R2F-GP DDR_W R_VREF02_D1 R1422 1 2 0R2J-2-GP M_VREF_DQ_DIMMB M_VREF_CA_DIMMB R1423 1 2 0R2J-2-GP +V_SM_VREF2 R1424 1 DY 2 2R2F-GP +V_SM_VREF2_R
1

1
C1403 C1404
B SCD022U16V2JX-GP R1425 R1426 SCD022U16V2JX-GP B
1K8R2F-GP 1K8R2F-GP
DY
DY
2

2
+V_VREF_PATH2 +V_VREF_PATH4
2

2
1

1
R1427 R1428
24D9R2F-L-GP DY 24D9R2F-L-GP
2

2
1D35V_S3

1D35V_S3
D
C1405
SCD1U10V2KX-5GP

Q1401
1

5V_S5 2N7002K-2-GP
ϴϰ͘ϮEϳϬϮ͘:ϯϭ
2

ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
1

R1429 ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ
220KR2J-L2-GP
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
G

U1401 R1431 1 2 66D5R2F-GP M_A_DIM0_ODT0 12

2

1 5 R1432 1 2 66D5R2F-GP M_A_DIM0_ODT1 12

R1430 1 NC#1 VCC
A 4 DDR_PG_CTRL 2 0R2J-2-GP DDR_PG_CTRL_R 2 A <Core Design> A
R1433 1 DY 2 0R2J-2-GP 3 4 DDR_VTT_PG_CTRL M_A_B_DIMM_ODT R1434 1 2 66D5R2F-GP M_B_DIM0_ODT0 13
GND Y
1

R1435 1 2 66D5R2F-GP
74AUP1G07GW -GP R1436
M_B_DIM0_ODT1 13
Wistron Corporation
73.01G07.00B 2MR2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY
ϮEсϳϯ͘Ϭϭ'Ϭϳ͘ϬϮ, DDR_VTT_PG_CTRL 49
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

M1 & M3 Implementation
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 14 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

MCP_GPIO79 R1508 1 DY 2 0R2J-2-GP FFS_PCH_INT

CPU1I 9 OF 19

52 BIA_PW M_PCH BIA_PW M_PCH B8 B9 PCH_HDMI_CLK

EDP_BKLCTL DDPB_CTRLCLK PCH_HDMI_CLK 54
52 PANEL_BKEN_PCH PANEL_BKEN_PCH A9 C9 PCH_HDMI_DATA HDMI
EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA PCH_HDMI_DATA 54
24,36 ENVDD_PCH ENVDD_PCH C6 D9 DP_HDMI_CLK
EDP_VDDEN DDPC_CTRLCLK DP_HDMI_CLK 55
D11 DP_HDMI_DATA DP/HDMI
DDPC_CTRLDATA DP_HDMI_DATA 55

CONTACTLESS_DET# U6
20 CONTACTLESS_DET# DGPU_PW ROK PIRQA/GPIO77 DDPB_AUX#
P4 PIRQB/GPIO78 DDPB_AUXN C5
MCP_GPIO79 N4 DISPLAY B6
18 MCP_GPIO79 PIRQC/GPIO79 DDPC_AUXN LP_DDPC_AUX# 55
R1507 1 2 0R2J-2-GP FFS_PCH_INT_R N2 B5 DDPB_AUX DP/HDMI
67 FFS_PCH_INT PIRQD/GPIO80 DDPB_AUXP
TP1501 1 MCP_PME# AD4 PME# DDPC_AUXP A6 LP_DDPC_AUX 55
C GPIO C
MCP_GPIO51 R5
18 MCP_GPIO51 TOUCH_RST_N_GYRO_INT1 GPIO51
L1 GPIO52
CODEC_IRQ L4 C8 HDMI_PCH_DET
MCP_GPIO54 GPIO53 DDPB_HPD PCH_DPC_HPD HDMI_PCH_DET 54
20 MCP_GPIO54 L3 GPIO54 DDPC_HPD A8 PCH_DPC_HPD 55
TP1502 1 MCP_GPIO55 U7 GPIO55 EDP_HPD D6 EDP_HPD
EDP_HPD 52

HASWELL-3-GP-U
R1502 1 2 100KR2J-1-GP DDPB_AUX

R1503 1 DY 2 1KR2F-5-GP CODEC_IRQ

R1504 1 2 100KR2J-1-GP ENVDD_PCH

R1505 1 DY 2 100KR2J-1-GP PCH_DPC_HPD

R1506 1 DY 2 20KR2J-L2-GP HDMI_PCH_DET

3D3V_S0
RN1501
PCH_HDMI_DATA 1 4
PCH_HDMI_CLK 2 3
B B

SRN2K2J-1-GP
3D3V_S0 RN1502
DP_HDMI_CLK 1 4
RN1503 DP_HDMI_DATA 2 3
1 8 3.3V_TS_EN 3.3V_TS_EN 20,98
2 7 3.3V_HDD_EN 3.3V_HDD_EN 20,56
3.3V_TP_EN SRN2K2J-1-GP
3 6 3.3V_TP_EN 20,62
4 5 MCP_GPIO84 20
SRN10KJ-6-GP

RN1504
1 4 DGPU_PW ROK
2 3 MINI2CLK_REQ# MINI2CLK_REQ# 18,59
SRN10KJ-5-GP

R1513 1 2 10KR2J-3-GP TOUCH_RST_N_GYRO_INT1

R1514 1 2 100KR2J-1-GP DDPB_AUX#

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (/DDI/PCI)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 15 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH USB2.0 Table

Pair Device
0 USB port 2 (usb charger)
Shark Bay ULT: 1 USB port 1 (win debug)
USB Ext. port 1 2 N/A
External debug port use on Shark Bay platform 3 WLAN (BT)
D 4 WWAN D

5 CAMERA
CPU1K 11 OF 19 6 Touch Panel
7 N/A
58 PCIE_RXN5 F10 PERN5_L0 USB2N0 AN8 USB_PN0 35
58 PCIE_RXP5 E10 PERP5_L0 USB2P0 AM8 USB_PP0 35
WLAN C23 AR7
58
58
PCIE_TXN5
PCIE_TXP5 C22
PETN5_L0
PETP5_L0
USB2N1
USB2P1 AT7
USB_PN1 34
USB_PP1 34 USB3.0 Table
F8 PERN5_L1 USB2N2 AR8
E8 PERP5_L1 USB2P2 AP8 Pair Device
B23 PETN5_L1 USB2N3 AR10 USB_W LAN_N 58 1 USB port 1
A23 PETP5_L1 USB2P3 AT10 USB_W LAN_P 58
2 USB port 2
H10 PERN5_L2 USB2N4 AM15 USB_W W AN_N 59
G10 PERP5_L2 USB2P4 AL15 USB_W W AN_P 59 3 N/A
B21 PETN5_L2 USB2N5 AM13 USB_CAMERA_N 52 4 N/A
C21 PETP5_L2 USB2P5 AN13 USB_CAMERA_P 52
E6 PERN5_L3 USB2N6 AP11 TOUCHPANEL_N 98
F6 PERP5_L3 USB2P6 AN11 TOUCHPANEL_P 98
B22 PETN5_L3 USB2N7 AR13
C A21 AP13 C
PETP5_L3 USB2P7

94 PCIE_RXN3 G11 PERN3

94 PCIE_RXP3 F11 PERP3 USB3RN1 USB3RN0 G20 USB3_RX0_N 34
Intel GBE LAN USB3RP1 USB3RP0 H20 USB3_RX0_P 34
94 PCIE_TXN3 C1603 1 2 SCD1U10V2KX-5GP PCIE_TXN3_C C29
C1604 1 PETN3 PCIe USB
94 PCIE_TXP3 2 SCD1U10V2KX-5GP PCIE_TXP3_C B30 PETP3 USB3TN1 USB3TN0 C33 USB3_TX0_N 34
USB3TP1 USB3TP0 B34 USB3_TX0_P 34
58 PCIE_RXN4 F13 PERN4
58 PCIE_RXP4 G13 PERP4 USB3RN2 USB3RN1 E18 USB3_RX1_N 34
WLAN USB3RP2 USB3RP1 F18 USB3_RX1_P 34
58 PCIE_TXN4 B29 PETN4
58 PCIE_TXP4 A29 PETP4 USB3TN2 USB3TN1 B33 USB3_TX1_N 34
USB3TP2 USB3TP1 A33 USB3_TX1_P 34
G17 PERN1/USB3RN2 USB3RN3
F17 PERP1/USB3RP2 USB3RP3

C30 PETN1/USB3TN2 USB3TN3

C31 USB3TP3 AJ10 USB_COMP R1602 1 2 22D6R2F-L1-GP
PETP1/USB3TP2 USBRBIAS#
USBRBIAS AJ11
32 PCIE_RXN2 F15 PERN2/USB3RN3 USB3RN4 RSVD#AN10 TP13 AN10
32 PCIE_RXP2 G15 PERP2/USB3RP3 USB3RP4 RSVD#AM10 TP14 AM10
Card Reader C1606 1 2 SCD1U10V2KX-5GP PCIE_TXN2_C B31 3D3V_S5_PCH
32 PCIE_TXN2 PETN2/USB3TN3 USB3TN4
32 PCIE_TXP2 C1605 1 2 SCD1U10V2KX-5GP PCIE_TXP2_C A31 USB3TP4 RN2004
PETP2/USB3TP3 USB_OC#0_1 USB_OC#0_1
OC0/GPIO40 AL3 USB_OC#0_1 35 8 1
AT1 USB_OC#2_3 USB_OC#4_5 7 2
+V1.05S_AUSB3PLL OC1/GPIO41 USB_OC#4_5 USB_OC#6_7
OC2/GPIO42 AH2 6 3
E15 RSVD#E15 AV3 USB_OC#6_7 SIO_EXT_SMI# 5 4
B TP3 OC3/GPIO43 B
E13 TP4 RSVD#E13
R1601 1 2 3K01R2F-3-GP PCIE_RCOMP A27 R1608 SRN10KJ-6-GP
R1607 1 PCIE_RCOMP
2 0R2J-2-GP PCIE_IREF B27 PCIE_IREF 1 DY 2 SIO_EXT_SMI# 20,24 RN2005
0R2J-2-GP USB_OC#2_3 4 1
20,62 KB_DET# KB_DET# 3 2
HASWELL-3-GP-U SRN10KJ-5-GP

PCIE_RXN5
PCIE_RXP5
PCIE_RXN4
PCIE_RXP4
2

2
EC1601
SC22P50V2JN-4GP

EC1602
SC22P50V2JN-4GP

EC1603
SC22P50V2JN-4GP

EC1604
SC22P50V2JN-4GP

DY DY DY DY SSI_0625
1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/USB)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 16 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH NOTE:

PWRBTN# Integrated Pull-Up.
RTC_AUX_S5
PCH_DPW ROK R1702 1 DY 2 0R2J-2-GP PM_RSMRST#

1
CPU1H 8 OF 19 R1707
DY 10KR2J-3-GP
SYSTEM POWER MANAGEMENT
ME_SUS_PW R_ACK_R R1703 1 DY 2 0R2J-2-GP

2
24 SUSACK# R1704 1 2 0R2J-2-GP SUSACK#_R AK2 AW7 DSW ODVREN
SYS_RESET# SUSACK# DSWVRMEN PCH_DPW ROK
AC3 SYS_RESET# DPWROK AV5 PCH_DPW ROK 24
24,36,96 SYS_PW ROK R1705 1 2 0R2J-2-GP SYS_PW ROK_R AG2 AJ5 PCH_PCIE_W AKE# 24
R1706 1 SYS_PWROK WAKE#
24,36 RESET_OUT# 2 0R2J-2-GP PCH_PW ROK AY7 PCH_PWROK
36 APW ROK R1708 1 2 0R2J-2-GP APW ROK_R AB5
PCH_PLTRST# APWROK CLKRUN#
D AG7 PLTRST# CLKRUN/GPIO32 V5 CLKRUN# 24,88 D
AG4 SUS_STAT#/LPCPD# SUS_STAT#/LPCPD# 88
SUS_STAT/GPIO61 SUSCLK R1709 1
SUSCLK/GPIO62 AE6 2 33R2J-2-GP SUSCLK_NGFF 58,59
PM_RSMRST# AP5 SIO_SLP_S5# SIO_SLP_S5# 24
R1710 1 SLP_S5/GPIO63
24 ME_SUS_PW R_ACK 2 0R2J-2-GP ME_SUS_PW R_ACK_R AW6 RSMRST#
96 PM_PW RBTN#_R AV4 SUSWARN/SUSPWRDNACK/GPIO30
24 SIO_PW RBTN# R1711 1 2 0R2J-2-GP PM_PW RBTN#_R AL7 AJ6 SIO_SLP_S4# 24,36,49
AC_PRESENT PWRBTN# SLP_S4#
24 AC_PRESENT AJ8 ACPRESENT/GPIO31 SLP_S3# AT4 SIO_SLP_S3# 24,36,49
PCH_BATLOW # AN4 AL5 R1712 1 DY 2 0R2J-2-GP
SIO_SLP_S0# BATLOW/GPIO72 SLP_A# SLP_A# R1713 1
24,48 SIO_SLP_S0# AF3 SLP_S0# SLP_SUS# AP4 2 0R2J-2-GP SIO_SLP_A# 24,36,48
99 SIO_SLP_W LAN# AM5 AJ7 SIO_SLP_SUS# SIO_SLP_SUS# 24
SLP_WLAN/GPIO29 SLP_LAN#
SIO_SLP_LAN# 24,36

HASWELL-3-GP-U
DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

3D3V_S0 LOW Disabled

R1716 1 2 8K2R2J-3-GP CLKRUN#

RTC_AUX_S5
R1719 1 2 10KR2J-3-GP SYS_RESET#

C 3D3V_S5_PCH 3D3V_S0 R1721 1 2 330KR2J-L1-GP C

DSW ODVREN R1723 1 2 330KR2J-L1-GP

DY

1
C1701
R1724 1 2 10KR2J-3-GP ME_SUS_PW R_ACK U1701 SCD1U10V2KX-5GP
1

2
PCH_PLTRST# B
VCC 5
2 A
R1726 1 2 10KR2J-3-GP SUSACK# 4 PLTRST# R1725 1 2 0R2J-2-GP PCH_PLTRST#_EC 24,58,59,65,88
Y R1717 1 0R2J-2-GP
3 GND 2 PLTRST_MMI# 32
R1729 1 DY 2 10KR2J-3-GP SUS_STAT#/LPCPD# R1718 1 2 0R2J-2-GP PLTRST_XDP# 96

1
74LVC1G08GW -1-GP R1720 1 2 0R2J-2-GP PLTRST_LAN# 94
73.01G08.L04 R1727
+V3.3A_DSW _P 100KR2J-1-GP APS1
19

2
3D3V_S5_PCH 1
R1728 1 2 8K2R2J-3-GP PCH_BATLOW #
SIO_SLP_S3# 2
RN1701 +V3.3A_DSW _P 3
1 4 PCH_PCIE_W AKE# SIO_SLP_S5# 4
2 3 AC_PRESENT SIO_SLP_S4# 5
3D3V_AUX_S5 SIO_SLP_A# 6
SRN10KJ-5-GP +V3.3A_DSW _P 7
8
1

R1722 1
19 RTC_RST# 9 APS
DY 2 10KR2J-3-GP SIO_SLP_LAN# R1731
Q1701 10
DY 10KR2J-3-GP 24,61 MB_PW R_BTN# 11
B PM_RSMRST# R1732 1 B
4 3 2 0R2J-2-GP PCH_RSMRST# 24 12
SYS_RESET# 13
2

ALW _PW RGD_3V_5V_# 5 2 ALW _PW RGD_3V_5V 24,45 14

R1733 1 DY 2 10KR2J-3-GP AC_PRESENT DY SIO_SLP_S0# 15
6 1 16
R1734 1 DY 2 10KR2J-3-GP PCH_DPW ROK 17
DMN66D0LDW -7-GP 18
R1735 1 DY 2 10KR2J-3-GP SYS_PW ROK 84.DMN66.03F
20
R1736 1 DY 2 10KR2J-3-GP PCH_PW ROK
ETY-CON18-2-GP
20.K0493.018

SYS_PW ROK_R
PCH_PW ROK
APW ROK_R
PCH_DPW ROK
SYS_RESET#
PCH_PLTRST#
PM_RSMRST#
1

1
EC1701
SC1KP50V2KX-1GP

EC1702
SC1KP50V2KX-1GP

EC1703
SC1KP50V2KX-1GP

EC1704
SC1KP50V2KX-1GP

EC1705
SC1KP50V2KX-1GP

EC1706
SC1KP50V2KX-1GP

EC1707
SC1KP50V2KX-1GP

A <Core Design> A
DY DY DY DY DY DY DY
SSI_0625
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PM)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 17 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH PCIECLKRQ1# and PCIECLKRQ2# R1802

X01-20130207
Support S0 power only XTAL24_IN 1
0R2J-2-GP
2 XTAL24_IN_R C1802 1 2 SC15P50V2JN-2-GP

CPU1F 6 OF 19
X1801

1
1 2
R1803
1M1R2J-GP
PCIECLKRQn# is route to PCIE Port (n+1) C43 A25 XTAL24_IN
CLKOUT_PCIE_N0 XTAL24_IN XTAL24_OUT
C42 B25 4 3

2
CLKOUT_PCIE_P0 XTAL24_OUT
U2 PCIECLKRQ0/GPIO18
D K21 MCP_K21 1 +V1.05S_AXCK_LCPLL XTAL-24MHZ-56-GP D
RSVD#K21 TP15 TP1802
32 CLK_PCIE_CARD# RN1802 2 3 SRN0J-6-GP CLK_PCH_SRC1_N B41 RSVD#M21 M21 MCP_M22 1 82.30004.641
CLKOUT_PCIE_N1 TP16 TP1803
32 CLK_PCIE_CARD 1 4 CLK_PCH_SRC1_P A41 PCIE Port 2 C26 XCLK_BIASREF R1804 1 2 3K01R2F-3-GP
MMICLK_REQ# CLKOUT_PCIE_P1 DIFFCLK_BIASREF
20,32 MMICLK_REQ# Y5 PCIECLKRQ1/GPIO19
TESTLOW_C35 C35 MCP_TESTLOW 1 XTAL24_OUT 1 2
RN1801 2 CLOCK TP19
94 CLK_PCIE_LAN# 3 SRN0J-6-GP CLK_PCH_SRC2_N C41 CLKOUT_PCIE_N2 TESTLOW_C34 TP20 C34 MCP_TESTLOW 2 C1803
1 4 CLK_PCH_SRC2_P B42 SIGNALS AK8 MCP_TESTLOW 3 SC15P50V2JN-2-GP
94 CLK_PCIE_LAN CLKOUT_PCIE_P2 TESTLOW_AK8 TP21
20,94 LANCLK_REQ# LANCLK_REQ# AD1 PCIE Port 3 TESTLOW_AL8 AL8 MCP_TESTLOW 4 X01-20130207
PCIECLKRQ2/GPIO20 TP22 R1813 1 2 22R2J-2-GP CLK_PCI_DEBUG 65
58 CLK_PCIE_N3_W LAN# RN1809 1 4 SRN0J-6-GP CLK_PCH_SRC3_N B38 AN15 CLKOUT_LPC_0 R1805 1 2 22R2J-2-GP CLK_PCI_TPM 88
CLK_PCH_SRC3_P CLKOUT_PCIE_N3 CLKOUT_LPC_0 CLKOUT_LPC_1 R1806 1
58 CLK_PCIE_P3_W LAN 2 3 C37 CLKOUT_PCIE_P3 CLKOUT_LPC_1 AP15 2 22R2J-2-GP CLK_PCI_MEC 24
58 MINI1CLK_REQ# MINI1CLK_REQ# N1 PCIE Port 4
PCIECLKRQ3/GPIO21 3D3V_S5_PCH
CLKOUT_ITPXDP# B35

1
58 CLK_PCIE_N4_W LAN# RN1811 1 4 SRN0J-6-GP CLK_PCH_SRC4_N A39 A35 C1805 C1801 C1804
CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
58 CLK_PCIE_P4_W LAN 2 3 CLK_PCH_SRC4_P B39 DY DY DY
MINI4CLK_REQ# CLKOUT_PCIE_P4
58 MINI4CLK_REQ# U5 PCIE Port 5

2
PCIECLKRQ4/GPIO22 LOM_SMBCLK R1807 1 2 499R2F-2-GP
59 CLK_PCIE_N5_W W AN# RN1803 2 3 SRN0J-6-GP CLK_PCH_SRC5_N B37 LOM_SMBDAT R1808 1 2 499R2F-2-GP
CLK_PCH_SRC5_P CLKOUT_PCIE_N5
59 CLK_PCIE_P5_W W AN 1 4 A37 CLKOUT_PCIE_P5
15,59 MINI2CLK_REQ# MINI2CLK_REQ# T2 PCIE Port 6
PCIECLKRQ5/GPIO23 SMB_CLK RN1804 2 3 SRN2K2J-1-GP
SMB_DATA 1 4
HASWELL-3-GP-U
CPU1G 7 OF 19 SML1_SMBCLK RN1805 1 4 SRN2K2J-1-GP
SML1_SMBDATA 2 3
R1801 1 2 0R2J-2-GP LPC_LAD0_MCP AU14 AN2 PCH_SMB_ALERT#
24,65,88 LPC_LAD0 LAD0 SMBALERT/GPIO11
R1812 1 2 0R2J-2-GP LPC_LAD1_MCP AW12 AP2 SMB_CLK
24,65,88 LPC_LAD1 LAD1 LPC SMBCLK
R1809 1 2 0R2J-2-GP LPC_LAD2_MCP AY12 AH1 SMB_DATA
24,65,88 LPC_LAD2 LAD2 SMBUS SMBDATA
C R1810 1 2 0R2J-2-GP LPC_LAD3_MCP AW11 AL2 MCP_GPIO60 W W AN_W AKE#_R R1817 1 2 10KR2J-3-GP C
24,65,88 LPC_LAD3 LAD3 SML0ALERT/GPIO60
24,65,88 LPC_LFRAME# R1811 1 2 0R2J-2-GP LPC_LFRAME#_MCP AV12 AN1 LOM_SMBCLK MCP_GPIO60 R1818 1 2 10KR2J-3-GP
LFRAME# SML0CLK LOM_SMBCLK 94
AK1 LOM_SMBDAT
SML0DATA LOM_SMBDAT 94
AU4 W W AN_W AKE#_R R1815 1 DY 2 0R2J-2-GP W W AN_W AKE# 59
SML1ALERT/PCHHOT/GPIO73 SML1_SMBDATA PCH_SMB_ALERT# R1816 1
SML1DATA/GPIO74 AH3 SML1_SMBDATA 24 2 10KR2J-3-GP
AU3 SML1_SMBCLK
SML1CLK/GPIO75 SML1_SMBCLK 24
25 PCH_SPI_CLK PCH_SPI_CLK AA3
PCH_SPI_CS0# SPI_CLK
25 PCH_SPI_CS0# Y7 SPI_CS0# CL_CLK AF2
1 PCH_SPI_CS1# Y4 AD2 CL_CLK 58 RN1808
TP1806 SPI_CS1# SPI C-LINK CL_DATA CL_DATA 58
1 PCH_SPI_CS2# AC2 AF4 MCP_TESTLOW 1 2 3 SRN10KJ-5-GP
TP1804 SPI_CS2# CL_RST# CL_RST# 58
25 PCH_SPI_SI PCH_SPI_SI AA2 MCP_TESTLOW 2 1 4
PCH_SPI_SO SPI_MOSI
25 PCH_SPI_SO AA4 SPI_MISO
25 SPI0_W P# SPI0_W P# Y6 RN1810
SPI_IO2 MCP_TESTLOW 3
25 SPI_HOLD_0# AF1 SPI_IO3 1 4 SRN10KJ-5-GP
MCP_TESTLOW 4 2 3
SSI_0618

HASWELL-3-GP-U

3D3V_S0
3D3V_S0
RN1807 RN1806
B MCP_GPIO51 B
1 8 MCP_GPIO51 15 1 4
2 7 PCH_GPIO83 PCH_GPIO83 20 2 3
3 6 MINI1CLK_REQ#
4 5 MCP_GPIO79 MCP_GPIO79 15 SRN2K2J-1-GP

SRN10KJ-6-GP

R1819 1 2 10KR2J-3-GP MINI4CLK_REQ# Q1801

SMB_DATA 6 1 PCH_SMBDATA 12,13,67,96
SSI_0625
5 2
LPC_LAD0
LPC_LAD1 4 3
LPC_LAD2
LPC_LAD3 2N7002KDW -GP
PCH_SMBCLK 12,13,67,96
1

1
SC10P50V2JN-4GP
EC1801

SC10P50V2JN-4GP
EC1802

SC10P50V2JN-4GP
EC1803

SC10P50V2JN-4GP
EC1804

SMB_CLK
DY DY DY DY ϴϰ͘ϮEϳϬϮ͘ϯ&
2nd = 84.DM601.03F
2

ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (CLOCK/SMBUS/CL/LPC/SPI)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 18 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH RTC_AUX_S5

1
2
INTVRMEN- Integrated SUS
RN1901
SRN20KJ-GP-U
1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs

4
3
CPU1E 5 OF 19

2
D
RTC_AUX_S5 D

1
G1902 C1902
SC1U6D3V3KX-2GP RTC_X1 AW5
GAP-OPEN RTC_X2 RTCX1
AY5

2
R1901 1 RTCX2
2 1M1R2J-GP SM_INTRUDER# AU6 J5 SATA_RXN0 56
1
R1903 1 INTRUDER# SATA_RN0/PERN6_L3
2 330KR2F-L-GP PCH_INTVRMEN AV7 H5
SRTC_RST#
RTC_RST#
AV6
INTVRMEN
SRTCRST#
RTC
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3 B15
SATA_RXP0 56
SATA_TXN0 56
HDD
AU7 RTCRST# SATA_TP0/PETP6_L3 A15 SATA_TXP0 56
2
C1903
SC1U6D3V3KX-2GP

17 RTC_RST# SATA_RN1/PERN6_L2 J8
1

G1901 H8
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2 A17
GAP-OPEN B17
2

SATA_TP1/PETP6_L2
1

HDA_BITCLK AW8 J6
HDA_SYNC HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1
AV11 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 H6
HDA_RST# AU8 B14
HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1
27 HDA_SDIN0 AY10 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 C15
AU12 AUDIO
R1904 1 HDA_SDI1/I2S1_RXD
99 ME_FW P 2 1KR2J-1-GP HDA_SDOUT AU11 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 F5 SATA_RN3/PERN6_L0 59
AW10 DOCKEN/I2S1_TXD HAD_DOCK_EN/I2S1_TXD# SATA_RP3/PERP6_L0 E5 SATA_RP3/PERP6_L0 59 WWAN
AV10 SATA C17
HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 SATA_TN3/PETN6_L0 59
RTC_X1 AY8 D17 SATA_TP3/PETP6_L0 59
I2S1_SCLK SATA_TP3/PETP6_L0
R1905 1 2 10MR2J-L-GP RTC_X2
SATA0GP/GPIO34 V1 MPCIE_RST# 58
1

U1 HDD_DET# +V1.05S_ASATA3PLL
SATA1GP/GPIO35 HDD_DET# 56
R1906 V6 MCP_GPIO36
0R2J-2-GP SATA2GP/GPIO36
SATA3GP/GPIO37 AC1 NGFF_PCIE_SATA# 99
C X1901 4,96 XDP_TRST# R1907 1 DY 2 0R2J-2-GP XDP_TRST#_R AU62 C
R1908 1 PCH_TRST#
96 PCH_JTAG_TCK DY 2 0R2J-2-GP PCH_JTAG_TCK_BUF AE62 A12 SATA_IREF R1909 1 2 0R2J-2-GP
2

RTC_X1_R 1 PCH_JTAG_TDI PCH_TCK SATA_IREF MCP_L11

4 AD61 PCH_TDI RSVD#L11 TP7 L11 1 TP1901
PCH_JTAG_TDO AE61 RSVD#K10 K10 MCP_K10 1
PCH_TDO TP8 TP1902
SC12P50V2JN-3GP
C1901

C1904
SC12P50V2JN-3GP

PCH_JTAG_TMS AD62 JTAG C12 SATA_RCOMP R1910 1 2 3K01R2F-3-GP

PCH_TMS SATA_RCOMP
1

AL11 TP5 RSVD#AL11 SATALED# U3 SATA_LED# 61

2 3 AC4 TP6 RSVD#AC4
96 PCH_JTAGX PCH_JTAGX AE63
2

JTAGX
AV2 RSVD#AV2
XTAL-32D768KHZ-65-GP
82.30001.841

HASWELL-3-GP-U

R1911 1 2 33R2J-2-GP HDA_SYNC

27 HDA_CODEC_SYNC R1912 1 33R2J-2-GP HDA_SDOUT
27 HDA_CODEC_SDOUT 2
R1913 1 2 33R2J-2-GP HDA_RST#
27 HDA_CODEC_RST# R1914 1 33R2J-2-GP HDA_BITCLK
27 HDA_CODEC_BITCLK 2
1

DY C1905
SC27P50V2JN-2-GP
2

B B

Flash Descriptor Security Overide

+V3.3A_1.5A_HDA Low = Default
HDA_SDOUT 3D3V_S0
High = Enable
R1917 1 DY 2 1KR2J-1-GP HDA_SDOUT
SATA_LED# R1915 1 DY 2 10KR2J-3-GP

HDD_DET# R1931 1 2 10KR2J-3-GP

1D05V_M

PCH_JTAGX R1919 1PCH XDP 2 51R2J-2-GP MCP_GPIO36 R1920 1 2 10KR2J-3-GP

PCH_JTAG_TMS R1921 1PCH XDP 2 51R2J-2-GP

PCH_JTAG_TDI R1922 1PCH XDP 2 51R2J-2-GP
PCH_JTAG_TDO R1923 1PCH XDP 2 51R2J-2-GP
PCH_JTAG_TCK_BUF R1924 1PCH XDP 2 51R2J-2-GP

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
PCH_JTAG_TDO R1928 1PCH XDP 2 0R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
CPU_XDP_TDO_PCH 96
PCH_JTAG_TDI R1929 1PCH XDP 2 0R2J-2-GP Title
CPU_XDP_TDI_PCH 96
PCH_JTAG_TMS R1930 1PCH XDP 2 0R2J-2-GP CPU_XDP_TMS_PCH 96
CPU (RTC/SATA/HDA/JTAG)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 19 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH
+V3.3A_DSW _P
RN2001
2 3 PM_LANPHY_ENABLE
1 4 EC_W AKE#

SRN10KJ-5-GP
3D3V_S5_PCH

R2005 1 2 10KR2J-3-GP SIO_EXT_W AKE#

D R2006 1 2 10KR2J-3-GP PCH_NFC_RST D

R2008 1 2 10KR2J-3-GP NFC_IRQ

R2004 1 2 10KR2J-3-GP MCP_GPIO15

R2015 1 2 10KR2J-3-GP MEDIACARD_PW REN
Vendor ask just pull up to 3D3V_S0 +V1.05S_VCCST
RN1601
8 1 SNSR_HUB_PW REN

1
7 2 MCP_GPIO9
6 3 SLATE_MODE CPU1J 10 OF 19 R2012
5 4 SNSR_HUB_RST# 1KR2J-1-GP CRB: ULTWTM1 1K
EDS no ask GPIO9 required external PH Goliad is DY.
SRN10KJ-6-GP

2
PCH_AUDIO_PW R P1
SIO_EXT_W AKE# BMBUSY/GPIO76 H_THERMTRIP#_R R2014 1
24 SIO_EXT_W AKE# AU2 GPIO8 THRMTRIP D60 2 0R2J-2-GP H_THERMTRIP# 24
94 PM_LANPHY_ENABLE PM_LANPHY_ENABLE AM7 V4 SIO_RCIN# SIO_RCIN# 24
MCP_GPIO15 LAN_PHY_PWR_CTRL/GPIO12 RCIN/GPIO82 IRQ_SERIRQ
AD6 GPIO15 SERIRQ T4 IRQ_SERIRQ 24,88
Y1 CPU/ AW15 PCH_OPIRCOMP R2016 1 2 49D9R2F-GP
94 LAN_RST# GPIO16 PCH_OPI_RCOMP
MISC OPI_COMP2
1 MCP_GPIO17 T3 AF20
TP2001 GPIO17 RSVD#AF20
1 MCP_GPIO24 AD5 AB21
TP2002 GPIO24 RSVD#AB21
24,94 LAN_W AKE# R2011 1 2 0R2J-2-GP NFC_IRQ AN3
3D3V_S0 EC_W AKE# GPIO26
24 EC_W AKE# AN5 GPIO27
PCH_NFC_RST AD7 GPIO28
R2009 1 2 10KR2J-3-GP MEDIACARD_IRQ# R6 PCH_GPIO83 18
KB_DET# GSPI0_CS/GPIO83 MCP_GPIO84
16,62 KB_DET# AT3 GPIO13 GSPI0_CLK/GPIO84 L6 MCP_GPIO84 15
R2019 1 2 100KR2J-1-GP SIO_EXT_SCI# 1 MCP_GPIO14 AH4 N6 3.3V_mSATA_EN 3.3V_mSATA_EN 59
TP2008 GPIO14 GSPI0_MISO/GPIO85
52 3.3V_CAM_EN# 3.3V_CAM_EN# AM4 L8 BBS_BIT
R2020 1 GPIO25 GSPI0_MOSI/GPIO86
C
DY 2 1KR2F-3-GP HDA_SPKR SNSR_HUB_RST# AK4 GPIO44 GSPI1_CS/GPIO87 R7 DBC_PANEL_EN DBC_PANEL_EN 52
C
R2013 1 2 0R2J-2-GP SIO_EXT_SMI#_R AG5 GPIO L5 3.3V_TP_EN
16,24 SIO_EXT_SMI# GPIO45 GSPI1_CLK/GPIO88 3.3V_TP_EN 15,62
R2024 1 2 2K2R2J-2-GP I2C0_SDA SNSR_HUB_PW REN AG3 N7 3.3V_TS_EN 3.3V_TS_EN 15,98
MEDIACARD_IRQ# GPIO46 GSPI1_MISO/GPIO89 3.3V_HDD_EN
32 MEDIACARD_IRQ# AB6 GPIO47 GSPI_MOSI/GPIO90 K2 3.3V_HDD_EN 15,56
R2025 1 2 2K2R2J-2-GP I2C0_SCL MCP_GPIO48 U4 J1 MCP_GPIO91
MCP_GPIO49 GPIO48 UART0_RXD/GPIO91 MCP_GPIO92
TP2003 1 Y3 GPIO49 UART0_TXD/GPIO92 K3
R2026 1 2 2K2R2J-2-GP DAT_I2C_TP_SIO 98 TOUCH_PANEL_INTR# P3 J2 MCP_GPIO93
GPIO50 LPIO UART0_RTS/GPIO93 MCP_GPIO94
32 MEDIACARD_RST# AG6 GPIO56 UART0_CTS/GPIO94 G1
R2027 1 2 2K2R2J-2-GP CLK_I2C_TP_SIO 32 MEDIACARD_PW REN MEDIACARD_PW REN AP1 K4 MCP_GPIO0
SLATE_MODE GPIO57 UART1_RXD/GPIO0 FFS_INT2
AL4 GPIO58 UART1_TXD/GPIO1 G2 FFS_INT2 67
R2028 1 2 100KR2J-1-GP MCP_GPIO91 1 MCP_GPIO59 AT5 J3 LCD_CBL_DET# LCD_CBL_DET# 52
TP2004 GPIO59 UART1_RST/GPIO2
36 MPHYP_PW R_EN MPHYP_PW R_EN Y2 J4 MCP_GPIO3
R2029 1 HSIOPC/GPIO71 UART1_CTS/GPIO3
2 100KR2J-1-GP MCP_GPIO92 I2C0_SDA/GPIO4 F2 I2C0_SDA EDS ask GPIO3 need external PH onpage94
MCP_GPIO9 AM3 F3 I2C0_SCL
R2041 1 GPIO9 I2C0_SCL/GPIO5
2 20KR2J-L2-GP TPM_ID1 TP2006 1 MCP_GPIO10 AM2 GPIO10 I2C1_SDA/GPIO6 G4 DAT_I2C_TP_SIO
56 mSATA_DEVSLP P2 F1 CLK_I2C_TP_SIO
R2007 1 DEVSLP0/GPIO33 I2C1_SCL/GPIO7
2 10KR2J-3-GP MCP_GPIO3 59 NGFF_DEVSLP1 R2017 1 DY 2 0R2J-2-GP MCP_GPIO38 L2 DEVSLP1/GPIO38 SDIO_CLK/GPIO64 E3 USH_DET#
24 SIO_EXT_SCI# SIO_EXT_SCI# N5 F4 CAM_MIC_CBL_DET# CAM_MIC_CBL_DET# 52
R2043 1 DEVSLP2/GPIO39 SDIO_CMD/GPIO65
2 100KR2J-1-GP MCP_GPIO48 TP2007 1 MCP_GPIO70 C4 SDIO_POWER_EN/GPIO70 SDIO_D0/GPIO66 D3 MCP_GPIO66
EDS no ask GPIO48 required external PH 27 HDA_SPKR HDA_SPKR V2 E4 TPM_ID0
SPKR/GPIO81 SDIO_D1/GPIO67 TPM_ID1
SDIO_D2/GPIO68 C3
No Reboot Strap E2 SLP_ME_CSW _DEV# SLP_ME_CSW _DEV# 99
SDIO_D3/GPIO69
Low = Default
HASWELL-3-GP-U
 
HASWELL-3-GP-U
HDA_SPKR High = No Reboot
RN2009
1 8 DBC_PANEL_EN
2 7 LANCLK_REQ# LANCLK_REQ# 18,94
3 6
B MPHYP_PW R_EN B
4 5

SRN10KJ-6-GP

1
RN2008
8 CAM_MIC_CBL_DET#
http://adf.ly/3o8pJ
2 7 TPM_ID0
3 6 USH_DET#
4 5 SLP_ME_CSW _DEV#

SRN10KJ-6-GP
RN2007
1 8 FFS_INT2 EDS no ask GPIO94 required external PH
2 7 MCP_GPIO94 3D3V_S0 3D3V_S0
3 6 LCD_CBL_DET#
4 5 MCP_GPIO93
1

SRN10KJ-6-GP
RN2006 R2044 R2045
1 8 MCP_GPIO54 MCP_GPIO54 15 DY 10KR2J-3-GP DY 10KR2J-3-GP
2 7 MCP_GPIO0
3 6
2

4 5 3.3V_mSATA_EN BBS_BIT MCP_GPIO66

1

SRN10KJ-6-GP
RN2003 R2049 R2051
1 8 SIO_RCIN# DY 1KR2J-1-GP DY 1KR2F-3-GP
2 7 MMICLK_REQ# MMICLK_REQ# 18,32
3 6 IRQ_SERIRQ
2

A 4 5 CONTACTLESS_DET# CONTACTLESS_DET# 15 <Core Design> A

SRN10KJ-6-GP
BOOT BIOS Strap TOP-BLOCK SWAP OVERRIDE
R2054 1 DY 2 10KR2J-3-GP NFC_IRQ Wistron Corporation
GPIO86 BOOT BIOS Location GPIO66 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R2055 1 2 100KR2J-1-GP 3.3V_CAM_EN# Taipei Hsien 221, Taiwan, R.O.C.
0 SPI(Default) HIGH pop R20545
Title
1 LPC LOW pop R2051(DEFAULT)
R2057 1 2 10KR2J-3-GP PCH_AUDIO_PW R CPU (GPIO/CPU)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 20 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH

D D
1D05V_M

+V1.05S_AUSB3PLL 1D05V_MODPHY
1D05V_MODPHY +V1.05A_AOSCSUS L2102 1 2 IND-2D2UH-196-GP
R2101 1 3D3V_S5_PCH DY
2 0R5J-5-GP

C2103
SC1U6D3V2KX-GP

C2104
SC1U6D3V2KX-GP

C2105
SC100U6D3V6MX-GP

C2106
SC1U6D3V2KX-GP
L2101 1 2 IND-2D2UH-196-GP +V1.05S_AUSB3PLL

1
+VCCPRTCSUS R2102 1 2 0R2J-2-GP RTC_AUX_S5 R2103 1 2 0R2J-2-GP
DY
C2101
SC1U6D3V2KX-GP

C2102
SC100U6D3V6MX-GP
CPU1M 13 OF 19
DY
1

1
2

2
C2111
SCD1U10V2KX-5GP

C2108
SCD1U10V2KX-5GP

C2109
SC1U6D3V2KX-GP
1D05V_S0 +V1.05DX_MODPHY_PCH K9 C2107

1
VCCHSIO SC1U6D3V2KX-GP
L10
2

2
VCCHSIO HSIO
M9
VCCHSIO mPHY RTC
N8 AH11
VCCIO VCC1_05 VCCSUS3_3 VCCSUS3

2
P9 AG10
+V1.05S_AUSB3PLL VCCIO VCC1_05 VCCRTC +VCCRTCEXT C2110 1
B18 AE7 2
+V1.05S_ASATA3PLL +V1.05S_ASATA3PLL VCCUSB3PLL DCPRTC 1D05V_M
B11
1D05V_MODPHY VCCSATA3PLL SCD1U10V2KX-5GP 3D3V_M

L2103 1 2 IND-2D2UH-196-GP +V1.05S_ASATA3PLL TP2101 TP_VCCAPLLOPI_VAL SPI +V1.05A_SUS_PCH R2104 2 1 0R2J-2-GP

1
+V1.05S_APLLOPI
Y20
VCCAPLLRSVD#Y20 OPI VCCSPI
Y8 DY
AA21

1
VCCAPLL
C2113
SC1U6D3V2KX-GP

C2115
SC47U6D3V5MX-1-GP

C2116
SC47U6D3V5MX-1-GP

SC1U6D3V2KX-GP
C2117
W21
1

1
VCCAPLL C2114
AG14
VCCASW SC1U6D3V2KX-GP
AG13 1D05V_M DY

2
USB3 VCCASW 1D05V_S0
2

2
3D3V_S5_PCH +V3.3A_1.5A_HDA +V1.05A_VCCUSB3SUS J13
DCPSUS3
VCC1_05 VCC1P05 J11
1D05V_S0 H11
AXALIA/HDA CORE VCC1_05 VCC1P05

C2118
SC1U6D3V2KX-GP
R2105 1 2 0R2J-2-GP +V3.3A_1.5A_HDA AH14 H15
VCCSUSHDA VCCHDA VCC1_05 VCC1P05

1
VCC1_05 VCC1P05 AE8 R2106 C2121

1
C2119
SC1U6D3V2KX-GP

C2120
SCD1U10V2KX-5GP
L2104 1 DY 2 IND-2D2UH-196-GP +V1.05S_APLLOPI AF22 5D1R2F-GP SC1U6D3V2KX-GP
VRM/USB2/AZALIA
VCC1_05 VCC1P05
+V1.05A_USB2SUS AH13 AG19 PCH_VCCDSW 1 2PCH_VCCDSW_R 1 2

2
DCPSUS2 DCPSUSBYP#AG19
C2125
SC1U6D3V2KX-GP

C2126
SC47U6D3V5MX-1-GP

AG20 1D05V_S0

2
1

R2107 1 DCPSUSBYP#AG20
2 0R2J-2-GP AE9
VCCASW 1D05V_M
DY 3D3V_S0 +V3.3A_PSUS VCCASW
AF9
+V1.05S_AXCK_DCB IND-2D2UH-196-GP
AC9 AG8 2 1 L2105
2

VCCSUS3_3 VCCASW +V1.05A_SUS_PCH

AA9 AD10
VCCSUS3_3 DCPSUS1#AD10

C2130
SC100U6D3V6MX-GP

C2131
SC1U6D3V2KX-GP
+V3.3A_DSW_P AH10 AD8

1
VCCDSW3_3 DCPSUS1#AD8

C2128
SC1U6D3V2KX-GP

C2129
SC22U6D3V5MX-2GP
R2108 1 2 0R2J-2-GP +V3.3S_PCORE V8 GPIO/LCC

1
VCC3_3 3D3V_S0
W9

1
1D05V_M C2127 VCC3_3
J15 +1.5V_THERMAL DY

2
SC22U6D3V5MX-2GP THERMAL SENSOR VCCTS1_5
C K14 C

2
VCC3_3
K16

2
VCC3_3

C2134
SC1U6D3V2KX-GP
R2109 1 DY 2 0R2J-2-GP +V1.05A_VCCUSB3SUS

1
ICC
C2132
SC1U6D3V2KX-GP

C2133
SC10U6D3V3MX-GP

1D05V_S0 +V1.05S_AXCK_LCPLL +V1.05S_AXCK_DCB J18 SDIO/PLSS

3D3V_S0
VCC1P05 VCCCLK
1

K19 U8 +V3.3S_1.8S_LPSS_SDIO
VCC1P05 VCCCLK

2
L2106 1 +V1.05S_AXCK_LCPLL VCCSDIO
DY DY 2 IND-2D2UH-196-GP A20 T9
+V1.05S_SSCF100 VCCACLKPLL VCCSDIO +V3.3S_1.8S_LPSS_SDIO R2110 1
J17 2 0R2J-2-GP
2

VCCCLK
C2135
SC1U6D3V2KX-GP

C2136
SC100U6D3V6MX-GP

+V1.05S_SSCFF R21
1

1
VCCCLK LPT LP POWER
T21
VCCCLK SUS OSCILLATOR
1 TP_V1.05S_SSCF100 K18 AB8 +V1.05A_AOSCSUS C2137
VCCCLK RSVD#K18 DCPSUS4
TP2102 1 TP_V1.05S_AXCK_DCB M20 SC1U6D3V2KX-GP
VCCCLK RSVD#M20
2

2
1D05V_M TP2103 1 TP_V1.05S_SSCFF V21
VCCCLK RSVD#V21 1D05V_S0
TP2104 +V3.3A_PSUS AE20 RSVD#AC20 VCCAPLL AC20 RSVD#AC20 1 TP2105
R2111 1 VCCSUS3_3
3D3V_S5_PCH 2 AE21 VCC1_05 VCCIO AG16 1D05V_S0
R2112 1 +V1.05A_USB2SUS VCCSUS3_3 USB2
DY 2 0R2J-2-GP 0R2J-2-GP VCC1_05 VCCIO AG17
1
C2139
SC22U6D3V5MX-2GP
+V1.05S_SSCFF R2113 2 1 0R2J-2-GP
C2138
SC1U6D3V2KX-GP
1

SC1U6D3V2KX-GP
C2141
2

1
DY HASWELL-3-GP-U
2

2
SSI_0618 +V3.3A_DSW_P
3D3V_S5_PCH

R2114 1 2 0R2J-2-GP +V3.3A_DSW_P

DY
3D3V_S5
1

C2142
R2115 1 2 0R2J-2-GP SCD1U10V2KX-5GP
+V3.3A_DSW_P PCH_VCCDSW
2

C2147

1 DY2
1D05V_S0 SCD47U6D3V2KX-GP

R2116 1 2 0R2J-2-GP +V1.05S_SSCF100

B B
C2143
SC1U6D3V2KX-GP
1
2

3D3V_S0
+1.5V_THERMAL
U2101

5 1
OUT IN
VOUT=VREF X (R1/R2 + 1) GND
2

C2145
SC1U6D3V2KX-GP

C2146
SC1U6D3V2KX-GP
4 3

1
NC#4 EN

TLV70215DBVR-GP

2
74.70215.03F
2nd = 74.01339.B3F
300 mA

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER1)
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 21 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

CPU1Q 17 OF 19

TP2201 1 DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

TP2202 DC_TEST_AY3_AW3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 TP_DC_TEST_A4 TP2203
1 AY3 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 A4 1
TP2204 1 TP_DC_TEST_AY60 AY60
TP2205 DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 TP_DC_TEST_A60 TP2206
1 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 A60 1
TP2207 1 DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61
TP2208 TP_DC_TEST_B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 TP_DC_TEST_A62 TP2209
1 B2 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 A62 1
TP2210 1 DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1 1 TP2211
TP2212 DC_TEST_A61_B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP_DC_TEST_AW1 1 TP2213
1 B61 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW1
DC_TEST_B62_B63 B62 AW2 DC_TEST_AY2_AW2
DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 DC_TEST_AY3_AW3
B63 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW3
DC_TEST_C1_C2 C1 AW61 DC_TEST_AY61_AW61
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 DC_TEST_AY62_AW62
C2 DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW62
AW63 TP_DC_TEST_AW63 1 TP2214
DAISY_CHAIN_NCTF_AW63
HASWELL-3-GP-U
C C

CPU1R 18 OF 19

RSVD#N23 N23
RSVD#R23 R23
RSVD#T23 T23
AT2 RSVD#AT2
RSVD#U10 U10
AU44 RSVD#AU44
AV44 RSVD#AV44
D15 RSVD#D15
RSVD#AL1 AL1
RSVD#AM11 AM11
RSVD#AP7 AP7
F22 RSVD#F22
RSVD#AU10 AU10
H22 RSVD#H22
RSVD#AU15 AU15
J21 RSVD#J21 RSVD#AW14 TP2 AW14
RSVD#AY14 TP1 AY14
B B

HASWELL-3-GP-U

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RSVD)
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 22 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PCH

CPU1O 15 OF 19
CPU1N 14 OF 19
AP22 VSS VSS AV59
A11 VSS VSS AJ35 AP23 VSS VSS AV8
A14 VSS VSS AJ39 AP26 VSS VSS AW16
D A18 VSS VSS AJ41 AP29 VSS VSS AW24 D
A24 VSS VSS AJ43 AP3 VSS VSS AW33
A28 VSS VSS AJ45 AP31 VSS VSS AW35
A32 VSS VSS AJ47 AP38 VSS VSS AW37
A36 VSS VSS AJ50 AP39 VSS VSS AW4
A40 VSS VSS AJ52 AP48 VSS VSS AW40
A44 VSS VSS AJ54 AP52 VSS VSS AW42
A48 VSS VSS AJ56 AP54 VSS VSS AW44
A52 VSS VSS AJ58 AP57 VSS VSS AW47
A56 VSS VSS AJ60 AR11 VSS VSS AW50
AA1 VSS VSS AJ63 AR15 VSS VSS AW51
AA58 VSS VSS AK23 AR17 VSS VSS AW59
AB10 VSS VSS AK3 AR23 VSS VSS AW60
AB20 VSS VSS AK52 AR31 VSS VSS AY11
AB22 VSS VSS AL10 AR33 VSS VSS AY16
AB7 VSS VSS AL13 AR39 VSS VSS AY18
AC61 VSS VSS AL17 AR43 VSS VSS AY22
AD21 VSS VSS AL20 AR49 VSS VSS AY24
AD3 VSS VSS AL22 AR5 VSS VSS AY26
AD63 VSS VSS AL23 AR52 VSS VSS AY30
AE10 VSS VSS AL26 AT13 VSS VSS AY33
AE5 VSS VSS AL29 AT35 VSS VSS AY4
AE58 VSS VSS AL31 AT37 VSS VSS AY51
AF11 VSS VSS AL33 AT40 VSS VSS AY53
AF12 VSS VSS AL36 AT42 VSS VSS AY57
AF14 VSS VSS AL39 AT43 VSS VSS AY59
AF15 VSS VSS AL40 AT46 VSS VSS AY6
AF17 VSS VSS AL45 AT49 VSS VSS B20
AF18 VSS VSS AL46 AT61 VSS VSS B24
C AG1 AL51 AT62 B26 C
VSS VSS VSS VSS
AG11 VSS VSS AL52 AT63 VSS VSS B28
AG21 VSS VSS AL54 AU1 VSS VSS B32
AG23 VSS VSS AL57 AU16 VSS VSS B36
AG60 VSS VSS AL60 AU18 VSS VSS B4
AG61 VSS VSS AL61 AU20 VSS VSS B40
AG62 VSS VSS AM1 AU22 VSS VSS B44
AG63 VSS VSS AM17 AU24 VSS VSS B48
AH17 VSS VSS AM23 AU26 VSS VSS B52
AH19 VSS VSS AM31 AU28 VSS VSS B56
AH20 VSS VSS AM52 AU30 VSS VSS B60
AH22 VSS VSS AN17 AU33 VSS VSS C11
AH24 VSS VSS AN23 AU51 VSS VSS C14
AH28 VSS VSS AN31 AU53 VSS VSS C18
AH30 VSS VSS AN32 AU55 VSS VSS C20
AH32 VSS VSS AN35 AU57 VSS VSS C25
AH34 VSS VSS AN36 AU59 VSS VSS C27
AH36 VSS VSS AN39 AV14 VSS VSS C38
AH38 VSS VSS AN40 AV16 VSS VSS C39
AH40 VSS VSS AN42 AV20 VSS VSS C57
AH42 VSS VSS AN43 AV24 VSS VSS D12
AH44 VSS VSS AN45 AV28 VSS VSS D14
AH49 VSS VSS AN46 AV33 VSS VSS D18
AH51 VSS VSS AN48 AV34 VSS VSS D2
AH53 VSS VSS AN49 AV36 VSS VSS D21
AH55 VSS VSS AN51 AV39 VSS VSS D23
AH57 VSS VSS AN52 AV41 VSS VSS D25
AJ13 VSS VSS AN60 AV43 VSS VSS D26
AJ14 VSS VSS AN63 AV46 VSS VSS D27
B B
AJ23 VSS VSS AN7 AV49 VSS VSS D29
AJ25 VSS VSS AP10 AV51 VSS VSS D30
AJ27 VSS VSS AP17 AV55 VSS VSS D31
AJ29 VSS VSS AP20
HASWELL-3-GP-U

HASWELL-3-GP-U

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 23 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

3D3V_S5
SSID = KBC
RTC_AUX_S5

R2402 1 2 0R2J-2-GP
3D3V_S5

1
C2402
SCD1U10V2KX-5GP U2401

2
R2401 1 2 0R3J-0-U-GP VTR_ADC VBAT B64 A10 SYSTEM_ID
VBAT GPIO21/RC_ID1

C2401
SCD1U10V2KX-5GP

C2406
SC1U6D3V2KX-GP
X01-20130226 B10 BOARD_ID

1
GPIO20/RC_ID2 USB_SIDE_EN# RN2404
B8
L2107 1 H_VTR GPIO14/GPTP-IN7/RC_ID3 LAN_WAKE# USB_SIDE_EN# 35 PBAT_SMBCLK
2 MMZ1608S121AT-GP A22 B27 3 2
H_VTR GPIO25/UART_CLK HOST_DEBUG_TX LAN_WAKE# 20,94 PBAT_SMBDAT
B44 4 1

1
C2407 C2408 GPIO120/UART_TX HOST_DEBUG_RX
B46
SCD1U10V2KX-5GP SC1U6D3V2KX-GP VTR_ADC GPIO124/GPTP-OUT5/UART_RX SRN2K2J-1-GP
A58 B26
VTR_ADC VCC_PWRGD EN_INVPWR RUNPWROK 36
A25 EN_INVPWR 52

2
GPIO60/KBRST/BCM_B_INT#
B36
GPIO101/ECGP_SCLK/GANG_DATA5 WLAN_LAN_DISBL# 94
D B3 B37 D
VTR GPIO103/ECGP_MISO/GANG_DATA7 SIO_SLP_LAN# 17,36

C2409
SC10U10V5KX-2GP

C2410
SCD1U10V2KX-5GP

C2403
SCD1U10V2KX-5GP

C2411
SCD1U10V2KX-5GP

C2404
SCD1U10V2KX-5GP

C2405
SCD1U10V2KX-5GP

C2412
SCD1U10V2KX-5GP

C2413
SCD1U10V2KX-5GP
A11 B38 PCIE_WAKE# R2433 1 2 PCIE_WLAN_WAKE# 58
1

1
VTR GPIO105/ECGP_MOSI PBAT_PRES# 0R2J-2-GP
A26 A34 PBAT_PRES# 43,44
VTR GPIO102/BCM_C_INT#/GANG_DATA6 DYN_TUR_CURRNT_SET# RN2406
B35 A35 DYN_TUR_CURRNT_SET# 44
VTR GPIO104 SIO_SLP_S0#_R R2403 1 CHARGER_SMBCLK
A41 A36 2 0R2J-2-GP 4 1
2

2
VTR GPIO106 MSDATA SIO_SLP_S0# 17,48 CHARGER_SMBDAT
A52 A40 3 2
VTR GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAP MSCLK
B43
GPIO117/MSCLK/V2P_COUT_HI EC5075_GPIO127 SRN2K2J-1-GP
A45 1 TP1904
GPIO127/A20M FWP#
B65
FWP# BC_DAT_ECE1117 100KR2J-1-GP
18 SML1_SMBDATA A5 2 1 R2404
GPIO7/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA/GANG_BUSY BC_DAT_ECE1099 100KR2J-1-GP
18 SML1_SMBCLK B6 2 1 R2405
GPIO10/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_ERROR USBPWRSHR_VBUS_EN
62 CLK_TP_SIO A37 B57
GPIO110/PS2_CLK2/GPTP-IN6 GPIO156/LED0 USBPWRSHR_VBUS_EN 35 USBPWRSHR_VBUS_EN 100KR2J-1-GP
62 DAT_TP_SIO B40 B1 2 1 R2416
GPIO111/PS2_DAT2/GPTP-OUT6 GPIO157/LED1 SUSACK# 17
52 LCD_TST A38 A55
GPIO112/PS2_CLK1A GPIO153/LED2 PSID_EC 42
17,36,49 SIO_SLP_S4# B41 A1
GPIO113/PS2_DAT1A GPIO27/GPTP-OUT1 ALW_PWRGD_3V_5V 17,45 BREATH_LED# 100KR2J-1-GP
17,36,49 SIO_SLP_S3# A39 B28 2 DY 1 R2428
SSI_0611 B42
GPIO114/PS2_CLK0A GPIO26/GPTP-IN1
B2 USBPOWERSHARE_EN# A_ON 36,48
36,49 RUN_ON GPIO115/PS2_DAT0A GPIO1/ECSPI_CS1 USBPOWERSHARE_EN# 35
PBAT_SMBDAT B59 A8 PBAT_PRES# 100KR2J-1-GP 2 1 R2412
43 PBAT_SMBDAT PBAT_SMBCLK GPIO154/I2C1C_DATA/PS2_CLK1B GPIO15/GPTP-OUT7/GANG_DATA3 EC5075_GPIO16 ME_SUS_PWR_ACK 17
43 PBAT_SMBCLK A56 B9 1 TP1909
GPIO155/I2C1C_CLK/PS2_DAT1B GPIO16/GPTP-IN8/GANG_DATA4 PM_APWROK
A9 PM_APWROK 36
JTAG_TDI GPIO17/GPTP-OUT8 RESET_OUT#
A51 B39 RESET_OUT# 17,36
JTAG_TDO GPIO145/I2C1K_DATA/JTAG_TDI GPIO107/RESET_OUT# PCH_PCIE_WAKE# WWAN_RADIO_DIS# 100KR2J-1-GP 2
0 = Reset JTAG I/F B55 A44 PCH_PCIE_WAKE# 17 1 R2407
JTAG_CLK GPIO146/I2C1K_CLK/JTAG_TDO GPIO125/GPTP-IN5 PCH_RSMRST#
B56 B47 PCH_RSMRST# 17
1 = Disable JTAG_TMS A53
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO126
A54
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO151/GPTP-IN4 AC_PRESENT 17
JTAG_RST# A57 B58 SIO_PWRBTN# AC_DIS 100KR2J-1-GP 2 1 R2406
3D3V_S0 JTAG_RST# GPIO152/GPTP-OUT4 SIO_PWRBTN# 17

26 FAN1_TACH_FB FAN1_TACH_FB B22 A3

LID_CL_SIO# GPIO50/FAN_TACH1/GTACH GPIO3/I2C1A_DATA/GANG_MODE SIO_SLP_A# LCD_VCC_TEST_EN 36
61,98 LID_CL_SIO# A21 B4 SIO_SLP_A# 17,36,48
GPIO51/FAN_TACH2 GPIO4/I2C1A_CLK/GANG_START DAT_I2C_TP_EC PCIE_WAKE# 10KR2J-3-GP
20 EC_WAKE# B23 A4 1 TP1911 2 1 R2408
R2409 1 FAN1_TACH_FB GPIO52/FAN_TACH3 GPIO5/I2C1B_DATA/BCM_B_DAT/GANG_STROBE CLK_I2C_TP_EC
2 10KR2J-3-GP 36,49 SUS_ON B24 B5 1 TP1912
BREATH_LED# GPIO53/PWM0 GPIO6/I2C1B_CLK/BCM_B_CLK/GANG_FULL SYS_PWROK DYN_TUR_CURRNT_SET# 100KR2J-1-GP 2
61 BREATH_LED# A23 B7 1 R2410
R2411 1 FAN1_PWM BIA_PWM_EC GPIO54/PWM1 GPIO12/I2C1H_DATA/I2C2D_DATA/GANG_DATA1 SYS_PWROK 17,36,96
2 10KR2J-3-GP 52 BIA_PWM_EC B25 A7
FAN1_PWM GPIO55/PWM2 GPIO13/I2C1H_CLK/I2C2D_CLK/GANG_DATA2 ENVDD_PCH 15,36 HOST_DEBUG_RX 10KR2J-3-GP
26 FAN1_PWM A24 B48 SIO_EXT_WAKE# 20 2 1 R2414
GPIO56/PWM3/GPWM GPIO130/I2C2A_DATA/BCM_C_DAT PCH_ALW_ON
B49 PCH_ALW_ON 36
GPIO131/I2C2A_CLK/BCM_C_CLK CHARGER_SMBDAT
A47 CHARGER_SMBDAT 44
GPIO132/I2C1G_DATA CHARGER_SMBCLK
B50 CHARGER_SMBCLK 44
GPIO140/I2C1G_CLK SIO_SLP_SUS# USBPOWERSHARE_EN# 100KR2J-1-GP
99 BC_CLK_ECE1099 A43 B52 SIO_SLP_SUS# 17 2 1 R2415
GPIO123/BCM_A_CLK GPIO141/I2C1F_DATA/I2C2B_DATA EC5075_GPIO142
99 BC_DAT_ECE1099 B45 A49 1 TP1905
GPIO122/BCM_A_DAT GPIO142/I2C1F_CLK/I2C2B_CLK WWAN_RADIO_DIS#
99 BC_INT#_ECE1099 A42 B53 WWAN_RADIO_DIS# 59
ACAV_IN_NB GPIO121/BCM_A_INT# GPIO143/I2C1E_DATA USB_SIDE_EN# 100KR2J-1-GP
44 ACAV_IN_NB B20 A50 PCH_DPWROK 17 2 1 R2413
GPIO32/BCM_E_CLK GPIO144/I2C1E_CLK
17 SIO_SLP_S5# A18
BEEP GPIO31/GPTP-OUT2/BCM_E_DAT SYSPWR_PRES
C
27 BEEP B19 A59 C
BC_CLK_ECE1117 GPIO30/GPTP-IN2/BCM_E_INT# SYSPWR_PRES
62 BC_CLK_ECE1117 A20
BC_DAT_ECE1117 GPIO47/LSBCM_D_CLK
62 BC_DAT_ECE1117 B21 A64
R2466 1 SYS_PWROK BC_INT#_ECE1117 GPIO46/LSBCM_D_DAT VCI_OVRD_IN ALWON ACAV_IN 44
2 100KR2J-1-GP 62 BC_INT#_ECE1117 A19 A60 ALWON 36
GPIO45/LSBCM_D_INT# VCI_OUT POWER_SW_IN# RTC_AUX_S5
B67
R2465 1 EC5075_GPIO142 VCI_IN0# EC5075_VCI_IN1# 1D05V_S0
2 100KR2J-1-GP 16,20 SIO_EXT_SMI# A6 A63
GPIO11/SMI#/GANG_DATA0 VCI_IN1# VCI_IN2# VCI_IN2# 100KR2J-1-GP 1
20 SIO_RCIN# A27 B63 2 R2417
R2425 1 LCD_TST IRQ_SERIRQ GPIO61/LPCPD# VCI_IN2# POA_WAKE#
2 100KR2J-1-GP 20,88 IRQ_SERIRQ A28 B68 R2424 1 2 0R2J-2-GP
PCH_PLTRST#_EC SER_IRQ VCI_IN3# POA_WAKE# 100KR2J-1-GP 1
17,58,59,65,88 PCH_PLTRST#_EC B30 2 R2419
CLK_PCI_MEC LRESET# PECI_VREF C2415 1
18 CLK_PCI_MEC A29 B51 2 SCD1U10V2KX-5GP
LPC_LFRAME# PCI_CLK VREF_PECI PECI_EC_R R2426 1 SIO_PWRBTN#
18,65,88 LPC_LFRAME# B31 A48 2 43R2J-GP H_PECI 4
100KR2J-1-GP 1 DY 2 R2421
LPC_LAD0 LFRAME# PECI_DAT
18,65,88 LPC_LAD0 A30
LPC_LAD1 LAD0 C2416 1 SC100P50V2JN-3GP EC5075_VCI_IN1# 100KR2J-1-GP 1
18,65,88 LPC_LAD1 B32 DY 2 2 R2436
R2420 1 SIO_SLP_S0# LPC_LAD2 LAD1 REM_DIODE1_N
DY 2 100KR2J-1-GP 18,65,88 LPC_LAD2 A31 B13 REM_DIODE1_N 26
LPC_LAD3 LAD2 DN1-THERM REM_DIODE1_P
18,65,88 LPC_LAD3 B33 A13 REM_DIODE1_P 26
R2422 1 PCH_RSMRST# LAD3 DP1-VREF_T REM_DIODE2_N
2 10KR2J-3-GP 17,88 CLKRUN# A32 B14 REM_DIODE2_N 26
CLKRUN# DN2 REM_DIODE2_P
20 SIO_EXT_SCI# A33 A14 REM_DIODE2_P 26
R2423 1 FAN1_PWM GPIO100/EC_SCI# DP2 MEC5075_DN3 R2431 1
DY 2 100KR2J-1-GP A15 2 820R2J-GP
MEC_XTAL1 DN3 MEC5075_DP3
A61 B16
MEC_XTAL2 XTAL1 DP3
R2432 1 2 0R2J-2-GP MEC_XTAL2_R A62 A16 REM_DIODE4_N
REM_DIODE4_N 26
XTAL2 DN4 REM_DIODE4_P
B62 B17 REM_DIODE4_P 26
R2427 1 EN_INVPWR GPIO160/32KHZ_OUT DP4
2 100KR2J-1-GP B15
VIN VSET_5075
A17
VSET VCP
A12
X2401 VCP THERMATRIP2# VCP 44 RTC_AUX_S5
B34
R2429 1 RESET_OUT# THERMTRIP2# AC_DIS
2 8K2R2J-3-GP A2 AC_DIS 42
GPIO2/THERMTRIP3# THSEL_STRAP

VSS_ADC
1 4 B29

VSS_RO
VR_CAP

1
R2430 1 FAN1_TACH_FB GPIO24/THSEL_STRAP PROCHOT#_EC
DY 2 100KR2J-1-GP A46

H_VSS
1

AGND
C2417 C2418 PROCHOT_IN#/PROCHOT_IO# BQ24715_IOUT_R R2434 1
B61 2 4K7R2J-2-GP R2418

GND
VSS
SC27P50V2JN-2-GP SC27P50V2JN-2-GP V_ISYS BQ24715_IOUT 44
100KR2J-1-GP
2 3
2

MEC5075-LZY-GP

B66

B11

B60

KBC_VR_CAP B12

B54

B18

C1

2
71.05075.003
XTAL-32D768KHZ-65-GP POWER_SW_IN# 1 2 R2435 MB_PWR_BTN# 17,61
82.30001.841 10KR2J-3-GP

1
C2419
SC1U6D3V2KX-GP

2
1
B C2421 B
SC4D7U6D3V3KX-GP

2
R2437
THSEL_STRAP 1KR2J-1-GP 2 1

3D3V_S5 CLK_PCI_MEC 3D3V_S5

VSET_5075
1
1

1
C2422
SCD1U10V2KX-5GP
R2439

1
R2438 3D3V_S5
100KR2J-1-GP
DY 10R2J-2-GP R2440
10KR2J-3-GP
R2441
953R2F-GP
2

2
CLK_PCI_MEC_C

Place close
2

2
1
JTAG_RST# FWP#
to Pin58 R2442
2

1
C2423
SC1U6D3V2KX-GP

8K2R2J-3-GP
1

R2443 R2444
100R2J-2-GP DY DY 10KR2J-3-GP

2
THERMATRIP2#
2

C2424 3D3V_S5 1D05V_S0 3D3V_AUX_S5

1

C2425
SCD1U10V2KX-5GP
DY SC4D7P50V2CN-1GP

1
R2445 1 2THERMTRIP2#_B 1 Q2402
2

2K2R2J-2-GP PMBS3904-1-GP

2
X01-20130227
1

1
R2446
49D9R2F-GP

R2447
10KR2J-3-GP

R2448
10KR2J-3-GP

R2449
10KR2J-3-GP

R2450
10KR2J-3-GP

R2451
10KR2J-3-GP

R2452
100KR2J-1-GP

R2453
10KR2J-3-GP

R2454
10KR2J-3-GP

3D3V_S5 20 H_THERMTRIP# R2455

84.03904.L06
DY 1KR2J-1-GP
2ND = 84.03904.P11
Need to check System ID later
2

2
1

JTAG1 SYSPWR_PRES
R2456 R2457 11 1D05V_S0

1
1KR2J-1-GP 240KR2F-L-GP Round Rock 13.3" UMA Revision 1 JTAG_PU
R2458
BOARD_ID BOARD_ID 2 JTAG_TDI 100KR2J-1-GP
2

BOARD_ID SYSTEM_ID Cap. Value Cap. Value REV 3 JTAG_TMS

A SYSTEM_ID JTAG_CLK R2459 A
4

2
4700pF 240k ohm X00 5 JTAG_TDO DY 10KR2J-3-GP
1

C2426 C2427 6 MSCLK

SC4700P50V2KX-1GP SC4700P50V2KX-1GP 1k ohm 4700pF 130k ohm X01 7 MSDATA
2

8 HOST_DEBUG_TX_C R2460 1 2 0R2J-2-GP HOST_DEBUG_TX PROCHOT#_EC R2461 1 2 0R2J-2-GP

2

4700pF 4700pF 62k ohm X02 9 EC5048_TX

1

10 <Core Design>
G
4700pF 33k ohm -1 12 R2462 Q2401
DY 100KR2J-1-GP 2N7002K-1-GP
ACES-CON10-28-GP R2463 pull DN, Enable JTAG debug mode 84.2N702.031 Wistron Corporation
20.K0460.010 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

MSDATA R2463 1
S DY D H_PROCHOT# 4,42,44,46 Taipei Hsien 221, Taiwan, R.O.C.
2 10KR2J-3-GP

1
Title
C2428
SC47P50V2JN-3GP EC - MEC5075

2
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 24 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = Flash.ROM
SPI ROM Equal length need to less than 500mil

3D3V_M 3D3V_M
ROMSK1
R2501 1 2 1KR2J-1-GP SPI_HOLD# SPI_CS0# 1 8
SPI_DIN_64 2 7 SPI_HOLD#
R2509 1 2 1KR2J-1-GP SPI0_W P# SPI0_W P#_1 3 DY 6 SPI_CLK_64
D 4 5 SPI_DI_64 D
R2510 1 2 3K3R2J-3-GP PCH_SPI_CS0#
SKT-G6179HT0321-001-GP
Schematic Design Checklist
Single Device: 15 62.10089.011
3D3V_M
Multiple Devices: 33 per branch

R2502

C2502
SC10U6D3V3MX-GP

C2501
SCD1U10V2KX-5GP
1

1
18 PCH_SPI_SO 1 2 SPI_DIN_64

DY

2
15R2J-GP
SYSTEM SPI ROM
R2503
63,)ODVK5200IRU3&+ 3D3V_M
18 PCH_SPI_CLK 1 2 SPI_CLK_64 U2501

R2511 1 2 0R2J-2-GP SPI_CS0# 1 8

15R2J-GP 18 PCH_SPI_CS0#
SPI_DIN_64 2
CS# VCC
7 SPI_HOLD# Layout Note: Close to U2501 Pin 8
R2514 1 DO/IO1 HOLD#/IO3
18 SPI0_W P# 2 0R2J-2-GP SPI0_W P#_1 3 WP#/IO2 CLK 6 SPI_CLK_64
4 5 SPI_DI_64
R2504 GND DI/IO0
99 SPI_W P#_SEL R2517 1 DY 2 0R2J-2-GP
18 PCH_SPI_SI 1 2 SPI_DI_64

1
SC4D7P50V2CN-1GP
W 25Q64FVSSIQ-GP EC2501
DY EC2507 72.25Q64.K01 DY DY EC2502
15R2J-GP SC4D7P50V2CN-1GP ϮŶĚсϳϮ͘Ϯϱϲϰϳ͘ϬϬ SC4D7P50V2CN-1GP

2
C C

R2505

18 SPI_HOLD_0# 1 2 SPI_HOLD# SSI_0618

15R2J-GP

B B

SSID = RTC 3D3V_AUX_S5

RTC_AUX_S5 Q2501
2 +RTC_PW R

3 RTC1
R2528 3
A 1RTC_PW R 1 2 +RTC_PW R 1 <Core Design> A

RB715F-1-GP 1KR2J-1-GP 2
83.R2004.D81 AFTP2501
Width=20mils
1 4
Wistron Corporation
ACES-CON2-20-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
20.F1639.002 Taipei Hsien 221, Taiwan, R.O.C.
ϮŶĚсϮϬ͘&ϭϴϰϭ͘ϬϬϮ
Title
Flash/RTC
Size Document Number Rev
+RTC_PW R AFTP2502 A3
1
Round Rock 13.3" UMAX00
Date: Friday, June 28, 2013 Sheet 25 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = Thermal
3D3V_S0

ϴϰ͘ϬϯϵϬϰ͘>Ϭϲ
ϮEсϴϰ͘ϬϯϵϬϰ͘Wϭϭ
U2601
D REM_DIODE1_P REM_DIODE1_P 24 24 FAN1_PWM 1 6 FAN1_PWM_Q D

2 5
3

1
1 DY C2601 C2607 FAN1_TACH_Q 3 4 FAN1_TACH_FB 24
Q2601 SC100P50V2JN-3GP SC2200P50V2KX-2GP
2

2
PMBS3904-1-GP 2N7002KDW-GP
2

REM_DIODE1_N REM_DIODE1_N 24 ϴϰ͘ϮEϳϬϮ͘ϯ&

2nd = 84.DM601.03F
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ& 5V_S0 5V_S0

Layout Note: Close to EC

)$1

1
2K2R2J-2-GP
R2529

2K2R2J-2-GP
R2530
Layout Note: Place to CPU
Both DXN and DXP routing 10 mil trace width and 10 mil spacing.
SSI_0621

2
ϴϰ͘ϬϯϵϬϰ͘>Ϭϲ FAN1
ϮEсϴϰ͘ϬϯϵϬϰ͘Wϭϭ 6
C FAN1_PWM_Q 4 C
REM_DIODE2_P REM_DIODE2_P 24 FAN1_TACH_Q 3
5V_S0 2
3

AFTP2601 1 1
1 DY C2602 C2603 5
Q2602 SC100P50V2JN-3GP SC2200P50V2KX-2GP
2

K
PMBS3904-1-GP ACES-CON4-7-GP-U
2

1
REM_DIODE2_N REM_DIODE2_N 24 C2604 D1 20.F0772.004
SC4D7U6D3V3KX-GP DY RB551VM-30TE-17-GP
83.R5003.N8F

A
Layout Note: Close to EC
Layout Note: FAN1_TACH_Q 1 AFTP2602
Layout Note:Place to DIMM Signal Routing Guideline: FAN1_PWM_Q 1 AFTP2603
Both DXN and DXP routing 10 mil trace width and 10 mil spacing. Trace width = 15mil

ϴϰ͘ϬϯϵϬϰ͘>Ϭϲ
B ϮEсϴϰ͘ϬϯϵϬϰ͘Wϭϭ B

REM_DIODE4_P REM_DIODE4_P 24
3

1 DY C2605 C2606
Q2603 SC100P50V2JN-3GP SC2200P50V2KX-2GP
2

PMBS3904-1-GP
2

REM_DIODE4_N REM_DIODE4_N 24

Layout Note: Close to EC

Layout Note:Place to V.R <Core Design>
Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Thermal/Fan
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 26 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = AUDIO
3D3V_S0 3V_DVDD
106.871mA
R2745
5V_S0 5V_S0_AUDIO
1514.542 mA 29 MIC2-VREFO
1
0R3J-0-U-GP
2

AUD_AGND

AUD_AGND
R2744 29 LINE1-VREFO-R

1
29 LINE1-VREFO-L C2727
1 2
0R3J-0-U-GP 29 AUD_HP1_JACK_L SC10U6D3V3MX-GP

1
C2708 29 AUD_HP1_JACK_R

2
R2708 SC10U6D3V3MX-GP
1 2 1.5A
0R3J-0-U-GP 2

SC1U6D3V2KX-GP
5V_S0_AUDIO 5V_PVDD
Max =41mA

SC2D2U6D3V2MX-GP
+1.5V_THERMAL +3V_1D5V_AVDD

SC10U6D3V3MX-GP
R2705
D 1 2 R2703 1 2 0R2J-2-GP D
5V_S0_AUDIO 5V_AVDD
14.542 mA

1 C2710

1 C2711
0R3J-0-U-GP C2728 C2705 C2706 C2709

SCD1U16V2KX-3GP
R2738 R2706 105.9mA

1
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
1 2 1 2 3V_DVDD 3V_AVDD
R2739

3V_AVDD
0R3J-0-U-GP 0R3J-0-U-GP R2737

1
100KR2J-1-GP 1 2

CPVEE 2
1

C2702 C2703 C2704

C2707
0R2J-2-GP SC4D7U6D3V3KX-GP

LINE1-VREFO-R
Layout Note:

LINE1-VREFO-L
SC4D7U6D3V3KX-GP

2
2
SCD1U16V2KX-3GP
2

C2701

AUD_VREF
Place close to Pin 26

LDO1_CAP
Layout Note: 5V_AVDD SC4D7U6D3V3KX-GP

1
CBN
Layout Note: AUD_AGND

1
Close PIN41 Close PIN46 C2712 AUD_AGND close to pin 40
SC1U10V2KX-1GP

2
AUD_AGND

36

35

34

33

32

31

30

29

28

27

26

25
close to pin 36
U2701

HPOUT-L/PORT-I-L
CPVEE

MIC2-VREFO

LDO1-CAP
LINE1-VREFO-L

AVDD1

AVSS1
CPVDD

CBN

HPOUT-R/PORT-I-R

LINE1-VREFO-R

VREF
R2740
1 2
0R3J-0-U-GP CBP 37 24
R2741 Layout Note: CBP LINE2_L/PORT-E-L
1 2 trace width=30mil AUD_AGND 38
AVSS2 LINE2_R/PORT-E-R
23
0R3J-0-U-GP R2707,R2709,R2710,R2711 near CODEC
R2742 AUD_AGND SC10U6D3V3MX-GP 2 1 C2713 LDO2_CAP 39 22
LDO2-CAP LINE1_L/PORT-C-L LINE1-L 29
1 2
0R3J-0-U-GP
Analog +3V_1D5V_AVDD 40
AVDD2 LINE1_R/PORT-C-R
21
LINE1-R 29

DigiTal 5V_PVDD 41 20
PVDD1 NC#20
AUD_AGND Layout Note: R2707 1 2 0R3J-0-U-GP AUD_SPK_L+ 42 19 MIC_CAP 1 2 AUD_AGND
29 AUD_SPK_L+_R SPK-OUT-L+ MIC-CAP C2714 SC10U6D3V3MX-GP
Tied at point only under SSID 0x061F
R2709 1 2 0R3J-0-U-GP AUD_SPK_L- 43 18
Codec or near the Codec 29 AUD_SPK_L-_R SPK-OUT-L- SVID 0x1028 MIC2_R/PORT-F-R/SLEEVE SLEEVE 29
R2710 1 2 0R3J-0-U-GP AUD_SPK_R- 44 17 3V_DVDD
29 AUD_SPK_R-_R SPK-OUT-R- MIC2_L/PORT-F-L/RING RING2 29
R2711 1 2 0R3J-0-U-GP AUD_SPK_R+ 45 16 R2727

1
29 AUD_SPK_R+_R SPK-OUT-R+ MONO-OUT 0R2J-2-GP
Change form 83.R0304.A8F to 83.1PS76.01F SPDIFO R2736
5V_PVDD 46
PVDD2 SPDIFO/FRONT_JD/JD3/GPIO3
15 1 DY 2 AUD_AGND DY

GPIO0/DMIC-DATA
C D2702 100KR2J-1-GP C

GPIO1/DMIC-CLK
EAPD#
99 AUD_NB_MUTE# K DY A 47
PDB MIC2/LINE2_JD/JD2
14
R2715 R2735

2
SDATA-OUT
1PS76SB40-GP-U 48 13 AUD_SENSE_A 1 2 AUD_SENSE 1 2
SPDIF-OUT/GPIO2 HP/LINE1_JD/JD1 AUD_HP_NB_SENSE 29,99

LDO3-CAP

SDATA-IN
83.1PS76.01F Layout Note: 0R2J-2-GP

DVDD-IO

PCBEEP

1
RESET#
49 0R2J-2-GP

2
GND

DVDD

SYNC
DVSS

BCLK
1 2 Place close to Pin 13 R2743
R2714 0R2J-2-GP Q2706 C2729
$]DOLD,)(0, 1 DY 2 Analog G
100KR2J-1-GP DY DY
SC4D7U6D3V3KX-GP

1
R2716 ALC3234-CG-GP

10

11

12

2
10KR2J-3-GP 71.03234.003 DigiTal D

ER2701 EC2701
3V_DVDD 1 DY 2
R2717 DY

1 LDO3_CAP
S
47R2J-2-GP SCD1U10V2KX-5GP 1KR2J-1-GP

DVSS
3V_DVDD 3V_DVDD
2N7002K-2-GP
HDA_CODEC_SDOUT
z 2PCH_AZ_CODEC_SDOUT1 z 2

C2719
1 1 C2717 84.2N702.J31
1

C2718
C2716 Change form75.00054.A7D to 75.00054.J7D

SCD1U16V2KX-3GP
1HDA_CODEC_BITCLK_C 1 z 2
HDA_CODEC_BITCLK
2
z
SC4D7U6D3V3KX-GP

1
EC2702 SB_SPKR_R
2

1
ER2702 SCD1U10V2KX-5GP

0R2J-2-GP
R2724
47R2J-2-GP

2
RN2701

SC10U6D3V3MX-GP

1
1 4

SCD1U16V2KX-3GP
HDA_SPKR 20
D2701 2 3 BEEP 24

2
DMIC: > 5mil and keep out the analog signal AUD_PC_BEEP 1 2 AUD_PC_BEEP_D 3 BAT54C-10-GP
close to pin 3 75.00054.J7D SRN0J-6-GP

1
R2719 1 2 DMIC_DATA_R C2720
52 DMIC_DATA 0R2J-2-GP SCD1U16V2KX-3GP R2718

2
DMIC_CLK R2720 1 2 DMIC_CLK_R 1KR2J-1-GP
52 DMIC_CLK 0R2J-2-GP
2

KBC_BEEP_R

2
C2721 19 HDA_CODEC_SDOUT
SC22P50V2JN-4GP
DY
1

19 HDA_CODEC_BITCLK R2721 X01 1121 To slove background noise

1 2 HDA_CODEC_SDIN0
19 HDA_SDIN0 33R2J-2-GP
19 HDA_CODEC_SYNC
SLEEVE 29
DMIC_DATA HDA_CODEC_RST#
19 HDA_CODEC_RST#
2

B EC2706 3D3V_AUX_S5 3D3V_S5 B

DY SC22P50V2JN-4GP

http://adf.ly/3o8pJ
1

D
R2722 R2723
DY 100KR2J-1-GP 100KR2J-1-GP Q2701
2N7002K-2-GP
84.2N702.J31

2
2ND = 84.2N702.W31
3rd = 84.07002.I31

S
Q2904_D

D
Q2702
3D3V_S0 AUD_AGND
2N7002K-2-GP
84.2N702.J31

1
2ND = 84.2N702.W31
DY R2725 3rd = 84.07002.I31
100KR2J-1-GP

S
R2726
0R2J-2-GP

2
99 AUD_NB_MUTE# 1 DY 2
R2729
0R2J-2-GP
1 2 HDA_CODEC_RST#_R
19 HDA_CODEC_RST#

1
C2723
SC1U6D3V2KX-GP

2
A A

EC2703 1 2 SCD1U10V2KX-5GP

EC2704 1 2 SCD1U10V2KX-5GP

EC2705 1 2 SCD1U10V2KX-5GP <Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AUD_AGND Title

Audio Codec ALC3234

Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 27 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 28 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = AUDIO
6SHDNHU 2W/ch

SPK1
6
4 AUD_SPK_L+_R
D AUD_SPK_L-_R AUD_SPK_L+_R 27 D
3
2 AUD_SPK_R-_R AUD_SPK_L-_R 27
AUD_SPK_R-_R 27
SSI_0625
1 AUD_SPK_R+_R AUD_SPK_L+_R
AUD_SPK_R+_R 27 AUD_SPK_L-_R
5
AUD_SPK_R-_R
ACES-CON4-7-GP-U AUD_SPK_R+_R
20.F0772.004

1
83.RSB56.BAF

RSB5D6SMT2R-GP
D2901
83.RSB56.BAF

RSB5D6SMT2R-GP
D2902
83.RSB56.BAF

RSB5D6SMT2R-GP
D2903
83.RSB56.BAF

RSB5D6SMT2R-GP
D2904
2

2
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
EC2901

EC2902

EC2903

EC2904
1

1
AFTP2902 1 AUD_SPK_L-_R
AFTP2903 1 AUD_SPK_L+_R

2
AFTP2904 1 AUD_SPK_R-_R
AFTP2905 1 AUD_SPK_R+_R

R2733 1 2 2K2R2J-2-GP
&RPER-DFN
C C
MIC2-VREFO 27
R2734 1 2 2K2R2J-2-GP

3V_DVDD
HPMIC1
3 RING2_R R2911 1 2 0R0603-PAD-1-GP-U RING2 27

1
1 AUD_PORTA_L_R_B R2912 1 2 0R3J-0-U-GP AUD_HP1_JACK_L1 R2907 1 2 10R2J-2-GP AUD_HP1_JACK_L 27 R2901
5 AUD_JACK_PWR DY 10KR2J-3-GP
6 AUD_HP_NB_SENSE AUD_HP_NB_SENSE 27,99
2 AUD_PORTA_R_R_B EL2903 1 2 0R0603-PAD-1-GP-U AUD_HP1_JACK_R1 R2908 1 2 10R2J-2-GP

2
MIC_JACK_R EL2904 1 AUD_HP1_JACK_R 27 AUD_JACK_PWR
4 2 0R0603-PAD-1-GP-U SLEEVE 27
MS
1

1
EC2905
SC100P50V2JN-3GP

EC2906
SC100P50V2JN-3GP

EC2907
SC100P50V2JN-3GP

EC2908
SC100P50V2JN-3GP
AUDIO-JK383-GP R2902
22.10270.S81 0R2J-2-GP
2

2SJ3080-014111F 2
B Normal Open AUD_AGND B

2
C2901 1 2 SC4D7U6D3V2MX-GP-U
AUD_AGNDAUD_AGNDAUD_AGNDAUD_AGND LINE1-L 27 AUD_AGND
C2902 1 2 SC4D7U6D3V2MX-GP-U LINE1-R 27

R2909 1 2 4K7R2J-2-GP LINE1-VREFO-L 27

R2910 1 2 4K7R2J-2-GP LINE1-VREFO-R 27

SSI_0625
RING2_R
AUD_PORTA_L_R_B
<Core Design>
AUD_HP_NB_SENSE
AUD_PORTA_R_R_B
MIC_JACK_R
Wistron Corporation
1

1
83.RSB56.BAF

RSB5D6SMT2R-GP
D2905

83.RSB56.BAF

RSB5D6SMT2R-GP
D2906

83.RSB56.BAF

RSB5D6SMT2R-GP
D2907

83.RSB56.BAF

RSB5D6SMT2R-GP
D2908

83.RSB56.BAF

RSB5D6SMT2R-GP
D2909

A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A

Taipei Hsien 221, Taiwan, R.O.C.
AFTP2901 1 MIC_JACK_R
AFTP2906 1 AUD_PORTA_L_R_B Title
AFTP2907 1 AUD_PORTA_R_R_B
AFTP2908 1 RING2_R Speaker/HPMIC CONN
2

AFTP2909 1 AUD_HP_NB_SENSE Size Document Number Rev

A4
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 29 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 30 of 107
5 4 3 2 1

www.vinafix.vn
 A B C D E

SSID = LOM

4 4
D3101 Q3101
K A LOM_SPD10LED_GRN#_D 4 3 LOM_GRN#
94 LOM_SPD10LED_GRN#
1PS76SB40-GP-U MASK_BASE_LEDS# 5 2 MASK_BASE_LEDS#
83.1PS76.01F
LOM_ORG# 6 1

2N7002KDW -GP
ϴϰ͘ϮEϳϬϮ͘ϯ&
2nd = 84.DM601.03F
D3102 ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
94 LOM_SPD100LED_ORG# K A LOM_SPD100LED_ORG#_D ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
1PS76SB40-GP-U
83.1PS76.01F
3D3V_LAN

SSI_0626
RJ45
10
LOM_GRN# R3101 1 2 150R2J-L1-GP-U LOM_GRN#_R A1

YELLOW
3 3
GREEN
A3
LOM_ORG# R3103 1 2 150R2J-L1-GP-U LOM_ORG#_R A2
ORANGE

MDO3- 8
MDO3+ 7
MDO1- 6
MDO2- 5
MDO2+ 4
MDO1+ 3
MDO0- 2
Q6119
S MDO0+ 1
94 LOM_ACTLED_YEL#
B1
LOM_ACTLED_YEL#_R R3102 1 2 150R2J-L1-GP-U NB_LOM_ACTLED_YEL#_R
YELLOW
D B2
AFTP3101 1 9
61 MASK_BASE_LEDS# G
RJ45-13P-30-GP
2N7002K-2-GP 22.10327.261
ϴϰ͘ϮEϳϬϮ͘:ϯϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
XF3101
94 LAN_MDI3N_INTEL 2 1CT:1CT 23 MDO3-
C3101 1 2 SCD1U10V2KX-5GP XRF_TDC1 1 24 MCT1
94 LAN_MDI3P_INTEL 3 22 MDO3+

94 LAN_MDI2N_INTEL 5 1CT:1CT 20 MDO2-

C3102 1 2 SCD1U10V2KX-5GP XRF_TDC2 4 21 MCT2 MDO3- 1 AFTP3102
2 MDO2+ MDO3+ AFTP3103 2
94 LAN_MDI2P_INTEL 6 19 1
MDO2- 1 AFTP3104
94 LAN_MDI1N_INTEL 8 1CT:1CT 17 MDO1- MDO2+ 1 AFTP3105
C3103 1 2 SCD1U10V2KX-5GP XRF_TDC3 7 18 MCT3 MDO1- 1 AFTP3106
94 LAN_MDI1P_INTEL 9 16 MDO1+ MDO1+ 1 AFTP3107
MDO0- 1 AFTP3108
94 LAN_MDI0N_INTEL 11 1CT:1CT 14 MDO0- MDO0+ 1 AFTP3109

MCT1
MCT2
MCT3
MCT4
C3104 1 2 SCD1U10V2KX-5GP XRF_TDC4 10 15 MCT4 LOM_GRN#_R 1 AFTP3110
94 LAN_MDI0P_INTEL 12 13 MDO0+ NB_LOM_ACTLED_YEL#_R 1 AFTP3111
3D3V_LAN 1 AFTP3112
LOM_ORG#_R 1 AFTP3113
XFORM-24P-60-GP
68.IH160.30A
2nd = 68.89240.30D

4
3
2
1
RN3101
SRN75J-1-GP

5
6
7
8 1 MCT_R
1 C3105 <Core Design> 1
SC100P3KV8JN-2-GP

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RJ45/Transformer
Size Document Number Rev
A3
X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 31 of 107
A B C D E

www.vinafix.vn
 5 4 3 2 1

SSID =Card Reader

R3201 1 DY 2 0R2J-2-GP

3D3V_S0
3D3V_S0_CARD
3D3V_S0 3D3V_S0_CARD

C3201
SCD1U10V2KX-5GP
1000 mA

1
U3203 R3206
1 1 2

2
17 PLTRST_MMI# B 0R5J-5-GP
D
VCC 5 D

SC10U6D3V5KX-1GP

C3235
SCD1U10V2KX-5GP
20 MEDIACARD_RST# 2 A

C3203
4 PCIE_CARD_PLT_RST# R3217
Y

1
3 GND 1 2

1
0R5J-5-GP DY DY
74LVC1G08GW -1-GP R3205

2
73.01G08.L04 100KR2J-1-GP

2
3D3V_S0_CARD R3207 1 2 0R2J-2-GP
C3205 1 2 SC4D7U6D3V2MX-GP-U
http://adf.ly/3o8pJ
C3206 1 2 SCD1U10V2KX-5GP

3D3V_S0 Bead Spec update to 100MHZ/600 ohm/600mA

C3207 1 2 SC4D7U6D3V2MX-GP-U
C3208 1 2 SCD1U10V2KX-5GP
1D2V_LDO
C3209 1 2 SCD1U10V2KX-5GP
C3210 1 2 SCD1U10V2KX-5GP L3202
1 2 PE_33VCCAIN 1 2 UHS2_12VCCAIN C3211 1 2 SC4D7U6D3V2MX-GP-U
L3201 C3212 1 2 SCD1U10V2KX-5GP
C3214
SC4D7U6D3V2MX-GP-U

C3216
SC4D7U6D3V2MX-GP-U

C3217
SCD1U10V2KX-5GP

C3218
SCD1U10V2KX-5GP

C3219
SC4D7U6D3V2MX-GP-U

C3220
SCD1U10V2KX-5GP
C BLM18BD601SN1D-GP BLM21AG601SN-1GP C3213 1 2 SCD1U10V2KX-5GP C
68.00082.531 68.00084.781 C3222 1 2 SCD1U10V2KX-5GP

MAIN_LDO_VIN
1

1
SD_CD#

1
C3234
2

1
AUX_LDO_CAP C3225 1 2 SC1U10V2KX-1GP R3216 SCD1U10V2KX-5GP
SD_IO_LDO_CAP C3226 1 2 SCD1U10V2KX-5GP 1MR2J-1-GP
C3227 1 2 SC4D7U6D3V2MX-GP-U

2
2
27

42

23

13

11

10

41

36
31
28

12

25
9

1
U3201
Differential impedance
PE_33VCCAIN

UHSII_33VCCAIN

SD_33VCCD

SD_SKT_33VIN

AUX_33VIN

MAIN_LDO_VIN

CORE_12VCCD

UHSII_12VCCAIN
UHSII_12VCCAIN
UHSII_12VCCAIN

PE_12VCCAIN

SD_IO_LDO_CAP
MAIN_LDO_12VOUT

AUX_LDO_CAP
of 85 Ohm add one more pull down 1Mohm resistor on SD_CD# for
R3208 1 2 U3201_PE_REXT 4
Layout Note: 191R2F-GP PE_REXT SD_VDD1 the OZ777FJ2LN-A.
For the OZ777FJ2LN-B, you can remove these 1Mohm
16 PCIE_TXN2 5 PE_RXM SD_VDD2 resistor and 0.1uF capacitor.
16 PCIE_TXP2 6 PE_RXP

16 PCIE_RXP2 C3230 1 2 PCIE_RXP2_C 7 22 C3228 1 2 SC1U6D3V2KX-GP

SCD1U10V2KX-5GP PE_TXP SD_SKT_33VOUT

16 PCIE_RXN2 C3229 1 2 PCIE_RXN2_C 8 24 C3232 1 2 SC4D7U6D3V2MX-GP-U

SCD1U10V2KX-5GP PE_TXM SD_SKT_18VOUT

18 CLK_PCIE_CARD# 2 PE_REFCLKM
18 CLK_PCIE_CARD 3 PE_REFCLKP SD_WPI 20 SD_W PI 33
SD_CD# 21 SD_CD# 33
43 SD_CLK_R R3209 1 2 0R2J-2-GP
B SD_CLK SD_CMD_R R3221 1 SD_CLK 33 B
SD_CMD 45 2 22R2J-2-GP SD_CMD 33
PCIE_CARD_PLT_RST# 15 1 DY2
PE_RST#_GATE# C3233
MMC_D7 39
40 SC5P50V2CN-2GP
R3210 1 MMC_D6
20 MEDIACARD_PW REN 2 0R2J-2-GP MAIN_LDO_EN 14 MAIN_LDO_EN MMC_D5 44
MMC_D4 46
47 SD_D3_R R3211 1 2 22R2J-2-GP
R3212 1 SD_D3 SD_D3 33
20 MEDIACARD_IRQ# 2 0R2J-2-GP DEV_W AKE# 16 DEV_WAKE# SD_D2 48 SD_D2_R R3213 1 2 22R2J-2-GP
SD_D2 33
37 SD_D1_RCLK_M_R R3219 1 2 22R2J-2-GP
SD_D1 SD_D0_RCLK_P_R R3220 1 22R2J-2-GP SD_D1_RCLK_M 33
SD_D0 38 2 SD_D0_RCLK_P 33

18,20 MMICLK_REQ# 17 29 SD_D1_RCLK_M

CLKREQ# SD_RCLK_M SD_D0_RCLK_P
SD_RCLK_P 30
32 SD_D1P SD_D1P 33
3D3V_S0 SD_D1P SD_D1N
SD_D1M 33
SD_D0N
SD_D1N 33 For UHS-II
SD_D0M 34 SD_D0N 33
35 SD_D0P SD_D0P 33
SD_D0P
1
R3214
100KR2J-1-GP

26 SD_REXT R3215 1 2 4K7R2F-GP Layout Note: Differential impedance

SD_REXT
of 100 Ohm
19
2

IO0_LDOSEL 18 LED#
GND

3D3V_S0_CARD IO0_LDOSEL

OZ777FJ2LN-GP-U1
49
1

71.00777.003
R3218
<Core Design>
A DY 10KR2J-3-GP A

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

MAIN_LDO_EN IO0_LDOSEL: Taipei Hsien 221, Taiwan, R.O.C.

High means select internal LDO for main area core power. Title
Low means select external LDO for main area core power. Card Reader
Size Document Number Rev
A3
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 32 of 107

5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID =Card Reader

SD_VDD1

D D
C3301
SCD1U10V2KX-5GP

C3302
SCD1U10V2KX-5GP

C3303
SCD01U16V2KX-3GP

C3304
SC4D7U6D3V3KX-GP

C3305
SC10U6D3V5MX-3GP
1

1
z z z 6'&DUG&RQQHFWRU
2

2
SD_VDD2 SD_VDD1

CARD1

4 VDD/VDD1 D0+ 11 SD_D0P 32

D0- 12 SD_D0N 32
14 VDD2
D1+ 16 SD_D1P 32
D1- 15 SD_D1N 32
32 SD_CLK 5 CLK
DAT0/RCLK+ 7 SD_D0_RCLK_P 32
32 SD_CMD 2 CMD DAT1/RCLK- 8 SD_D1_RCLK_M 32
9 SD_D2 32 SD_CD# 1 AFTP3301
DAT2 SD_D3 AFTP3302
CD/DAT3 1 SD_D3 32 1
FG1 SD_CLK 1 AFTP3303
FG1 SD_CMD AFTP3304
FG2 CD 1
Layout Note:Close to Card Reader CONN FG3
FG2 CARD_DETECT
WP
SD_CD#
SD_W PI
32
32 SD_D0_RCLK_P 1 AFTP3305
FG3 WRITE_PROTECT SD_D1_RCLK_M AFTP3306
FG4 FG4 1
FG5 SD_D2 1 AFTP3307
FG5 SD_W PI AFTP3308
FG6 FG6 VSS1 3 1
FG7 6 SD_VDD1 1 AFTP3309
C SD_VDD2 FG7 VSS2 SD_D0P AFTP3311 C
VSS3 10 1
NP1 13 SD_D0N 1 AFTP3312
NP1 VSS4 SD_D1P AFTP3313
NP2 NP2 VSS5 17 1
SD_D1N 1 AFTP3310
C3306
SCD1U10V2KX-5GP

C3307
SC4D7U6D3V3KX-GP

SKT-SDCARD-44-GP
1

62.10051.I01
2

SD_D3
SD_CMD
SD_D2

B 1 B

1
SC10P50V2JN-4GP
EC3303

SC10P50V2JN-4GP
EC3307

SC10P50V2JN-4GP
EC3308
DY DY DY
2

SD_W PI
SD_CD#
SD_D1_RCLK_M
R3301
SD_D0_RCLK_P
SD_CLK SD_CLK_C SD_D1N
1 DY 2
SD_D1P
33R2J-2-GP SD_D0N
2

SD_D0P
EC3314
SC22P50V2JN-4GP

DY
2

2
1

EC3304
SC22P50V2JN-4GP

EC3305
SC22P50V2JN-4GP

EC3306
SC22P50V2JN-4GP

EC3309
SC22P50V2JN-4GP

EC3310
SC22P50V2JN-4GP

EC3311
SC22P50V2JN-4GP

EC3312
SC22P50V2JN-4GP

EC3313
SC22P50V2JN-4GP
A DY DY DY DY DY DY DY DY <Core Design> A
1

1
Wistron Corporation
SSI_0625 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Card Reader CONN
Size Document Number Rev
A3
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 33 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = USB
U3401

C3401 1 2 SCD1U10V2KX-5GPUSB30_TXDP1_R R3401 1 2 0R2J-2-GP USB30_TXDP1_C USB30_RXDN1_C 1 6

16 USB3_TX1_P USB30_RXDP1_C TMDS_CH1- NC#6
2 7
TMDS_CH1+ NC#7
9
NC#9
10
NC#10
4

4
TMDS_CH2-
(;73RUW5LJKW6LGH
5 3
TR3401 TMDS_CH2+ GND
8
FILTER-130-GP GND
69.10118.001 IP4294CZ10-TBR-GP USB30_VCCA USB2
Change form 68.02002.021 to 69.10118.001 DY
83.04294.0A0 10 CHASSIS CHASSIS
13
2nd = 75.01045.073 USB30_TXDP1_C 9
U3401_5 1
D U3401_4 D

3
USB30_TXDN1_C 8
USB20_DN1_C 2
7
USB20_DP1_C 3
C3402 1 2 SCD1U10V2KX-5GPUSB30_TXDN1_R 1 2 USB30_TXDN1_C USB30_RXDP1_C 6
16 USB3_TX1_N R3402 0R2J-2-GP U3402 4
USB30_RXDN1_C 5
8 AFTP3402 1 11 12
USB30_TXDP1_C GND
5 3 CHASSIS CHASSIS

USB30_TXDN1_C TMDS_CH2+ GND

4 SKT-USB13-32-GP-U
TMDS_CH2-
NC#10
10 22.10341.531
9
USB20_DN1_C NC#9
2 7
USB20_DP1_C TMDS_CH1+ NC#7
1 6
TMDS_CH1- NC#6

IP4294CZ10-TBR-GP
USB3_RX1_P R3403 1 2 0R2J-2-GP USB30_RXDP1_C 83.04294.0A0
16 USB3_RX1_P
2nd = 75.01045.073

4
TR3402 R3404 1 DY 2 0R2J-2-GP
FILTER-130-GP USB30_VCCA 1 AFTP3401
Change form 68.02002.021 to 69.10118.001 69.10118.001 USB30_TXDP1_C 1 AFTP3403
DY TR3403 USB30_TXDN1_C 1 AFTP3404
16 USB_PN1 1 2 USB20_DN1_C USB20_DN1_C 1 AFTP3405
USB20_DP1_C 1 AFTP3406
4 3 USB20_DP1_C USB30_RXDP1_C 1 AFTP3407
16 USB_PP1
USB30_RXDN1_C 1 AFTP3408

3
DLP11SN900HL2L-GP
SSI_0625 68.11900.201

USB3_RX1_N USB30_RXDN1_C
16 USB3_RX1_N
R3405
1 2
0R2J-2-GP R3406
1 DY 2
0R2J-2-GP

C C

U3403
C3403 1 2 SCD1U10V2KX-5GPUSB30_TXDP0_R R3407 1 2 0R2J-2-GP USB30_TXDP0_C
16 USB3_TX0_P USB30_TXDP0_C 1 6
USB30_TXDN0_C TMDS_CH1- NC#6
2 7
TMDS_CH1+ NC#7
9
NC#9
10

4
NC#10
4
TR3404 TMDS_CH2-
5 3
FILTER-130-GP TMDS_CH2+ GND
8
GND
Change form 68.02002.021 to 69.10118.001 DY
69.10118.001
USB30_VCCB (;73RUW/HI6LGH6XSSRUW3RZHU6KDUH
IP4294CZ10-TBR-GP
83.04294.0A0
2nd = 75.01045.073 USB1
U3403_5
2

3
U3403_4 1 10
VBUS 10
11
B 11 B
12
USB20_DN0_C 12
2 13
D- 13
C3404 1 2 SCD1U10V2KX-5GPUSB30_TXDN0_R 1 2 USB30_TXDN0_C USB20_DP0_C 3
16 USB3_TX0_N R3408 0R2J-2-GP D+
USB30_RXDN0_C 5
U3404 USB30_RXDP0_C STDA_SSRX- AFTP3409
6 7 1
USB30_TXDN0_C STDA_SSRX+ GND_DRAIN
8
USB30_RXDN0_C USB30_TXDP0_C STDA_SSTX-
1 6 9 4
USB30_RXDP0_C TMDS_CH1- NC#6 STDA_SSTX+ GND
2 7
TMDS_CH1+ NC#7
9
NC#9 SKT-USB13-26-GP-U
10
USB20_DN0_C NC#10
4
TMDS_CH2- 22.10339.791
USB20_DP0_C 5 3
TMDS_CH2+ GND
GND
8 SSI_0618

IP4294CZ10-TBR-GP
83.04294.0A0

USB30_VCCB 1 AFTP3410
USB20_DN0_C 1 AFTP3411
16 USB3_RX0_P R3409 1 2 0R2J-2-GP USB30_RXDP0_C R3410 1 DY 2 0R2J-2-GP USB20_DP0_C 1 AFTP3412
USB30_TXDN0_C 1 AFTP3413
USB30_TXDP0_C 1 AFTP3414
TR3405 USB30_RXDN0_C 1 AFTP3415
4 3 USB20_DN0_C USB30_RXDP0_C 1 AFTP3416
35 USB_PN0_R
1

TR3406 1 2 USB20_DP0_C
35 USB_PP0_R
FILTER-130-GP
69.10118.001 DLP11SN900HL2L-GP
Change form 68.02002.021 to 69.10118.001
SSI_0625 68.11900.201
DY

R3411
1 DY 2
0R2J-2-GP
2

A USB30_RXDN0_C A
16 USB3_RX0_N 1 2
R3412 0R2J-2-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 3.0 Port

Size Document Number Rev
A2
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 34 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = USB

D
5V_S5 D

1
24 USBPW RSHR_VBUS_EN R3502 1 2 0R2J-2-GP R3501
100KR2J-1-GP
Pin1 N-MOS Type output

2
U3502 PW RSHARE_EN#
Q3501
9 1 PW RSHARE_EN G
R3503 1 GND CEN
24 USBPOW ERSHARE_EN# 20R2J-2-GP SB# 8 CB DM 2 USB_PN0_R 34
16
16
USB_PN0
USB_PP0
7
6
TDM
TDP
DP
SMART_CDP
3
4
USB_PP0_R 34 D
Low Active 86%3RUW
5V_S5 5 VDD S
5V_S5 5V_S5 U3503 USB30_VCCB

SLG55594AVTR-GP 2N7002K-2-GP
1 GND OUT#8 8
1

1
C3507 74.55594.A73 ϴϰ͘ϮEϳϬϮ͘:ϯϭ 2 7
IN#2 OUT#7

C3505
SC1U10V2KX-1GP

C3506
SC1U10V2KX-1GP
SCD1U25V2KX-GP 2nd = 74.51468.A73 R3504 ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ 3 IN#3 OUT#6 6 TC3502

1
C3504
SC2D2U6D3V3KX-GP
100KR2J-1-GP PW RSHARE_EN# 4 5 ST150U6D3VBM-9-GP
ϯƌĚсϴϰ͘ϮEϳϬϮ͘tϯϭ
2

EN/EN# OCB USB_OC#0_1 16

1
80.15715.D2L

2
SEL SY6288DCAC-GP

2
74.06288.A79

1
R3505
2nd = 74.02301.079

D
Q3502 DY 10KR2J-3-GP
2N7002K-1-GP
C C

2
SB#
DY
G

S USB Power SW (U3501 & U3503)

Vendor Vendor P/N Wistron P/N Priority

Silergy SY6288DCAC 74.06288.A79 1ST

DII (Diodes) AP2301MPG-13 74.02301.079 2ND

3RD

B
SSI_0627 86%3RUW B
5V_S5 Low Active USB30_VCCA
USB30_VCCA
U3501

1 GND OUT#8 8
2 IN#2 OUT#7 7
1

C3502
SCD1U10V2KX-5GP

C3503
SC1U6D3V2KX-GP
C3501 3 6
IN#3 OUT#6
1

1
SC1U10V2KX-1GP 4 5 USB_OC#0_1 16
EN/EN# OCB TC3501
2

ST150U6D3VBM-9-GP
2

2
SY6288DCAC-GP 80.15715.D2L
74.06288.A79
24 USB_SIDE_EN# 2nd = 74.02301.079

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB3.0 Power SW
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 35 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

3D3V_AUX_S5
SSID = Reset.Suspend 5V_S5
1D05V_S0 2614.1 mA
5V_S0/3D3V_S0
ROSA Power

1
15V_S5 1D05V_M 1D05V_S0
5V_S5 R3638

Power Sequence 100KR2J-1-GP

1
C3637 4865.4 mA U3614

1
SC10U6D3V3MX-GP U3601 8 D S 1

SIO_SLP_S3 2
5V_S0 7 D S 2

2
GND 15 6 D S 3
1 14 R3639 5 D G 4
VIN1#1 VOUT1#14

C3603
SC10U6D3V3MX-GP
2 13 2611 mA 100KR2J-1-GP

2
VIN1#2 VOUT1#13

SC10U6D3V3MX-GP
C3618
R3603 1 2 0R2J-2-GP RUN_ON_R 3 12 5V_S0_CT TPCA8062-H-GP
17,24,49 SIO_SLP_S3# ON1 CT1

1
3D3V_S0
4
VBIAS GND
11 1 2 SIO_SLP_S3#_Q_R ϴϰ͘ϬϴϬϲϮ͘Ϭϯϳ

SCD1U10V2KX-5GP
C3617
R3607 1 DY 2 0R2J-2-GP 5 10 3D3V_S0_CT

2
24,49 RUN_ON ON2 CT2

1
6 9 R3640 C3629 TPCA8062 ID= 28A

2
VIN2#6 VOUT2#9

4
C3605
SC10U6D3V3MX-GP
45 3V_5V_EN R3601 1 2 1KR2J-1-GP ALWON 24 3D3V_S5 7 8 Q3619 10KR2J-3-GP
VIN2#7 VOUT2#8 Rds(on) = 5.4~4.1m Ohm

1
C3601
SC1KP50V2KX-1GP

C3604
SC470P50V2KX-3GP

SCD01U50V2KX-1GP
2N7002KDW-GP

2
1

1
ϴϰ͘ϮEϳϬϮ͘ϯ&
1

TPS22966DPUR-GP 2nd = 84.DM601.03F

2
1
R3605
z C3638 74.22966.093 ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&

3
200KR2J-L1-GP SC10U6D3V3MX-GP CT Pin: Use 16V+ cap. ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

2
D D
2

SIO_SLP_S3#_Q

R3637 1 2 SIO_SLP_S3#_R
17,24,49 SIO_SLP_S3# 0R2J-2-GP

24,49 RUN_ON
R3612 1 DY 2 0R2J-2-GP
3D3V_AUX_S5
1D05V_MODPHY 1921 mA
3D3V_S5 15,24 ENVDD_PCH
3D3V_S5
3D3V_LAN/LCDCDD POWER 200 mA 15V_S5 1D05V_MODPHY

1
LCDVDD 1D05V_M

1
R3651 U3611
1

1
D3601 100KR2J-1-GP 8 D S 1

C3607
SC10U6D3V3MX-GP
R3614 BAT54C-10-GP LCDPWR_EN C3634 7 D S

MPHYP_PWR_EN#
3 2

1
100KR2J-1-GP SC10U6D3V3MX-GP 6 D S 3

2
R3608 5 D G 4

1
U3602 100KR2J-1-GP
RUN_ON# 2

SC10U6D3V3MX-GP
C3611
R3606 TPCA8062-H-GP

1
47KR2J-2-GP 5V_S5 1D05V_S0 R3654 1D05V_MODPHY MPHYP_PWR_EN_Q_R ϴϰ͘ϬϴϬϲϮ͘Ϭϯϳ
DY GND 15 1 2

SCD1U10V2KX-5GP
C3615
24 LCD_VCC_TEST_EN 1 14 1 DY 2
VIN1#1 VOUT1#14

1
3D3V_S0 2 13 0R5J-5-GP R3615 C3609

2
VIN1#2 VOUT1#13 LCDVDD_CT R3656 10KR2J-3-GP
3 ON1 CT1 12
3D3V_LAN
TPCA8062 ID= 28A

SCD01U50V2KX-1GP
4 11 1 DY 2
Rds(on) = 5.4~4.1m Ohm

2
VBIAS GND

4
R3604 1 2 0R2J-2-GP LANPWR_EN 5 10 3D3V_LAN_CT 0R5J-5-GP Q3617
17,24 SIO_SLP_LAN# ON2 CT2
6

6 9 2N7002KDW-GP
VIN2#6 VOUT2#9

C3608
SC10U6D3V3MX-GP
Q3601 3D3V_S5 7 VIN2#7 VOUT2#8 8 ϴϰ͘ϮEϳϬϮ͘ϯ&

1
C3635
SC470P50V2KX-3GP

C3606
SC470P50V2KX-3GP
2N7002KDW-GP 2nd = 84.DM601.03F
1

1
ϴϰ͘ϮEϳϬϮ͘ϯ& ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&

3
R3618 TPS22966DPUR-GP ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
1

2
1
2nd = 84.DM601.03F 10KR2J-3-GP C3636 74.22966.093

2
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& SC10U6D3V3MX-GP CT Pin: Use 16V+ cap.
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
2

2
20 MPHYP_PWR_EN 1 R3644 2 MPHYP_PWR_EN_R MPHYP_PWR_EN_Q
0R2J-2-GP
Q3601_2

RUNPWROK 24
3D3V_AUX_S5
15V_S5 3D3V_S5_PCH
R3610 1 2 0R2J-2-GP 76 mA
17,24,49 SIO_SLP_S3#

1
3D3V_AUX_S5 3D3V_S5 3D3V_S5 3D3V_S5_PCH
R3652
R3609 1 DY 2 0R2J-2-GP 100KR2J-1-GP
24,49 RUN_ON

1
R3641 U3615
R3620 100KR2J-1-GP 1 D D 6

PCH_ALW_ON#
2

2
3D3V_S5 +V1.05S_VCCST 100KR2J-1-GP 2 D D 5
15V_S5 3D3V_M 1 2 PCH_ALW_ON_Q_R 3 G S 4

1
C3619 467 mA R3642 C3632 AO6402A-GP
SCD1U10V2KX-5GP

SC10U6D3V3MX-GP
C3631
C 10KR2J-3-GP ϴϰ͘ϬϲϰϬϮ͘ϯ C

SIO_SLP_A
1

1
3D3V_S5 3D3V_S5 3D3V_M

SCD01U50V2KX-1GP
ϮEсϴϰ͘WϮϳϬϯ͘Ϭϯ

SCD1U10V2KX-5GP
C3630
R3621 ϯƌĚсϴϰ͘Ϭϯϰϱϲ͘ϯ
U3606 1KR2J-1-GP AO6402A MAX 7A
R3635
2

2
6

4
R3616 U3613 Q3620
1 5 100KR2J-1-GP 1 D D 6 1 DY 2 2N7002KDW-GP Rds(on) = 27~40m Ohm
2

2
NC#1 VCC
17,24 RESET_OUT# RESET_OUT# 2
A
2 D D 5 0R3J-0-U-GP ϴϰ͘ϮEϳϬϮ͘ϯ&

4
3 4 H_VCCST_PWRGD 7,96 Q3618 1 2SIO_SLP_A#_Q_R 3 G S 4 2nd = 84.DM601.03F
GND Y 2N7002KDW-GP ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&

3
1
ϴϰ͘ϮEϳϬϮ͘ϯ& R3617 C3628 AO6402A-GP ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

SC10U6D3V3MX-GP
C3627
74AUP1G07GW-GP 2nd = 84.DM601.03F 10KR2J-3-GP ϴϰ͘ϬϲϰϬϮ͘ϯ

1
SCD01U50V2KX-1GP
73.01G07.00B 1
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& ϮEсϴϰ͘WϮϳϬϯ͘Ϭϯ
2

SCD1U10V2KX-5GP
C3626
2nd = 73.01G07.02H ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ& ϯƌĚсϴϰ͘Ϭϯϰϱϲ͘ϯ
AO6402A MAX 7A

2
SIO_SLP_A#_R
PCH_ALW_ON_Q
SIO_SLP_A#_Q Rds(on) = 27~40m Ohm R3611 1 2 PCH_ALW_ON_R
24 PCH_ALW_ON 0R2J-2-GP

17,24,48 SIO_SLP_A# R3619 1 2 0R2J-2-GP

R3624 1 DY 2 0R2J-2-GP
24,48 A_ON

1D35V_S3

1
R3648
1KR2J-1-GP

3D3V_M 5V_S0 1D05V_MODPHY 3D3V_S0 1D05V_S0

2
RUN_ON#
1

1
0D675V_S0 3D3V_AUX_S5

1D35V_S3_DISCHG
z R3646
1KR2J-1-GP z R3643
1KR2J-1-GP
R3645
1KR2J-1-GP z R3650
1KR2J-1-GP
R3649
1KR2J-1-GP

1
R3647 R3653

+1.05V_RUN_CHG
+3.3V_ALWPCH 2

+5V_RUN_CHG 2

+1.5V_RUN_CHG2

+3.3V_RUN_CHG2

2
1KR2J-1-GP 100KR2J-1-GP

Q3609 Q3610 Q3611 Q3612 Q3613

2
B B
SIO_SLP_A G RUN_ON# G G G G

0D675V_S0_DISCHG
6

4
Q3614 R3613 1 DY 2 0R2J-2-GP SUS_ON 24,49
z D D D
z D D 2N7002KDW-GP Q3615

S S
z S S S
ϴϰ͘ϮEϳϬϮ͘ϯ&
2nd = 84.DM601.03F
G Q3615_G R3655 1 2
0R2J-2-GP
SIO_SLP_S4# 17,24,49

ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& D

3
2N7002K-2-GP 2N7002K-2-GP 2N7002K-2-GP 2N7002K-2-GP 2N7002K-2-GP ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
S
ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϴϰ͘ϮEϳϬϮ͘:ϯϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ SIO_SLP_S4 2N7002K-2-GP
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ ϴϰ͘ϮEϳϬϮ͘:ϯϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ ϯƌĚсϴϰ͘ϮEϳϬϮ͘tϯϭ

Intel Power Sequence

+V1.05S_VCCST

7,46 H_VR_ENABLE
1

R3622 R3623
10KR2J-3-GP DY 10KR2J-3-GP
2

7 H_VR_READY R3625 1 2 0R2J-2-GP IMVP_PWRGD 46

3D3V_AUX_S5

1
C3622
U3609 SCD1U10V2KX-5GP
17,24,48 SIO_SLP_A# SIO_SLP_A# 1

2
B
5
VCC
A 24 PM_APWROK 2 A
A
SYS_PWROK 17,24,96 4 APWROK 17
Y
3
GND
1

1
74LVC1G08GW-1-GP
R3629 73.01G08.L04 R3633
DY 0R2J-2-GP 10KR2J-3-GP
R3634 1 DY 2 0R2J-2-GP
2

2
RESET_OUT# 17,24 <Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable

Size Document Number Rev
Custom X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 36 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = Reset.Suspend

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

S3 Reduction
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 37 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Round Rock 13.3" UMAX00
Date: Friday, June 28, 2013 Sheet 38 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 39 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = OBFF

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 40 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 41 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PWR.Support 5V_S5

0103 Add EC4203 3D3V_S5

ndde close to EL4202

2
ϴϰ͘ϬϯϵϬϰ͘>Ϭϲ

1
PR4202 ϮŶĚсϴϰ͘ϬϯϵϬϰ͘Wϭϭ
15KR2F-GP PR4203

1
10KR2J-3-GP

1
PQ3802_1 1 PMBS3904-1-GP 3D3V_S5
PQ4202 PD4203
PR4204

2
2
BAV99-13-GP
D
Layout Note: D

1
PSID Layout width > 25mil
PR4211
100KR2J-1-GP
PSID_DISABLE#_R_C 1
z 2 PSID_DISABLE# 99
PR4206

3
75.00099.B7D 2K2R2J-2-GP
10KR2J-3-GP

G
1
JGND PQ4201

2
FDV301N-NL-GP
SCD1U50V5JX-1-GP PR4219 PR4207
EC4203 PS_ID_R 1 2 PS_ID_R2 D S PS_ID 1 2

D
PSID_EC 24
1 2
z 0R3J-0-U-GP ϴϰ͘ϬϬϯϬϭ͘ϯϭ 33R2J-2-GP
ϮŶĚсϴϰ͘ϯ<ϯϮϵ͘Ϭϯϭ
SSI_0625

1
EL4202
z PD4204 PR4208
2 1 PESD24VS2UT-GP 1
z 2

BCMS453215A800-9A-GP 33R2J-2-GP
ϲϴ͘ϬϬϯϳϲ͘Ϭϴϭ

3
ϮŶĚсϲϴ͘ϬϬϮϯϬ͘Ϯϳϭ
DCIN1
6
NP1 1 AFTP4204
1

2 1 AFTP4203
3
4 +DC_IN AD+
5
EL4201 SSI_0625 PU4201

SC10U25V5KX-GP
C NP2 +DC_IN_C 1 2 1 S D 8 C
S D

PC4205

PC4206
240KR3-GP
7 2 7

SC1U25V5KX-1GP

SCD01U50V2KX-1GP
1
SC10U25V5KX-GP

SC1KP50V2KX-1GP

BCMS453215A800-9A-GP S D
EC4201

EC4202

PC4201

PR4209
3 6

K
1

1
ACES-CON5-27-GP ϲϴ͘ϬϬϯϳϲ͘Ϭϴϭ 4 G D 5

1
ϮϬ͘&ϮϭϴϮ͘ϬϬϱ ϮŶĚсϲϴ͘ϬϬϮϯϬ͘Ϯϳϭ PD4201 PC4202
1

z z PR4216 1SMB22AT3G-GP-U1 SCD1U50V3KX-GP SI7121DN-T1-GE3-GP

2

2
AFTP4205 83.22R03.03G

2
3K3R6J-GP

A
2

PQ4205

1
R2
JGND JGND PQ4206_3 PQ4204 E Id=-9.6A
1

C AD_OFF_L B
Qg=-25nC
z
R1 R1
PR4214 B C AD_OFF_R
100KR2J-1-GP ϴϰ͘ϮEϳϬϮ͘ϯ& E PR4210 Rdson=18~30mohm
2nd = 84.DM601.03F R2 PDTA124EU-1-GP 47KR3J-L-GP

2
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& PDTC124EU-1-GP ϴϰ͘ϬϬϭϮϰ͘<ϭ<
2

PQ4206 ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ& ϴϰ͘ϬϬϭϮϰ͘,ϭ< ϮŶĚсϴϰ͘ϬϱϭϮϰ͘ϭϭ

ϮŶĚсϴϰ͘ϬϱϭϮϰ͘Ϭϭϭ
3 4

AC_IN#_G 2 5 1 2
PR4212
1 6 1KR2J-1-GP

2N7002KDW -GP
1

3D3V_S5
PR4215
100KR2J-1-GP z
B B

2
2

PR4213
z 10KR2J-3-GP

1 AC_IN_KBC#
DT MODE
TP4201

1
PW R_CHG_AD_OFF_R

PR4220
1 2 AC_DIS#_R
24 AC_DIS PQ4203
0R2J-2-GP 1 6
PR4218
2
z 1 2
z 5 BAT_IN# 44
100KR2J-1-GP 3 4

4,24,44,46 H_PROCHOT# z
1 2 PQ3807D 2N7002KDW -GP
ϴϰ͘ϮEϳϬϮ͘ϯ&
PC4207 2nd = 84.DM601.03F
SC1U10V2KX-1GP ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCIN JACK
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 42 of 107
5 4 3 2 1

www.vinafix.vn
 A B C D E

SSID = PWR.Support

4 4

BT+
MAIN BATTERY CONNECTOR

PC4301
SCD1U50V3KX-GP

PC4302
SC2200P50V2KX-2GP

FC3409
SC2200P50V2KX-2GP
1

1
DY

2
BATT1
10
1

SRN33J-7-GP-U 2
1 8 PBAT_SMBCLK_R 3
24 PBAT_SMBCLK
2 7 PBAT_SMBDAT_R 4
24 PBAT_SMBDAT
24,44 PBAT_PRES# 3 6 PBAT_PRES#_R 5
4 5 6
3 AFTP4318 1 BAT_ALERT 7 3
RN4301 8
AFTP4301 1 9
11

ALP-CON9-6-GP-U
20.81925.009

BT+ 1 AFTP4302
PBAT_SMBCLK_R 1 AFTP4303
PBAT_SMBDAT_R 1 AFTP4304
PBAT_PRES#_R 1 AFTP4305

Layout Note: Place near Battery CONN

2 PBAT_PRES# PBAT_SMBDAT PBAT_SMBCLK 2
3

PD4301 PD4302 PD4303

BAV99-13-GP BAV99-13-GP BAV99-13-GP
75.00099.B7D 75.00099.B7D 75.00099.B7D
1

3D3V_AUX_S5

<Core Design>
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BATTERY CONN
Size Document Number Rev
A3
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 43 of 107

A B C D E

www.vinafix.vn
 5 4 3 2 1

SSID = Charger AD+ +SDC_IN CHARGER_SRC

PU4405
8 D S 1 PR4426 1 2
7 D S 2 D01R3721F-GP-U
6 D S 3
5 D G 4

1
PG4406 PG4402

PR4435
SI7121DN-T1-GE3-GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

100KR2J-1-GP

2
2
1
PR4418 AD+_G_2
3KR5J-GP PR4421 2 1 0R2J-2-GP
DY

2
PC4428

10KR2F-2-GP
2
DC_IN_D

PR4423
2 1

PWR_CHG_ACP
SCD1U25V2KX-GP

1
PQ4407

AD+_G_1

SCD1U25V2KX-GP
3 4

PWR_CHG_ACN

SCD1U25V2KX-GP
PC4418

PC4416
ACAV_IN 2 5
AD+
DY

1
D 1 6 D

1
PD4405 A K 1PS76SB40-GP-U PWR_CHG_1 1 2 PWR_CHG_VCC
83.1PS76.01F PR4403 10R5J-GP 2N7002KDW-GP
PC4410 ϴϰ͘ϮEϳϬϮ͘ϯ& BQ24715_AGND

1
PC4433 SC1U25V3KX-1-GP 2nd = 84.DM601.03F BQ24715_AGND
SCD1U25V2KX-GP ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

2
BQ24715_AGND BQ24715_AGND CHARGER_SRC
AD+

PU4406 and PU4407:

PC4425
SC10U25V5KX-GP

PC4411
SC10U25V5KX-GP

PC4427
SC10U25V5KX-GP

PC4407
SC10U25V5KX-GP
main source: 84.03660.037
1

1
PC4413
SCD1U25V2KX-GP
VacDET=2.4V
PR4444
309KR2F-GP
Acok setting=2.4*((PR4444+PR4411)/PR4411) PU4406

2
Setting=18.178v FDMS3600-02-RJK0215-COLAY-GP
2
2

3
BATDRV 1 4
10 DCBATOUT
PC4432 9
SCD01U50V2KX-1GP

PWR_CHG_REGN

1
SC1U25V3KX-1-GP DY 7
1

PC4403
SC10U25V5KX-GP

PC4430
SC10U25V5KX-GP

PC4439
SC10U25V5KX-GP

PC4440
SC10U25V5KX-GP

PC4441
SC10U25V5KX-GP

PC4442
SC10U25V5KX-GP
PR4411

PWR_CHG_ACP
PWR_CHG_ACN
KBC FOR DT MODE DY 8 6

1
47KR2F-GP PC4422 1 2 5

2
2

CHECK EE PULL HIGH

PR4409
4K02R2F-GP
PC4402

SC1U25V3KX-1-GP

2
1
͘ϬϬϮϭϱ͘Ϭϯϳ
+VCHGR
2

BQ24715_AGND V8P10-5300M3-86A-GP
PL4401 1

A
COIL-2D2UH-11-GP
BQ24715_AGND BQ24715_AGND +SDC_IN PD4401 1 2 1 2 3

2
PU4404 BQ24715RGRR-1-GP 1PS76SB40-GP-U 68.2R210.20C PR4443
3D3V_AUX_S5

PR4427

2D2R5F-2-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PWR_CHG_REGN 74.24715.A73 83.1PS76.01F D01R2512F-3-GP 2

1
150KR2F-L-GP

PC4420
SC1U25V3KX-1-GP

PC4434

PC4435
1 20 BT+

K
3D3V_S5 ACN VCC
PR4434

3D3V_AUX_S5 PR4439 PD4402

DY DY
4K02R2F-GP 11 PWR_CHG_BATDRV DY ϴϯ͘ϴZϬϭϬ͘ϴϳ

2
BATDRV#
1

2
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
2
ACP
1

PG4407

PG4403
16 PWR_CHG_REGN PU4403

2
REGN
PR4419
100KR2F-L1-GP

DY PR4449 PWR_CHG_CMSRC 3 PR4425 PC4421 1 S D 8

CMSRC
1

100KR2J-1-GP PWR_CHG_BTST 2PWR_CHG_BTST1 1 DCBATOUT_SNUB S D 7

DY 17 1 2 2

1
PR4432 PR4414 BTST 0R3J-0-U-GP S D 6
4 3

SC330P50V3KX-GP
2

3K3R2J-3-GP 3K3R2J-3-GP ACDRV PWR_CHG_HIDRV SCD047U25V3KX-3-GP BATDRV G D 5

DY DY 18 4
2

HIDRV

1
z

PC4406
PWR_CHG_ACDET 6
ACDET SI7121DN-T1-GE3-GP PC4424
DY
2

CHARGER_CELL_PIN 10 ϴϰ͘ϬϳϭϮϭ͘Ϭϯϳ

2
CELL

SCD01U25V2KX-3GP
19 PWR_CHG_PHASE
PHASE PC4429
1

15 PWR_CHG_LODRV 1 2
LODRV
PR4415
33KR2F-GP

PG4401 2 1 GAP-CLOSE-PWR-3-GP PWR_SDA 8

24 CHARGER_SMBDAT SDA

1
DY 14 PC4401 SCD1U25V2KX-GP PC4412
PG4408 2 GND
24 CHARGER_SMBCLK 1 GAP-CLOSE-PWR-3-GP PWR_SCL 9 SCD1U25V2KX-GP SCD1U25V2KX-GP
SCL PWR_CHG_SRP PR4438 1
13 2 0R2J-2-GP PWR_CHG_SRP_R
2

2
ACAV_IN PR4430 2 SRP
1 0R2J-2-GP PWR_CHG_ACOK 5
24 ACAV_IN ACOK PWR_CHG_SRN PR4417 1
12 2 0R2J-2-GP PWR_CHG_SRN_R
C PR4413 2 SRN C
ACAV_IN 1BQ24715_IOUT_1 7 BQ24715_AGND BQ24715_AGND

GND
24 BQ24715_IOUT 0R2J-2-GP IOUT
H=ACIN
DIS_DTM:
L=UNAC
H= cell is plus to GND. (reset

21
PR4406 1 2 0R2J-2-GP

http://adf.ly/3o8pJ
SC100P50V2JN-3GP
PC4423

charger ic) CHARGER_CELL_PIN

L=nornal Follow custormer circuits
1

BQ24715_AGND
1

PR4452 BQ24715_AGND PWR_CHG_CMPIN:

V-=3.3*(PR4402/(PR4428+PR4402))=1.1099V
2

100KR2J-1-GP ϴϰ͘ϮEϳϬϮ͘ϯ&
PQ4412
Follow custormer circuits PR4454 2nd = 84.DM601.03F

150KR2F-L-GP
2 1CHARGER_CELL_PIN_R 3 4 3D3V_AUX_S5
5V_S5 ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
2

PR4428
PR4471 0R2J-2-GP
TP4402 1DIS_DTM 1 2 DIS_DTM_C 2 0R2J-2-GP
1 DIS_DTM_C_R 2 5 PQ4413_2 1 DY2DIS_DTM_CELL
1 TP4401
Close PR4426 ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

1
DY PD4311 1 2

1
PC4409 1 6 PQ4412_6 K ACHARGER_CELL_PIN PC4431 PQ4413 PR4457 H_PROCHOT# 4,24,42,46
SC1U25V3KX-1-GP SC1U25V3KX-1-GP PR4422 PR4437 2N7002KDW-GP 0R2J-2-GP
2N7002KDW-GP 1PS76SB40-GP-U CHARGER_SRC +SDC_IN 1M8R2J-L-GP 100KR2J-1-GP PQ4413_3 PWR_CHG_REGN
2

ϴϰ͘ϮEϳϬϮ͘ϯ& 83.1PS76.01F 4 3

2
PR4436
100KR2F-L1-GP
PR4464

PWR_CHG_CMPIN
2nd = 84.DM601.03F

2
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& PR4340 DY 1 2 PWR_CHG_CMPOUT 1 2 PQ4413_5 5 2
PR4470 ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ& 100KR2F-L1-GP PR4402 PWR_CHG_CMPOUT
2

1
2 0R2J-2-GP
DY 1 169KR2F-1-GP 6 1
1

1
PR4472 5V_S5 220KR2F-GP PR4410

SCD01U50V2KX-1GP
0R2J-2-GP PC4405 100KR2J-1-GP
3D3V_S5 BQ24715_IOUT_1 SCD01U50V2KX-1GP

2
2

PC4419
3D3V_S5
1

2
1

1
PG4404
GAP-CLOSE-PWR-3-GP

PG4405
GAP-CLOSE-PWR-3-GP

PWR_CHG_ACOK

PC4426
CHECK PM BATTERY TYPE

SC100P50V2JN-3GP

1
SCD1U10V2KX-5GP

1DCBATOUT_R 1

2
1

5
6
7
8
PWR_CHG_ACOK: PR4404
CHECK CELL for DT mode
PC4313

120KR2J-GP

2IN-
2OUT
VCC
2IN+
PWR_CHG_REGN=6V PWR_CHG_REGN
+VCHGR_R

AC_IN#
2

V+=6*(PR4404/(PR4410+PR4404))=3.27V PU4402

2
PU4309 LM393PWR-GP

1
ϳϰ͘ϬϬϯϵϯ͘Ϯ'

1OUT
1

GND
1IN+
B

1IN-
24,43 PBAT_PRES# 5 PR4453
PR4339 1 DIS_PROCHOT_BATT#_1 VCC 100KR2J-1-GP
2 2
A
1

99 DIS_BAT_PROCHOT# 0R2J-2-GP 4 PR4446

4
3
2
1
Y 0R2J-2-GP PR4448
3
CHECK PM ADAPTER TYPE

2
GND 10R2F-L-GP +DC_IN PR4468
74LVC1G08GW-1-GP PBAT_PRES#_OUT ACAV_IN_NB_R 1 2
2

ACAV_IN_NB 24
73.01G08.L04 0R2J-2-GP And setting adapter type
2

1
1 2
PR4447
232KR2F-GP
PR4407 PR4469 PR4442
PU4401_5

1MR2F-GP 120KR2J-GP
6D8R2F-GP (AD_IA_HW)
1 2 value check EE follow fanseca
BATTERY MON
2

2
PR4424 PC4415
1 2 BOOST_MON 1 2PU4401_6 SCD1U25V2KX-GP DC_IN_V_ACAVINNB
SCD1U50V3KX-GP

24 VCP PR4445 PU4401_4 3D3V_S5 DYN_TUR_CURRNT_SET# 24

1

1
PC4417
SC1U25V3KX-1-GP

0R2J-2-GP 20KR2F-L-GP
1
PC4438

PR4465
6
5
4

1
20KR2F-L-GP
2

3D3V_S5 PU4401 PR4460

2
-
+
100KR2F-L1-GP

INA199A1-GP 59KR2F-GP PQ4411

2

B B
G
1

SC100P50V2JN-3GP
1
2
3

2
PR4431

PWR_CHG_CMPIN 2 1 PQ4411_D D
+DC_IN_REF PR4420
255KR2F-GP S

42K2R2F-L-GP
+SDC_IN

1
value check EE follow fanseca
2

1
PC4408
SC1U25V3KX-1-GP

PR4461 2N7002K-2-GP

PC4437
1

BAT_IN# 42
ϴϰ͘ϮEϳϬϮ͘:ϯϭ

2
2 ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
1

ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ
2

PC4414 ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
CHECK EE SCD47U6D3V2KX-1-GP
2

3D3V_S5
PQ4406_G 3D3V_S5 ADAPTER TYPE DYN_TUR_CURRNT_SET# SETTING

100KR2F-L1-GP
PQ4406
1

SCD1U10V2KX-5GP

1
G

PR4467
PR4456 PR4429
65W L 1.7483V
1
PC4436

1 2 PQ4406_D D 100KR2J-1-GP
4,24,42,46 H_PROCHOT#
2

0R2J-2-GP S
2

PU4308 2 45W H 1.3329V

2N7002K-2-GP AC_IN#
1
B
ϴϰ͘ϮEϳϬϮ͘:ϯϭ 5
VCC
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ PQ4409
A
2 PROCHOT_GATE 99
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ G PQ4408_G 4
Y
AD+ ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ PR4466 3
4,24,42,46 H_PROCHOT# H_PROCHOT#_Q GND
1 2 D
0R2J-2-GP 74LVC1G08GW-1-GP
S
100KR2J-1-GP
1
PR4416

2N7002K-2-GP
ϴϰ͘ϮEϳϬϮ͘:ϯϭ
15V_S5 ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ
2

ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
2

PR4459 DY PR4433
PQ4408_E

1MR2J-1-GP
0R2J-2-GP DY H_PROCHOT# 4,24,42,46
1

PD4403 PR4455 ϴϰ͘ϮEϳϬϮ͘ϯ&

2

1N4148WS-7-F-GP 0R2J-2-GP 2nd = 84.DM601.03F

K APD4403_A 1 PQ4408 ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
1

PQ4405
PD4403_K PMBS3906-GP
3

84.03906.F11 PQ4405_3 3 4
PR4462
2

PR4458 PQ4408_C 2 1 PQ4405_2 2 5 PQ4405_5

0R2J-2-GP
1

A A
PC4404
SC1U25V3KX-1-GP

0R2J-2-GP 1 6
1

2N7002KDW-GP
2

PR4451 PR4463
680KR2F-GP 0R2J-2-GPDY
PQ4405_6

DCBATOUT
2

2
PWR_CHG_ACOK

PR4405
100KR2F-L1-GP
1

PR4450
1

10KR2F-2-GP
<Core Design>
CHECK EE
2

follow custormer circuits. Wistron Corporation

3D3V_S5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CHARGE(BQ24715)
Size Document Number Rev
A1
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 44 of 107

5 4 3 2 1

www.vinafix.vn
 A B C D E

SSID = PWR.Plane.Regulator_5v3p3v SSI_0618

PWR_5V_VCLK

1
PC4525

1
DCBATOUT PWR_DCBATOUT_3D3V 3D3V_AUX_S5 DCBATOUT PWR_DCBATOUT_5V

1
SC1KP50V2KX-1GP PC4532
PC4526
SCD1U50V3KX-GP

2
PG4501 PG4502 SCD1U50V3KX-GP

2
1

BST15V_1

2
1 2 2 1

BST15V_2
PR4502
GAP-CLOSE-PWR DY 0R2J-2-GP GAP-CLOSE-PWR
PG4503 PG4504
1 2 2 1

2
PD4503
PR4501 PR4503

3
GAP-CLOSE-PWR GAP-CLOSE-PWR BAT54S-7-F-GP PD4502
4 PG4505 PWR_5V_EN1 2 1 PWR_5V_EN1_R 1 DY 2 PG4506 ϳϱ͘ϬϬϬϱϰ͘ϳ BAT54S-7-F-GP 4
1 2 2 1 ϮŶĚсϳϱ͘ϬϬϬϱϰ͘ϳ ϳϱ͘ϬϬϬϱϰ͘ϳ
0R2J-2-GP ϯƌĚсϳϱ͘ϬϬϬϱϰ͘Dϳ ϮŶĚсϳϱ͘ϬϬϬϱϰ͘ϳ

1
0R2J-2-GP
GAP-CLOSE-PWR GAP-CLOSE-PWR ϯƌĚсϳϱ͘ϬϬϬϱϰ͘Dϳ
PG4507 PG4508 5V_PWR 15V_S5

2
0R2J-2-GP
1 2 2 1 PG4530
PR4504
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR GAP-CLOSE-PWR

2
PR4505
PG4509 BOOST_10V 15V_PWR
PWR_3D3V_EN2 2 2 1
1 2 1
3V_5V_EN 36

K
GAP-CLOSE-PWR

1
1
0R2J-2-GP PC4527 PC4534 PC4533
PG4510 SCD1U50V3KX-GP SC1U25V3KX-1-GP PD4501
SCD1U50V3KX-GP
2 1
DYBZT52C15S-GP

2
2
GAP-CLOSE-PWR

A
DCBATOUT
PWR_DCBATOUT_3D3V
PC4505 PC4506
PWR_DCBATOUT_5V

SC10U25V5KX-GP

SCD01U50V2KX-1GP
PC4502 PC4503 PC4504

1
1

1
SC10U25V5KX-GP

SCD1U50V3KX-GP

SC10U25V5KX-GP

Design Current=5.894 A PC4507 PC4508 PC4509

DY

SCD1U50V3KX-GP
2

2
8.841A<OCP>10.6A

SC10U25V5KX-GP

SC10U25V5KX-GP
D
2

D 8
D 7
D 6
D 5

5
6
7
8

1
5V_PWR 5V_S5

D
D
D
D
PU4502
PU4503
SIS412DN-T1-GE3-GP
D PG4511

12
2 1

2
SIS412DN-T1-GE3-GP PU4501 84.00412.037 Design Current=5.153 A
84.00412.037 GAP-CLOSE-PWR

VIN
8.3A<OCP>9.2A PG4512

G
S
S
S
S
S
S
G

2 1
3D3V_S5 3D3V_PWR PC4510 PR4506 TPS51275RUKR-1-GP-U PR4507 PC4511 G S
1
2
3
4

4
3
2
1
3 PG4513 S G 2 1PWR_3D3V_VBST2_1
1 2 PWR_3D3V_VBST29 17 PWR_5V_VBST1 1 2PWR_5V_VBST1_1 2 1 GAP-CLOSE-PWR 3
SCD1U50V3KX-GP 1D5R3F-GP VBST2 VBST1 1D5R3F-GP
2 1
3D3V_PWR 68.3R310.20A PWR_3D3V_DRVH210 PWR_5V_DRVH1 SCD1U50V3KX-GP 5V_PWR
PG4514
PL4501 16 2 1
GAP-CLOSE-PWR DRVH2 DRVH1
1 2 PWR_3D3V_LL2 8 18 PWR_5V_LL1 1 2 GAP-CLOSE-PWR
PG4515 SW2 SW1 PL4502 PG4516
1

2 1 IND-3D3UH-57GP PWR_3D3V_DRVL2 PWR_5V_DRVL1

D 11 15 2 1

1
DRVL2 DRVL1 IND-4D7UH-88-GP
GAP-CLOSE-PWR PU4505 DPU4504
D 8
D 7
D 6
D 5

5
6
7
8
PR4508 DY PR4509 PG4521 GAP-CLOSE-PWR

D
D
D
D
PG4519

PC4513
SCD1U10V2KX-5GP
PG4518 2D2R5F-2-GP SIS780DN-T1-GE3-GP PWR_5V_VO1 2D2R5F-2-GP PT4502
14 DY PG4520
1

1
2 1 VO1
PC4512
SCD1U10V2KX-5GP

SIS780DN-T1-GE3-GP

GAP-CLOSE-PWR-3-GP
PT4501 2 1
2
1

GAP-CLOSE-PWR-3-GP

SE220U6D3VM-30-GP
PWR_3D3V_FB2 4 2 PWR_5V_FB1 DY

2
GAP-CLOSE-PWR VFB2 VFB1
SE220U6D3VM-30-GP

DY GAP-CLOSE-PWR
1PWR_3D3V_SNUB

2
PG4517

G
4 4 PG4522
G
2

2
2 1

S
S
S
2 1
1 S
2 S
3 S

1PWR_5V_SNUB
PWR_3D3V_EN2 PWR_5V_EN1
6 20 G S

3
2
1
GAP-CLOSE-PWR EN SKIPSEL
S G GAP-CLOSE-PWR
PG4523
PG4524
2 1 PWR_3D3V_CS2 PWR_5V_CS1
5 1 2 1
CS2 CS1
3V_FEEDBACK

GAP-CLOSE-PWR
1

1
GAP-CLOSE-PWR
PG4529 PR4510 PWR_5V_VCLK R9952
2 1 PC4515
DY 80K6R2F-GP VCLK
19
93K1R2F-L-GP PC4514
PG4525
DY 2 1
2

1
SC330P50V3KX-GP SC560P50V-GP
GAP-CLOSE-PWR

2
PWR_5V3D3V_PGOOD 7 21 PR4512 GAP-CLOSE-PWR
2

2
PGOOD GND
DY 200R2F-L-GP
VREG3

VREG5

SSI need to change to polymer cap SSI need to change to polymer cap

2
1

1
3

13

PR4514 5V_PWR_2 PR4515

1
PR4513 3D3V_AUX_S5
DY0R2J-2-GP 3D3V_PWR_2 0R2J-2-GP DY
6K65R2F-GP PG4528 PR4516
1 2 15KR2F-GP
2

1 2

1 2
PWR_3D3V_FB2_R PWR_5V_FB1_R
PC4516 GAP-CLOSE-PWR-3-GP

2
DYSC18P50V2JN-1-GP PC4517 DY
SC18P50V2JN-1-GP
2

2
1

1
3D3V_S5
2 PR4517 PR4518 2
1

10KR2F-2-GP 9K76R2F-1-GP
1

PC4501 PC4518
PR4519 SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP Close to VFB Pin (pin2)
2

2
100KR2J-1-GP
PR4521
2

17,24 ALW_PWRGD_3V_5V 2 1
Close to VFB Pin (pin5)
0R2J-2-GP

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L

Inductor: CHIP IND 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A
O/P cap: CHIP CAP POL 220U 6.3V M 6.3*4.5 /Matsuti/ 17mOhm / 77.52271.09L I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
H/S:SIS412DN-T1-GE3 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 Inductor: CHIP IND 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A
L/S:SIS406DN-T1-GE3 / 11.5mOhm/14.5mOhm@4.5Vgs / 84.00406.037 O/P cap: CHIP CAP POL 220U 6.3V M 6.3*4.5 /Matsuti/ 17mOhm / 77.52271.09L
H/S:SIS412DN-T1-GE3 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037
L/S:SIS406DN-T1-GE3 / 11.5mOhm/14.5mOhm@4.5Vgs / 84.00406.037

1 1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

3V/5V TPS51275
Size Document Number Rev
A2
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 45 of 107
A B C D E

www.vinafix.vn
 5 4 3 2 1

SSID = CPU.Regulator

PW R_VCC_VREF

1
PR4602 PR4603 PR4604

1
D PR4601 DY 75R2F-2-GP 1MR2F-GP 8K87R2F-2-GP D

NTC-100K-10-GP

2
PC4602

2
1 2

1
SC4700P50V2KX-1GP
PR4605 2 1 9K09R2F-GP PR4606 PR4610 PR4607
1 2 1 2 150KR2F-L-GP 150KR2F-L-GP 150KR2F-L-GP
PR4608 PR4609

2
PC4601 374KR3-GP 75KR2F-GP
2 1 SC1KP50V2KX-1GP

PR4611 1 DY 2 75R2F-2-GP PW R_VCC_B-RAMP

PW R_VCC_F-Imax
PR4612

PWR_VCC_THERM
PW R_VCC_O-USR

PWR_VCC_OCP-1
PWR_VCC_IMON
1 2PW R_VCC_SLEW A

39KR2F-GP

PR4613
DCBATOUT 2 1PW R_VCC_VBAT

10KR3F-L-GP

16

15

14

13

12

11

10

9
C PU4601 C

THERM
SLEWA

IMON

OCP-I

B-RAMP

F-IMAX

O-USR
VBAT
17 8 IMVP_VRON PR4614 1 2 0R2J-2-GP H_VR_ENABLE 7,36
47 PW R_VCC_CSP1 CSP1 VR_ON 3D3V_S0

47 PW R_VCC_CSN1 18 CSN1 SKIP# 7 PW R_VCC_SKIP# 47

19 CSN2 TPS51622RSMR-1-GP PWM1 6 PW R_VCC_PW M1 47 IMVP_PW RGD PR4616 2 z 1 2KR2F-3-GP

3D3V_S5 20 CSP2 74.51622.A73 PWM2 5

21 NC#21 MODE 4

22 3 PW R_PG PR4617 1 2 0R2J-2-GP IMVP_PW RGD 36

NC#22 PGOOD
PR4618 1 2 0R2J-2-GP PW R_VCC_GFB 23 2 PW R_VCC_VDD PR4619 1 2 10R3F-GP 3D3V_S5
9 VSS_SENSE GFB VDD
PR4620 1 2 0R2J-2-GP PW R_VCC_VFB 24 1
7 VCC_SENSE VFB VDIO

1
PC4603
VR_HOT#

ALERT#
DROOP

COMP

VREF

VCLK
SC1U6D3V3KX-2GP
GND

GND

2
V5A
25

26

27

28

29

30

31

32

33

B B
PW R_VCC_DROOP
+V1.05S_VCCST

PC4605 H_CPU_SVIDDAT 7 SCD1U10V2KX-5GP 1 PC4604

PWR_VCC_V5A

2
SC470P50V2JN-GP
2 DY1 PW R_VCC_COMP VR_SVID_ALERT# 7 H_CPU_SVIDDAT 130R2F-1-GP 1 2 PR4621
H_CPU_SVIDCLK 7 H_CPU_SVIDCLK 54D9R2F-L1-GP 2 1 PR4622
H_PROCHOT# 4,24,42,44
1 2 1 2 PW R_VCC_VREF
PR4623 PR4624
2
SCD33U6D3V2KX-1-GP
PC4606

10KR2F-2-GP 2K05R2F-GP PR4626 1 2 10R3F-GP 5V_S5

1
PC4607
SC1U6D3V3KX-2GP
1

PC4608
1 2 1 2
2

PR4627
5K76R2F-2-GP SC1500P50V2KX-2GP
PWR_VCC_COMP_1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51622_CPUCORE(1/2)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 46 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = CPU.Regulator
DCBATOUT

1
PT4702 PC4701 PC4702 PC4703 EC2910

SCD1U50V3KX-GP
SE68U25VM-7-GP-U

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
D D

2
2
For acoustic noice
DCBATOUT

1
PC4704 PU4701 5V_S5
PC4705 SC2D2U6D3V3KX-GP
SC1KP50V2KX-1GP

2
5 VIN VDD 2 1 2

PC4706
46 PW R_VCC_SKIP# 1 2PW R_VCC_SKIP#1 1 SKIP# BOOT_R 6 PW R_VCC_BOOTR1 1 2VCC_BOOTR1_R

2
PR4702 0R2J-2-GP
PR4701 0R2J-2-GP SCD22U25V3KX-GP
8 7 PW R_VCC_BOOT1 VCC_CORE
46 PW R_VCC_PW M1 PWM BOOT PL4701

PGND
3 4 PW R_VCC_VSW 1 1 2
C PGND VSW C
IND-D22UH-21-GP

1
CSD97374Q4M-GP-U1

9
74.97374.043 PR4703

2
GAP-CLOSE-PWR-3-GP
2

GAP-CLOSE-PWR-3-GP
2D2R2F-GP

PG4708
PG4707
VCC_CORE
DY

1
VCC_VSW1_GP 1
VCC_VSW 1_R

1
PC4729

PC4730

PC4731

PC4732

PC4733

PC4734

PC4725

PC4736

PC4737

PC4738
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

PC4707
1

SC1500P50V2KX-2GP

2
DY
2

1
PR4704
3K92R2F-GP

2
PR4705
4K22R2F-GP
1 2
PC4719

PC4720

PC4721

PC4722

PC4726

PC4709

PC4710

PC4711

PC4724

PC4735
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP
1

PR4707
z
hDͺϮϴt

PR4706
1 2VCC_CSN1_R
1 2 PW R_VCC_CSN1 46
2

B B

3K01R2F-3-GP NTC-10K-26-GP

PC4708 1 2

SCD047U25V3KX-3-GP
PC4714

PC4727

PC4728

PC4715

PC4739

PC4740

PC4716

PC4741

PC4742

PC4743
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

PW R_VCC_CSP1 46
1

z z z
hDͺϮϴt

hDͺϮϴt

hDͺϮϴt

hDͺϮϴt

hDͺϮϴt
2

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51622_CPUCORE(2/2)
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 47 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p05v

D D

Mode Fsw(KHz)
PR4802 2 DY 1 0R2J-2-GP
24,36 A_ON
GND 400KHz
PR4801 2 1 0R2J-2-GP PWR_1D05_EN
17,24,36 SIO_SLP_A#
3D3V_M
Float 800KHz

1
PC4818
SCD1U10V2KX-4GP
DY z PR4834
10KR2F-2-GP

2
Refer Intel CRB to use SLP_S3# control

2
PU4801 PWR_1D05_PGOOD

PWR_1D05_VRF_L
PR4823
1 2
0R2J-2-GP
28
EN PGOOD
1 PR4835 1
z 2 10KR2F-2-GP SIO_SLP_S0# 17,24
PC4826
SCD22U6D3V2KX-1GP

27 2 PWR_1D05_LP# PR4819 1
z 2 10KR2F-2-GP
1

PR4826 NU#27 NU#2

95K3R2F-GP
PWR_1D05_VREF 26
MODE
3 PWR_1D05_MODE 2
PR4824 z 1
0R2J-2-GP
2

VREF
2

PWR_1D05_REFIN_1 1 2 PWR_1D05_REFIN 25 4
PR4832 0R2J-2-GP REFIN NC#4
PR4830
1

24 5 PWR_1D05_BOOT 1 2 PWR_1D05_RC
PR4833 REFIN2 BST
105KR2F-1-GP 0R3J-0-U-GP
1 DY2 PWR_1D05V_GSNS 23 6 Design Current = 3.634A 1D05V_PWR 1D05V_M
GSNS SW#6
PC4821 SC10P50V2JN-4GP
3DQDVRQLF(743:5:)1
5.451A<OCP<6.5412A
2

1
PWR_1D05V_VSNS SCD1U50V3KX-GP
C 1 DY2 22
VSNS SW#7
7 PC4823 [[ C
PC4833 SC10P50V2JN-4GP 1 2

2
,VDW$'&5P2KP 1D05V_PWR PG4818
1 2 PWR_1D05_SLEW 21 8 GAP-CLOSE-PWR
PC4834 SC2700P50V2KX-1-GP SLEW SW#8 PL4801
1 2
1 2 PWR_1D05_TRIP 20 9 PWR_1D05_SW 1 2 PG4815
PR4828 TRIP SW#9 COIL-1UH-61-GP GAP-CLOSE-PWR
2

0R2J-2-GP 19 68.1R01D.20H
GND

GAP-CLOSE-PWR-3-GP
PR4821

1
DY PGND
10 1
PG4814
2
0R2J-2-GP PC4829 PC4822 PC4831 DYPC4830 DYPC4825 DYPC4832 PC4828

1
PG4820 GAP-CLOSE-PWR

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD1U10V2KX-5GP
PR4825
z

2
5V_S5 18 11
1

V5 PGND 2D2R5F-2-GP 1 2
PG4817

2
17 12 GAP-CLOSE-PWR

2
TRIP OCL(A) 5V_S5 VIN PGND PG4821

1
Pin19 direct

GAP-CLOSE-PWR-3-GP
Reserve PR4821 TPS51363RVER-GP 1 2

1PWR_1D05_SUNB
connect to 16 13 PG4812
GND 8A for OCP setting thermal pad PC4819
VIN PGND GAP-CLOSE-PWR

2
SC2D2U10V3KX-1GP

PWR_1D05V_VSNS
1

15 14 1 2
5V 12A VIN PGND PG4823

GND
PWR_1D05V_GSNS
GAP-CLOSE-PWR
2

74.51363.043
29
PC4820
SC330P50V3KX-GP z

2
DCBATOUT +PWR_SRC_1D05V
PG4813
1 2
+PWR_SRC_1D05V
GAP-CLOSE-PWR
PG4819
1 2 PC4817 PC4827 PC4835 PC4824
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

GAP-CLOSE-PWR
1

SCD1U50V3KX-GP

B B
PG4816
z REFIN Voltage (V) Output Voltage (V)
2

1 2
GND 1.05V
GAP-CLOSE-PWR
PG4822 FLOAT 1.2V
1 2
Resistor Divider
PC4836 GAP-CLOSE-PWR Adjustable between 0.6V to 2.0V
1
SE68U25VM-7-GP-U

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51363_1D05V_M
Size Document Number Rev
A2 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 48 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p35v0p675v

24,36 SUS_ON PR4928 2 DY 1 0R2J-2-GP

PR4903 2 1 0R2J-2-GP PWR_1D35V_EN 1D35V_PWR 1D35V_S3

17,24,36 SIO_SLP_S4# PG4902
1 2
3D3V_S5

PC4902
SCD1U10V2KX-5GP
1
GAP-CLOSE-PWR
D D
DY PG4904

1
2
PR4905 1 2
DY 1KR2J-1-GP GAP-CLOSE-PWR
PWR_1D35V_VREF PU4901
PG4905

2
PWR_1D35V_VREF_L 2 1 28 1 PWR_1D35V_PGOOD 1 2
PR4912 0R2J-2-GP EN PGOOD
GAP-CLOSE-PWR
PC4903
SCD22U6D3V2KX-1GP

27 2 PWR_1D35V_LP# 1 2
DY PG4907
1

PR4908 NU#27 NU#2 PR4910 10KR2F-2-GP

49K9R2F-L-GP PWR_1D35V_MODE
PWR_1D35V_VREF MODE
3 2 DY 1 1 2
26 PR4911 0R2J-2-GP
2

VREF GAP-CLOSE-PWR
2

PG4909
PWR_1D35V_REFIN_1 2 1 PWR_1D35V_REFIN 25 4
PR4913 0R2J-2-GP REFIN NC#4 PR4916 1 2
5D1R3F-GP
1

24 5 PWR_1D35V_BOOT 1 2PWR_1D35V_BOOT_RC GAP-CLOSE-PWR

PR4921 REFIN2 BST
105KR2F-1-GP
2 DY 1 PWR_1D35V_GSNS 23 6 3DQDVRQLF(743:5:)1 Design Current = 3.08A
GSNS SW#6
PC4904 SC10P50V2JN-4GP [[ 4.622<OCP<5.55A
2

1
2 DY 1 PWR_1D35V_VSNS 22 7 PC4906 ,VDW$'&5P2KP
PC4905 SC10P50V2JN-4GP VSNS SW#7 SCD1U50V3KX-GP

2
1D35V_PWR
1 2 PWR_1D35V_SLEW 21 8
PC4907 SC2700P50V2KX-1-GP SLEW SW#8 PL4901

2 1 1 2 PWR_1D35V_TRIP 20 9 PWR_1D35V_SW 1 2
PR4923 PR4919 0R2J-2-GP TRIP SW#9 COIL-1UH-61-GP
0R2J-2-GP 19 68.1R01D.20H
PWR_1D35V_TRIP_R

GND

1
PGND
10 DY DY DY
PC4921 PC4922 PC4923 PC4924 PC4925 PC4926 PC4908
1PWR_1D35V_TRIP

1
2

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD1U10V2KX-5GP
5V_S5
DY 0R2J-2-GP

1
PR4915 PG4919

2
C 18 11 PR4920
'< C

GAP-CLOSE-PWR-3-GP
Reserve PR4915 for OCP setting. 5V_S5 V5 PGND 2D2R5F-2-GP

2
17 12

1PWR_1D35V_SUNB 2
VIN PGND
TPS51363RVER-GP
16 13
VIN PGND
Pin19 direct connect PC4909
1

to thermal pad
SC2D2U10V3KX-1GP

15 14
VIN PGND PWR_1D35V_VSNS
GND
2

PG4916
74.51363.043
29

PC4910
SC330P50V3KX-GP '< PWR_1D35V_GSNS 1 2

2
DCBATOUT +PWR_SRC_1D35V GAP-CLOSE-PWR-3-GP
PG4903
1 2
+PWR_SRC_1D35V
GAP-CLOSE-PWR
PG4901
1 2 PC4912 PC4913 PC4911 PC4917 0D675V_VTTREF
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
2

0D675V_PWR 0D675V_S0
SCD1U50V3KX-GP

GAP-CLOSE-PWR
PG4917
PG4906 DY PC4916 1 2
1

1
SCD1U16V2KX-3GP
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR 1D35V_S3
PG4918

2
1 2

GAP-CLOSE-PWR

0R2J-2-GP 2 DY 1 PR4926 PC4915

1
B 24,36 RUN_ON 0R2J-2-GP
B
17,24,36 SIO_SLP_S3# 2 DY 1 PR4925 SC10U6D3V3MX-GP PC4918
14 DDR_VTT_PG_CTRL 0R2J-2-GP 1 2 PR4909 VTT_EN SCD1U16V2KX-3GP

2
0326
0R2J-2-GP DY 1 PR4927

11
24,36 SUS_ON 2
PU4902
0R2J-2-GP 1 2 PR4914 PU4902_S5 0D675V_PWR

GND
17,24,36 SIO_SLP_S4#
6 5
PR4917 VTTREF VTTSEN
7 4
S3 PGND
5V_S5 2 1 8 3

1
GND VTT
9 2
0R2J-2-GP 0D675V_VCNTL S5 VIN PC4914
10 1
VCNTL VREF SC22U6D3V3MX-1-GP

2
1
PR4918 PC4901
3D3V_S5 2 DY 1 SC1U10V2KX-1GP APL5338XAI-TRG-GP
74.05338.079

2
0R2J-2-GP
I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor:CHIP CHOKE 1.0UH ETQP3W1R0WFN / Panasonic/ 6.9mOhm / Isat =13Arms/ 68.1R01D.20H
O/P cap:CHIP CAP C 22U 6.3V M0805 X5R /78.22610.51L

If use 74.02997.B79, Stuff PR4918 and Dummy PR4917.

2nd source:
74.02997.B79

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51363+5338_1D35V & 0D675V

Size Document Number Rev
C X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 49 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 50 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 51 of 107
5 4 3 2 1

www.vinafix.vn
SSID = VIDEO eDP_TXN0_CPU
eDP_TXP0_CPU
DCBATOUT_LCD eDP_AUXN_CPU
eDP CONNECTOR eDP_AUXP_CPU

LCD1 SSI_0611

1
SC10P50V2JN-4GP
EC5201

SC10P50V2JN-4GP
EC5202

SC10P50V2JN-4GP
EC5203

SC10P50V2JN-4GP
EC5204
38
DY DY DY DY
31 39

2
1

2
32 3
4
5
6 EMB_HPD
7 BLON_OUT_C
8 LCD_BRIGHTNESS_C
9 DBC_PANEL_EN 20
10 LCD_CBL_DET# 20
33 11 DP_DATA0_R# C5201 1 2 SCD1U10V2KX-5GP eDP_TXN0_CPU 8
12 DP_DATA0_R C5203 1 2 SCD1U10V2KX-5GP eDP_TXP0_CPU 8
13 DP_AUX# C5204 1 2 SCD1U10V2KX-5GP
eDP_AUXN_CPU 8 LCDVDD
14 DP_AUX C5205 1 2 SCD1U10V2KX-5GP
eDP_AUXP_CPU 8
15 LCD_TST_C R5205 1 2 100R2J-2-GP
LCD_TST 24
16
17

1
C5209
SCD1U10V2KX-5GP

C5210
SC1U6D3V2KX-GP
18
34 19
20

2
21 DMIC_CLK 27 NOTE: EN has an internal pull down resistor to GND.
22 DMIC_DATA 27
23 PANEL_BKEN_PCH 15
24
25 CAM_MIC_CBL_DET# 20

1
26
35 27 USB_CAMERA_N_R R5217 D5201
28 USB_CAMERA_P_R BLON_OUT_C 1 2 BLON_OUT_R 3 BAT54C-10-GP
29 75.00054.J7D
30 3D3V_CAMERA_S0 0R2J-2-GP

1
3D3V_MIC_S0 3D3V_S0

R5219
100KR2J-1-GP

2
36 40 R5231
1 2 PANEL_BKEN_EC 99
37 0R3J-0-U-GP

2
IPEX-CON30-8-GP
20.F2089.030
DCBATOUT_LCD AFTP4306 3D3V_S0
1
LCD_BRIGHTNESS_R R5220
1 DY 2
0R2J-2-GP DP_UTIL 8
EMB_HPD 1 AFTP4308 1 2
BLON_OUT_C AFTP4309 R5207 1 BIA_PW M_PCH 15
1 DY 2 1KR2J-1-GP LCD_BRIGHTNESS_R R5221 0R2J-2-GP

1
LCD_BRIGHTNESS_C 1 AFTP4310
DP_DATA0_R# 1 AFTP4311 R5208 1 DY 2 1KR2J-1-GP PANEL_BKEN_PCH R5222 D5203
DP_DATA0_R 1 AFTP4312 LCD_BRIGHTNESS_C 1 2LCD_BRIGHTNESS 3 BAT54C-10-GP
DP_AUX# 1 AFTP4313 HPD Inversion for eDP 75.00054.J7D

1
DP_AUX 1 AFTP4314 0R2J-2-GP
LCDVDD 1 AFTP4319 R5224

2
LCD_TST_C 1 AFTP4320 EMB_HPD R5225 1 2 100R2J-2-GP EDP_HPD 15 10KR2J-3-GP
LCD_CBL_DET# 1 AFTP4321
DMIC_DATA AFTP4322 BIA_PW M_EC 24
1

2
1
USB_CAMERA_N_R 1 AFTP4323
USB_CAMERA_P_R 1 AFTP4324 R5226
3D3V_CAMERA_S0 1 AFTP4325 100KR2J-1-GP
DMIC_CLK 1 AFTP4307
CAM_MIC_CBL_DET# 1 AFTP4315
2

DBC_PANEL_EN 1 AFTP4316
3D3V_MIC_S0 1 AFTP4317

Camera Power 3D3V_S0 ϴϰ͘ϬϮϭϯϬ͘Ϭϯϭ Q5201

3D3V_CAMERA 3D3V_CAMERA_S0
DCBATOUT_LCD
INVERTER POWER
ϮEсϴϰ͘ϬϬϭϬϮ͘Ϭϯϭ SI3457 continuous 2.5A
ϯƌĚсϴϰ͘Ϭϯϰϭϯ͘ϯϭ DMP2130L-7-GP R5228
Rds(on) = 0.113~0.092 Ohm
1 2
S 0R3J-0-U-GP
DCBATOUT
SCD1U16V2KX-3GP

C5222
SC1KP50V2KX-1GP

C5223
SCD1U50V3KX-GP

C5224 D U5203
1

2
D

SCD1U16V2KX-3GP C5225 1 D D 6
1

1
G

C5228 2 D D 5
SCD1U16V2KX-3GP

DY C5227 3 G S 4
2

1
G

SC10U10V5KX-2GP
2

1
SI3457CDV-T1-GE3-GP

1
84.03457.A3D
R5227 ϮEсϴϰ͘ϬϬϲϱϴ͘ϯ C5226 R5213
20 3.3V_CAM_EN# 1 2 3.3V_CAM_EN#_R DMP2130 continuous 2.4A SCD1U25V2KX-GP 100KR2J-1-GP

2
0R2J-2-GP
Rds(on) = 99~125 mOhm

2
R_PW R_SRC

2
R5216
USB_CAMERA_N_R R5218 2 DY 1 0R2J-2-GP 47KR2J-2-GP
USB_CAMERA_N 16
C_PW R_SRC

1
TR5201
2 1
D

<Core Design>
3 4 Q5202
2N7002K-2-GP
FILTER-4P-26-GP ϴϰ͘ϮEϳϬϮ͘:ϯϭ Wistron Corporation
69.10103.061 ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ Taipei Hsien 221, Taiwan, R.O.C.
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
USB_CAMERA_P_R R5223 2 DY 1 0R2J-2-GP Title
USB_CAMERA_P 16
G

eDP Connector
Size Document Number Rev
24 EN_INVPW R
A3
Round Rock 13.3" UMAX00
Date: Friday, June 28, 2013 Sheet 52 of 107

www.vinafix.vn
 5 4 3 2 1

D D

C
(Blanking) C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 53 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = VIDEO HDMI CONNECTOR

HDMI1
Close to HDMI Connector 20

HDMI_DATA2_R_C_CON 1
C5401 1 2 SCD1U10V2KX-5GP HDMI_CLK_R_C#
8 HDMI_CLK# C5402 SCD1U10V2KX-5GP HDMI_CLK_R_C
8 HDMI_CLK 1 2 2
HDMI_DATA2_R_C#_CON 3
D C5403 1 2 SCD1U10V2KX-5GP HDMI_DATA0_R_C# HDMI_DATA1_R_C_CON 4 D
8 HDMI_DATA0# C5404 SCD1U10V2KX-5GP HDMI_DATA0_R_C
8 HDMI_DATA0 1 2 5
HDMI_DATA1_R_C#_CON 6
HDMI_DATA0_R_C_CON 7
8
HDMI_DATA0_R_C#_CON 9
C5405 1 2 SCD1U10V2KX-5GP HDMI_DATA1_R_C# HDMI_CLK_R_C_CON 10
8 HDMI_DATA1# C5406 SCD1U10V2KX-5GP HDMI_DATA1_R_C 5V_S0
8 HDMI_DATA1 1 2 11
HDMI_CLK_R_C#_CON 12
C5407 1 2 SCD1U10V2KX-5GP HDMI_DATA2_R_C# AFTP5414 1 HDMI_CEC 13
8 HDMI_DATA2# C5408 SCD1U10V2KX-5GP HDMI_DATA2_R_C 5V_HDMI
8 HDMI_DATA2 1 2 14
D5401 (8V/1.1A) DDC_CLK_HDMI 15
3 DDC_DATA_HDMI 16
F5401 17
1 HDMI_FUSE 1 2 18

8
7
6
5

8
7
6
5
HPD_HDMI_CON 19

C5409
SCD1U10V2KX-5GP
RN5401 RN5402 2 POLYSW -1D1A8V-4-GP-U

1
SRN470J-5-GP SRN470J-5-GP 69.50007.771 AFTP5401 1 21
5V_S0 BAT1000-7-F-GP
Q5403
Shark Bay Mobile 83.1R004.E81 SKT-HDMI21-6-GP

2
G MOW WW15'13 22.10296.751

1
2
3
4

1
2
3
4
1

D HDMI_PLL_GND
R5401
DY 100KR2J-1-GP S
1

R5402
2

2N7002K-2-GP 3D3V_S0
DY 0R2J-2-GP
ϴϰ͘ϮEϳϬϮ͘:ϯϭ
C
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ C
2

ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ

1
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ Q5404
R5403
1MR2J-1-GP G R5407
D HDMI_HPD_D 1 2 HPD_HDMI_CON

2
R5406

1
R5404 1 2 0R2J-2-GP R5405 1 2 0R2J-2-GP 15 HDMI_PCH_DET 1 2 HDMI_HPD_S S 0R2J-2-GP R5408
0R2J-2-GP 20KR2J-L2-GP
HDMI_CLK_R_C# HDMI_CLK_R_C#_CON HDMI_DATA1_R_C# HDMI_DATA1_R_C#_CON 2N7002K-2-GP
ϴϰ͘ϮEϳϬϮ͘:ϯϭ

2
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
1

TR5401 4 TR5402 ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ

FILTER-130-GP FILTER-130-GP ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
69.10118.001 69.10118.001
DY DY

5V_S0
2

HDMI_CLK_R_C HDMI_CLK_R_C_CON HDMI_DATA1_R_C HDMI_DATA1_R_C_CON

3
1 2 1 2 D5206
R5410 0R2J-2-GP R5409 0R2J-2-GP BAW 56-2-GP
B B
ϴϯ͘ϬϬϬϱϲ͘'ϭϭ
ϮŶĚсϴϯ͘ϬϬϬϱϲ͘ϭϭ

15V_S0_D2 2

5V_S0_D1 1
R5411 1 2 0R2J-2-GP R5412 1 2 0R2J-2-GP

HDMI_DATA0_R_C# HDMI_DATA0_R_C#_CON HDMI_DATA2_R_C# HDMI_DATA2_R_C#_CON

2
1

TR5403 TR5404 3D3V_S0 RN5403

FILTER-130-GP FILTER-130-GP SRN2K2J-1-GP
69.10118.001 69.10118.001
DY DY

4
3
Q5401
HDMI_DATA2_R_C_CON 1 AFTP5402
15 PCH_HDMI_CLK 4 3 DDC_CLK_HDMI HDMI_DATA2_R_C#_CON 1 AFTP5403
HDMI_DATA1_R_C_CON 1 AFTP5404
2

5 2 HDMI_DATA1_R_C#_CON 1 AFTP5405
HDMI_DATA0_R_C HDMI_DATA0_R_C_CON HDMI_DATA2_R_C HDMI_DATA2_R_C_CON HDMI_DATA0_R_C_CON 1 AFTP5406
6 1 HDMI_DATA0_R_C#_CON 1 AFTP5407
HDMI_CLK_R_C_CON 1 AFTP5408
1 2 1 2 HDMI_CLK_R_C#_CON 1 AFTP5409
R5413 0R2J-2-GP R5414 0R2J-2-GP 2N7002KDW -GP DDC_CLK_HDMI AFTP5410
1
ϴϰ͘ϮEϳϬϮ͘ϯ& DDC_DATA_HDMI 1 AFTP5411
15 PCH_HDMI_DATA 2nd = 84.DM601.03F HPD_HDMI_CON 1 AFTP5412
5V_HDMI 1 AFTP5413
SSI_0625 ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& DDC_DATA_HDMI
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
A <Core Design> A
HDMI_CLK_R_C# HDMI_DATA0_R_C# HDMI_DATA1_R_C# HDMI_DATA2_R_C#
1

R5415 R5416 R5417 R5418 Wistron Corporation

150R2J-L1-GP-U 150R2J-L1-GP-U 150R2J-L1-GP-U 150R2J-L1-GP-U 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY DY DY DY Taipei Hsien 221, Taiwan, R.O.C.
2

HDMI_CLK_R_C HDMI_DATA0_R_C HDMI_DATA1_R_C HDMI_DATA2_R_C Title

HDMI Level Shifter/Connector
Size Document Number Rev
A3
Round Rock 13.3" UMAX00
Date: Friday, June 28, 2013 Sheet 54 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = VIDEO R5506 1 2 0R2J-2-GP R5512 1 2 0R2J-2-GP

8 DDPC_DATA0 1 2 mDP_DATA0_A_C mDP_DATA0_A 8 DDPC_DATA2 1 2 mDP_DATA2_A_C mDP_DATA2_A

C5502 SCD1U10V2KX-5GP C5506 SCD1U10V2KX-5GP

5V_S0

4
TR5501 TR5503
FILTER-130-GP FILTER-130-GP

1
C5513
SCD1U10V2KX-5GP
2
U5501 DY
69.10118.001
SSI_0625 DY
69.10118.001

D 16 4 DDPC_AUX D
VCC 1A DDPC_AUX#
2A 7
9

3
3A
15 LP_DDPC_AUX 2 1B1 4A 12
15 LP_DDPC_AUX# 5 2B1
11 15 8 DDPC_DATA0# 1 2 mDP_DATA0_A#_C mDP_DATA0_A# 8 DDPC_DATA2# 1 2 mDP_DATA2_A#_C mDP_DATA2_A#
3B1 OE# C5503 SCD1U10V2KX-5GP C5505 SCD1U10V2KX-5GP
14 4B1
1 mDP_CA_DET R5509 1 2 0R2J-2-GP R5513 1 2 0R2J-2-GP
S
15 DP_HDMI_CLK 3 1B2

1
15 DP_HDMI_DATA 6 R5510 1 2 0R2J-2-GP R5514 1 2 0R2J-2-GP
2B2
10 3B2 GND 8
13 17 D5502 8 DDPC_DATA1# 1 2 mDP_DATA1_A#_C mDP_DATA1_A# 8 DDPC_DATA3# 1 2 mDP_DATA3_A#_C mDP_DATA3_A#
4B2 GND VARISTOR-27V-2-GP C5501 SCD1U10V2KX-5GP C5508 SCD1U10V2KX-5GP

CBT3257ABQ-GP

4
73.03257.A03
ϮŶĚсϳϯ͘ϬϯϮϱϳ͘Ϭϯ TR5502 TR5504
FILTER-130-GP FILTER-130-GP
69.10118.001 69.10118.001
DY DY
INPUT SWITCH
OE# S

3
L L nA to nB1 8 DDPC_DATA1 1 2 mDP_DATA1_A_C mDP_DATA1_A 8 DDPC_DATA3 1 2 mDP_DATA3_A_C mDP_DATA3_A
C5504 SCD1U10V2KX-5GP C5507 SCD1U10V2KX-5GP
1 2 1 2
C L H nA to nB2 R5511 0R2J-2-GP R5515 0R2J-2-GP C

DP1
H X Switch Off
1MR2J-1-GP 2 1 R5507 mDP_CA_DET 4 16 DDPC_AUX
DP_CEC CONFIG_1 AUX_CHP DDPC_AUX#
6 CONFIG_2 AUX_CHN 18

mDP_DATA0_A# 5 21
mDP_DATA0_A ML_LANGE0N CHASSIS#21
3 ML_LANGE0P CHASSIS#22 22
CHASSIS#23 23
3D3V_S0 5V_S0 mDP_DATA1_A# 11 24
mDP_DATA1_A ML_LANGE1N CHASSIS#24
9 ML_LANGE1P
SSI_0625 mDP_DATA2_A# 17 ML_LANGE2N NP1 NP1
1

mDP_DATA2_A 15 NP2
R5508 ML_LANGE2P NP2
G

1M1R2J-GP DY mDP_DATA3_A# 12
Q5501 mDP_DATA3_A ML_LANGE3N
10 ML_LANGE3P GND 1
LSK3541G1ET2L-GP 7
2

GND
84.03541.F31 GND 8
15 PCH_DPC_HPD S D DPC_HPD 2 13
HOT_PLUG_DETECT GND
GND 14
1

3D3V_DP_S0
SCD01U50V2KX-1GP

20 DP_PWR/PWR_OUT GND 19
1

C5539

D5503 MINI_DP
VARISTOR-27V-2-GP SKT-DISPLAY20P-41-GP
2

1
SCD1U10V2KX-5GP
C5511

SCD022U16V2KX-3GP
C5512

B
62.10105.581 B
DY
2

SSI_0626 SSI_0626
3D3V_S0 500mA 3D3V_DP_S0_R (8V/1.1A) 3D3V_DP_S0 mDP_DATA0_A# mDP_DATA2_A
mDP_DATA0_A mDP_DATA2_A#
D5501 F5501 mDP_DATA1_A mDP_DATA3_A#
A K 1 2 mDP_DATA1_A# mDP_DATA3_A

POLYSW -1D1A8V-4-GP-U
RB551VM-30TE-17-GP 69.50007.771
83.R5003.N8F U5502 U5503

R5501 1 9 1 9
1 DY 2 2 8 2 8
3 3
0R3J-0-U-GP 4 7 4 7
mDP_DATA0_A 1 AFTP5501 5 6 5 6
mDP_DATA0_A# 1 AFTP5502
mDP_DATA1_A 1 AFTP5503
3D3V_S0 mDP_DATA1_A# 1 AFTP5504 ESD3V3U4ULC-GP ESD3V3U4ULC-GP
mDP_DATA2_A 1 AFTP5505 83.3V3U4.0A0 83.3V3U4.0A0
mDP_DATA2_A# 1 AFTP5506
DDPC_AUX# 100KR2J-1-GP 2 1 R5502 DPC_HPD 1 AFTP5507
mDP_CA_DET 1 AFTP5508
DP_CEC 1 AFTP5509 DDPC_AUX
A mDP_DATA3_A 1 AFTP5510 DDPC_AUX# <Core Design> A
DDPC_AUX 100KR2J-1-GP 2 1 R5503 mDP_DATA3_A# 1 AFTP5511
DDPC_AUX 1 AFTP5512 U5504
DP_CEC 5M1R2J-GP 1 R5504 DDPC_AUX# AFTP5513
2
3D3V_DP_S0
1
1 AFTP5514 1 6 Wistron Corporation
DPC_HPD 100KR2J-1-GP 2 1 R5505 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2 5 Taipei Hsien 221, Taiwan, R.O.C.
3
4 Title

RCLAMP0522PDTCT-GP Mini Display Port

Size Document Number Rev
A3
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 55 of 107
5 4 3 2 1

www.vinafix.vn
SSID = SATA

3D3V_S0_HDD
R5601
3D3V_S0 1 DY 2

1
0R3J-0-U-GP C5602
C5601 SC3D3P50V2CN-GP R5605
SC68P-GP
DY 0R2J-2-GP

2
HDD1

2
P1 V33 23 23
5V_S0_HDD P2 24
V33 24
20 mSATA_DEVSLP 1 2 mSATA_DEVSLP_R P3 V33
R5602 R5604 0R2J-2-GP
5V_S0 1 2 P7 V5
SC10U6D3V3MX-GP
P8 V5
0R3J-0-U-GP C5603
P9 V5
1

1
R5603 C5604
1 2 SCD1U16V2KX-3GP P13 S1
V12 GND
P14 S4
2

2
0R3J-0-U-GP V12 GND
P15 V12 GND S7
GND P4
SCD01U50V2KX-1GP P5
C5605 1 SATA_TXP0_C GND HDD_DET# 19
19 SATA_TXP0 2 S2 A+ GND P6

1
19 SATA_TXN0 C5606 1 2 SATA_TXN0_C S3 P10 EC5601
SCD01U50V2KX-1GP A- GND
C5608 1 SATA_RXP0_C GND P12 DY SC1KP50V2KX-1GP
2 S6

2
19 SATA_RXP0 C5607 1 SATA_RXN0_C B+
19 SATA_RXN0 2 S5 B- DAS/DSS P11 SSI_0626
SCD01U50V2KX-1GP FFS_INT2_Q 67
SCD01U50V2KX-1GP SKT-SATA7P-15P-85-GP-U
20.81599.022
SSI_0625

U5602

SATA_TXP0_C 1 10
SATA_TXN0_C 2 LINE_1 NC#10
LINE_2 NC#9 9
3
SATA_RXP0_C 4 GND DY GND 8
LINE_3 NC#7 7
SATA_RXN0_C 5 6
LINE_4 NC#6
3D3V_S0
AZ1045-04F-R7G-GP
550 mA 75.01045.073
1

C5612 U5601 3D3V_S0_HDD

SC10U10V5KX-2GP
9
2

GND
1 VIN#1 VOUT#8 8
2 VIN#2 VOUT#7 7
15,20 3.3V_HDD_EN 3 6 3D3V_S0_HDD_CT
ON CT
C5611
SC470P50V2KX-3GP
5V_S5 4 VBIAS GND 5
1

TPS22965DSGR-GP
2

74.22965.093
2nd = 74.03526.093 <Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 56 of 107

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 57 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = WIRELESS

3D3V_AUX_S5 15V_S5

1
700 mA
R5817
100KR2J-1-GP R5818 3D3V_S5 3D3V_S5_WLAN
100KR2J-1-GP

2
3D3V_S5
D 3.3V_WLAN_ENABLE# U5801 3D3V_S0 3D3V_S0 D
1 D D 6

C5805
SCD1U10V2KX-5GP
2 D D 5

C5802
SCD1U10V2KX-5GP
3.3V_WLAN_ENABLE 3 G S 4

1
DY R5802
AO6402A-GP 10KR2J-3-GP

2
U5803 C5817 ϴϰ͘ϬϲϰϬϮ͘ϯ

2
6

1
ϮEсϴϰ͘WϮϳϬϯ͘Ϭϯ U5802

2
ϯƌĚсϴϰ͘Ϭϯϰϱϲ͘ϯ

SC4700P50V2KX-1GP

C5806
SC470P50V2KX-3GP

C5807
SC470P50V2KX-3GP

C5808
SC10U6D3V3MX-GP
R5820 1 6 Q5801 1

1
3.3V_WLAN_EN_R NC#1 VCC 2N7002KDW-GP 17,24,59,65,88 PCH_PLTRST#_EC B
99 AUX_EN_WOWL 1 2 2
A DY NC#5
5 AO6402A MAX 7A 5

2
VCC
3 4 ϴϰ͘ϮEϳϬϮ͘ϯ& 2
0R2J-2-GP GND Y
2nd = 84.DM601.03F Rds(on) = 27~40m Ohm 19 MPCIE_RST# A
4 MINI_CARD_RST#

2
Y
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& 3
GND
74AUP1G04GM-GP ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

1
73.01G04.00J 74LVC1G08GW-1-GP
73.01G08.L04 R5803
R5821 100KR2J-1-GP
1 2 3.3V_WLAN_EN

2
1
0R2J-2-GP
R5816
100KR2J-1-GP
DY
SSI_0618

2
BT_RADIO_DISABLE#_R 0R2J-2-GP 2 1 R5808
BT_RADIO_DISABLE# 99
D5805
A DY K

1PS76SB40-GP-U
3D3V_S5_WLAN 83.1PS76.01F
Follow INTEL 7260_EDS_Rev3.0
WLAN1 SSI_0618
3D3V_S5_WLAN
NP2 NP1 0R2J-2-GP 2 1 R5806
NP2 NP1
C5801
SCD1U10V2KX-5GP

C5803
SC4D7U6D3V3KX-GP

C5804
SCD1U10V2KX-5GP

76 77
1

76 77
74 75
3_3V GND CLK_PCIE_N4_WLAN#_R R5819
C DY 72 73 1 DY 2 0R2J-2-GP CLK_PCIE_N4_WLAN# 18 C
PCIE_WLAN_WAKE# 3_3V REFCLKN1
R5825 1 DY 2 0R2J-2-GP PCIE_WLAN_WAKE#_R 70 71 CLK_PCIE_P4_WLAN_R R5822 1 DY 2 0R2J-2-GP CLK_PCIE_P4_WLAN 18 D5803 R5814
2

R5823 MINI4CLK_REQ#_R PEWAKE1#_0/3_3V REFCLKP1 WLAN_RADIO_DIS#_R WLAN_RADIO_DIS#

1 DY 2 0R2J-2-GP 68 69 A DY K 2 1
18 MINI4CLK_REQ# MINI_CARD_RST#_R CLKREQ1#_0/3_3V GND PCIE_RXN5_C R5826 WLAN_WIGIG60HZ_DIS# 99
66 67 1 DY 2 0R2J-2-GP PCIE_RXN5 16 0R2J-2-GP
R5824 PERST1#_0/3_3V PETN1 PCIE_RXP5_C R5827
64 65 1 DY 2 0R2J-2-GP PCIE_RXP5 16
MINI_CARD_RST# RESERVED#64 PETP1 1PS76SB40-GP-U
1 DY 2 62
ALERT_0/3_3 GND
63
PCIE_TXN5_C C5814 1 SCD1U10V2KX-5GP
60
I2C_CLK_0/3_3 PERN1
61 DY2 PCIE_TXN5 16 83.1PS76.01F
0R2J-2-GP 58 59 PCIE_TXP5_C C5813 1 DY2 SCD1U10V2KX-5GP
WLAN_RADIO_DIS#_R I2C_DATA_0/3_3 PERP1 PCIE_TXP5 16
56 57
BT_RADIO_DISABLE#_R W_DISABLE#1_0/3_3V GND
54 55 PCIE_WLAN_WAKE# 24
R5815 MINI_CARD_RST# RESERVED/W_DISABLE#2_0/3_3V PEWAKE0#_0/3_3V
52 53 MINI1CLK_REQ# 18
SUSCLK_NGFF_R PERST0#_0/3_3V CLKREQ0#_0/3_3V
17,59 SUSCLK_NGFF 1 DY 2 50 51
0R2J-2-GP SUSCLK/32KHZ_0/3_3V GND
48 49 CLK_PCIE_N3_WLAN# 18
COEX1_0/1_8V REFCLKN0
46 47 CLK_PCIE_P3_WLAN 18
COEX2_0/1_8V REFCLKP0
44 45
COEX3_0/1_8V GND
18 CL_CLK R5809 1 2 0R2J-2-GP CL_CLK_R 42 43 PCIE_RXN4_C R5828 1 2 0R2J-2-GP PCIE_RXN4 16
CLINK_CLK PETN0
18 CL_DATA R5810 1 2 0R2J-2-GP CL_DATA_R 40 41 PCIE_RXP4_C R5829 1 2 0R2J-2-GP PCIE_RXP4 16
CLINK_DATA PETP0
18 CL_RST# R5811 1 2 0R2J-2-GP CL_RST#_R 38 39 16 USB_WLAN_N
R5812 1 DY 2 0R2J-2-GPUSB_WLAN_N_R
CLINK_RESET GND PCIE_TXN4_C C5809 1
36 37 2 SCD1U10V2KX-5GP PCIE_TXN4 16
GND PERN0 PCIE_TXP4_C C5810 1
34 35 2 SCD1U10V2KX-5GP PCIE_TXP4 16
DP_ML0P PERP0
32 33
DP_ML0N GND
30 31

4
GND DP_HPD_0/3_3V
28 29
DP_ML1P GND TR5801
26 Module Key 27
DP_ML1N DP_ML2P FILTER-130-GP
24 25
GND DP_ML2N
22
DP_AUXP GND
23 69.10118.001
20
DP_AUXN DP_ML3P
21 Change form 68.02002.021 to 69.10118.001
18 19
GND DP_ML3N
61 BT_LED# 16 17
LED#2 DP_MLDIR

3
61 WLAN_LED# 6 7
LED#1 GND USB_WLAN_N_R
4 5
3_3V USB_D- USB_WLAN_P_R
2 3
3_3V USB_D+ USB_WLAN_P_R
NGFF_KEY_A 75P GND
1 16 USB_WLAN_P
R5813
1 DY 2
0R2J-2-GP

SKT-MINI67P-3-GP-U1
62.10043.K51

B B

3D3V_S5_WLAN 1 AFTP5801
PCIE_WLAN_WAKE# 1 AFTP5802
MINI1CLK_REQ# 1 AFTP5803
CLK_PCIE_N3_WLAN# 1 AFTP5804 EMI request
CLK_PCIE_P3_WLAN 1 AFTP5805
WLAN_RADIO_DIS#_R 1 AFTP5810
MINI_CARD_RST# 1 AFTP5811
CLK_PCIE_N3_WLAN#

PCIE_RXN4_C
CLK_PCIE_P3_WLAN

1 AFTP5812
PCIE_RXP4_C 1 AFTP5813
PCIE_TXN4_C 1 AFTP5814
BT_RADIO_DISABLE#_R
1 AFTP5815
PCIE_TXP4_C 1 AFTP5816
EC2912

EC2911

USB_WLAN_N_R 1 AFTP5817
USB_WLAN_P_R 1 AFTP5819
WLAN_LED# 1 AFTP5821
BT_LED# 1 AFTP5823
SC33P50V2JN-3GP

SC33P50V2JN-3GP
1

PCIE_RXN5_C 1 AFTP5806 DY DY
PCIE_RXP5_C 1 AFTP5807
2

PCIE_TXN5_C 1 AFTP5808
PCIE_TXP5_C 1 AFTP5809
SUSCLK_NGFF_R 1 AFTP5818
CL_CLK_R 1 AFTP5820
CL_DATA_R 1 AFTP5822
CL_RST#_R 1 AFTP5824
MINI4CLK_REQ#_R 1 AFTP5825
CLK_PCIE_N4_WLAN#_R 1 AFTP5826
CLK_PCIE_P4_WLAN_R 1 AFTP5827

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)
Size Document Number Rev

Round Rock 13.3" UMA X00

Date: Friday, June 28, 2013 Sheet 58 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = WIRELESS NGFF(WWAN/SSD)

3D3V_AUX_S5 15V_S5
Place near WWAN CONN

1
3D3V_S5_W W AN 2750 mA 3D3V_S5_W W AN
R5910
100KR2J-1-GP R5909 3D3V_S5 3D3V_S5_W W AN

C5901
SCD1U10V2KX-5GP

C5902
SCD1U10V2KX-5GP

C5903
SCD1U10V2KX-5GP
100KR2J-1-GP

1
ST220U6D3VBM-3-GP
TC5901

ST220U6D3VBM-3-GP
TC5902
R5903 1 2 1MR2J-1-GP UIM_DET

2
D D
R5907 1 DY 2 100KR2J-1-GP NGFF_DEVSLP1

2
ϮEсϳϳ͘ϮϮϮϳϭ͘ϯϯ>
ϳϳ͘ϮϮϳϭ͘ϰϱ>

ϮEсϳϳ͘ϮϮϮϳϭ͘ϯϯ>
ϳϳ͘ϮϮϳϭ͘ϰϱ>
3.3V_W W AN_ENABLE# U5901
1 D D 6
2 D D 5 3D3V_S5_W W AN
3.3V_W W AN_ENABLE 3 G S 4
MINI2CLK_REQ# R5915 1 2 10KR2J-3-GP
AO6402A-GP
C5908 ϴϰ͘ϬϲϰϬϮ͘ϯ NGFF_CONFIG_0 R5917 1 2 10KR2J-3-GP

1
SSI_0618 ϮEсϴϰ͘WϮϳϬϯ͘Ϭϯ

SC4700P50V2KX-1GP
Q5901 ϯƌĚсϴϰ͘Ϭϯϰϱϲ͘ϯ NGFF_CONFIG_1 R5918 1 2 10KR2J-3-GP
R5924 2N7002KDW -GP AO6402A MAX 7A SSI_0618

2
2 1 ϴϰ͘ϮEϳϬϮ͘ϯ& Rds(on) = 27~40m Ohm
NGFF_CONFIG_2 R5919 1 2 10KR2J-3-GP
SSI_0626 2nd = 84.DM601.03F

3
0R2J-2-GP ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& NGFF_CONFIG_3 R5920 1 2 10KR2J-3-GP
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
99 MCARD_W W AN_PW REN D5901 A DY K

1PS76SB40-GP-U
83.1PS76.01F W W AN_PW R_EN_D

1
D5902
20 3.3V_mSATA_EN A DY K R5911 Follow EM7355 Technical Spec
100KR2J-1-GP W W AN1
1PS76SB40-GP-U
83.1PS76.01F 77

2
77
76 76
99 NGFF_CONFIG_2 75 USB3_0_IND CONFIG2
73 GND 3_3VAUX 74 3D3V_S5_W W AN
C 71 72 C
GND 3_3VAUX
99 NGFF_CONFIG_1 69 PEDET CONFIG1 3_3VAUX 70
R5912 1 DY 2 0R2J-2-GP PCH_PLTRST#_EC_R 67 NC SUSCLK_32KHZ 68 SUSCLK_NGFF_C R5923 1 DY 2 0R2J-2-GP SUSCLK_NGFF 17,58
17,24,58,65,88 PCH_PLTRST#_EC RESET#
65 ANTCTL3 SIM_DETECT 66 UIM_DET 60
3D3V_S5_W W AN R5922 1 DY 2 0R2J-2-GP 63 64
ANTCTL2 COEX1
61 ANTCTL1 COEX2 62
59 ANTCTL0 COEX3 60
57 GND NC#58 58
18 CLK_PCIE_P5_W W AN 55 REFCLKP NC NC#56 56
53 NC NC 54 NGFF_W AKE# R5913 1 DY 2 0R2J-2-GP W W AN_W AKE# 18
18 CLK_PCIE_N5_W W AN# REFCLKN PEWAKE#
51 GND NC CLKREQ# 52 MINI2CLK_REQ# 15,18
19 SATA_TP3/PETP6_L0 R5914 1 DY 2 0R2J-2-GP PETP0/SATA_A+ 49 50
R5904 PERP0/SATA_A+ NC NC PERST#
19 SATA_TN3/PETN6_L0 1 DY 2 0R2J-2-GP PETN0/SATA_A- 47 PERN0/SATA_A- NC GNSS4 48
45 GND GNSS3 46
19 SATA_RN3/PERN6_L0 C5906 1 DY2 SCD1U10V2KX-5GP PERN0/SATA_B- 43 44
C5907 1 SCD1U10V2KX-5GP PERP0/SATA_B+ PETP0/SATA_B- NC GNSS2
19 SATA_RP3/PERP6_L0 DY2 41 PETN0/SATA_B+ NC GNSS1 42
39 GND GNSS0 40
3D3V_S5_W W AN 1 AFTP5901 37 38 NGFF_mSATA_DEVSLP R5902 1 DY 2 0R2J-2-GP NGFF_DEVSLP1 20
W W AN_PW R_OFF# PERP1/USB3_0_RX+/SSIC_RXP NC NC DEVSLP UIM_PW R
1 AFTP5902 35 PERN1/USB3_0_RX-/SSIC_RXN NC UIM_PWR 36 UIM_PW R 60
W W AN_RADIO_DIS# 1 AFTP5903 33 34 UIM_DATA_R R5906 1 2 0R2J-2-GP UIM_DATA 60
LED_W W AN_OUT# GND UIM_DATA UIM_CLK_R R5905
1 AFTP5904 31 PETP1/USB3_0_TX+/SSIC_TXP NC UIM_CLK 32 1 2 0R2J-2-GP UIM_CLK 60
HW _GPS_DISABLE2# 1 AFTP5905 29 30 UIM_RESET UIM_RESET 60
MINI2CLK_REQ# PETN1/USB3_0_TX-/SSIC_TXN NC UIM_RESET UIM_RFU R5908
1 AFTP5921 27 GND NC UIM_RFU 28 1 2 0R2J-2-GP UIM_VPP 60
UIM_DET 1 AFTP5907 AFTP5918 1 NGFF_RESERVED#25 25 26
SUSCLK_NGFF_C W AKE_ON_W W AN# RESERVED#25 DPR W_DISABLE#2 AUDIO3 HW _GPS_DISABLE2# 99
1 AFTP5908 AFTP5924 1 23 RESERVED#23 WAKE_ON_WAN# NC AUDIO2 24
USB_W W AN_P_R 1 AFTP5909 99 NGFF_CONFIG_0 21 NC AUDIO1 22
USB_W W AN_N_R WWAN/SSD_INDCONFIG0
1 AFTP5910 NC AUDIO0 20 NC on EM7355
NGFF_W AKE# 1 AFTP5912
PERP0/SATA_B+ 1 AFTP5913 11
B PERN0/SATA_B- USB_W W AN_N_R GND B
1 AFTP5914 9 USB_D- LED#1/DAS/DSS# 10 LED_W W AN_OUT# 61
PETN0/SATA_A- 1 AFTP5915 USB_W W AN_P_R 7 8 W W AN_RADIO_DIS# 24
PETP0/SATA_A+ USB_D+ W_DISABLE#1 W W AN_PW R_OFF# R5901 1
1 AFTP5916 5 GND FULL_CARD_POWER_OFF# 6 2 0R2J-2-GP 3D3V_S5_W W AN
NGFF_mSATA_DEVSLP 1 AFTP5906 3 4
CLK_PCIE_N5_W W AN# GND 3_3VAUX
1 AFTP5922 99 NGFF_CONFIG_3 1 PRESENCE_IND CONFIG3 3_3VAUX 2 3D3V_S5_W W AN
CLK_PCIE_P5_W W AN 1 AFTP5923
NGFF_CONFIG_0 1 AFTP5911 NP2 NP1
NGFF_CONFIG_1 NP2 NGFF_KEY_B 75P NP1
1 AFTP5917
NGFF_CONFIG_2 1 AFTP5919
NGFF_CONFIG_3 1 AFTP5920 SKT-MINI67P-GP-U1
62.10043.I71

16 USB_W W AN_N R5916 1 DY 2 0R2J-2-GP USB_W W AN_N_R

1

TR5901
FILTER-130-GP
69.10118.001
Change form 68.02002.021 to 69.10118.001

A <Core Design> A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
USB_W W AN_P_R Taipei Hsien 221, Taiwan, R.O.C.
16 USB_W W AN_P
R5921
1 DY 2
0R2J-2-GP
Title

NGFF-WWAN/SSD
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 59 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID =WIRELESS

D D
SIM1

59 UIM_PWR UIM_PWR C1 C7 UIM_DATA UIM_DATA 59

VCC I/O
PIN 62.10034.561 Micro SIM PinDefine
59 UIM_RESET UIM_RESET C2 C5 1 AFTP6007 C1 VCC
UIM_CLK RST GND
59 UIM_CLK C3 CLK GND 8
59 UIM_VPP UIM_VPP C6 9 C2 RST
VPP GND
GND 10
59 UIM_DET UIM_DET SW 11 C3 CLK
SW GND
C4 Reserve
SKT-SIMM7-2-GP
62.10034.561 C5 GND
C6 VPP
C7 I/O
C SW SIM Card Detect C

8 PTH GND
9 PTH GND
10 PTH GND
11 PTH GND

UIM_PWR 1 AFTP6001
UIM_VPP 1 AFTP6002
UIM_RESET 1 AFTP6003
UIM_DET 1 AFTP6004
UIM_DATA 1 AFTP6005
UIM_CLK 1 AFTP6006

B B

Change from 83.00005.BAE to 75.04220.07C

D6001

UIM_RESET 1 6 UIM_VPP
ESD_I/O1 ESD_I/O4 UIM_PWR
UIM_CLK
2 GND DY VP 5
UIM_DATA
3 ESD_I/O2 ESD_I/O3 4
SC1U6D3V2KX-GP
SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
C6001

C6002

C6003

C6004

C6005

IP4220CZ6-1-GP
1

75.04220.07C <Core Design>

2

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Layout Close to SIM1 Connector
mSATA
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 60 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = User.Interface

19 SATA_LED# SSI_0628
1

R6101 6$7$+''/('
10KR2J-3-GP

3D3V_S0 Q6105 3D3V_S5 /2:DFWLYHGIURP3&+*3,2 3D3V_S5

1 6
2

2 5

C6101
SCD1U10V2KX-5GP
1
3 4

1
R6116 5V_S5
D 2N7002KDW-GP 10KR2J-3-GP Q6102 D
ϴϰ͘ϮEϳϬϮ͘ϯ& SATA_LED#_M S Q6103 HDLED1 U6101

2
R2
2nd = 84.DM601.03F E 1

3
24,98 LID_CL_SIO# B
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& LED_SATA_DIAG_OUT# 99
D SATA_LED#_B B
VCC
5
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&
R1
C SATA_LED R6102 1 2 680R2J-3-GP SATA_LED_R 1A K2 2
99 SYS_LED_MASK# A MASK_BASE_LEDS#
G 4 MASK_BASE_LEDS# 31
PDTA143ET-GP LED-W-27-GP Y
3
GND
2N7002K-2-GP ϴϰ͘ϬϬϭϰϯ͘Dϭϭ 83.01221.R70
MASK_BASE_LEDS# ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ 74LVC1G08GW-1-GP
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ R1=R2=4.7K 73.01G08.L04
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ Change form 84.00144.P11 to 84.00143.M11
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
%DWWHU\/(':KLWHB/('
R6115
/2:DFWLYHGIURP.%&*3,2 SSI_0618 0R2J-2-GP
1 DY 2

5V_S5

Q6109 R2
Q6104 E
1 6 LED_BATCHG B R6104
99 BAT2_LED# R1
BAT_WHITE_LED_A_R
MASK_BASE_LEDS# 2 5 MASK_BASE_LEDS#
C 1 2
WHITE
PDTA143ET-GP 680R2J-3-GP CHLED1
3 4
BAT1_LED# 99
ϴϰ͘ϬϬϭϰϯ͘Dϭϭ
ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ BAT_WHITE_LED_A 2 +
WHITE

2N7002KDW-GP 5V_S5 - 3
ϴϰ͘ϮEϳϬϮ͘ϯ& BAT_AMBER_LED_A +
1 ORANGE
2nd = 84.DM601.03F Q6115
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&
R2
E
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ& LED_BATLOW B R6105 LED-OW-8-GP
ϴϯ͘ϬϭϮϮϮ͘yϴϬ
R1
C BAT_AMBER_LED_A_R 1 2

PDTA143ET-GP 680R2J-3-GP ORANGE

ϴϰ͘ϬϬϭϰϯ͘Dϭϭ
ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ
%DWWHU\/('2UDQJHB/('
/2:DFWLYHGIURP.%&*3,2
C C

:/$1/(' 99 WIRELESS_LED#
/2:DFWLYHGIURP.%&*3,2
SSI_0618
3D3V_S5_WLAN 5V_S5
Q6106 Q6107 WLED1
1 6 WIRELESS_LED# S Q6108
58 WLAN_LED# R2
E

3
R6107 1 2 100KR2J-1-GP WLAN_LED# 2 5 D WIRELESS_LED#_D B
3D3V_S5_WLAN 3D3V_S5_WLAN R1
C WLAN_LED_R R6106 1 2 680R2J-3-GP WLAN_LED_A 1 A K2
R6108 1 2 100KR2J-1-GP BT_LED# 3 4 G
BT_LED# 58 PDTA143ET-GP LED-W-27-GP
2N7002KDW-GP 2N7002K-2-GP ϴϰ͘ϬϬϭϰϯ͘Dϭϭ 83.01221.R70
ϴϰ͘ϮEϳϬϮ͘ϯ& ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ
2nd = 84.DM601.03F ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ R1=R2=4.7K
3D3V_S5_WWAN ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ& MASK_BASE_LEDS# ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ Change form 84.00144.P11 to 84.00143.M11
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ& ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
R6109 1 2 100KR2J-1-GP LED_WWAN_OUT# R6114
2 DY 1
NOTE: 0R2J-2-GP
Check Mini Card LED type is PP or OD? 5V_S5
Q6114
S Q6113 R2
E NETWK1
D WIRELESS_LED_C# B 3
R1
C WIFI_CASEA_LED#_R 1 2 WIFI_CASEA_LED#_A 1
Q6110 G R6113 680R2J-3-GP
S PDTA143ET-GP AFTP6103 1 2
59 LED_WWAN_OUT# 2N7002K-2-GP ϴϰ͘ϬϬϭϰϯ͘Dϭϭ 4
D
99 MASK_ACASE_WIFI_LED# ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ ACES-CON2-20-GP
B 3RZHU/(' 3D3V_S5_WWAN G ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ
R1=R2=4.7K
Change form 84.00144.P11 to 84.00143.M11 20.F1639.002 B
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ ϮŶĚсϮϬ͘&ϭϴϰϭ͘ϬϬϮ
/2:DFWLYHGIURP.%&*3,2 2N7002K-2-GP
ϴϰ͘ϮEϳϬϮ͘:ϯϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ
5V_S5 ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ
Q6111
S Q6112 PLED1 WIFI_CASEA_LED#_A 1
24 BREATH_LED# R2
AFTP6102
E
3

D BREATH_LED#_D B R1
C BREATH_LED#_C R6110 1 2 680R2J-3-GP BREATH_LED1#_A 1A K2
MASK_BASE_LEDS# G
PDTA143ET-GP LED-W-27-GP
2N7002K-2-GP ϴϰ͘ϬϬϭϰϯ͘Dϭϭ 83.01221.R70
ϴϰ͘ϮEϳϬϮ͘:ϯϭ ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ R1=R2=4.7K
ϯƌĚсϴϰ͘ϬϳϬϬϮ͘/ϯϭ Change form 84.00144.P11 to 84.00143.M11
ϰƚŚсϴϰ͘ϮEϳϬϮ͘tϯϭ

POWER BUTTON LED

SWLED1

R6111 1 2 680R2J-3-GP BREATH_SWLED1#_A A K

LED-W-45-GP
POWER BUTTON
83.19213.H70 R6103
SWLED2
MB_PWR_BTN#_R 1 2 MB_PWR_BTN# 17,24
R6112 1 2 680R2J-3-GP BREATH_SWLED2#_A A K
100R2J-2-GP
LED-W-45-GP
83.19213.H70 MB_PWR_BTN#_R 1
AFTP6101
5

1
A EC6101 A

1 2
PWRBT1
DY SC1KP50V2KX-1GP
2
SW-TACT-4P-59-GP SSI_0625
ϲϮ͘ϰϬϬϬϵ͘ϱϭ
3 4
<Core Design>
6

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED
Size Document Number Rev

Round Rock 13.3" UMA X00

Date: Friday, June 28, 2013 Sheet 61 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = KBC SSID = Touch.Pad

3D3V_TP
RN6201
1 4 DAT_TP_SIO_R
2 3 CLK_TP_SIO_R TouchPad Connector
SRN10KJ-5-GP

D TPAD1 D
9

2
3
3D3V_TP 4
5
R6201 1 2 0R2J-2-GP DAT_TP_SIO_R 6
24 DAT_TP_SIO CLK_TP_SIO_R
R6202 1 2 0R2J-2-GP 7
24 CLK_TP_SIO
8

10

ACES-CON8-35-GP

1
C6201
SC33P50V2JN-3GP

C6202
SC33P50V2JN-3GP
20.K0529.008
DY DY ϮŶĚсϮϬ͘<ϬϯϵϮ͘ϬϬϴ

2
3D3V_S0 3D3V_S0 3D3V_TP

R6203 1 2 0R3J-0-U-GP
1

C6203
SC1U6D3V2KX-GP

C6204
SCD1U10V2KX-5GP

C6205
SCD1U10V2KX-5GP
1

1
R6204
10KR2J-3-GP DY DY
2

2
U6201
2

9
GND CLK_TP_SIO_R
1 8 AFTP6205 1
VIN#1 VOUT#8 DAT_TP_SIO_R
VIN#2DY
2 7 AFTP6206 1
R6205 1 3.3V_TP_EN_R VOUT#7 3D3V_TP_CT 3D3V_TP
15,20 3.3V_TP_EN DY 2 0R2J-2-GP 3 6 AFTP6208 1
ON CT

C6207
SC220P50V2JN-3GP
5V_S5 4 5

1
VBIAS GND
C
TPS22965DSGR-GP
DY C

2
74.22965.093
CT Pin: Use 16V+ cap.

Layout:
KBC SMSC ECE1117
Close each VCC pin. U6202

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
4 11 KSO0
3D3V_S5 VCC KSO00
24 13 KSO1

2
VCC KSO01 KSO2
MB Pin NO. Description Module Pin NO. 37
VCC KSO02
12

C6209

C6210
KSO3

C6208
14
KSO03 KSO4
16

1
KSO04 KSO5
17
30 Diagnostic 1 KSO05
KSO06
15 KSO6
38 5 KSO11
29 KSI[7]:S8 2 39
GPIO10
GPIO11
KSO11
KSO12
10 KSO12
40 7 KSO13
28 KSI[6]:S7 3 CAP_LED# 41
GPIO12/PWM1
GPIO13/PWM2
KSO13
KSO14
6 KSO14
F4_LED# 42 8 KSO15
27 KSI[4]:S5 4 43
GPIO14/PWM3
GPIO15/PWM4/BC_INT_DN3#/SMB_INT_DN3#
KSO15
KSO16
9 KSO16
B 44 3 KSO17 B
26 KSI[2]:S3 5 3D3V_S5
GPIO20/PWM7 KSO17
GPIO01/KSO18
2 KSO18
KSO19
1
GPIO00/KSO19
25 KSI[5]:S6 6 GPIO23/KSO20/PWM8
47
46
KSO20

Internal KeyBoard Connector 24 KSI[1]:S2 7 GPIO22/KSO21/PWM9

GPIO21/KSO22
45

23 KSI[3]:S4 8
KB2 AFTP6210
1 22 KSI[0]:S1 9 31

10KR2J-3-GP

10KR2J-3-GP
1

1
GPIO04/BC_DAT_DN1/SMB_DAT_DN1/TP_DAT
32 30
GPIO03/BC_CLK_DN1/SMB_CLK_DN1/TP_CLK

R6206

R6208
30
KSI7 KB_DET# 16,20 21 KSO[5]:D6 10 DY DY
29 1 AFTP6211 36
KSI6 GPIO07/BC_DAT_DN2/SMB_DAT_DN2/PS2_DAT
28 1 35
27 KSI4 1
AFTP6212 20 KSO[4]:D5 11 BC link GPIO06/BC_CLK_DN2/SMB_CLK_DN2/PS2_CLK

2
AFTP6213
26 KSI2 1
25 KSI5 1
AFTP6214
AFTP6215
19 KSO[11]:D8 12
24 KSI1 1 34
23 KSI3 1
AFTP6216
AFTP6217
18 KSO[6]:D7 13 24 BC_DAT_ECE1117
24 BC_CLK_ECE1117 33
BC_DAT_UP/SMB_DAT_UP
BC_CLK_UP/SMB_CLK_UP KSI0
18 KSI0
22 KSI0 1 32 20 KSI1
AFTP6218 24 BC_INT#_ECE1117
21 KSO5
KSO4
1 AFTP6219 17 KSO[12]:D9 14 BC_INT_UP#/SMB_INT_UP# KSI1
KSI2
23 KSI2
KSI3
20 1 AFTP6220 19
KSI3
19
18
KSO11
KSO6
1
1
AFTP6221 16 KSO[3]:D4 15 R6209
2 1
10KR2J-3-GP
KBC_SMB_ADDR 28
48
SMB_ADDR KSI4
25
22
KSI4
KSI5
AFTP6222 OCS_TRM KSI5
17
16
KSO12
KSO3
1
1
AFTP6223 15 KSO[1]:D2 16 R6210
2 DY 1
10KR2J-3-GP
KBC_TEST_PIN 29
TEST_PIN KSI6
26
27
KSI6
KSI7
AFTP6224 KSI7
15
14
KSO1
KSO2
1
1
AFTP6225 14 KSO[2]:D3 17 ECE1117_VR_CAP 21
AFTP6226 VR_CAP
KSO0
13 1 AFTP6227 13 KSO[0]:D1 18
1

12 KSO16 1 49
AFTP6228 GND
KSO20 C6211
11
10 KSO19
1
1
AFTP6229 12 KSO[16]:D13 19 SC4D7U6D3V3KX-GP
2

AFTP6230
9 KSO17 1 ECE1117-HZH-GP
8 KSO18 1
AFTP6231
AFTP6232
11 KSO[20]:D17 20 Pin28 SMBus Address select strap pin.
7 KSO13 1 10K pull ground=0111 000b
6 KSO15 1
AFTP6233
AFTP6234
10 KSO[19]:D16 21 10K pull VCC=0111 001b
71.01117.003
5 KSO14 1
4
AFTP6235
9 KSO[17]:D14 22
3 CAP_LED_R Pin29 has a weak internal pull-down
2 8 KSO[18]:D15 23
A
1 F4_LED_R 7 KSO[13]:D10 24 A

31

PTWO-CON30-11-GP
6 KSO[15]:D12 25 Change form 84.00144.P11 to 84.00143.M11 5V_S0 CAP_LED_R 5V_S0 F4_LED_R

ϮϬ͘<ϬϲϮϲ͘ϬϯϬ SSI_0626 5 KSO[14]:D11 26 Q6201 R2 Q6202 R2

E E
<Core Design>
4 GND 27 CAP_LED# B R1
C CAP_LED#_Q1
R6213
2
F4_LED# B R1
C F4_LED#_Q 1
R6217
2
SSI_0625 3 Caps Lock LED 28 PDTA143ET-GP 680R2J-3-GP PDTA143ET-GP 680R2J-3-GP Wistron Corporation
GND ϴϰ͘ϬϬϭϰϯ͘Dϭϭ ϴϰ͘ϬϬϭϰϯ͘Dϭϭ
2 29 ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ ϮŶĚсϴϰ͘ϬϮϭϰϯ͘Ϭϭϭ
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1 F4 LED 30 R1=R2=4.7K R1=R2=4.7K
R6214 R6216 Title

1 DY 2 1 DY 2 Key Board/Touch Pad

Size Document Number Rev
100R2J-2-GP 100R2J-2-GP Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 62 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C
(Blanking) C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

IO CONN
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 63 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 64 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = DEBUG PORT

D D

SB modify to test pad

C C
3D3V_S0 DB1
11
1

18,24,88 LPC_LAD0 2
18,24,88 LPC_LAD1 3
18,24,88 LPC_LAD2 4 DB
18,24,88 LPC_LAD3 5
18,24,88 LPC_LFRAME# 6
17,24,58,59,88 PCH_PLTRST#_EC 7
8
18 CLK_PCI_DEBUG 9
10
12

ACES-CON10-1-GP-U1
20.F0714.010

B B

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Debug connector
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 65 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SENSOR
Size Document Number Rev
A3
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 66 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = User.interface

D D

Free Fall Sensor

Note
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
3D3V_S0
- mount the sensor near the center of mass of the NB as possible as you can

R6701
3D3V_RUN_FFS 1 2
3D3V_S0
U6701 0R3J-0-U-GP

C6701

1
C6703
SC10U6D3V3MX-GP
10 RES#10 VDD_IO 1

1
C6702
SCD1U16V2KX-3GP
13 R6702
RES#13

SCD1U16V2KX-3GP
C 100KR2J-1-GP C
15 RES#15 VDD 14 DY
16

2
RES#16 3D3V_S0

2
12,13,18,96 PCH_SMBCLK 4 SCL/SPC INT1 11
6 9 FFS_PCH_INT
12,13,18,96 PCH_SMBDATA SDA/SDI/SDO INT2 FFS_PCH_INT 15

1
3D3V_RUN_FFS 7 8 R6703
SDO/SA0 CS 100KR2J-1-GP

5 2

2
GND NC#2 FALL_INT2
12 GND NC#3 3

LNG3DMTR-GP
Q6701

1
ϳϰ͘>E'ϯ͘Ϭ 3D3V_S0
2N7002KDW -GP
5V_S0
84.2N702.A3F
2nd = 84.DM601.03F
ϯƌĚсϴϰ͘ϮEϳϬϮ͘ϯ&

1
ϰƚŚсϴϰ͘ϮEϳϬϮ͘&ϯ&

6
R6705
100KR2J-1-GP
DY R6704
100KR2J-1-GP
DY

2
FFS_INT2
FFS_INT2_Q 56

B
Note B
1 2 R6706
DY 0R2J-2-GP
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom. FFS_INT2 20

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Free Fall Sensor

Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 67 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (1/5)
Size Document Number Rev
A3
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 68 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Thunderbolt (2/5)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 69 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Thunderbolt (3/5)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 70 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Thunderbolt (4/5)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 71 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Thunderbolt (5/5)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 72 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

GPU (1/5) PEG

Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 73 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

GPU (2/5) DIGITAL

Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 74 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

GPU (3/5) VRAM

Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 75 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

GPU (4/5) GPIO

Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 76 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

GPU (5/5) PWR/GND

Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 77 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

VRAM1,2 (1/4)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 78 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

VRAM3,4 (2/4)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 79 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

VRAM5,6 (3/4)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 80 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

VRAM7,8 (4/4)
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 81 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

VGA_CORE
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 82 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

DISCRETE VGAPOWER
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 83 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Switchable GFXLCD
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 84 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Switchable GFXCRT
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 85 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT

FC8601 SPR1 SPR2 SPR3
SC1KP50V2KX-1GP

FC8602
SC1KP50V2KX-1GP

EC8601
SC1KP50V2KX-1GP

EC8604
SC1KP50V2KX-1GP

EC8605
SC1KP50V2KX-1GP
1

1
SPRING-52-GP SPRING-52-GP SPRING-52-GP
DY DY DY DY DY
DY DY DY
2

1
D D

5V_S5 5V_S5 5V_S5 5V_S5

34.4T025.001 34.4T025.001 34.4T025.001

FC8603
SC1KP50V2KX-1GP

FC8614
SC1KP50V2KX-1GP

FC8615
SC1KP50V2KX-1GP

FC8616
SC1KP50V2KX-1GP
1

1
DY DY DY DY
2

2
SPR4 SPR5 SPR6 SPR7 SPR8

SPRING-64-GP SPRING-64-GP SPRING-64-GP SPRING-64-GP SPRING-64-GP

3D3V_S0 3D3V_S0 DY DY DY DY DY

1
FC8611
SC1KP50V2KX-1GP

FC8612
SC1KP50V2KX-1GP
1

C
DY DY C
2

34.4H602.001 34.4H602.001 34.4H602.001 34.4H602.001 34.4H602.001

H1 H2 H3 H4 H5 H6 H7 H8 H9
1

1
HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP
ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 HT85B95X975R29-S-GP HT85B95X975R29-S-GP ZZ.00PAD.D01
ZZ.00PAD.D71 ZZ.00PAD.D71
B B
H10 H11 H12 H13
1

HOLE197R166-1-GP HOLE197R166-1-GP HOLE197R166-1-GP

ZZ.00PAD.V71 ZZ.00PAD.V71 ZZ.00PAD.V71 HOLE197R99-1-GP
ZZ.00PAD.J71
HS1 HS2 HS3
STF236R126H101-GP STF237R113H63-GP STF236R126H101-GP
<Core Design>
1

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
34.4Z003.001 34.44P03.101 34.4Z003.001
UNUSED PARTS/EMI Capacitors
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 86 of 107
5 4 3 2 1

www.vinafix.vn
 A B C D E

SSID = USH

4 4

3 3

(Blanking)

2 2

<Core Design>

1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USH Board Connector
Size Document Number Rev
A4 Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 87 of 107
A B C D E

www.vinafix.vn
 5 4 3 2 1

SSID = TPM
Place close to Pin 21
CLK_PCI_TPM

1
D D

DY R8802
10R2J-2-GP

CLK_PCI_TPM_RC 2
3D3V_S0 3D3V_TPM_S0

R8801 1 2 0R3J-0-U-GP

1
C8801
SCD1U10V2KX-5GP

C8802
SC2200P50V2KX-2GP

C8803
SC2200P50V2KX-2GP

C8804
SC2200P50V2KX-2GP
C8805
1

1
DY SC4D7P50V2CN-1GP

2
2

2
C C

U8801

10 VCC LAD0 26 LPC_LAD0 18,24,65

19 VCC LAD1 23 LPC_LAD1 18,24,65
24 VCC LAD2 20 LPC_LAD2 18,24,65
LAD3 17 LPC_LAD3 18,24,65
3D3V_TPM_S0 5 SB3V
C8806
SCD1U10V2KX-5GP

C8807
SC2200P50V2KX-2GP

LFRAME# 22 LPC_LFRAME# 18,24,65

1

28 TPM_LPCPD# 0R2J-2-GP 2 DY 1 R8803 SP_TPM_LPC_EN 99

TPM_VBAT LPCPD#
TP8801 1 12 NBO#12
6 0R2J-2-GP 2 1 R8804 SUS_STAT#/LPCPD# 17
2

GPIO-EXPRESS-00
1 ATEST#1 SERIRQ 27 IRQ_SERIRQ 20,24
2 ATEST#2
3 ATEST#3 NBO#13 13
NBO#14 14
8 TESTI
R8805 1 2 TPM_TESTBL 9 7
0R2J-2-GP TESTBI NC#7
B B

17,24,58,59,65 PCH_PLTRST#_EC 16 LRESET# GND 4

17,24 CLKRUN# 15 CLKRUN# GND 11
GND 18
18 CLK_PCI_TPM 21 LCLK GND 25

AT97SC3204-X4A12-ABF-GP
71.97324.D0W

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPM
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 88 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Finger Print
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 89 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
NFC Connector
Size Document Number Rev
A4
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 90 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Smart Card
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 91 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 92 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = Docking

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DOCKING
Size Document Number Rev
A4
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 93 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 PM_LANPHY_ENABLE 3 2 1
SSID = LOM 127(30B/$13+<B(1$%/(PXVWEHFRQQHFWHG

1
C9401
SCD1U10V2KX-5GP WR3&+
V*3,2/$1B3+<B3:5B&75/
DY 7KLV*3,2SLQPXVWEHVHWDV

2
/$1B3+<B3&IXQFWLRQWKURXJK),7&
WRRO

3D3V_LAN
127(/$1:$.(PXVWEHFRQQHFWHG
R9401 1 DY 2 4K7R2F-GP LAN_W AKE#_R WR3&+
V*3,2

D U9401 D
18,20 LANCLK_REQ# 48 CLK_REQ# MDI_PLUS0 13 LAN_MDI0P_INTEL 31
LAN_RST#_R 36 14
PE_RST# MDI_MINUS0 LAN_MDI0N_INTEL 31

18 CLK_PCIE_LAN 44 PE_CLKP MDI_PLUS1 17 LAN_MDI1P_INTEL 31

45 18

PCIE
18 CLK_PCIE_LAN# PE_CLKN MDI_MINUS1 LAN_MDI1N_INTEL 31

16 PCIE_RXP3 C9402 1 2 SCD1U10V2KX-5GP PCIE_RXDP3 38 20

C9403 1 PETP MDI_PLUS2 LAN_MDI2P_INTEL 31
16 PCIE_RXN3 2 SCD1U10V2KX-5GP PCIE_RXDN3 39 PETN MDI_MINUS2 21 LAN_MDI2N_INTEL 31

MDI
16 PCIE_TXP3
16 PCIE_TXN3
41
42
PERP MDI_PLUS3 23
24
LAN_MDI3P_INTEL 31 ϬϵsWŽǁĞƌKƉƚŝŽŶƐ
PERN MDI_MINUS3 LAN_MDI3N_INTEL 31 R9402 1 2 0R2J-2-GP
^sZͺEͺE͗WƵůů,ŝŐŚdžƚĞƌŶĂů
WƵůů>Žǁ/ŶƚĞƌŶĂů

SMBUS
RN9401 1 4 LOM_SMBCLK_R 28 6 SVR_EN_N R9403 1 DY 2 4K7R2F-GP 3D3V_LAN
18 LOM_SMBCLK SMB_CLK SVR_EN#
SRN0J-6-GP 2 3 LOM_SMBDAT_R 31
18 LOM_SMBDAT SMB_DATA
RSVD1_VCC3P3 1 RSVD1_VCC3P3 R9404 1 2 4K7R2F-GP /ŶƚĞƌŶĂů^sZ ^ŚĂƌĞĚǁŝƚŚĞdžƚĞƌŶĂůϭ͘Ϭϱs^sZ
20,24 LAN_W AKE# R9405 1 2 0R2J-2-GP LAN_W AKE#_R 2 LANWAKE# >ϵϰϬϭ͗^dh&& >ϵϰϬϭ͗EK^dh&&
VDD3P_IN 5 3D3V_LAN
20 PM_LANPHY_ENABLE R9406 1 2 0R2J-2-GP LAN_DISABLE# 3 LAN_DISABLE# VDD3P3_4 4 Zϵϰϭϯ͗EK^dh&& Zϵϰϭϯ͗^dh&&

C9404
SCD1U10V2KX-5GP

C9406
SC22U6D3V5MX-2GP
VDD3P3_15 15

C9405
SC1U6D3V2KX-GP
99 LAN_DISABLE#_R R9418 1 2 0R2J-2-GP VDD3P3_19 19 ZϵϰϬϮ͗^dh&& ZϵϰϬϮ͗EK^dh&&

1
31 LOM_ACTLED_YEL# 26 LED0 VDD3P3_29 29
ZϵϰϬϯ͗EK^dh&& ZϵϰϬϯ͗^dh&&

LED
31 LOM_SPD100LED_ORG# 27 LED1
31 LOM_SPD10LED_GRN# 25

2
LED2
3D3V_LAN VDD0P9_8 8 ΎEKd͗ůĂƌŬǀŝůůĞŚĂƐϬ͘ϵsŝŶƚĞƌŶĂů^sZ͘,ŽǁĞǀĞƌŝƚŝƐĂůƐŽ
11
C TP8802 1 LAN_JTAG_TDI 32 JTAG_TDI
VDD0P9_11
VDD0P9_16 16 ƉŽƐƐŝďůĞƚŽĚŝƐĂďůĞƚŚŝƐϬ͘ϵsŝ^sZĂŶĚůĂƌŬǀŝůůĞĐĂŶƐƵƉƉŽƌƚƚŚĞ C
ĞdžƚĞƌŶĂůϭ͘ϬϱsƐƵƉƉůLJ͘tŚĞŶƐŚĂƌŝŶŐ͕ŵĂŬĞƐƵƌĞƚŚĞϭ͘Ϭϱsͺ>E

JTAG
TP8803 1 LAN_JTAG_TDO 34
R9407 1 JTAG_TDO
DY 2 10KR2J-3-GP LAN_JTAG_TMS 33 22
R9408 1 DY 2 10KR2J-3-GP LAN_JTAG_TCK 35
JTAG_TMS
JTAG_TCK
VDD0P9_22
ŝƐĐŽŶƚƌŽůůĞĚďLJƚŚĞ^>Wͺ>EƐŝŐŶĂů͘
VDD0P9_37 37
VDD0P9_LAN
LANXOUT_C 9 40
LANXIN_C XTAL_OUT VDD0P9_40
10 XTAL_IN VDD0P9_43 43
VDD0P9_46 46
VDD0P9_47 47
R9409 1 2 TEST_EN 30
1KR2J-1-GP TEST_EN
R9410 1 2 RBIAS 12 7 CTRL_0P9 L9401 1 2
3K01R2F-3-GP RBIAS CTRL0P9 IND-4D7UH-192-GP

C9408
SCD1U10V2KX-5GP

C9409
SC10U6D3V3MX-GP
GND 49 5&

C9407
SC22U6D3V3MX-1-GP
'&5 PRKP

1
W GI218V-GP
71.00218.B03 DY

2
1RWH/$1&KLSPXVWEHFKDQJHGWR,/0( 3D3V_LAN
3D3V_LAN
1

C9410
SCD1U10V2KX-5GP
1
R9411
'< 10KR2F-2-GP
B B

2
U9402
2

LOM_SPD10LED_GRN# 1
LAN_DISABLE#_R B
VCC 5
LOM_SPD100LED_ORG# 2 A
Y 4 W LAN_LAN_DISBL# 24
1

3 GND
R9412
'< 10KR2F-2-GP 74LVC1G08GW -1-GP
73.01G08.L04 Connect to EC
2

C9411
SC12P50V2JN-3GP
LANXOUT_C 1 2

3D3V_S0 3D3V_S0
4

C9412
SCD1U10V2KX-5GP
X9401

1
XTAL-25MHZ-155-GP R9414
82.30020.D41 10KR2F-2-GP

2
U9403
1

17 PLTRST_LAN# 1 B <Core Design>

5
A LANXIN_C 1 2 20 LAN_RST# 2 A
VCC A
C9413 4 LAN_RST#_R
SC12P50V2JN-3GP 3 GND
Y Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
127(,QPRVWGHVLJQV&VWUD\ aS)VR& &VKRXOG 1
74LVC1G08GW -1-GP Taipei Hsien 221, Taiwan, R.O.C.
73.01G08.L04 R9416
EHaS)DVDJRRGVWDUWLQJSRLQWIRUD&ORDG S) 100KR2J-1-GP Title
FU\VWDO,IS)FDSLVQRWDYDLODEOHS)RUS)
YDOXHFDQEHXVHGDVDVWDUWLQJSRLQW9DOXHZLOOYDU\ LAN INTEL WGI218LM
2

Size Document Number Rev

GHSHQGLQJRQWKHVSHFLILFERDUGOD\RXWVWDFNXSDQGZKLFK A3
FU\VWDOSDUWLVXVHG(DFKGHVLJQVKRXOGFKHFNFU\VWDO¶V Round Rock 13.3" UMA X00
SSPWRPDNHVXUHLWLVZLWKLQWKH&ODUNYLOOHVSHFLILFDWLRQ Date: Friday, June 28, 2013 Sheet 94 of 107

5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C
(Blanking) C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN SW
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 95 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = CPU_XDP

D D

6 CFG[19:0]
CPU_XDP
XDP1
3D3V_S5 NP1
61
1 2
62
1

3 4 CFG17
R9601 4 XDP_PREQ# CFG16
4 XDP_PRDY# 5 6
DY 1KR2J-1-GP CFG0
7 8
CFG8
9 10
CFG1 11 12 CFG9
2

13 14
H_SYS_PW ROK_XDP CFG2 15 16 CFG10
CFG3_XDP R9602 1 XDP 2 1KR2J-1-GP CFG3 17 18 CFG11 1D05V_S0
C9601
SCD1U10V2KX-5GP

19 20
1

C XDP_BPM0 21 22 CFG19 3D3V_S0 C

4 XDP_BPM0
DY XDP_BPM1 23 24 CFG18
1D05V_S0 4 XDP_BPM1

C9602
SCD1U10V2KX-5GP
25 26
2

1
CFG4 27 28 CFG12
CFG5 29 XDP 30 CFG13 XDP

1
31 32

2
CFG6 33 34 CFG14 R9603
C9603
SCD1U10V2KX-5GP

CFG7 35 36 CFG15 XDP 1KR2J-1-GP

1

37 38
XDP R9604 1 XDP 2 1KR2J-1-GP H_CPUPW RGD_XDP 39 40
7,36 H_VCCST_PW RGD

2
R9605 1 XDP 2 0R2J-2-GP PM_PW RBTN#_XDP 41 42
2

17 PM_PW RBTN#_R
43 44
R9606 1 XDP 2 1KR2J-1-GP XDP_HOOK2 45 46 XDP_RST#_R R9607 1 XDP 2 1KR2J-1-GP
7 PW R_DEBUG PLTRST_XDP# 17
R9608 1 XDP 2 0R2J-2-GP H_SYS_PW ROK_XDP 47 48 XDP_DBRESET#
17,24,36 SYS_PW ROK
49 50
R9609 1 XDP 2 0R2J-2-GP SML0_DATA_XDP 51 52
12,13,18,67 PCH_SMBDATA XDP_TDO 4
R9610 1 XDP 2 0R2J-2-GP SML0_CLK_XDP 53 54
12,13,18,67 PCH_SMBCLK XDP_TRST# 4,19
XDP_TCK1 55 56 R9611 1 DY 2 0R2J-2-GP
XDP_TDI 4 CPU_XDP_TDO_PCH 19
R9612 1 XDP 2 0R2J-2-GP XDP_TCK_R 57 58 XDP_TDI R9613 1 DY 2 0R2J-2-GP
4 XDP_TCK CFG3_XDP XDP_TMS 4
59 60
63
64 R9614 1 DY 2 0R2J-2-GP CPU_XDP_TDI_PCH 19
CAD Note: The resistor for NP2 R9615 1 DY 2 0R2J-2-GP CPU_XDP_TMS_PCH 19
XDP_DBRESET#
HOOK2 (pin45) should be

C9604
SCD1U10V2KX-5GP
placed such that the stub is STC-CONN60A-GP-U1

1
very small on CFG0 net 20.F0971.060
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) XDP

2
0:Enable
B 3D3V_S5 B
AFTP9601 1 XDP_TCK CFG3 SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
AFTP9602 1 XDP_TCK1 1:Disable
1

R9616
DY 1KR2J-1-GP XDP_TCK1 R9617 1 DY 2 0R2J-2-GP PCH_JTAG_TCK 19
R9618 1 DY 2 0R2J-2-GP
2

PM_PW RBTN#_XDP XDP_TCK_R R9619 1 DY 2 0R2J-2-GP PCH_JTAGX 19

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_XDP
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 96 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

D D

C C

(Blanking)

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB2.0 HUB
Size Document Number Rev
A4 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 97 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = User.Interface
TOUCH PANEL POWER
5V_TSP 5V_TSP_S0
5V_S0
Q9801

3D3V_S0 S R9806
D 2 1

D
D C9810 0R3J-0-U-GP D
R9809

1
G
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP
1 DY 2 TOUCH_PANEL_INTR# DMP2130L-7-GP C9812

G
1
84.02130.031 SC10U10V5KX-2GP

2
1

100KR2J-1-GP
R9808
C9811
10KR2J-3-GP
DY

2
Q9802
R9807 1 2 0R2J-2-GP 3.3V_TS_EN_R G
15,20 3.3V_TS_EN
D 3.3V_TS_EN#

2N7002K-2-GP
ϴϰ͘ϮEϳϬϮ͘:ϯϭ
ϮEсϴϰ͘ϮEϳϬϮ͘Ϭϯϭ
ϯƌĚсϴϰ͘ϮEϳϬϮ͘tϯϭ
TOUCH PANEL CONNECTOR
5V_TSP_S0
C C
TOUCH1
7

2
3 TOUCHLCD_N TOUCHLCD_N R9802 2 DY 1 0R2J-2-GP TOUCHPANEL_N 16
4 TOUCHLCD_P
5
6 TOUCH_PANEL_INTR# 20

8 1 AFTP9805 5V_TSP_S0 TR9801

3 4
ACES-CON6-50-GP U9802
20.F2150.006 1 4 2 1

DY FILTER-4P-26-GP
TOUCHLCD_N 2 3 TOUCHLCD_P 69.10103.061

AZC002-02N-GP
TOUCHLCD_P 2 DY 1 TOUCHPANEL_P 16
R9803 0R2J-2-GP
AFTP9801 1 5V_TSP_S0
AFTP9802 1 TOUCH_PANEL_INTR#
AFTP9803 1 TOUCHLCD_N
AFTP9804 1 TOUCHLCD_P
B B

Lid Close 3D3V_S5 3D3V_S5

1

R9804
LIDSW 1 100KR2J-1-GP

1 R9805
2

VSS
VDD 2
3 LID_CL# 2 1 LID_CL_SIO# 24,61
OUT
A <Core Design> A
C2414
SCD1U10V2KX-5GP
1

S-5712ACDL1-M3T1U-GP 10R2J-2-GP
74.05712.0BB
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Function Button
Size Document Number Rev
Round Rock 13.3" UMA X00
Date: Friday, June 28, 2013 Sheet 98 of 107
5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

SSID = SIO
19 ME_FW P ME_FW P AUX_EN_W OW L AUX_EN_W OW L 58
61 LED_SATA_DIAG_OUT# BT_RADIO_DISABLE# 58
61 MASK_ACASE_W IFI_LED# NGFF_CONFIG_0 59
W LAN_W IGIG60HZ_DIS# 58
W IRELESS_LED# W IRELESS_LED# 61
3D3V_S5

D D

SC10U6D3V3MX-GP
C9804
SCD1U10V2KX-5GP

C9805

C9806
SCD1U10V2KX-5GP
1

1
DY

28

23
22
21
20
19
18
17
16
8
U9901

GPIO37/KSO15
GPIO36/KSO14
GPIO35/KSO13
GPIO34/KSO12
GPIO33/KSO11
GPIO32/KSO10
GPIO31/KSO09
GPIO30/KSO08
VCC
VCC
25 SPI_W P#_SEL 24 15 DYN_TURB_PW R_ALRT#
GPIO00/KSO16 GPIO27/KSO07 SYS_LED_MASK#
59 NGFF_CONFIG_1 25 GPIO01/KSO17 GPIO26/KSO06 14 SYS_LED_MASK# 61
61 BAT1_LED# 26 GPIO02/KSO18 GPIO25/KSO05 13 LAN_DISABLE#_R 94
61 BAT2_LED# 27 GPIO03/KSO19 GPIO24/KSO04 12 SLP_ME_CSW _DEV# 20
59 HW _GPS_DISABLE2# HW _GPS_DISABLE2# 29 11 LOM_ENERGY_DET
DIS_BAT_PROCHOT# GPIO04/KSO20 GPIO23/KSO03 ECE1099_GPIO22
44 DIS_BAT_PROCHOT# 30 GPIO05/KSO21 GPIO22/KSO02 10
59 NGFF_CONFIG_2 31 9 CPU_DETECT# CPU_DETECT# 4
C GPIO06/KSO22 GPIO21/KSO01 NGFF_PCIE_SATA# C
59 NGFF_CONFIG_3 36 GPIO07 GPIO20/KSO00 7 NGFF_PCIE_SATA# 19

37 RESERVED#37 BC_DAT/SMB_DATA 32 BC_DAT_ECE1099 24

R9949 1 2 10KR2J-3-GP TEST_PIN 38 33 BC_CLK_ECE1099 24
R9950 1 TEST_PIN BC_CLK/SMB_CLK
2 10KR2J-3-GP SMB_ADDR 35 SMB_ADDR BC_INT#/SMB_INT# 34 BC_INT#_ECE1099 24

GPIO10/KSI0
GPIO11/KSI1
GPIO12/KSI2
GPIO13/KSI3
GPIO14/KSI4
GPIO15/KSI5
GPIO16/KSI6
GPIO17/KSI7

GND
ECE1099-FZG-GP

39
40
1
2
3
4
5
6

41
71.01099.003

17 SIO_SLP_W LAN#
88 SP_TPM_LPC_EN SP_TPM_LPC_EN
44 PROCHOT_GATE PROCHOT_GATE
27,29 AUD_HP_NB_SENSE
27 AUD_NB_MUTE#
52 PANEL_BKEN_EC
3D3V_S5 42 PSID_DISABLE#
59 MCARD_W W AN_PW REN MCARD_W W AN_PW REN
B B

R9905 1 2 100KR2J-1-GP CPU_DETECT#

R9907 1 2 100KR2J-1-GP W IRELESS_LED#

R9908 1 2 100KR2J-1-GP PROCHOT_GATE

R9909 1 2 100KR2J-1-GP MCARD_W W AN_PW REN

R9917 1 2 100KR2J-1-GP HW _GPS_DISABLE2#

R9947 1 2 10KR2J-3-GP ECE1099_GPIO22

R9923 1 2 10KR2J-3-GP DYN_TURB_PW R_ALRT#

R9928 1 2 10KR2J-3-GP LOM_ENERGY_DET

3D3V_S0

R9924 1 DY 2 10KR2J-3-GP SP_TPM_LPC_EN

R9946 1 2 100KR2J-1-GP NGFF_PCIE_SATA#

<Core Design>
A A

R9936 1 2 100KR2J-1-GP AUX_EN_W OW L

Wistron Corporation
R9944 1 2 10KR2J-3-GP SYS_LED_MASK# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R9945 1 DY 2 1KR2J-1-GP ME_FW P
Title

SIO - ECE1099
Size Document Number Rev
A3 X00
Round Rock 13.3" UMA
Date: Friday, June 28, 2013 Sheet 99 of 107

5 4 3 2 1

www.vinafix.vn