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CHANDIGARH UNIVERSITY

Gharuan, Mohali
Institute/Department: UIE
Division: CSE
Subject Name: Computer Architecture and Organization
Subject Code: CST-203/ITT-203

Assignment No.:3
Max. Marks: 12

Date of Allotment: 22-10-19


Last date of Submission: 11-11-19

Course Outcomes:
CO Title Level
Number
CO1 Have practical experience of prototyping digital circuits
Understand

CO2 Be able to interface digital circuits to microprocessor systems Understand

Questions:
Set-1
Sr. No. Question CO Number
1. A non-pipeline system takes 50 ns to process a task. The same task
can be processed in 6 segment pipeline with a clock cycle of 10ns. CO2
Determine the speed up ratio of the pipeline for 100 tasks. What is
the max speed up that can be achieve.

2. Formulate a four segment instruction pipeline for a computer. CO1


Specify the operation to be performed in each segment. CO2

3. Consider the following processors (ns stands for nanoseconds). Assume CO1
that the pipeline registers have zero latency.
CO2
P1: Four-stage pipeline with stage

latencies 1 ns, 2 ns, 2 ns, 1 ns.

P2: Four-stage pipeline with stage

latencies 1 ns, 1.5 ns, 1.5 ns, 1.5 ns.

Which processor has the highest peak clock frequency?

Set-2
Sr. No. Question CO Number
1. Discuss parallel computers based on Flynn’s Taxonomy
CO2
2. What is an interconnection network? Explain briefly the hypercube CO1
inter-connection. CO2
3. a) Describe Handler’s classification in detail. CO1
b) Consider 2 pipelines A & B where pipeline A is having 7 stages CO2
of uniform delay of 2ns. Pipeline B is having 6 stages with respect
stage delay 6ns. How much time is saved when 150 tasks are
pipelined using A instead B.

Set-3
Sr. No. Question CO Number
1. Draw 4-segment time-space diagram for pipelining.
CO2
2. Consider the following processors (ns stands for nanoseconds). Assume CO1
that the pipeline registers have zero latency.
CO2
P1: Five-stage pipeline with stage

latencies 0.5 ns, 1 ns, 1 ns, 0.6 ns, 1 ns.

P2: Five-stage pipeline with stage

latencies 0.5 ns, 0.5 ns, 1 ns, 1 ns, 1.1 ns.

Which processor has the highest peak clock frequency?

3. Consider a program of 15000 instructions executed by a linear CO1


pipeline processor with a CO2
clock rate of 25 MHZ. Instruction pipeline has 5 stages and one
instruction is issued per clock cycle .Calculate speed up ratio,
efficiency and throughput of this pipelined processor

Set-4
Sr. No. Question CO Number
1. Draw a time space diagram for six segment pipeline showing the
time it takes to process eight task. CO2

2. The time taken to process a sub operation in six segments be equal CO1
to 20 ns. The pipeline has four segments and executes 100 tasks in CO2
sequence. Find out:
a) Total no of clock cycle for pipelined system
b) The time taken to process a task by non-pipelined system.
c) The total time taken to process 100 task by non-pipelined
system.
d) The total time taken to process 100 task by pipelined system.
e) The speed up ratio of pipeline for 100 tasks.
f) The maximum speed up that can be achieved by pipeline.

3. What is meant by parallel processing? Briefly explain the CO1


classification of parallel computers given by Flynn CO2

Set-5
Sr. No. Question CO Number
1. A 4-stage pipeline has the stage delays as 150, 120, 160 and 140
nanoseconds respectively. Registers that are used between the CO2
stages have a delay of 5 nanoseconds each. Assuming constant
clocking rate, the total time taken to process 1000 data items on this
pipeline will be
2. Draw a space time diagram for a six segment pipeline showing the CO1
time it takes to process 8 tasks. CO2
3. With reference to multiprocessors system, explain following terms: CO1
i) Tightly coupled, (ii) loosely coupled, (iii) multiport memory. CO2
Enumerate the benefits of a multiprocessors organization.

Set-6
Sr. No. Question CO Number
1. Consider 4 stage pipeline where different instructions spending
different amount of time at different stages shown below. CO2
S1 S2 S3 S4

I1 1 2 1 2

I2 2 1 1 1

I3 1 3 2 1

I4 2 1 1 2

a) How many clock cycles are required to complete the


above instruction?
b) Calculate speedup factor?

2. How the pipelining procedure can be achieved? Explain the CO1


arithmetic pipelining for floating point numbers in detail. CO2
3. If a non-pipelined system takes 150ns to process a task and same CO1
task is processed by pipelined system with a clock cycle of 10ns. CO2
What is the maximum speed up that can be achieved?

Set-7
Sr. No. Question CO Number
1. What is interconnection network? What are its advantages and
disadvantages compared to bus based network? Where is CO2
interconnection network used in parallel computers?
2. What are the characteristics of multiprocessors? CO1
CO2
3. Design the instruction units of pipelined systems with diagram CO1
CO2

Set-8
Sr. No. Question CO Number
1. What are the characteristics of Multiprocessors?
CO2
2. How the pipelining procedure can be achieved? Explain the CO1
arithmetic pipelining in detail CO2
3. For a 3-stage pipeline, the time required to perform a sub-operation CO1
in each: segment is 15 ns for executing l00 tasks. Calculate the CO2
speed up ratio

Set-9
Sr. No. Question CO Number
1. How coarse granularity is different from fine granularity.
CO2
2. Derive the formula for calculating the speed up of pipeline CO1
processing. Derive the theoretical maximum speed up using space CO2
time diagram.
3. List out the processor characteristics for multiprocessors CO1
CO2

Set-10
Sr. No. Question CO Number
1. Explain the Handler’s Classification in detail.
CO2
2. What is the concept of Omega network? CO1
CO2
3. Determine the number of clock cycles that it takes to complete CO1
execution of 100 instructions in a six segment pipeline. Use this to CO2
determine speed up over a non-pipelined processor

Set-11
Sr. No. Question CO Number
1. What are different hazards faced in the case of Instruction pipelining
CO2
2. Calculate speed up ratio for a four segment pipeline and draw the CO1
diagram in space-time domain for this pipeline, the time to perform .a CO2
sub operation in each segment is 20 ns for executing 100 tasks.
3. Define parallel processing? Classify parallel computers given by Flynn CO1
CO2

Set-12
Sr. No. Question CO Number
1. Explain the solution for the hazards of instruction pipeling.
CO2
2. Consider 2 pipelines A & B where pipeline A is having 7 stages of CO1
uniform delay of 2ns. Pipeline B is having 6 stages with respect CO2
stage delay 6ns. How much time is saved when 150 tasks are
pipelined using A instead B.
3. With reference to multiprocessors system, explain following terms : CO1
U) Tightly coupled, (ii) loosely coupled, (m) multiport memory. CO2

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