This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TTE.2020.2973045, IEEE
Transactions on Transportation Electrification
IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION
Multiple-Voltage-Vector Model Predictive Control
with Reduced Complexity for Multilevel Inverters
Yong Yang, Member, IEEE, Huiqing Wen, Senior Member, IEEE, Mingdi Fan, Member, IEEE, Liqun He, Member,
IEEE, Menxi Xie, Rong Chen, Margarita Norambuena, Member, IEEE, Jose Rodriguez, Fellow, IEEE
 two-level three-phase converter. Furthermore, the three-level
Abstract—Conventional model predictive control (MPC) suffers
from unfixed switching frequency, heavy computational burden
and cumbersome weighting factors tuning especially for
multilevel inverter application due to high number of voltage
vectors. To address these concerns, this paper proposes
multiple-voltage-vector (MVV) MPC algorithms with reduced
complexity and fixed switching frequency for T-type three-phase
three-level inverters. Firstly, MMVs are adopted during each
control period and their execution times are set according to the
predefined cost functions. Secondly, weighting factors for
balancing the neutral point (NP) voltage in the cost function are
eliminated by utilizing redundant voltage vectors, which
simplifies the control implementation. Thirdly, through mapping
the reference voltage in the first large sector, the calculation
complexity for the execution times of voltage vectors in different
large sectors becomes much lower. Finally, main experimental
results were presented to validate the effectiveness of the proposed
algorithms.
Index Terms—Multilevel inverters, model predictive control,
multiple voltage vectors, redundant voltage vectors.
I. INTRODUCTION
Multi-level inverters (MLIs) own advantages such as less
output harmonics, lower switching device stress, higher
efficiency and smaller size of filters compared with two-level
voltage source inverters (2L-VSIs) [1]-[3]. Therefore,
three-level three-phase converters have been widely utilized in
high-speed traction locomotives [4],[5]. Similarly, the
three-level three-phase converter is also widely applied in
electric vehicles (EV) [6]-[12], which achieves significant
advantages in terms of the converter efficiency, the reduction of
total harmonic distortions (THD) and the electro-magnetic
interference (EMI) emission compared to the conventional
Manuscript received October 16, 2019; revised December 4, 2019; accepted
January 31, 2020. This work was supported in part by the National Natural
Science Foundation of China (51977136, 51907137, 51707127), in part by the
Open Research Fund of National Rail Transportation Electrification and
Automation Engineering Technology Research Center (NEEC-2019-B08), in
part by the Research Enhancement fund of XJTLU (REF-17-01-02), and in part
by CONICYT Projects FB0008, and FONDECYT Projects 1170167 and
11180233. (Corresponding author: Huiqing Wen.)
Y. Yang, M. Fan, L. He, M. Xie, and R. Chen are with the School of Rail
Transportation, Soochow University, Suzhou 215131, China (e-mail:
yangy1981@suda.edu.cn;mdfan@suda.edu.cn;lqhe@suda.edu.cn;xiemenxi@
suda.edu.cn; chrong@suda.edu.cn).
H. Wen is with the Xi’an Jiaotong-Liverpool University, Suzhou 215123,
China (e-mail: huiqing.wen@xjtlu.edu.cn) .
M. Norambuena is with the Universidad Tecnica Federico Santa Maria,
Valparaiso 2390123, Chile (e-mail: margarita.norambuena@gmail.com).
J. Rodriguez is with the Universidad Andres Bello, Santiago 8370146,
Chile (e-mail: jose.rodriguez@unab.cl).
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1
three-phase converter has been gained many attentions on
electric propulsion of ships or aircraft [13],[14]. Compared
with the conventional three-level diode neutral point clamped
(NPC) converter, the T-type three-level converter owns higher
efficiency when the converter operates from 4 kHz to 30 kHz
[15],[16]. Therefore, the T-type three-level converter is
selected as one promising topology considering the
above-mentioned merits.
In order to fully exploit the advantages of MLIs, the control
strategies become essential to realize the optimal performance.
The well-known approach for the three-level three-phase
converter is space vector pulse width modulation (SVPWM).
Combined with the proportional integral (PI) control, SVPWM
can achieve multi-objectives such as the current reference
tracking, the reduction of the switching losses and the balance
of dc-link capacitor voltages through selecting proper voltage
vectors and switching sequences [6]-[8]. Other methods will
utilize carrier modulation PWM and one typical method is the
discontinuous pulse width modulation (DPWM), which can
reduce switching losses and balance dc-link capacitor voltages
in EV [11],[12]. However, the steady state and dynamic
performance of these above-mentioned approaches are largely
dependent on the parameters of PI controller, which are tuned
through trial-and-error. Recently, model predictive control
(MPC) is gaining more and more attention and considered as a
promising non-linear controller due to its advantages of
eliminating PWM block, multi-objective control, and fast
dynamic response [17]-[20]. However, for the convention
model predictive control (MPC), only one voltage vector is
utilized each control cycle, which leads to the variable
switching frequency for the converter output. Furthermore, it
suffers from heavy computational burden and cumbersome
weighting factors tuning, which hinders the control
performance improvement.
Computational burden is one important issue that needs to be
concerned since the predictive model of every possible voltage
vector and the corresponding cost function must be calculated
individually by using the traditional MPCs. There are totally 8
(23) and 27 (33) voltage vectors for three-phase two-level VSIs
(3P-2L VSIs) and 3P-3L VSIs. With the increase of the voltage
level number, the computational burden of the conventional
MPCs will exponentially increase [19],[20]. Thus, in order to
fully utilize the advantages of MPCs for practical applications,
it is essential to alleviate the computational burden of MPCs
without sacrificing the system performance. This issue has led
to many improved MPC algorithms recently. In [21], a
simplified MPC was proposed for 3P-2L VSI and the number
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of voltage vectors participated in the MPC algorithm
optimization was reduced from 8 to 6 according to the
allocation of the reference voltage vector. Similarly, the
reference voltage vector was constructed in terms of the
deadbeat control principle and the voltage vectors involving in
MPC optimization were set nearest to the reference voltage
vector, which will reduce the number of voltage vectors
involving in the MPC optimization from 8 to 3 [22],[23]. The
above-mentioned simplified MPC algorithms aim at two-level
VSIs, and similar simplification can be extended to 3P-3L VSIs.
In [24], a highly efficient MPC based on hexagonal and
triangular region selection was proposed for 3P-3L VSI. In [25],
an extended model predictive-sliding mode control was
proposed for 3P-3L VSIs and the number of voltage vectors
involving in MPC was greatly decreased from 19 to 9. However,
the above-mentioned MPCs only utilize a voltage vector per
control period, which results in high steady-state ripples and
variable switching frequency. Thus, the design of inverter
filters becomes difficult.
In order to solve the issue of variable switching frequency for
the conventional MPCs, many new fixed switching frequency
(FSF) MPC algorithms have been presented. In [26], a MPC
algorithm based on the predictive optimal switching sequence
was proposed, which shows the feature of FSF. In a similar way,
a MPC algorithm with a constant switching frequency was
presented in order to minimize the power ripples and achieve
the capacitor voltage balance [27]. However, both FSF
algorithms need to calculate the power slopes of different
voltage vectors, which is complex and time consuming. To
address this issue, double-vector-based MPCs and even
multi-vector-based MPCs have been proposed to enhance the
performance without increasing the sampling frequency. For
instance, a double-vector-based MPC by inserting a null vector
with a selected active vector was used to reduce the torque
ripple [28]. An improved MPC algorithm by using two active
voltage vectors was proposed for the induction motor drives [29]
and the permanent-magnet synchronous machine [30]. In [31],
a FSF MPC with an extended-state observer was proposed to
achieve the robust control and rapid dynamic response of wind
energy systems. In [32], a predictive direct torque control with
FSF was presented to reduce the torque and flux ripples of the
doubly fed induction machine. However, these algorithms are
mainly focused on the 2L-VSIs and cannot be directly applied
in MLIs considering the implementation complexity. In recent
years, a modulated MPC was proposed, which achieves FSF
and simple implementation [33]. In [34], a modulated MPC
with FSF for 3P-3L-VSIs was proposed. However, only
simulation results were provided. Based on the modulated MPC
principle, FSF MPC for 3P-3L-VSIs has been presented and
can achieve good steady-state and dynamic performance [35].
However, this method has to calculate application times of
different voltage vectors for 24 small triangle sectors in the αβ
space vector diagram, which is time consuming and
complicated.
Since different control objectives must be considered for
MLIs, including the currents tracking, voltage balancing and
switching losses reduction, the cost function of these MPCs
should cover these control objectives by tuning the weighting
factors. For the control of MLIs, recently many MPC
algorithms have been investigated by fully utilizing their
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flexibility merit in multi-objective control. For instance, MPCs
have been utilized in 3P-3L-VSIs [36], 3P-4L-VSIs [37], and
modular multilevel converter [38]. However, weighting factors
are generally tuned by trail-and-error or empirical methods,
which are cumbersome and highly dependent on specific
applications. Furthermore, the weighting-factor less MPC
algorithms discussed in [39] and [40] cannot achieve MVV FSF
implementation.
In this paper, the issues of conventional MPC for MLI
applications such as the optimal voltage vectors selection,
computational burden, and tuning of weighting factors are
addressed. Three reduced complexity MVV FSF MPCs without
weighting factors are proposed for the T-type 3P-3L VSI
application. The experimental platform was established and
three MVV FSF MPC methods are compared in terms of the
steady-state behavior, dynamic response and NP voltage
balancing performance. The experimental results validate the
effectiveness of the proposed algorithms.
II. MATHEMATICAL MODEL OF 3P-3L VSIS
The system diagram based on T-type 3P-3L VSIs is depicted
in Fig.1, where Edc is input DC power source, uan , ubn, and ucn
represent the phase a, phase b and phase c output voltages, ia , ib
and ic are the phase a, phase b and phase c output currents, L
refers to filter inductance, and R represents loads.
Fig. 1. Diagram of T-type 3P-3L VSI systems.
As shown in Fig.1, each phase of the inverter consists of four
power electronic switching devices. Take phase a as example,
assuming that the upper dc-link voltage Vp is equivalent to the
lower dc-link voltage Vn, the relationship between the output
voltage of phase a and the device conduction statuses is shown
in Table I when the neutral point (NP) of the inverter is
regarded as reference voltage. In Table I, “1” means the power
switch is switched on while “0” indicates the power switch is
off.
TABLE I.
RELATIONSHIP BETWEEN OUTPUT VOLTAGES AND
DEVICE CONDUCTION OF PHASE-A
Sa1 Sa2 Sa3 Sa4 Output voltages Output states
1 1 0 0 Vdc/2 P
0 1 1 0 0 O
0 0 1 1 -Vdc/2 N
For each phase of 3P-3L VSIs, it can generate three levels
labeled as “P”, “O” and “N”. According to power switching
state combinations, 3P-3L VSIs can produce 27 (33)
combinations in total. Fig. 2 shows the 27 basic voltage vectors
and their distribution. Voltage vectors in the αβ stationary
coordinate frame can be divided into 6 large sectors and
denoted as “I”, “II”, “III”, “IV”, “V” and “VI”, respectively.
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Each large sector can be further divided into 4 small sectors and Combine (6) and (7) after the equation (6) is discretized, the
denoted as “1”, “2”, “3”, and “4”. predictive upper and lower dc-link capacitor voltages at the
(k+1)th instant are derived as:

V19 (-11-1) V18 (01-1) V17 (11-1) V p (k  1)  V p (k )  K1ia (k )  K 2 ib (k )  K3ic (k )
 (8)
Vref
 Vn (k  1)  Vn (k )  K1ia (k )  K 2 ib (k )  K3ic (k )
V20 (-110) V7 (010)
V8 (-10-1)
V5 (110)
V6 (00-1)
V16 (10-1) where K1=Ts(Sa2-Sa1)/2C, K2=Ts(Sb2-Sb1)/2C,and K3=Ts(Sc2-Sc1)
   
/2C.
V21 (-111) V9 (011) V0 (-1-1-1) V3 (100) V15 (1-1-1)
V10 (-100)
V1 (000)
V4 (0-1-1) 
  V2 (111)
III. PROPOSED ALGORITHMS
V22 (-101) V11 (001) V13 (101)
V26 (1-10)
A. Reduced Complexity MPC Algorithm
V12 (-1-10) V14 (0-10)
Assume that the actual inverter currents can track the
reference currents at the (k+1)th sampling time, according to
V23 (-1-11) V24 (0-11) V25 (1-11) (4), the desired inverter output voltages can be expressed as:
 u n (k )  L[i (k  1)  i ( k )] / Ts  Ri ( k )
* *

Fig. 2. Basic voltage vectors of 3P-3L VSIs.
As shown in Fig.1, the phase voltage equations in the
stationary abc reference frame can be expressed as:
u xn =u xo  uon  Rix  Ldix / dt ( x  a , b, c )
Suppose there is no neutral connection in the system,
therefore, the neutral voltage uon in equation (1) can be
expressed as:
uon  (uao  ubo  uco ) / 3
Here the output switching state Si=a,b,c is defined as: Si=1
represents that the output of the inverter is linked to the positive
dc-link bus point P. Si=0 means that the output of the inverter is
linked to the neutral point O. Si= -1 represents that the output of
the inverter connects to the negative dc-link bus point N. Thus,
according to relationship between the dc-link bus voltage and
the output switching states of the inverter, the output phase
voltages can be obtained as:
 uan =Vdc  2Sa  Sb  Sc  / 6  Ria  Ldia / dt
 only one computation of the desired voltage vector, 27-time
ubn =Vdc   Sa  2 Sb  Sc  / 6  Rib  Ldib / dt

ucn =Vdc   Sa  Sb  2Sc  / 6  Ric  Ldic / dt
The equation (3) can be transformed into the stationary αβ
coordinate frame and expressed as:
u n  Vdc  2 S a  Sb  Sc  / 6  Ri  Ldi / dt
 (4)
 u  n  3Vdc  Sb  Sc  / 6  Ri  Ldi / dt
where uαn and uβn represent the α and β components of the
inverter output voltages in the stationary αβ coordinate frame,
respectively, iα and iβ are the corresponding α and β
components of the inverter output currents in the stationary αβ
coordinate frame.
From Fig.1, the NP current io can be obtained by the
combination of the output currents and switching states:
io  ( S a 2  Sa1 )ia  ( Sb 2  Sb1 )ib  ( Sc 2  Sc1 )ic  ic 2  ic1 (5)
Suppose the dc-link bus voltage is constant, then:
ic1  C (dVn / dt )
 (6)
ic 2  C (dV p / dt )  C (d (Vdc  Vn )) / dt  C (dVn / dt )
Combining (5) and (6), it can be derived as:
ic1   (( Sa 2  Sa1 )ia  ( Sb 2  Sb1 )ib  ( Sc 2  Sc1 )ic ) 2
 In Table II, only one null vector of V0 (OOO) is used while
 ic 2  (( S a 2  Sa1 )ia  ( Sb 2  Sb1 )ib  ( Sc 2  Sc1 )ic ) 2
 * *
(9)
u  n ( k )  L[i (k  1)  i ( k )] / Ts  Ri ( k )
where u*αn(k) and u*βn(k) represent the reference voltages in the
αβ stationary frame at the (k)th sampling instant, i*α(k+1) and
(1) i*β(k+1) are the reference currents in the αβ stationary
coordinate frame at the (k+1)th sampling instant.
The current references by using Lagrange extrapolation can
be expressed as [41]:
 i* (k  1)  3i* ( k )  3i* ( k  1)  i* ( k  2)
(2) (10)
* * * *
i ( k  1)  3i ( k )  3i ( k  1)  i ( k  2)
The cost function by using the simplified MPC can be
expressed as:
g v ( k )  u* n (k )  u n ( k )  u* n (k )  u n (k ) 
(11)
v ( V p (k  1)  Vn (k  1) )
where λv is a weighting factor for the NP voltage balance.
As seen from (8), (9) and (11), the simplified MPC requires
(3) calculations of the predictive upper and lower dc-link voltages,
and 27-time evaluations of the cost function. In order to further
reduce the computation burden, only voltage vectors close to
the reference voltage vector are selected to participate in the
MPC optimization. The reference voltage vector Vref(k) of the
inverter at the (k)th instant time can be expressed by:
Vref ( k )  u* n ( k )  ju* n ( k ) (12)
Suppose Vref(k) locates at the small sector “3” of the large
sector I, as shown in Fig. 2, these voltage vectors that are
involved in MPC optimization are V16 (PON), V17 (PPN), V5
(PPO) and V6(OON). Similarly, when Vref(k) resides in other
small sectors of the large sector I, the candidate voltage vectors
for the MPC optimization are listed in Table II.
TABLE II
CANDIDATE VOLTAGE VECTORS FOR DIFFERENT SMALL SECTORS OF
LARGE SECTOR I
Small sectors Candidate voltage vectors
1 V0, V3, V4, V5, V6
2
3
V3, V4, V5, V6, V16
V5, V6, V16, V17
4 V3, V4, V15, V16
(7)
other two null voltage vectors V1 (NNN) and V2 (PPP) are not

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utilized due to their same effect on the output currents and the FSF is achieved for the SVPWM. The proposed MVV MPCs
NP voltage. As shown in Table II, the number of voltage can fully exploit the advantages of MPC and achieve similar
vectors involved in the simplified MPC is five for the small control performance as SVPWM method.
sector “1” and “2”. For other two small vectors, only four

voltage vectors are required in the simplified MPC. Thus, the
computational burden can be reduced compared with the   PPN V17
ta
conventional MPC method.
B. Reduced Complexity MVV FSF MPC Algorithms 3
Ⅰ
Vref
1) Five-segment MVV FSF MPC without Weighting Factors
V5 PPO
For T-type 3P-3L VSIs, it is well known that small voltage   V6 OON  
PON V16
vectors, which have the same output voltage with different tb
tc 2
effects on the NP voltage, can be further divided into positive
small voltage vectors and negative small voltage vectors. For 1 4 V15
V0 OOO  V POO
instance, assume that inverters operate in the normal inverting V1 3
NNN PNN
mode, a positive small voltage vector V3 (POO) decreases the V4 ONN 
V2 PPP tc
upper dc-link capacitor voltage Vp and increases the lower ta
tb
dc-link voltage Vn. While a negative small voltage vector V4 Fig. 3. Voltage vectors and their application times in the large sector I
(ONN) increases the upper dc-link voltage Vp and decreases the by using the five-segment MVV FSF MPC.
lower dc-link voltage Vn. Thus, it is possible to eliminate the
weighting factors for balancing the NP voltage in the cost Once Vref (k) is determined, voltage vectors that are closest to
function by appropriately utilizing redundant small voltage Vref (k) are selected and executed within one control cycle. The
vectors. Thus, the cost function of simplified MVV FSF MPCs application times for different voltage vectors are set inversely
without weighing factors can be formulated as: proportional to their cost function values, which means that less
execution time is used for voltage vectors with larger cost
g s ( k )  u* n ( k )  u n (k )  u* n (k )  u n (k ) (13)
function value. According to (13), the values of the cost
Table III lists the candidate voltage vectors for different function for the positive and negative small voltage vectors are
small sectors of the large sector I according to the relationship the same. Therefore, only the positive small voltage vectors are
between the upper dc-link capacitor voltage Vp and the lower utilized to calculate the application times of voltage vectors.
dc-link capacitor voltage Vn. Similarly, the selection of voltage When Vref (k) resides in the small sector “4” of the large sector I
vectors for other large sectors can be obtained. shown in Fig.3, three voltage vectors V3, V15, V16 are selected
TABLE III and the application times for these voltage vectors can be
SELECTION OF VOLTAGE VECTORS FOR DIFFERENT SMALL SECTORS OF calculated by:
LARGE SECTOR I  ta  Ts (1/ g s 3 ) /((1/ g s 3 )  (1/ g s15 )  (1/ g s16 ))
Small sectors Working conditions Voltage vector selection  t  T (1/ g ) /((1/ g )  (1/ g )  (1/ g ))
1  b s s16 s3 s15 s16
(15)
Vp ≥ Vn V0, V3, V5 
1 Vp < Vn V0, V4, V6 ct  Ts (1/ g s15 ) /((1/ g s3 )  (1/ g s15 )  (1/ g s16 )))
2 Vp ≥ Vn V3, V5, V16  Ts  ta  tb  tc
2 Vp < Vn V4, V6, V16
3 Vp ≥ Vn V5, V16, V17 where ta, tb and tc stand for the application times for the selected
3 Vp < Vn V6, V16, V17 three voltage vectors in a control period, and their values must
4 Vp ≥ Vn V3, V15, V16
4 Vp < Vn V4, V15, V16 be greater than or equal to zero, or less than or equal to the
control cycle Ts. The application times of different voltage
Fig. 3 illustrates the candidate voltage vectors in the large vectors in other small sectors of the first large sector I can be
sector I with their individual application times. When Vref (k) obtained in the similar way.
resides in the small sector “1” of the large sector I, the values of Once the voltage vectors are selected for different small
all redundant voltage vectors according to the cost function (13) sectors and working conditions, the switching sequences of
can be first obtained as: voltage vectors for each small sector in the first large sector I
 g s3  g s 4 can be determined and shown in Table IV.
 (14)
 g s5  g s 6 TABLE IV
g  g  g SWITCHING SEQUENCES OF DIFFERENT VOLTAGE VECTORS FOR
 s0 s1 s2
FIVE-SEGMENT MVV FSF MPC
where gsi (i=1ꞏꞏꞏ26) denotes the cost function value of the i-th Small sectors Working conditions Switching sequences
voltage vector according to the expression (13). 1 Vp ≥ Vn OOO-POO-PPO-POO-OOO
For the conventional MPC algorithm, only one optimal 1 Vp < Vn ONN-OON-OOO-OON-ONN
voltage vector is selected. Thus, large current ripples and 2 Vp ≥ Vn PON-POO-PPO-POO-PON
2 Vp < Vn ONN-OON-PON-OON-ONN
variable switching frequency are generated. In order to solve
3 Vp ≥ Vn PON-PPN-PPO-PPN-PON
this issue, inspired by the classical space vector pulse width 3 Vp < Vn OON-PON-PPN-PON-OON
modulation (SVPWM) method, the reference voltage vector 4 Vp ≥ Vn PNN-PON-POO-PON-PNN
can be linearly synthesized by the voltage vectors closest to this 4 Vp < Vn ONN-PNN-PON-PNN-ONN
reference vector according to the principle of voltage-second
equilibrium. Thus, MVVs are utilized per control period and

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TABLE VI
V15 V16 V3 V16 V15 V4 V15 V16 V15 V4 CONDUCTION TIMES OF POWER DEVICES IN DIFFERENT LARGE SECTORS
WITH THE FIVE-SEGMENT FSF MPC
Large
Conducting times
sectors
I Ta1= Tsa1, Ta2= Tsa2, Tb1= Tsb1, Tb2= Tsb2, Tc1=Tsc1, Tc2= Tsc2
Ta1= Ts–Tsb2, Ta2=Ts–Tsb1, Tb1= Ts–Tsc2, Tb2=Ts–Tsc1,
(a) (b) II Tc1=Ts–Tsa2, Tc2=Ts–Tsa1
Fig. 4. Application times and switching patterns for five-segment MVV FSF III Ta1= Tsc1, Ta2=Tsc2, Tb1=Tsa1, Tb2=Tsa2, Tc1=Tsb1, Tc2=Tsb2
MPC in the small sector “4” in the large sector I. (a) Vp ≥ Vn. (b) Vp < Vn.
Ta1= Ts – Tsa2, Ta2=Ts –Tsa1, Tb1=Ts–Tsb2, Tb2=Ts–Tsb1,
IV Tc1=Ts–Tsc2, Tc2=Ts–Tsc1
As can be seen from Table IV and Fig.4, only four Ta1= Tsb1, Ta2= Tsb2, Tb1=Tsc1, Tb2=Tsc2, Tc1=Tsa1, Tc2=Tsa2
V
switching-state changes are occurred per control cycle and the Ta1= Ts – Tsc2, Ta2=Ts – Tsc1, Tb1=Ts–Tsa2, Tb2=Ts–Tsa1,
switching state of one inverter phase is maintained without any VI Tc1=Ts–Tsb2, Tc2=Ts–Tsb1
change, which will reduce switching losses of the inverter. 2) Seven-Segment MVV FSF MPC without Weighting Factors
Naturally, the application times and switching patterns for other The proposed reduced complexity five-segment MVV FSF
large sectors can be obtained in a same way. However, it is MPC has only four switching-state changes and the switching
complicated and time-consuming to calculate the application state of one inverter phase is maintained without any change
times and determine the switching pattern for each large sector during one sampling period Ts , which will reduce switching
one by one. Here, a new method is proposed to map the losses. However, the selected small voltage vectors are changed
condition for other large sectors to the first large sector in order frequently under different NP voltage conditions, which will
to simplify the implementation complexity. Firstly, the increase ripples in the output currents. In order to improve the
reference voltage vector Vref(k) in other large sectors will be inverter output current quality, the seven-segment MVV FSF
transformed into the first large sector. Thus, the real and MPC without weighting factors has been proposed, which will
imaginary components of the reference voltage vector can be generate 6 switching-state changes in every sampling period.
expressed as: Fig. 5 illustrates the distribution of small sectors in the first
u* nI (k )  Vref (k ) cos(  ( nSector  1) / 3) large sector I. It is clear that the small sector “2” shown in Fig. 3
 * (16) for the five-segment MVV FSF MPC algorithm will be
 u nI (k )  Vref (k ) sin(  ( nSector  1) / 3) allocated to the small sector “3” and “4”, and the small sector
where u*αnI(k) and u*βnI(k) are the α and β components of the “1” can be further divided into two sub-small sectors, namely
calculated reference voltage according to (16), | Vref(k) | and φ the “1-I” and “1-II” sub-small sectors, as illustrated in Fig. 5.
are the amplitude and the phase angle of the reference voltage Table VII shows the switching sequences for each sub-small or
vector, respectively, nSector represents the number of large small sectors of the large sector I.
sectors and its value is 1, 2, 3, 4, 5, and 6 for different large
sectors of I, II, III, IV, V, and VI, respectively. 
PPN V17
For different large sectors, the corresponding reference   ta
voltage vector can be obtained by using (16). The dwell times
for the selected voltage vectors can be calculated by using (15) Ⅰ
or similar expression according to the location of the desired V5 PPO 3
PON V16
voltage vector. The application times in the first large sector I V6 OON
  tb
tc
by using the five-segment MVV FSF MPC without weighting 1-II Vref
factors are listed in Table V, where Tsa1, Tsa2, Tsb1, Tsb2, Tsc1 and V0 OOO
1 4 V15
1-I V3 POO
Tsc2 are conduction times for different power devices in the first V1 NNN PNN

V2 V4 ONN
tc
large sector I. Table VI shows the relationship of conduction PPP
ta
tb
times for power devices between the first large sector I and
Fig. 5. Voltage vectors and their application times in the large sector I by using
other large sectors, where Ta1, Ta2, Tb1, Tb2, Tc1 and Tc2 are the seven-segment MVV FSF MPC.
conduction times for different power devices. Through this TABLE VII
mapping, the practical implementation of the five-segment SWITCHING SEQUENCES OF DIFFERENT VOLTAGE VECTORS FOR THE
MVV FSF MPC can be significantly simplified. SEVEN-SEGMENT MVV FSF MPC
TABLE V Small sectors Switching sequences
APPLICATION TIMES FOR THE FIVE-SEGMENT MVV FSF MPC 1-I ONN-OON-OOO-POO-OOO-OON-ONN
1- II OON-OOO-POO-PPO-POO-OOO-OON
Small Working Conducting times 3 OON-PON-PPN-PPO-PPN-PON-OON
sectors conditions 4 ONN-PNN-PON-POO-PON-PNN-ONN
1 Vp ≥ Vn Tsa1=ta+tc, Tsa2=Ts, Tsb1=tc, Tsb2=Ts, Tsc1=0, Tsc2=Ts
1 Vp < Vn Tsa1=0, Tsa2=Ts, Tsb1=0, Tsb2=tb+tc, Tsc1=0, Tsc2=tb
With the cost function defined in (13), the application times
2 Vp ≥ Vn Tsa1=Ts, Tsa2=Ts, Tsb1=tc, Tsb2=Ts, Tsc1=0, Tsc2= ta+tc for the selected voltage vectors can be calculated like the
2 Vp < Vn Tsa1=tb, Tsa2=Ts, Tsb1=0, Tsb2=tb+tc, Tsc1=0, Tsc2=0 five-segment MVV FSF MPC. Considering the opposite effects
3 Vp ≥ Vn Tsa1=Ts, Tsa2=Ts, Tsb1=ta+tc, Tsb2=Ts, Tsc1=0, Tsc2=tc of the positive and negative redundant small voltage vectors on
3 Vp < Vn Tsa1=ta+tb, Tsa2=Ts, Tsb1=ta, Tsb2=Ts, Tsc1=0, Tsc2=0 the NP voltage, the application times of the redundant small
4 Vp ≥ Vn Tsa1= Ts, Tsa2=Ts, Tsb1=0, Tsb2=ta+tb, Tsc1=0, Tsc2= ta voltage vectors can be regulated to achieve the NP voltage
4 Vp < Vn Tsa1= tb+tc, Tsa2= Ts, Tsb1=0, Tsb2=tb, Tsc1=0, Tsc2=0 balancing. Here, the adjustment factor fdc (-1 ≤ fdc ≤1) for the
NP voltage balance is defined as:

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f dc  (V p  Vn ) / Vdc (17) 3) Nine-segment MVV FSF MPC without Weighting Factors

To further improve the output current quality, the
Assume that the inverter operates in normal inverting mode
nine-segment MVV FSF MPC is employed in the small sector
and Vref(k) situates in the sub-small sector “1-II” and small
“1” and “2” of the large sector I, while the seven-segment MVV
sector “3” of the large sector I, the application times of
FSF MPC is adopted for other two small sectors. Table IX lists
redundant small voltage vectors V5 (PPO) and V6 (OON) can
the switching sequences in different small sectors by using the
be expressed by:
nine-segment MVV FSF MPC. The calculation method for the
 t PPO  (1  f dc )tc / 2 NP voltage balance for the seven-segment MVV FSF MPC is

tOON  (1  f dc )tc / 2 (18) set the same as the nine-segment MVV FSF MPC method.
t  t When Vref(k) resides in the small sector “2” of the large sector I
 c PPO  tOON
shown in Fig.3, the application times and switching sequences
Similarly, in the sub-small sector “1-I” and small sector “4”
are illustrated in Fig.7. The switching sequences of different
of the large sector I, the application times of the positive small
small sectors in the large sector I for the nine-segment MVV
vector voltage V3 (POO) and the negative small vector voltage
FSF MPC are shown Table IX.
V4 (ONN) can also be obtained as:
Table X summarizes the conduction times for the inverter
t POO  (1  f dc )ta / 2 switching devices in different small sectors of the large sector I.

tONN  (1  f dc )ta / 2 (19) Similarly, the condition for other large sectors will be mapped
t  t to the first large sector in order to calculate the application
 a POO  tONN
times and determine the switching patterns.
Based on the above analysis, the application times and
switching patterns for the proposed seven-segment MVV FSF
V4 V6 V1 6 V3 V5 V3 V1 6 V6 V4
MPC in the small sector “4” of large sector I are illustrated in
Fig.6. Table VIII summarizes the corresponding conduction
times of different power devices in the first large sector.
Furthermore, as listed in Table VI, in the large sectors II, IV and
VI, the dwell times are the control period Ts subtracting the
obtained dwell times in the large sector I. Thus, the adjustment
factor is fdc in the large sectors I, III and V, and the Fig. 7. Application times and switching patterns for nine-segment MVV FSF
corresponding adjustment factor is changed to -fdc in the large MPC in the small sector “2” in the large sector I.
sectors II, IV and VI. TABLE IX
SWITCHING SEQUENCES OF DIFFERENT VOLTAGE VECTORS FOR THE
V4 V15 V16 V3 V16 V15 V4 NINE-SEGMENT MVV FSF MPC
Small sectors Switching sequences
1 ONN-OON-OOO-POO-PPO-POO-OOO-OON-ONN
2 ONN-OON-PON-POO-PPO-POO-PON-OON-ONN
3 OON-PON-PPN-PPO-PPN-PON-OON
4 ONN-PNN-PON-POO-PON-PNN-ONN
Fig. 6. Application times and switching patterns for the seven-segment MVV TABLE X
FSF MPC in the small sector “4” in the large sector I.
CONDUCTION TIMES OF POWER DEVICES IN DIFFERENT SMALL SECTORS
TABLE VIII WITH THE NINE-SEGMENT MVV FSF MPC
CONDUCTION TIMES OF POWER DEVICES IN DIFFERENT SMALL SECTORS Small Conducting times
WITH THE SEVEN-SEGMENT MVV FSF MPC sectors
Small Conducting times Tsa1=(1+fdc)ta/2+ (1+fdc)tc/2, Tsa2=Ts, Tsb1=(1+fdc)tc/2,
1
sectors Tsb2=(1+fdc)ta/2+tb+tc, Tsc1=0, Tsc2=(1+fdc)ta/2+tb+(1+fdc)tc/2
Tsa1=(1+fdc)ta/2, Tsa2=Ts, Tsb1=0, Tsb2=(1+fdc)ta/2+tb+tc, Tsc1=0, Tsa1=(1+fdc)ta/2+ tb + (1+fdc)tc/2, Tsa2=Ts, Tsb1=(1+fdc)tc/2,
1-I 2
Tsc2=(1+fdc)ta/2+tb Tsb2=(1+fdc)ta/2+tb+tc, Tsc1=0, Tsc2=(1+fdc)ta/2+tb+(1+fdc)tc/2
Tsa1=(1+fdc)tc/2+ ta, Tsa2=Ts, Tsb1=(1+fdc)tc/2, Tsb2= Ts, Tsc1=0, Tsa1=(1+fdc)tc/2+ ta +tb, Tsa2=Ts, Tsb1=(1+fdc)tc/2+ta, Tsb2=Ts,
1- II
Tsc2=(1+fdc)tc/2+ ta+tb 3
Tsa1=(1+fdc)tc/2+ ta +tb, Tsa2=Ts, Tsb1=(1+fdc)tc/2+ta, Tsb2=Ts, Tsc1=0, Tsc2=(1+fdc)tc/2
3 Tsa1=(1+fdc)ta/2+tb+tc, Ta2=Ts, Tsb1=0, Tsb2=(1+fdc)ta/2+tb, Tsc1=0,
Tsc1=0, Tsc2=(1+fdc)tc/2
4
Tsa1=(1+fdc)ta/2+ tb+ tc, Tsa2=Ts, Tsb1=0, Tsb2=(1+fdc)ta/2+tb, Tsc2=(1+fdc)ta/2
4
Tsc1=0, Tsc2=(1+fdc)ta/2
C. Control Delay Compensation
To simplify the algorithm implementation complexity, the There is a control delay once MPCs are implemented in
condition for other large voltage vectors will be mapped to the digital signal processors (DSP). To compensate the control
first large sector for the application times’ calculation and the delay, the two-step prediction is adopted and the cost function
selection of switching patterns. The detailed implementation is with control delay compensation is constructed as [42]:
described here. Firstly, the reference voltage vector is
g sc ( k )  u* n (k  1)  u n ( k  1)  u* n ( k  1)  u  n ( k  1) (20)
transformed into the first large sector by using (16). Then, the
application times of the selected voltage vectors are calculated * *
where u αn(k+1) and u βn(k+1) are the desired output voltages at
like the five-segment MVV FSF MPC. Finally, the turn-on the (k+1)th instant and can be written as
instants of each power device can be obtained according to
Table VI and Table VIII.

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i* , 
   
u* , 
 
i , 

i , 

(a)

V p  Vn
i* , 
   
u* , 
 
i , 
Vn  V p
i , 

(b)
Fig. 8. Block diagrams of the conventional and proposed MPCs. (a) Conventional MPC with weighting factors. (b) Proposed MPC without weighting factors.
 u* n (k  1)  L[i* ( k  2)  i ( k  1)] / Ts  Ri ( k  1) Case 2: The amplitude and the frequency of the output
 * *
(21) reference currents are 4.0 A and f*=50 Hz, respectively
u n ( k  1)  L[i ( k  2)  i ( k  1)] / Ts  Ri ( k  1) Case 3: The amplitude of the output reference current is
Substituting (4) into (21), it can be derived as stepped from 2.0 A to 4.0 A and the frequency reference is kept
as f*=50 Hz.
u* n (k  1)  Li* (k  2) / Ts  ( RTs / L  1)u n (k ) 
 Case 4: The amplitude of the output reference current is
(2 R  L / Ts  R Ts / L)i (k )
2
changed from 4.0 A to 2.0 A and the frequency reference is
 * (22) maintained as f*=50 Hz.
u n (k  1)  Li (k  2) / Ts  ( RTs / L  1)u n (k ) 
*

(2 R  L / T  R 2T / L)i (k )
 s s 
P
L R
where the current references i*α(k+2) and i*β(k+2) at the (k+2)th
L
instant can be expressed as
i* (k  2)  3i* (k  1)  3i* (k )  i* (k  1) L

* * * *
(23)
i (k  2)  3i (k  1)  3i (k )  i (k  1) ia (k ) ib (k ) ic (k )
N
Combining (22) and (23), the desired output voltage at the
(k+1)th instant can be obtained. The block diagrams of the
conventional MPC with weighting factors and the proposed
MPC without weighing factors are shown in Fig.8.
Summarizing the above analysis, a control strategy diagram for ia (k )
ib ( k )
the proposed reduced complexity MVV FSF MPC algorithms
ic (k )
with control delay compensation is shown in Fig.9.

V17
IV. EXPERIMENTAL EVALUATIONS
 

Vref
The proposed three MVV FSF MPC algorithms were V5
  V6   V16

implemented on a Texas Instruments DSP TMS320F2808 and

V15
the complex programmable logic device (CPLD) EPM7256. V0
V1
V3
V4 
V2
Fig. 10 shows the experimental setup. When the proposed
algorithms is completely implemented on DSP TMS320F2808, Fig. 9. Control strategy diagram for the proposed reduced complexity MVV
the 12 switching pulses for power devices of the T-type FSF MPC algorithms with control delay compensation.
3P-3L-VSI are generated by the CPLD EPM7256. Main TABLE XI
experimental parameters are listed in Table XI. EXPERIMENTAL PARAMETERS
In order to evaluate the performance of the proposed three Variable Description Value
Edc Dc input voltage (V) 200
different MVV FSF MPC algorithms, four different conditions f* Given output frequency (Hz) 50
are defined here: C Dc-link bus capacitor (μF) 500
Case 1: The amplitude and the frequency of the output R Loads (Ω) 20
reference currents are set as 2.0 A and f*=50 Hz, respectively. L Filter inductance (mH) 10
fs Sampling frequency (kHz) 16

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primarily focus on the switching frequency or the integer

multiple of the switching frequency (such as 2fs), which will
benefit the filter design combined with the FSF operation. 3)
From the steady-state experimental waveforms by using three
MVV FSF MPC algorithms, it can be seen that the
five-segment MVV FSF MPC will achieve the smallest NP
voltage fluctuation, which is only about 0.5 V, while the NP
voltage fluctuation by using the other two MVV FSF MPC
algorithms is about 1.0 V. Anyway, the NP voltage balance
performance by using the proposed MVV FSF MPC algorithms
is satisfied and effective. 4) The values of total harmonic
distortion (THD) of output phase-a current are 7.88%, 7.77%
and 7.38% for the five, seven and nine segments MVV FSF
MPC algorithms under case 1 condition, respectively. The
corresponding results are 4.30%, 3.88% and 3.48% for three
Fig. 10. Experimental setup. MVV FSF MPC algorithms under case 2, respectively.
A. Execution Time Evaluation Regarding the measured THDs, it can be seen that the
nine-segment MVV FSF MPC algorithm make the THD of
The DSP execution time is experimentally measured in order
output phase-a current smallest, while the five-segment MVV
to evaluate the computational efficiency for different FSF MPC
FSF MPC algorithm make the THD largest.
algorithms. In the system, the DSP of TMS320F2808 from TI
Company is utilized, and the crystal frequency is 100 M. Table C. Dynamic Experimental Results
XⅡ lists the execution time for four FSF MPC algorithms. The Different test conditions are conducted in order to evaluate
measured execution time for ADC process and other auxiliary the dynamic response of the proposed three MPC algorithms.
tasks is 11.2 µs. The FSF MPC algorithm presented in [35] is Fig.13 displays the dynamic experimental waveforms of
considered as the conventional FSF MPC algorithm. As listed phase-a current ia, phase-b current ib, line-line voltage uab, the
in Table XⅡ, it can be clearly observed as: 1) the execution time NP voltage deviation VnAC under case 3 and 4 conditions. As
of five-segments FSF MPC is the shortest, and the conventional can be seen from Fig.13 (a), (b) and (c), the time required to
FSF MPC is the longest. In addition, the execution time of the track the reference currents under case 3 by using three MPC
proposed three FSF MPC algorithms is almost the same. 2) The methods is about 1 ms. From Fig.13 (d), (e) and (f), it can also
execution time of three FSF MPC algorithms is found only be inferred that the time required for three MPC methods under
about 31% of that of the conventional FSF MPC algorithm. case 4 is about 0.5 ms. It is concluded from the comparative
TABLE XⅡ
EXECUTION TIME OF DIFFERENT MPC ALGORITHMS experimental waveforms in Fig.13 that the three MVV FSF
Algorithms Measurement and MPC Total time MPC methods own very good and basically similar dynamic
other tasks calculation performance.
Conventional 11.2 µs 75.4 µs 86.6 µs
FSF MPC D. NP Voltage Balancing Experimental Results
Five-segment 11.2 µs 23.2 µs 34.4 µs In order to further verify the performance in terms of the NP
FSF MPC voltage balance by using three reduced complexity MVV FSF
Seven-segment 11.2 µs 23.4 µs 34.6 µs
FSF MPC MPC methods, a resistor Rx (100 Ω) with a manual switch Sx is
Nine-segment 11.2 µs 23.5 µs 34.7 µs in parallel with the lower dc-link capacitor voltage for the test
FSF MPC and Fig. 14 shows the diagram for this test. Fig.15 shows the
B. Steady-state Experimental Results experimental results of ia, ib, uab, and VnAC under case 2 when
In order to evaluate the performance of different MVV FSF the manual switch Sx is suddenly switching on by using five,
MPC algorithms, the steady-state experimental results have seven and nine segments MVV FSF MPC algorithms,
been presented under different conditions. Fig.11 shows main respectively.
experimental results of phase-a current ia, phase-b current ib, Several key findings can be inferred from the Fig.15 and
line-line voltage uab, the NP voltage deviation VnAC (Vn-VP) for summarized as the following: 1) The NP voltage ripple by
different MVV FSF MPC algorithms under different conditions. using the seven and nine segments MVV FSF MPC methods
The corresponding harmonic spectrum of phase-a current is increases when the manual switch is switched on, specifically,
illustrated in Fig.12. the value of the NP voltage ripple increase from 1 V to 3 V. 2)
From the experimental waveforms in Fig.11 and Fig.12, The NP voltage ripple by using the five-segment MVV FSF
main conclusions can be drawn as: 1) The proposed three MVV MPC method is kept almost unchanged when the switch is
FSF MPC without weighting factors algorithms can achieve switched on. 3) Three MVV FSF MPC algorithms have perfect
accurate tracking of the given currents with good output current capability in balancing the NP voltage, among them, the
quality. 2) All these MVV FSF MPC algorithms realize the performance of the five-segment MVV FSF MPC method is the
high-order harmonic distribution of the inverter output currents best in balancing the NP voltage.

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(a) (b) (c)

(d) (e) (f)

Fig. 11. Steady-state experimental waveforms. (a) Five-segment MVV FSF MPC for case 1. (b) Seven-segment MVV FSF MPC for case 1. (c) Nine-segment MVV
FSF MPC for case 1. (d) Five-segment MVV FSF MPC for case 2. (e) Seven-segment MVV FSF MPC for case 2. (f) Nine-segment MVV FSF MPC for case 2.

(a) (b) (c)

(d) (e) (f)

Fig. 12. Harmonic spectrum of phase-a current. (a) Five-segment MVV FSF MPC for case 1. (b) Seven-segment MVV FSF MPC for case 1. (c)
Nine-segment MVV FSF MPC for case 1. (d) Five-segment MVV FSF MPC for case 2. (e) Seven-segment MVV FSF MPC for case 2. (f)
Nine-segment MVV FSF MPC for case 2.

VnAC (2.5V/div) VnAC (2.5V/div) VnAC (2.5V/div)

uab (250V/div) uab (250V/div) uab (250V/div)

ia ,ib (5A/div) ia ,ib (5A/div) ia ,ib (5A/div)

(a) (b) (c)

VnAC (2.5V/div) VnAC (2.5V/div) VnAC (2.5V/div)

uab (250V/div) uab (250V/div) uab (250V/div)

ia ,ib (5A/div) ia ,ib (5A/div) ia ,ib (5A/div)

10ms/div

(d) (e) (f)

Fig. 13. Dynamic experimental waveforms. (a) Five-segment MVV FSF MPC for case 3. (b) Seven-segment MVV FSF MPC for case 3. (c)
Nine-segment MVV FSF MPC for case 3. (d) Five-segment MVV FSF MPC for case 4. (e) Seven-segment MVV FSF MPC for case 4. (f)
Nine-segment MVV FSF MPC for case 4.

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(a)
Fig. 15. Experimental results for NP voltage balance. (a) Five-segment MVV FSF MPC. (b) Seven-segment MVV FSF MPC. (c) Nine-segment
MVV FSF MPC.
P
L R
N balancing for a 3-level electric vehicle traction inverter using an innovative
Fig. 14. Block diagram for NP balancing test.
V. CONCLUSION
In this paper, three MVV MPC algorithms with constant
switching frequency and low complexity for T-type
3p-3L-VSIs are proposed, and main conclusions for this
comparative evaluation can be drawn as:
1) MVVs are used per control cycle with FSF
implementation in three MVV FSF MPC algorithms, which are
beneficial for the filter design.
2) Three MVV FSF MPC algorithms eliminate the weighting
factor for balancing the NP voltage in the cost function, which
avoids the cumbersome tuning process for weighting factors.
3) The reference voltage vector is constructed and voltage
vectors near to the reference voltage vector are used to
participate in the MPC optimization, which greatly improves
the computational efficiency.
4) The condition for other large voltage vectors will be
mapped to the first large sector in order to calculate the
application time and determine the switching patterns, which
greatly simplifies the implementing MVV FSF MPC
algorithms. The evaluation results show that all three MVV
FSF MPC algorithms have small steady-state error, fast
dynamic response, and good capacity in balancing the NP
voltage. Among them, the five segments MVV FSF MPC has
the best in balancing the NP voltage, and the nine segments
MVV FSF MPC has the best output current quality of the
inverter.
REFERENCES
[1] J. Rodriguez, J. S. Lai, and F. Z. Peng, “Multilevel inverters: A survey of
topologies, controls, and applications,” IEEE Trans. Ind. Electron., vol. 49,
no. 4, pp. 724–738, Aug. 2002.
[2] J. I. Leon, S. Vazquez, and L. G. Franquelo, “Multilevel converters:
control and modulation techniques for their operation and industrial
2332-7782 (c) 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
Authorized licensed use limited to: University of Malaya. Downloaded on February 28,2020 at 01:50:24 UTC from IEEE Xplore. Restrictions apply.
10
(b) (c)
applications,” Proceedings of the IEEE., vol. 105, no. 11, pp. 2066–2081,
Nov. 2017.
[3] H. Abu-Rub, S. Bayhan, S. Moinoddin, M. Malinowski and J. Guzinski,
"Medium-voltage drives: challenges and existing technology," IEEE
Power Electron. Mag., vol. 3, no. 2, pp. 29–41, Jun. 2016.
[4] S. Bernet, “Recent developments of high power converters for industry
and traction applications,” IEEE Trans. Power Electron., vol. 15, no. 6, pp.
1102–1117, Nov. 2000.
[5] S. Bhattacharya, D. Mascarella, G. Joos, J. M. Cyr, and J. Xu, “A dual
three-level T-NPC inverter for high-power traction applications,” IEEEJ.
Emerg. Sel. Topic Power Electron., vol. 4, no. 2, pp. 668–678, Jun. 2016.
[6] A. Choudhury, P. Pillay, and S. S. Williamson, “DC-link voltage
switching sequence control scheme,” IEEE J. Emerg. Sel. Topics Power
Electron., vol. 2, no. 2, pp. 296–307, Jun. 2014.
[7] A. Choudhury, P. Pillay, and S. S. Williamson, “Modified DC-bus voltage
balancing algorithm based three-level neutral point clamped IPMSM drive
for electric vehicle applications,” IEEE Trans. Ind. Electron., vol. 63, no. 2,
pp. 761–772, Feb. 2016.
[8] A. Choudhury, P. Pillay, and S. S. Williamson, “Comparative analysis
between two-level and three-level dc/ac electric vehicle traction inverters
using a novel dc-link voltage balancing algorithm,” IEEE J. Emerg. Sel.
Topics Power Electron., vol. 2, no. 3, pp. 529–540, Sep. 2014.
[9] A. Kersten et al., “Fault detection and localization for limp home
functionality of three-level NPC inverters with connected neutral point for
electric vehicles,” IEEE Trans. Transp. Electrific., vol. 5, no. 2, pp.
416–432, Jun. 2019.
[10] J. Lu, R. Hou, P. D Maso and J. Style , “A GaN/Si hybrid T-Type
three-level configuration for electric vehicle traction inverter,” in 2018
IEEE 6th Workshop on Wide Bandgap Power Devices and Applications
(WiPDA), 2018, pp. 77–81.
[11] S. Mukherjee, S. K. Giri, and S. Banerjee, “A generalized discontinuous
PWM scheme for three-level NPC traction inverter with minimum
switching loss for electric vehicles,” IEEE Trans. Ind. Appl., vol. 55, no.1,
pp. 516–528, Jan./Feb. 2019.
[12] S. Mukherjee, S. K. Giri, and S. Banerjee, “A flexible discontinuous
modulation scheme with hybrid capacitor voltage balancing strategy for
three level NPC traction inverter,” IEEE Trans. Ind. Electron., vol. 66, no.
5, pp. 3333–3343, May 2019.
[13] B. Sarlioglu and C. T. Morris, "More electric aircraft: review, challenges,
and opportunities for commercial transport aircraft," IEEE Trans. Transp.
Electrific., vol. 1, no. 1, pp. 54–64, Jun. 2015.
[14] A. K. Morya et al., “Wide bandgap devices in AC electric drives:
opportunities and challenges,” IEEE Trans. Transp. Electrific., vol. 5, no. 1,
pp. 3–20, Mar. 2019.
[15] M. Schweizer, I. Lizama, T. Friedli, and J. W. Kolar, “Comparison of the
chip area usage of 2-level and 3-level voltage source converter topologies,”
in Proc. 36th Annu. Conf. IEEE Ind. Electron. Soc, 2010, pp. 391–396.
[16] M. Schweizer and J.W. Kolar, “Design and implementation of a highly
efficient 3-level T-type converter for low-voltage applications,” IEEE
Trans. Power Electron., vol. 28, no. 2, pp. 899–907, Feb. 2013.
[17] J. Rodriguez, M. P. Kazmierkowski, J. R. Espinoza, P. Zanchetta, H.
Abu-Rub, H. A. Young, and C. A. Rojas, “State of the art of finite control
set model predictive control in power electronics,” IEEE Trans. Ind.
Informat., vol. 9, no. 2, pp. 1003–1016, May 2013.
[18] S. Vazquez, J. Rodriguez, M. Rivera, L. G. Franquelo, and M. Norambuena,
“Model predictive control for power converters and drives: advances and
trends,” IEEE Trans. Ind. Electron., vol. 64, no. 2, pp. 935–947, Feb. 2017.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TTE.2020.2973045, IEEE
Transactions on Transportation Electrification
IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION
[19] A. Bakeer, M. A. Ismeil, and M. Orabi, “A powerful finite control
setmodel predictive control algorithm for quasi z-source inverter,” IEEE
Trans. Ind. Informat., vol. 12, no. 4, pp. 1371–1379, Aug. 2016.
[20] Z. Zhang, F. Wang, J. Wang, J. Rodrguez, and R. Kennel, “Nonlinear
direct control for three-level NPC back-to-back converter PMSG wind
turbine systems: Experimental assessment with FPGA,” IEEE Trans. Ind.
Informat., vol. 13, no. 3, pp. 1172–1183, Jun. 2017.
[21] J. Hu, J. Zhu, G. Lei, G. Platt, and D. G. Dorrell, “Multi-objective
model-predictive control for high-power converters,” IEEE Trans. Energy
Convers., vol. 28, no. 3, pp. 652–663, Sep. 2013.
[22] W. Xie, X. Wang, F. Wang, W. Xu, R. M. Kennel, and R. D. Lorenz,
“Finite-control-set model predictive torque control with a deadbeat
solution for PMSM drives,” IEEE Trans. Ind. Electron., vol. 62, no. 9, pp.
5402–5410, Sep. 2015.
[23] C. Xia, T. Liu, T. Shi, and Z. Song, “A simplified finite-control-set
model-predictive control for power converters,” IEEE Trans. Ind.
Informat., vol.10, no. 2, pp. 991–1002, May 2014.
[24] Z. Zhang, C. Hackl, and R. Kennel, “Computationally efficient DMPC for
three-level NPC back-to-back converters in wind turbine systems with
PMSG,” IEEE Trans. Power Electron., vol. 32, no. 10, pp. 8018–8034, Oct.
2017.
[25] I. M. B. Hassine, M. W. Naouar, and N. Mrabet-Bellaaj, “Model
predictive-sliding mode control for three-phase grid-connected
converters,” IEEE Trans. Ind. Electron., vol. 64, no. 2, pp. 1341–1349, Feb.
2017.
[26] S. Vazquez, A. Marquez, R. Aguilera, D. Quevedo, J. Leon, and L.
Franquelo, “Predictive optimal switching sequence direct power control for
grid-connected power converters,” IEEE Trans. Ind. Electron., vol. 62, no.
4, pp. 2010–2020, Apr. 2015.
[27] D. Zhou, X. Li, and Y. Tang , “Multiple-vector model predictive power
control of three-phase four-switch rectifiers with capacitor voltage
balancing,” IEEE Trans. Power Electron., vol. 33, no. 7, pp. 5824–5835,
Jul. 2018.
[28] Y. Zhang and H. Yang, “Model predictive torque control of induction
motor drives with optimal duty cycle control,” IEEE Trans. Power
Electron., vol. 29, no. 12, pp. 6593–6603, Dec. 2014.
[29] Y. Zhang and H. Yang, “Two-vector-based model predictive torque control
without weighting factors for induction motor drives,” IEEE Trans. Power
Electron., vol. 31, no. 2, pp. 1381–1390, Feb. 2016.
[30] X. Zhang and B. Hou, “Double vectors model predictive torque control
without weighting factor based on voltage tracking error,” IEEE Trans.
Power Electron., vol. 33, no. 3, pp. 2368–2380, March 2018.
[31] Z. Song, C. Xia and T. Liu, “Predictive current control of three-phase
grid-connected converters with constant switching frequency for wind
energy systems,” IEEE Trans. Ind. Electron., vol. 60, no. 6, pp. 2451–2464,
Jun. 2013.
[32] G. Abad, M. A. Rodriguez, and J. Poza, “Two-level VSC based predictive
direct torque control of the doubly fed induction machine with reduced
torque and flux ripples at low constant switching frequency,” IEEE Trans.
Power Electron., vol. 23, no. 3, pp. 1050–1061, May 2008.
[33] L. Tarisciotti, P. Zanchetta, A. Watson, S. Bifaretti, and J. C. Clare,
“Modulated model predictive control for a seven-level cascaded h-bridge
back-to-back converter,” IEEE Trans. Ind. Electron., vol. 61, no. 10, pp.
5375–5383, Oct. 2014.
[34] M. Rivera, M. Perez, V. Yaramasu, B. Wu, L. Tarisciotti, P. Zanchetta, and
P. Wheeler, “Modulated model predictive control (m2pc) with fixed
switching frequency for a npc converter,” in Proc. IEEE International
Conference on Power Engineering, Energy and Electrical Drives, 2015, pp.
623–628.
[35] F. Donoso, A. Mora, R. Cardenas, A. A. Cárdenas, D. Sáez, and M. Rivera,
“Finite-Set model predictive control strategies for a 3L-NPC inverter
operating with fixed switching frequency,” IEEE Trans. Ind. Electron., vol.
65, no. 5, pp. 3954–3965, May 2018.
[36] M. Habibullah, D. D. C. Lu, D. Xiao, and M. F. Rahman, “Finite-state
predictive torque control of induction motor supplied from a three-level
NPC voltage source inverter,” IEEE Trans. Power Electron., vol. 32, no. 1,
pp. 479–489, Jan. 2017.
[37] M. Narimani, B. Wu, V. Yaramasu, Z. Cheng, and N. Zargari, “Finite
control-set model predictive control (FCS-MPC) of nested neutral point
clamped (NNPC) converter,” IEEE Trans. Power Electron., vol. 30, no. 12,
pp. 7262–7269, Dec. 2015.
[38] M. Vatani, B. Bahrani, M. Saeedifard, and M. Hovd, “Indirect finite control
set model predictive control of modular multilevel converters,” IEEE
Trans. Smart Grid, vol. 6, no. 3, pp. 1520–1529, May 2015.
2332-7782 (c) 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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11
[39] C. A. Rojas, J. Rodriguez, F. Villarroel, J. R. Espinoza, C. A. Silva, and M.
Trincado, “Predictive torque and flux control without weighting
factors,” IEEE Trans. Ind. Electron., vol. 60, no. 2, pp. 681–690, Feb.
2013.
[40] P. Acuna, R. P. Aguilera, A. M. Y. M. Ghias, M. Rivera, C. R. Baier, and V.
G. Agelidis, “Cascade-free model predictive control for single-phase
grid-connected power converters,” IEEE Trans. Ind. Electron., vol. 64, no.
1, pp. 285–294, Jan. 2017.
[41] M. Odavic, V. Biagini, P. Zanchetta, M. Sumner, and M. Degano, “One-
sample-period-ahead predictive current control for high-performance
active shunt power filters,” IET Power Electron., vol. 4, no. 4, pp. 414–423,
Apr. 2011.
[42] P. Cortes, J. Rodriguez, C. Silva, and A. Flores, “Delay compensation in
model predictive current control of a three-phase inverter,” IEEE Trans.
Ind. Electron., vol. 59, no. 2, pp. 1323–1325, Feb. 2012
Yong Yang (M’15) received the B.S. degree in
automation from Xiangtan University, Xiangtan,
China, in 2003, the M.S. degree in Electrical
Engineering from Guizhou University, Guiyang, China,
in 2006, and the Ph.D. degree in Electrical Engineering
from Shanghai University, Shanghai, China, in 2010.
He is currently an associate professor with the
School of Rail Transportation, Soochow University.
From December 2017 to December 2018, he was a
Visiting Scholar with Center for High Performance Power Electronics (CHPPE)
of The Ohio State University, Columbus, USA. He has coauthored more than 60
journal and conference papers. His current research interests include model
predictive control in power electronic converters, distributed energy resource
interfacing and high-performance motor drive control.
Huiqing Wen (M’13-SM’17) received his B.S. and M.S.
degrees in Electrical Engineering from Zhejiang
University, Hangzhou, China, in 2002 and 2006,
respectively; and his Ph.D. degree in Electrical
Engineering from the Chinese Academy of Sciences,
Beijing, China, in 2009. From 2009 to 2010, he was an
Electrical Engineer working in the Research and
Development Center, GE (China) Co., Ltd., Shanghai,
China. From 2010 to 2011, he was an Engineer at the
China Coal Research Institute, Beijing, China. From
2011 to 2012, he was a Postdoctoral Fellow at the Masdar Institute of Science and
Technology, Abu Dhabi, United Arab Emirates.
He is presently working as an Associate Professor at the Xi’an
Jiaotong-Liverpool University, Suzhou, China. His current research interests
include bidirectional DC-DC converters, power electronics in flexible AC
transmission applications, electrical vehicles, and high-power, three-level
electrical driving systems.
 
 
Mingdi Fan (M’16) received B.S. degree in electrical
engineering and the Ph.D. degree in detection
technology and automation device from Northwestern
Polytechnical University, Xi’an, China, in 2008 and
2014. From 2010 to 2011, he worked as a visiting
scholar in Kassel University, Germany.
He is currently a Lecturer with the School of Rail
Transportation, Soochow University. His current
research interests include model predictive control for
power converters and motor drives.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TTE.2020.2973045, IEEE
Transactions on Transportation Electrification
IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION 12

Jose Rodriguez (M'81-SM'94-F'10) received the

Liqun He received the B.E. and Ph.D. degrees from
the Huazhong University of Science and Technology
(HUST), Wuhan, China, in 2010 and 2015 respectively,
all in Electrical Engineering.
She is currently an Associated Professor at the
Soochow University, Suzhou, China. Her research
interests include fully modular power electronics
systems, power electronic transformer, railway
electrification, and multi-physics fields of electrical
equipment.
Menxi Xie received the B.S. and M.S. degrees in
electrical engineering from Lanzhou Jiaotong
University, Lanzhou, China, in 2006 and 2009
respectively, and he received Ph.D. degree in signal and
information processing from Soochow University,
Suzhou, China, in 2018.
Since 2010, he joined the School of Rail
Transportation, Soochow University. His current
research interests include phase-locked loop, power
converter control methods, and motor drives.
Engineer degree in electrical engineering from the
Universidad Tecnica Federico Santa Maria, in
Valparaiso, Chile, in 1977 and the Dr.-Ing. degree in
electrical engineering from the University of Erlangen,
Erlangen, Germany, in 1985.
He has been with the Department of Electronics
Engineering, Universidad Tecnica Federico Santa Maria,
since 1977, where he was full Professor and President.
Since 2015 he was the President and since 2019 he is full professor at Universidad
Andres Bello in Santiago, Chile. He has coauthored two books, several book
chapters and more than 400 journal and conference papers. His main research
interests include multilevel inverters, new converter topologies, control of power
converters, and adjustable-speed drives. He has received a number of best paper
awards from journals of the IEEE. Dr. Rodriguez is member of the Chilean
Academy of Engineering. In 2014 he received the National Award of Applied
Sciences and Technology from the government of Chile. In 2015 he received the
Eugene Mittelmann Award from the Industrial Electronics Society of the IEEE.
In years 2014 to 2019 he has been included in the list of Highly Cited Researchers
published by Web of Science.

Rong Chen received the B.S. degree in communication

engineering from Soochow University, Suzhou, China,
in 2006, the M.S. degree in communication and
information system from Soochow University in 2009,
and the Ph.D. degree in signal and information
processing from Soochow University in 2013.
Currently, she is an associate professor working in
the School of Rail Transportation, Soochow University.
Her research interests include signal processing and
synchronous phasor measuring.

Margarita Norambuena (S’12–M’14) received the

B.S. and M. S. degrees in electric engineering from the
Universidad Tecnica Federico Santa Maria (UTFSM),
Valparaiso, Chile, in 2013. She received the Ph.D.
degree (summa cum laude) in electronics engineering
from the UTFSM in 2017 and received the
Doktoringenieur (Dr-Ing.) degree (summa cum laude)
from the Technische Universitat Berlin (TUB) in 2018.
In 2019 she received the award “IEEE IES Best student
paper award” for her doctoral work.
She is an Assistant Professor at Universidad Tecnica Federico Santa Maria.
Her research interest includes multilevel converters, model predictive control
of power converters and drives, energy storage systems, renewable energy and
microgrids systems.

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