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Testing does not come for free. Modern microprocessors contain more than 1000 pins.
They pack a myriad of functionalities inside them. If any single transistor inside
a chip becomes faulty, then the whole chip needs to be discarded. We, consumers, do
not expect faulty chips from manufacturers. But identifying that one single
defective transistor out of billions is a headache. We may need to test every
functionality with every possible combination. If testing is done that way, then
the time-to-market would be so high that the chips may never reach the consumers.
So, how do we tackle this? We use a methodology to add a feature to these chips.
The methodology is called DFT; short for Design for Testability. And the feature it
adds to a chip is ‘testability.’Role of DFT
Testing of Sequential Circuits
DFT offers a solution to the issue of testing sequential circuits. It’s kind of
hard to test sequential circuits. Since there are clocks involved along with the
flip-flops.
Hence, the state machines cannot be tested unless they are initialized to a known
value. And to initialize them, we need a specific set of features in addition to
the typical circuitry. DFT enables us to add this functionality to a sequential
circuit and thus allows us to test it.