Professional Documents
Culture Documents
Precision Dual/Quad
CMOS Rail-to-Rail Input/
Output Amplifiers
Features Description
■ Maximum Offset Voltage: 70µV (25°C) The LTC®6081/LTC6082 are dual/quad low offset, low drift,
■ Maximum Offset Drift: 0.8µV/°C low noise CMOS operational amplifiers with rail-to-rail
■ Maximum Input Bias: 1pA (25°C) 40pA (TA ≤ 85°C) input/output swing.
■ Open Loop Voltage Gain: 120dB Typ
■
The 70µV maximum offset, 1pA input bias current, 120dB
Gain Bandwidth Product: 3.6MHz
■
open loop gain and 1.3µVP-P 0.1Hz to 10Hz noise make
CMRR: 100dB Min
■
it perfect for precision signal conditioning. The LTC6081/
PSRR: 98dB Min
■
LTC6082 features 100dB CMRR and 98dB PSRR.
0.1Hz to 10Hz Noise: 1.3µVP-P
■ Supply Current: 330µA Each amplifier consumes only 330µA of current on a 3V
■ Rail-to-Rail Inputs and Outputs supply. The 10-lead DFN has an independent shutdown
■ Unity Gain Stable function that reduces each amplifier’s supply current
■ 2.7V to 5.5V Operation Voltage to 1µA.
■ Dual LTC6081 in 8-Lead MSOP and 10-Lead DFN10 LTC6081/LTC6082 is specified for power supply voltages
Packages; Quad LTC6082 in 16-Lead SSOP and DFN of 3V and 5V from –40°C to 125°C. The dual LTC6081 is
Packages available in 8-lead MSOP and 10-lead DFN10 packages.
The quad LTC6082 is available in 16-lead SSOP and DFN
Applications packages.
■ Photodiode Amplifier L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
■ Strain Gauge
■ High Impedance Sensor Amplifier
■ Microvolt Accuracy Threshold Detection
■ Instrumentation Amplifiers
■ Thermocouple Amplifiers
Typical Application
Shock Sensor Amplifier (Accelerometer) VOS Drift Histogram
30
V+ 0.1µF LTC6081MS8
NUMBER OF AMPLIFIERS (OUT OF 100)
0
47pF –0.20 –0.10 0 0.10 0.20 0.30
VOSDRIFT (µV/°C)
60812 TA01b
60812fd
pIN CONFIGURATION
TOP VIEW
TOP VIEW
TOP VIEW
OUTA 1 16 OUTD
OUTA 1 16 OUTD
–INA 2 A D 15 –IND
–INA 2 A D 15 –IND
+INA 3 14 +IND
+INA 3 14 +IND
V+ 4 13 V–
V+ 4 13 V–
+INB 5 B C 12 +INC
+INB 5 B C 12 +INC
–INB 6 11 –INC
–INB 6 11 –INC
OUTB 7 10 OUTC
OUTB 7 10 OUTC
NC 8 9 NC
NC 8 9 NC
60812fd
60812fd
60812fd
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test
conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES H SUFFIX
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VOS Offset Voltage LTC6081MS8, LTC6082GN VCM = 0.5V –70 70 –70 70 μV
LTC6081MS8, LTC6082GN VCM = 0.5V ● –90 90 –90 90 μV
LTC6081DD, LTC6082DHC VCM = 0.5V –70 70 μV
LTC6081DD, LTC6082DHC VCM = 0.5V ● –90 90 μV
ΔVOS ⁄ΔT Input Offset Voltage Drift ● ±0.2 ±0.8 ±0.2 ±0.8 μV/°C
(Note 8)
IB Input Bias Current 0.2 0.2 pA
● 40 500 pA
IOS Input Offset Current 0.1 0.1 pA
● 15 100 pA
en Input Referred Noise f = 1kHz 13 13 nV/√Hz
0.1Hz to 10Hz 1.3 1.3 µVP-P
In Input Noise Current Density 0.5 0.5 fA/√Hz
(Note 7)
Input Common Mode Range ● V– V+ V– V+ V
CDIFF Differential Input Capacitance 3 3 pF
CCM Common Mode Input 7 7 pF
Capacitance
CMRR Common Mode Rejection VCM = 0V to 3.5V 100 110 100 110 dB
Ratio VCM = 0V to 3.5V ● 95 110 94 110 dB
VCM = 0V to 5V ● 86 95 86 95 dB
PSRR Power Supply Rejection Ratio VS = 2.7V to 5.5V 98 110 98 110 dB
● 96 96 dB
VOUT Output Voltage, High, Either No Load 1 1 mV
Output Pin (Referred to V+) ISOURCE = 0.5mA ● –24 –25 mV
ISOURCE = 5mA ● –200 –220 mV
Output Voltage, Low, Either No Load 1 1 mV
Output Pin (Referred to V–) ISINK = 0.5mA ● 27 32 mV
ISINK = 5mA ● 210 240 mV
AVOL Large-Signal Voltage Gain RLOAD = 10k, 0.5V < VOUT < 4.5V ● 110 120 110 120 dB
60812fd
60812fd
20 15
VCM = 0.5V VCM = 0.5V REPRESENTATIVE PARTS
20 10
15
VOS (µV)
5
15
0
10
10 –5
–10
5
5
–15
0 0 –20
–0.20 –0.10 0 0.10 0.20 0.30 –0.30 –0.20 –0.10 0 0.10 0.20 –50 –30 –10 10 30 50 70 90 110 130
VOSDRIFT (µV/°C) VOSDRIFT (µV/°C) TEMPERATURE (°C)
60812 G01 60812 G02
60812 G03
10 VOS (µV) 60
0
8 40
–10
6 20
4 –20
0
2 –30 –20
0 –40 –40
–9.5 –5.5 –1.5 2.5 6.5 10.5 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5
VOS (µV) VCM (V) VCM (V)
60812 G04
60812 G05 60812 G06
150 20 90
NOISE VOLTAGE (nV/√Hz)
VS = 5V 80
100 TA = 25°C 15 70
VOS (µV)
60
50 10
50
TA = 55°C VS = 3V
40 VS = 5V
0 5
30 VCM = 0.5V
–50 0 20 VS = 3V
SINKING 10 VCM = 0.5V
SOURCING CURRENT CURRENT
–100 –5 0
–6 –4 –2 0 2 4 6 0 5 10 15 20 25 30 35 40 45 50 55 60 1 10 100 1k 10k 100k
OUTPUT CURRENT (mA) TIME AFTER POWER UP (s) FREQUENCY (Hz)
60812 G09
60812 G07 60812 G08
60812fd
220
200
180
160 PMOS INPUTS
140 VCM = 0.5V
120
100
80
NMOS INPUTS
60 VCM = 2.5V
40
20
0
1 10 100 1k 10k 100k 0 5 10 15 20 25 30 35 40 45 50 0 5 10 15 20 25 30 35 40 45 50
FREQUENCY (Hz) TIME (s) TIME (s)
60812 G10 60812 G11 60812 G12
100
200
10
100
IBIAS (pA)
IBIAS (pA)
0 TA = 70°C
10 0
–10
–100
–20 TA = 85°C –200
1
–30 –300
–40 –400
0.1 –50 –500
20 40 60 80 100 120 140 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
TEMPERATURE (°C) VCM (V) VCM (V)
60812 G13
60812 G14 60812 G15
35
30
25 AV = 10
60812 G16 60812 G17 20
200µs/DIV 20µs/DIV
TA = 25°C TA = 25°C 15
VS = ±1.5V VS = ±1.5V
10
RL = 10k RL = 10k
CL = 100pF CL = 100pF 5
0
10 100 1000 10000
CAPACITIVE LOAD (pF)
60812 G18
60812fd
350
290
400 1 AV = 1
0.1 VS = 3V
270 SUPPLY CURRENT
VCM = 0.5V
TA = 25°C
250 0 0 0.01
–40 –25 –10 5 20 35 50 65 80 95 110 125 0 100 200 300 400 500 100 1k 10k 100k 1M 10M 100M
TEMPERATURE (°C) TIME (µs) FREQUENCY (Hz)
60812 G19 60812 G20
60812 G21
Open Loop Gain Open Loop Gain Open Loop Gain vs Frequency
20 20 60 270
VS = 3V VS = 5V RL = 10k
TA = 25°C TA = 25°C RL = 100k
180
10 10
40
PHASE 90
INPUT VOLTAGE (µV)
INPUT VOLTAGE (µV)
0 0 RL = 100k
PHASE (DEG)
20
GAIN (dB)
0
RL = 100k RL = 10k
–10 –10
RL = 10k –90
0
–20 –20 RL = 2k
GAIN –180
RL = 2k
–20
–30 –30 VS = 5V
–270
VCM = 0.5V
TA = 25°C
–40 –40 –40 –360
0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1k 10k 100k 1M 10M 100M
OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) FREQUENCY (Hz)
60812 G24
60812 G22 60812 G23
20
CMRR (dB)
PSRR (dB)
GAIN (dB)
–90 60 60
–180 40 40
0
GAIN
–270 20 20
VS = 5V
–20
VCM = 0.5V
–360 0 0
TA = 25°C
CL = 200pF
–40 –450 –20 –20
1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
60812 G25
60812 G26 60812 G27
60812fd
DISTORTION (dBc)
+VS –1.5
–50
–60 2ND
+VS –2.0
–60 3RD
–80 –VS 2.0
–70
–VS 1.5
–100
–80
–VS 1.0 TA = 125°C
–120 TA = 25°C SINK
–VS 0.5 –90
TA = –55°C
–140 –VS 0 –100
100 1k 10k 100k 1M 10M 100M 0.01 0.1 1 10 100 1 10 100 1000
FREQUENCY (Hz) LOAD CURRENT (mA) FREQUENCY (kHz)
60789 G29 60812 G30
60812 G28
Pin Functions
OUT: Amplifier Output SHDN_A: Shutdown Pin of Amplifier A, active low and only
–IN: Inverting Input valid for LTC6081DD. An internal current source pulls the
pin to V+ when floating.
+IN: Noninverting Input
SHDN_B: Shutdown Pin of Amplifier B, active low and only
V+: Positive Supply valid for LTC6081DD. An internal current source pulls the
V–: Negative Supply pin to V+ when floating.
NC: Not internally connected.
Exposed Pad: Connected to V–.
60812fd
SHDN Pins
0.10
Pins 5 and 6 are used for power shutdown on the LTC6081
0.5
in the DD package. If they are floating, internal current
sources pull Pins 5 and 6 to V+ and the amplifiers operate 0
–15 –12 –9 –6 –3 0 3 6 9 12 15
normally. In shutdown, the amplifier output is high im- VOS CHANGE (µV) 60812 F01
60812fd
LONG DIMENSION
SLOTS
60812 F02
Simplified Schematic
Simplified Schematic of the Amplifier
V+
R1 R2
M10 M11
M8
I1 C1
1µA
–
I2 V+
A1
V– D4 VBIAS M5 V+
+IN
D7
V+
D3 OUTPUT
CLAMP M1 M2 M6 M7 OUT
CONTROL
D6
V– D8
V+
–IN
V–
D2 D5 A2
BIAS
SHDN
V–
+
–
GENERATION
C2
D1
NOTE: SHDN IS ONLY AVAILABLE M3 M4 M9
V– IN THE DFN10 PACKAGE
R3 R4
V– 60812 SS
60812fd
15pF 100k
VDD
V+
I LOAD
–
1/2
VOUT = RSH • I • 101
LTC6081
+
eNOISE = 3µVP-P, RTI
RSH 1k BW ~ 1kHz
60812 TA03
100k 100k
CMRR V+ 0.1µF
TRIM
976k 1M
–
50k 1/2
100k
LTC6081
–
– + 1/2
VIN VOUT = 1011 • VIN
LTC6081
+ +
60812fd
1M
+
1µF 1/2
VOUT = 10mV/°C
1M LTC6081
0°C TO 500°C
5V –
LT1025 2.49M
K
R– 10k
100pF
100k
VIN +
1/4
100Ω LTC6082
–
0.01µF
1k 100Ω
GAIN 5k
TRIM 97.6k 100k
10-TURN 2.5V
0.1µF
+ 10MΩ
1/4
LTC6082
–
–
100k 100k
1/4
LTC6082
3.9pF +
0.1µF
60812fd
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
5 1
0.200 REF 0.75 ±0.05 0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60812fd
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
8 1
0.200 REF 0.75 ±0.05 0.25 ±0.05
0.50 BSC
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60812fd
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641 Rev B)
.015 ±.004
× 45° .0532 – .0688 .004 – .0098
(0.38 ±0.10)
(1.35 – 1.75) (0.102 – 0.249)
.007 – .0098
0° – 8° TYP
(0.178 – 0.249)
60812fd
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev G)
0.889 ±0.127
(.035 ±.005)
5.10
(.201) 3.20 – 3.45
MIN (.126 – .136)
3.00 ±0.102
0.42 ± 0.038 0.65 (.118 ±.004) 0.52
(.0165 ±.0015) (.0256) (NOTE 3) 8 7 6 5 (.0205)
TYP BSC REF
RECOMMENDED SOLDER PAD LAYOUT
3.00 ±0.102
4.90 ±0.152
DETAIL “A” (.118 ±.004)
0.254 (.193 ±.006)
(NOTE 4)
(.010)
0° – 6° TYP
GAUGE PLANE
1 2 3 4
0.53 ±0.152
(.021 ±.006) 1.10 0.86
(.043) (.034)
DETAIL “A” MAX REF
0.18
(.007)
SEATING
PLANE 0.22 – 0.38 0.1016 ±0.0508
(.009 – .015) (.004 ±.002)
TYP 0.65 MSOP (MS8) 0213 REV G
(.0256)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
60812fd
60812fd
500k
350Ω 3.2V 0.1µF
0.1µF LT1790B
1.25V –
1/2
+ LTC6081
AV = 1001
1/2
10M LTC6081 +
1.25V
–
SENSOR: OMEGA SG-3/350-LY41 STRAIN GAUGE
10M
60812 TA02
Related Parts
PART NUMBER DESCRIPTION COMMENTS
LT1678/LT1679 Dual/Quad Precision Op Amps Low Noise, 2.7V to 36V Operation
LTC2050 Zero-Drift Op Amp 2.7V Operation, SOT-23 Package
LTC2051/LTC2052 Dual/Quad Zero-Drift Op Amps MS8/GN16 Packages
LTC2054/LTC2055 Single/Dual Zero-Drift Op Amp Micropower, SOT-23 and DFN Packages
LTC6078/LTC6079 Dual/Quad Low Noise Precision CMOS Op Amps Micropower 0.7µV/°C VOS Drift
LTC6241/LTC6242 Dual/Quad Low Noise CMOS Op Amps 18MHz Bandwidth,10V/µs Slew Rate
LTC6244 Dual 50MHz CMOS Op Amp Low Noise, Rail-to-Rail Out, MS8 and DFN Packages
60812fd