Electronics Circuit -D esign

(New)
P. Pages: 8
Time : Three Hours - Max. Marks : 100

·I'
Instructions . to Candidates : .

..L . Do not write anything on question paper except Seat No.

2. Unless specified in the question, otherwise u·s e the ·d ata
information given at the end of question paper for the .
selection of device.
Assume suitable data, if required.

., Use of non programmable calculator is allowed. . .

Unless specified for ·transistors, and diodes make of device is
· of Silicon (si).
Each question carries equal marks.

UNIT - I f0NL 4) RD. : :. S-4-')_.

1. Solve any two. 3) +-C2. ·~'f =-_ . 'Y·Ci v ·
I
·r~0 -=-- .?U""'..;;
20 _
J rt-L ,.,...J;'l _ ---s-1 111 v.v · s)~ :: t,1 o · ~J
. . . P..D. v~ -. . f3C I 'i_7 · -? . _rf'v-1
Design a senes voltage regulator circuit for following F~:::.. ·0 g-3 ~
~pecifications. . c,} P-v::: ·7S1J JL
f (l,__.-- 1r
0
i) Regulated output voltage VL = 12 V yV' .

ii) Load cunent IL= 125mi/iamp. 7)12-, : : :- _05-i J~

iii) Input voltage of regulator is. Vin = 20 ± 2V. . f ~' ·: :.- L.i)"' _ \ 0 ·
Draw the designed Circuit diagram. Design must include ·. q) Fv-
calculation of component value. Calcula~ion of max. ratings
of transistors selection of transistors and zener .diode.
[No need of any protection circuit] & only design the
regulated part of the power supply.. .
 · ratings of filter capacitors & rectifier diodes and heat sink
to I.C. if required?
' ;
Drop out voltage (V) 8jA (°C/w) esA REG(°C/w}
LM340 6-T · 2V · · 50 7.9

c) Design a Boost type of switching regulator using IC 15 77/25 77

·for following requirements . _,_ ·· -
i) I/P voltage to n~gulator Ein = SV
ii) 0/P voltage of regulator V0 = 10 V

iii) ILoadrriax = 0.8amp ,

iv) Af = 253 of f Loadmax ·
v) LiV,oad p.p = 0.05

vi) TA= 25°C ·.

vii) 8JA 65°C/w =

Draw the designed Circuit diagram ?
Design must include calculation of component values and b~dt
sink if required.? (No need of design of unregulated part of
. power supply.) ·

·UNIT - II

2. Solve any two. 20

..

iii) Q - points - [ linA, 3 V]

. clnt.\ ',,)
iv) I/P resistance Ri = Skn

· (f)Cf51cu1r ~ 30

..............................................---
)
 vi) ·. RLw .= lOOk, source resistance Rs =·6000

Use transistor (BJT) with

hfemin = 200, hie= lOkD., fT = lOMHz. · . . · .
. lD .- - . - . I .

Design must include caTculation,- of bias-components and

external capacitors. '
Draw the circuit-diagrm.

b) Design a voltage - divider bias 'circuit for a N-channel FET to set

:: / JDIJ[i -l/c$ points to (3 miliamp, lOV) .Take VDD = 25V and voltage across .
1
\ _;.Y~drain resistance Rv(VRv) equal to voltage acros? source resistance

.I \.r.__P Rs ( VRs ) equal to 2 .5 V -

FET used has· I DSS = 8 mi/iOmp , & Vp = -6 V.
'- '.y1i:::::. VLi -11.j)~I The i/p resistance of this network should be Ri = 1 mega - ohms ;
Draw the circuit diagram.

The amplifier sho\.Vn in fig. 1 is a CE amplifier with emitter

unbypassed. Modify this amplifier to use emitter current feedback
to giv~ Avf = 70 .
The Lower cutoff frequency is ft .= 100 Hz the signal source
resistance is Rs = 600 n . Design must include calculation of New /..
value of emitter resistance [By-passed part & un-bypassed part]
and external capacitors ? · ·

...---~----D Vcc=24 V
120 k Rc=12 k

c~t120
2 · k
.

Fig. 1

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UNIT - III

3. .Solve any two_. 20

a) Design a transformer coupled c:lass - A power amplifier to

/ meet following requirements. ·
i) 0/P voltage Vo = 5 V (rrris)

ii) Stability factor of bias network S = 10 ·

iii) Supply voltage Vee = 1~ V

'.
iv) Load resistance RL = 4n

v) Efficiency of output Trans.former = 0.9

Take hfe of transistor as 100. --

Draw the designed circuit. The .design :must". include calculation
of bias components, selection. of transformer transistor (device)
· rating calculations . 4

.b) Design a class - B transformercoupled audio-power amplifier

to give output of 10 W to a resistive load of 3n. Take efficiency
of output transformer to be 803, stability factor for bias network
as 8, Vee = 18 V.
D~sign must include calculation of power dissipation .of each
transistor. Calculation of bias component, selection of
transformer.

:; c) Design an audio complementary symmetry class - B push-pull

amplifier in fig. 2 for following conditions
i) To produce · maximum a.c. output power of 15 watts .

ii) To fed resister lo.ad R'L ~ 6n

· iii-) For operating frequency of 20 Hz-

II
·II . ~
)(f)ldcwft - 30 dsd>lctdl - 30
.· '
Design must inc::lude calculation ·of supply voltages, transistor
. max, power & voltag~s ratings and calculation of output
coupling cap~citor C2 '? © vcc z_ .
_Pa Q{_ ::.

vs

.________,, -vcc
Fig.2

UNIT - IV

4. Solve any two.:

Design a sin.gl"e tuned amplifier in fig. 3 using BJT in a C.E.

configuration for following specification.
i) Voltag~ gain Av 2 50
ii) Effe.ctive quality factor of amplifier Qeffective = 20

i\...~
i I 1:
J
o, '}.,
iii) Resonant frequency Ito = 4 Mega Hz ·. ,
t/-p· . t!/J
~o ! ' \)j\/
, \) \) ~ 6) iv) Working load resistance RLw
\-

= lOOkQ.
' .
i.--
\ 0 . Use a transistor havi!1g parameters
hfe = 100, ~e = lOk, r0 = SOkO, C0 =10 pf

¢©1ClcTI ·- 30 . 5 . P.T.0.
d>a>1aiYft - 30 ·

Design must include cakulation of tank circuit parameters .

. c?.
L, Rand

Vee

L
10k c
R
'

5k
IRLw - ~

Re
·-
Fig. 3

· b) Design ? transistorised colpitt oscillator circuit for following

requirements.
i) Frequency of oscillations f0 = 1 mega Hz .

ii) · Voltage Gain .Av = 25

iii) Q - points [1 milliamp, 5 V]

iv) . Stability factor "p" =6

v) l/P resistance Ri ~ 5k

Use a transistor with hfe = 300, hie = 10 kn, r0 = 20 kn.

Draw the designed circuit. Design must include bias component.
Calculations, feedback network calculations. Coupling capacitor .
calculation. -----~-·-----~
Assu~e inquctance of f I~ network equal to 1
Z'"
micro-Henery.

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 'dxbldctl- 30

Design an astable multivibrator (trans~storised using BJT) for

following requirements. _
i) Generate square wave of 2 kHz .

ii) Amplitude of square wave (V0 ) = 5 V

iii) Take colleGtor currents le = 2 mi/Ii amp. Use transistor

having hfe min = 7.0 . Draw the designed circuit.
. - -
Design must include bins component calculation

UNIT :- V

5. Solve any two. 20

'',. a) Design a ~on-i~verting amplifier using a single + 15 V supply

l using OP-AMP IC-741-C for following requirement.
I
I
I
=> 50
l i) Voltage gain Av

ii) Lower cut-off frequency ft = 20 Hz

ii) Load current IL = 5 mi(/i amp .

Draw the designed circuit specifications required for this

-design of 741-C are
. .

i) Open loop voltage gain A = 2x105 0

ii) Break .frequency - f0 = 5Hz

::
iii) Stew-rate . S = 0.5 VI µs
iv) Input resistance Ri = 2 Mn
"I
v) Output resistance R0 = 75 n

Cbct51ctrfl - 30 . . · 7 P.T.0.
d>Cb1atwfl - :30

b) . Design an active filter using sallen-key unity gain low-pass-filter to

satisfy ·following requirements; ·
i) . Roll'"off rate .~ 20 dB/decade
ii) Pass band as flat as possible.
iii) Critical frequency : 3 kHz
iv) Gain of 6.

c) Design a wide-band-pass filter to meet following reql:lirement.

i) fL = 200 Hz and fH =lkHz ·
. ii) Pass band gajri =4
iii) Pass-band as flat as possible.

DATA INFORMATION

Transistors BJT
I)
Pdmax=l2.5 W, · Ic(max)=3A,
BD - 227 (P-N-P)
hFE~in=40 , fy=125 MHz
r
. .
l
Pdmax=5 w, . Ic(maxf=O.7 A
£CN -100 (N-P-N) ·
hFEmin = 50,. fy~lOO MHz

Pdmax=250 mW, Ic(max)=0.1 A

BC.147B (N-P-N) .
hFE(min) = 200, fy=lOOMHz

II) . Zener diodes :.

. i) BZZ14 Vz = S.6V lz(m) = 20mA rz = 4.50

ii) BZZ16 Vz = 6.8 V lz(m) = 20mA r2 = 20

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a:; CblaC'li() - 30 · 8 . 108/955